Indication device

Abstract

To reduce the horizontal leak current that increases as the gap between subpixels becomes smaller, and improve the color reproduction rate.SOLUTION: A display device according to an example of the present invention includes a substrate including a first subpixel and a second subpixel, a first electrode disposed for each of the first subpixel and the second subpixel, and a bank that is disposed so as to cover a terminal of the first electrode and defines a light-emitting region and a non-light-emitting region surrounding the light-emitting region. The bank can include a first bank disposed on the first electrode, and a second bank disposed on the first bank and including a trench.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present specification relates to a display device, and more particularly to a display device having a structure that prevents leakage current between adjacent sub-pixels. [Background technology]

[0002] 2. Description of the Related Art Recently, display devices capable of displaying various information and simultaneously interacting with users viewing the information have been required to have various sizes, shapes, and functions.

[0003] Such display devices include liquid crystal display devices (LCDs), electrophoretic display devices (FPDs), and light emitting diode display devices (LEDs).

[0004] The display device is a self-luminous display device, which, unlike liquid crystal displays (LCDs), does not require a separate light source and can be manufactured in a lightweight and thin form. Furthermore, the display device is advantageous in terms of power consumption due to its low voltage operation, and is also excellent in color reproduction, response speed, viewing angle, and contrast ratio (CR), and is therefore being researched as a next-generation display.

[0005] Although the display device will be described assuming that it is an organic light emitting display device, the type of the light emitting element layer is not limited thereto.

[0006] A display device displays information on a screen by emitting light from a plurality of pixels including a light emitting element layer having a light emitting layer. Depending on the method of driving the pixels, the display device can be classified as an active matrix type light emitting display device or a passive matrix type light emitting display device.

[0007] An active matrix type light emitting display device displays images by controlling the current flowing through a light emitting diode using a thin film transistor (TFT).

[0008] A display device has an anode electrode, a light-emitting layer, and a cathode electrode. When voltages are applied to the anode electrode and the cathode electrode, holes move from the anode electrode to the light-emitting layer, and electrons move from the cathode electrode to the light-emitting layer. When holes and electrons combine in the light-emitting layer, excitons are formed during the excitation process, and light is generated by the energy from the excitons.

[0009] To provide high-quality image information, the resolution of display devices is gradually increasing. As the resolution increases, the distance between sub-pixels becomes narrower, but this causes a problem of image information being distorted due to current leakage in the lateral direction between adjacent pixels.

[0010] Therefore, in order to realize a high-resolution display device, various studies have been conducted to prevent lateral leakage current (LLC), but the results are still insufficient, and there is an urgent need for development to address this issue. Summary of the Invention [Problem to be solved by the invention]

[0011] The problem to be solved by the present invention is to provide a display device including a first bank and a second bank disposed on the first bank and including a trench, in order to reduce horizontal leakage current that increases as the spacing between adjacent subpixels becomes smaller and improve color reproduction ratio.

[0012] Another object of the present invention is to provide an organic light emitting display device in which the light emitting element layer is arranged along a bend formed on the top of a bank to prevent electrons formed inside the light emitting element layer from moving to an adjacent pixel during operation, thereby increasing the distance that electrons move to an adjacent subpixel.

[0013] Another problem to be solved by the present invention is to provide an emissive display device including a plurality of bank structures to prevent the problem of deterioration caused by ion penetration due to foreign matter or particles generated in a display device including a bank containing a black pigment.

[0014] The objects of the present invention are not limited to those mentioned above, and other objects not mentioned above will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0015] A display device according to an embodiment of the present invention may include a substrate having first and second subpixels, first electrodes respectively disposed in the first and second subpixels, and a bank disposed to cover an end of the first electrode and defining a light-emitting region and a non-light-emitting region surrounding the light-emitting region, wherein the bank may include a first bank disposed on the first electrode and a second bank disposed on the first bank and including a trench. [Effects of the Invention]

[0016] The display device according to the embodiment of the present invention includes a first bank and a second bank disposed on the first bank and including a trench, thereby reducing horizontal leakage current that increases as the spacing between adjacent subpixels becomes smaller, and improving color reproduction.

[0017] In the display device according to an embodiment of the present invention, the light emitting element layer is arranged along the bend formed on the top of the bank, thereby increasing the distance that electrons move to adjacent subpixels, and therefore, when driven, electrons formed inside the light emitting element layer can be prevented from moving to adjacent pixels.

[0018] Since the display device according to the embodiment of the present invention includes a plurality of bank structures, it is possible to prevent the problem of deterioration due to ion penetration caused by foreign matter or particles generated in a display device that includes a bank containing a black pigment.

[0019] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a plan view of a display device according to an embodiment of the present invention; [Figure 2] 1 is a diagram showing an arrangement of light-emitting regions and non-light-emitting regions of a display device according to an embodiment of the present invention; [Figure 3] FIG. 3 is a cross-sectional view taken along line II' in FIG. [Figure 4] 1 is a cross-sectional view of a light-emitting unit of a display device according to an embodiment of the present invention. [Figure 5] 10 is a diagram showing the arrangement of light-emitting regions and non-light-emitting regions of a display device according to another embodiment of the present invention; [Figure 6] FIG. 6 is a cross-sectional view taken along line II-II' in FIG. 5. DETAILED DESCRIPTION OF THE INVENTION

[0021] The advantages and features of the present invention, and methods for achieving them, will become more apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and complete, and to fully convey the scope of the invention to those skilled in the art. The present invention is defined only by the scope of the claims.

[0022] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of the present invention are merely illustrative, and the present invention is not limited to the illustrated details. The same reference symbols refer to the same elements throughout the specification. Furthermore, in describing this specification, if a detailed description of related prior art is deemed to unnecessarily obscure the gist of the present invention, such a detailed description will be omitted. When using words such as "include," "have," and "be made" in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, it also includes the plural unless otherwise explicitly stated.

[0023] When interpreting elements, they are interpreted as including a range of error even if there is no separate explicit description of the range of error.

[0024] When describing a positional relationship, for example, when the positional relationship of two parts is described using terms such as "above," "on top," "below," or "next to," one or more other parts may be located between the two parts, unless terms such as "immediately" or "directly" are used.

[0025] When describing a temporal relationship, if the temporal precedence is described using terms such as "after," "following," "next," or "before," the terms "immediately" or "directly" are not used, and therefore cases in which the relationship is not consecutive can also be included.

[0026] Although terms such as "first," "second," etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may be a second component within the technical concept of the present invention.

[0027] In describing components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are used merely to distinguish the component from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "connected," "coupled," or "connected" to another component, it should be understood that the component may be directly connected or connected to the other component, but that other components may also be "intervening" between components that may be indirectly connected or connected without any other explicit description.

[0028] "At least one" should be understood to include all combinations of one or more of the associated components. For example, "at least one of a first, second, and third component" means not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0029] In this specification, the term "apparatus" may include a display device such as a liquid crystal module (LCM) or an organic light emitting display module (OLED module) that includes a display panel and a driver for driving the display panel. It may also include a set electronic apparatus or set device or set apparatus, such as a notebook computer, television, computer monitor, automotive apparatus or other form of vehicle, which is a complete product or final product that includes an LCM or OLED module, or a mobile electronic apparatus such as a smartphone or electronic pad.

[0030] Therefore, the device in this specification can include a display device itself such as an LCM, an OLED module, etc., as well as a set device which is an application product or a final consumer device including an LCM, an OLED module, etc.

[0031] In some embodiments, an LCM or OLED module including a display panel and a driver may be referred to as a "display device," and a completed electronic device including the LCM or OLED module may be referred to as a "set device." For example, the display device may include a liquid crystal (LCD) or organic light emitting diode (OLED) display panel and a source PCB serving as a controller for driving the display panel. The set device may further include a set PCB serving as a set controller electrically connected to the source PCB for driving the entire set device.

[0032] The display panel used in the embodiments of the present invention may be any type of display panel, such as a liquid crystal display panel, an organic light emitting diode (OLED) display panel, or an electroluminescent display panel, and the embodiments are not limited thereto. For example, the display panel may be a display panel that can generate sound by vibrating with a vibration device according to the embodiments of the present invention. The display panel used in the display device according to the embodiments of the present invention is not limited in shape or size.

[0033] The features of the various embodiments of the present invention may be partially or wholly combined or combined with each other, and may be technically interlocked and driven in various ways, and each embodiment may be implemented independently of the others or may be implemented together in a related relationship.

[0034] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings and examples. The scales of the components shown in the drawings are different from the actual scales for the convenience of explanation, and are not limited to the scales shown in the drawings.

[0035] Various embodiments of the present invention will now be described in detail with reference to the drawings.

[0036] FIG. 1 is a plan view of a display device according to an embodiment of the present invention.

[0037] 1, the substrate 110 may include a display area (active area or display area) AA and a non-display area (non-active area or non-display area) NA surrounding the display area AA. The non-display area NA of the substrate 110 may be adjacent to the display area AA and disposed outside the display area AA.

[0038] The display area AA is an area where pixels P are arranged and an image is displayed.

[0039] The pixel P disposed in the display area AA may further include a plurality of sub-pixels SP1, SP2, and SP3, which are individual units that emit light, and the sub-pixels SP may emit red, green, blue, and / or white light, although the embodiments of the present specification are not limited thereto.

[0040] The display area AA may include a light emitting element. Each of the sub-pixels SP1, SP2, and SP3 may include a light emitting element layer for displaying an image and a thin film transistor for driving the light emitting element layer.

[0041] Each subpixel SP may include a plurality of thin film transistors, a capacitor, and a plurality of wirings. For example, each subpixel SP may have a structure including two thin film transistors and one capacitor (2T1C), but is not limited thereto, and may be configured as 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, 8T2C, etc., and may be implemented depending on the structure and type of the thin film transistor.

[0042] Although FIG. 1 illustrates the non-display area NA surrounding the rectangular display area AA, the shape of the display area AA and the shape and arrangement of the non-display area NA adjacent to the display area AA are not limited to the example shown in FIG. 1. The display area AA and the non-display area NA may have shapes suitable for the design of an electronic device incorporating the display device 100. In the case of a display device for a wearable device, the display area AA may have a circular shape like a wristwatch, and the concept of the embodiments of this specification may also be applied to a free-form display device applicable to a vehicle instrument panel, etc. Exemplary shapes of the display area AA may be, but are not limited to, a pentagon, a hexagon, a circle, an ellipse, or the like.

[0043] The non-display area NA is an area where various wirings and driving circuits for driving the sub-pixels SP1, SP2, and SP3 arranged in the display area AA are arranged. For example, various ICs and driving circuits such as a gate driver and a data driver may be arranged in the non-display area NA. The non-display area NA may be a bezel area and is not limited to this term.

[0044] The display device 100 of the present specification may include various additional elements for generating various signals or driving the subpixels SP1, SP2, and SP3 in the display area AA. For example, a driving circuit for controlling (or driving) the subpixels SP1, SP2, and SP3 may include a gate driver 112, data signal lines, a multiplexer (MUX), an electrostatic discharge (ESD) circuit, power supply wiring, an inverter circuit, and connection wiring 116. The power supply wiring may be a high-potential voltage wiring and / or a low-potential voltage wiring, although the present specification is not limited thereto. The display device 100 may also include additional elements other than those for driving the subpixels SP1, SP2, and SP3. For example, the display device 100 may include additional elements for providing a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, and a tactile feedback function, although the present specification is not limited thereto. The mentioned additional elements may be located in the non-display area NA or in an external circuit connected to the connection interface, and the embodiments of this specification are not limited thereto.

[0045] A pad unit 114 may be disposed on one side of the non-display area NA. The pad unit 114 may be a metal pattern to which an external module, such as a flexible printed circuit board (FPCB) or a chip on film (COF), is bonded. Although the pad unit 114 is described as being disposed on one side of the substrate 110, the shape and arrangement of the pad unit 114 are not limited thereto.

[0046] Gate drivers 112 may be disposed on one side of the non-display area NA and on the other side opposite the one side. The gate drivers 112 may provide gate signals to the thin film transistors. The gate drivers 112 may include various gate driving circuits, which may be formed directly on the substrate 110. In this case, the gate drivers 112 may be GIPs (Gate-In-Panels), and are not limited to the term GIP.

[0047] The gate driver 112 may be disposed between the display area AA and the dam 117. A high-potential voltage wiring VDD, a low-potential voltage wiring VSS, a multiplexer (MUX), an electrostatic discharge (ESD) circuit, and connection wiring 116 may be disposed between the display area AA and the pad unit 114 of the non-display area NA, but the embodiments of this specification are not limited thereto.

[0048] The high-potential voltage wiring VDD, the low-potential voltage wiring VSS, the multiplexer (MUX), and the connection wiring 116 may be arranged between the display area AA and the bending area BA, but are not limited to this. For example, the high-potential voltage wiring VDD, the low-potential voltage wiring VSS, the multiplexer (MUX), and the connection wiring 116 may be arranged in a non-bending area adjacent to the display area AA.

[0049] The connection wiring 116 may be arranged in a part of the non-display area NA. The connection wiring 116 may be arranged in the bending area BA of the display device 100 and in a non-bending area adjacent to the bending area BA.

[0050] The connection wiring 116 may be a component for transmitting a signal (e.g., a voltage) from an external module bonded to the pad unit 114 to a circuit unit such as the display area AA or the gate driver 112. For example, various signals and voltages such as various gate signals, data signals, high potential voltages, and low potential voltages may be transmitted through the connection wiring 116.

[0051] The connection wiring 116 can be divided into power connection wiring and / or signal connection wiring depending on the voltage and / or video signal to be transmitted.

[0052] The power supply connection wiring can transmit a voltage supplied from an external module to the display area AA. The power supply connection wiring can be connected to, but is not limited to, a low potential voltage wiring VSS, a high potential voltage wiring VDD, a gate low voltage wiring and / or a gate high voltage wiring included in the gate driver 112.

[0053] The signal connection wiring can transmit signals supplied from an external module to the display area AA, and can be connected to scan lines and / or data lines, but is not limited thereto.

[0054] Dam 117 may be arranged in first non-display area NA1 so as to surround all or part of display area AA. Dam 117 may be arranged adjacent to display area AA and outside display area AA.

[0055] The dam 117 may be disposed along the periphery of the display area AA to control the flow of the layer containing the organic material in the sealing portion disposed on the light-emitting element layer. The number of dams 117 may be one or more, and the embodiments of the present specification are not limited thereto.

[0056] A crack detection wiring (Panel Crack Detector) 118 may further be disposed in a portion of the non-display area NA of the substrate 110 .

[0057] The crack detection wiring 118 may be disposed between the edge (or terminal end) of the substrate 110 and the dam 117. Alternatively, the crack detection wiring 118 may be disposed below the dam 117 and overlap with the dam 117 at least partially.

[0058] The crack detection wiring 118 is arranged on the outer periphery of the display device and can detect defects such as cracks that may occur on the outer periphery of the display device.

[0059] The display area AA may further include a hole H. The hole H may be located between a plurality of subpixels SP arranged in the display area AA. The hole H may be an area where an optical component such as a camera or an optical sensor is arranged. The optical sensor may include a proximity sensor, an infrared sensor, an ultraviolet sensor, etc., and the embodiments of the present specification are not limited thereto. The display device 100 can secure a space where an optical component is arranged by the hole H penetrating a portion of the configuration of the display device 100.

[0060] FIG. 2 is a diagram showing the arrangement of light-emitting regions and non-light-emitting regions of a display device according to an embodiment of the present invention.

[0061] 2, the light-emitting area EA is a sub-pixel area where light is emitted from the light-emitting element layer, and each sub-pixel may include a light-emitting area. A plurality of light-emitting areas EA may be arranged on the substrate, spaced apart from each other. The non-light-emitting area NEA may be arranged to surround the light-emitting area.

[0062] The luminescent area EA is an area in the luminescent layer where light is emitted to the outside, and may be an area where the first bank 320 and the second bank 330 are not arranged. The non-luminescent area NEA is an area in the luminescent layer where light is not emitted to the outside, and may be an area where the first bank 320 and the second bank 330 are arranged.

[0063] The light emitting area EA may include multiple light emitting areas that emit different colors. For example, the light emitting area EA may include a first light emitting area EA1 that emits red light, a second light emitting area EA2 that emits green light, and a third light emitting area EA3 that emits blue light. Alternatively, the light emitting area EA may include, but is not limited to, a white light emitting area.

[0064] The banks may include a first bank 320 and a second bank 330 .

[0065] The first bank 320 may be arranged to surround all or part of each light-emitting region EA. For example, the first bank 320 may include a first pattern 321 surrounding the first sub-pixel SP1 or first light-emitting region EA1, a second pattern 322 surrounding the second sub-pixel SP2 or second light-emitting region EA2, and a third pattern 323 surrounding the third sub-pixel SP3 or third light-emitting region EA3. The first pattern 321, the second pattern 322, and the third pattern 323 may be arranged to be unconnected and spaced apart from each other.

[0066] The second bank 330 may be disposed in the non-light-emitting area NEA. For example, the second bank 330 may at least partially overlap the first bank 320, or may cover the entire first bank 320 and be disposed continuously in the non-light-emitting area.

[0067] The banks are described in more detail below in FIG.

[0068] Although each light-emitting region EA is formed in a specific shape and arranged in a specific pattern as shown in FIG. 2, the light-emitting regions EA of the display device 100 according to the present specification are not limited to such a specific shape and may be arranged in various shapes and patterns. For example, exemplary shapes of each light-emitting region EA may be, but are not limited to, a square, a pentagon, a hexagon, an octagon, a circle, or an ellipse. For example, the first light-emitting region EA1 and the third light-emitting region EA3 may have the same shape. The second light-emitting region EA2 may have a different shape from the first light-emitting region EA1. The second light-emitting region EA2 may have a different shape from the third light-emitting region EA3. For example, the second light-emitting region EA2 may have a different shape from the first light-emitting region EA1 and the third light-emitting region EA3.

[0069] A pixel P may be configured with a plurality of sub-pixels or light-emitting regions emitting the same color. For example, at least two second sub-pixels SP2 or second light-emitting regions EA2 may be arranged in a pixel P. At least two second light-emitting regions EA2 emitting green light may be arranged in a pixel P, but the embodiments of the present specification are not limited thereto.

[0070] Fig. 3 is a cross-sectional view taken along line II' in Fig. 2. Fig. 3 is a diagram showing an example of the cross-sectional structure of the II' region shown in Fig. 2.

[0071] 3, the substrate 110 can support various components of the display device and can be made of glass or a flexible plastic material.

[0072] For example, the substrate 110 may be formed of at least one of polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone, and polycarbonate, but is not limited thereto.

[0073] When the substrate 110 is made of polyimide, it may be composed of two polyimide layers, and an inorganic film may be further disposed between the two polyimide layers.

[0074] The substrate 110 may also be referred to as a concept including elements and functional layers formed on the substrate 110, such as a switching thin film transistor, a driving thin film transistor connected to the switching thin film transistor, an organic light-emitting element connected to the driving thin film transistor, a protective layer, etc., but is not limited thereto.

[0075] The buffer layer 120 may be disposed over the entire surface of the substrate 110 .

[0076] The buffer layer 120 is formed on the substrate 110 and can prevent materials inside the substrate 110 from migrating to the thin film transistor or semiconductor layer during the deposition process.

[0077] The buffer layer 120 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0078] The buffer layer 120 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or multiple layers thereof. When the buffer layer 120 is composed of multiple layers, silicon oxide (SiOx) and silicon nitride (SiNx) may be alternately formed, but the embodiments of the present specification are not limited thereto. The buffer layer 120 may be omitted depending on the type and material of the substrate 110, the structure and type of the thin film transistor 200, etc.

[0079] A thin film transistor 200 may be disposed on the buffer layer 120. The thin film transistor 200 may include a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode.

[0080] For ease of explanation, only one thin film transistor 200 among various thin film transistors is shown, but other thin film transistors may also be included in the display device 100. Also, for ease of explanation, the thin film transistor has been described as having a top gate (or top gate) structure in which the gate electrode is located on the top of the semiconductor layer, but is not limited to this structure and may be embodied in other structures such as a bottom gate (or bottom gate) structure in which the gate electrode is located on the bottom of the semiconductor layer, or a double gate structure in which the gate electrode is located both on the top and bottom of the semiconductor layer.

[0081] A semiconductor pattern 210 of the thin film transistor 200 may be disposed on the buffer layer 120 .

[0082] The semiconductor pattern 210 may be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of, but is not limited to, low temperature polysilicon (LTPS) having high mobility. When the semiconductor pattern is made of a polycrystalline semiconductor, it has low energy consumption and excellent reliability.

[0083] The semiconductor pattern 210 may be made of an oxide semiconductor, such as, but not limited to, IGZO (Indium-gallium-zinc-oxide), IZO (Indium-zinc-oxide), IGTO (Indium-gallium-tin-oxide), or IGO (Indium-gallium-oxide). When the semiconductor pattern 210 is made of an oxide semiconductor, it has an excellent effect of blocking leakage current, thereby minimizing brightness changes of sub-pixels during low-speed driving.

[0084] When the semiconductor pattern 210 is made of a polycrystalline semiconductor or an oxide semiconductor, some regions of the semiconductor pattern 210 may have a conductive region.

[0085] The semiconductor pattern 210 may be made of amorphous silicon (a-Si) or various organic semiconductor materials such as pentacene, but is not limited thereto.

[0086] A first insulating layer 130 may be disposed on the semiconductor pattern 210 over the entire area of ​​the substrate 110 .

[0087] The first insulating layer 130 is disposed between the semiconductor pattern 210 and the gate electrode 230 and can insulate the semiconductor pattern 210 from the gate electrode 230 .

[0088] The first insulating layer 130 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0089] The first insulating layer 130 may have holes for electrically connecting the source electrode 250 and the drain electrode 270 to the semiconductor pattern 210 .

[0090] A gate electrode 230 of the thin film transistor 200 may be disposed on the first insulating layer 130. The gate electrode 230 may be disposed to overlap the semiconductor pattern 210.

[0091] The gate electrode 230 may be formed as a single layer or multilayers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof, but is not limited thereto.

[0092] A second insulating layer 140 may be disposed on the gate electrode 230 over the entire area of ​​the substrate 110 .

[0093] The second insulating layer 140 is disposed between the gate electrode 230 and the source and drain electrodes 250 and 270 to insulate the gate electrode 230 from the source and drain electrodes 250 and 270 .

[0094] The second insulating layer 140 may have holes to electrically connect the source electrode 250 and the drain electrode 270 to the semiconductor pattern 210 .

[0095] The second insulating layer 140 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0096] A source electrode 250 and a drain electrode 270 may be disposed on the second insulating layer 140 .

[0097] The second insulating layer 140 is disposed between the gate electrode 230 and the source and drain electrodes 250 and 270 to insulate the gate electrode 230 from the source and drain electrodes 250 and 270 .

[0098] The second insulating layer 140 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0099] The second insulating layer 140 may have holes to electrically connect the source electrode 250 and the drain electrode 270 to the semiconductor pattern 210 .

[0100] A source electrode 250 and a drain electrode 270 may be disposed on the second insulating layer 140 .

[0101] The source electrode 250 and the drain electrode 270 may be electrically connected to the semiconductor pattern 210 through holes in the first insulating layer 130 and the second insulating layer 140, respectively.

[0102] The source electrode 250 and the drain electrode 270 may be formed as a single layer or multiple layers made of any one of, but not limited to, molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof. For example, the source electrode 250, the drain electrode 270, and the power supply line VDD may be formed as, but not limited to, a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of a conductive metal material.

[0103] A third insulating layer 150 may be disposed over the entire area of ​​the substrate 110 on the source electrode 250 and the drain electrode 270. The third insulating layer 150 may be disposed on the thin film transistor 200 to protect the thin film transistor 200. The third insulating layer 150 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0104] The third insulating layer 150 may have holes for electrically connecting the thin film transistor 200 to the connection electrode 170 or the first electrode 310. The third insulating layer 150 may be a protective layer, and may be omitted depending on the structure and type of the thin film transistor 200.

[0105] A planarization layer 160 may be disposed on the third insulating layer 150 .

[0106] The planarization layer 160 can protect the thin film transistor 200 disposed below the planarization layer 160 and can reduce or planarize steps due to various patterns.

[0107] The planarization layer 160 may be arranged in a single layer, but may also be arranged in two or more layers in consideration of the arrangement of the electrodes.

[0108] As the display device 100 evolves to higher resolution, the number of various signal wirings increases. Therefore, it is difficult to arrange all wiring lines on one layer while ensuring minimum spacing, so additional layers are required. Such additional layers provide more space for wiring arrangement, making it easier to design the arrangement of electrical wires / electrodes. Furthermore, if a dielectric material is used as the multi-layered planarization layer 160, the planarization layer 160 can be used to form capacitance between metal layers.

[0109] When the planarization layer 160 is arranged in two layers, it may include a first planarization layer 161 and a second planarization layer 162 .

[0110] The first planarization layer 161 and the second planarization layer 162 may be formed of at least one organic insulating material such as, but not limited to, BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0111] When the planarization layer 160 is composed of two layers, a hole may be formed in the first planarization layer 161 and the connection electrode 170 may be disposed in the hole. A second planarization layer 162 having a hole may be disposed on the first planarization layer 161 and the connection electrode 170. A first electrode 310 may be disposed in the hole of the second planarization layer 162. Therefore, the thin film transistor 200 and the first electrode 310 may be electrically connected through the connection electrode 170.

[0112] For example, a connection electrode 170 may be disposed on the first planarization layer 161. One end (or a portion) of the connection electrode 170 may be connected to the thin film transistor 200, and the other end (or another portion) of the connection electrode 170 may be connected to the first electrode 310.

[0113] The connection electrode 170 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof, but is not limited thereto.

[0114] The connection electrode 170 may be omitted depending on the structure and type of the display device.

[0115] A first electrode 310 may be disposed on the planarization layer 160. The first electrode 310 may be an anode electrode.

[0116] If the display device 100 is a top emission type, the first electrode 310 may be disposed as a reflective electrode that reflects light and may be made of an opaque conductive material. The first electrode 310 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. For example, the first electrode 310 may have a three-layer structure of silver (Ag), lead (Pd), and copper (Cu), but is not limited thereto. Alternatively, the first electrode 310 may further include a transparent conductive material layer with a high work function, such as indium tin oxide (ITO).

[0117] When the display device 100 is a bottom emission type, the first electrode 310 may be disposed using a transparent conductive material that transmits light. For example, the first electrode 310 may be formed of at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).

[0118] A bank may be disposed on the first electrode 310 and the planarization layer 160 .

[0119] The bank can divide a plurality of sub-pixels SP, minimize light spreading, and prevent color mixing that occurs at various viewing angles. The bank can define (or divide) a light-emitting region where light is emitted and a non-light-emitting region where light is not emitted, and the bank can be disposed in the non-light-emitting region.

[0120] The banks may include a first bank 320 and a second bank 330 .

[0121] The first bank 320 may be disposed on the planarization layer 160 and the first electrode 310. For example, the first bank 320 may be disposed so as to cover the ends of the first electrode 310, and may cover the top and side surfaces of the first electrode 310.

[0122] The first bank 320 may be disposed to surround each light-emitting region EA. For example, the first bank 320 may include a first pattern 321 surrounding the first subpixel SP1 or first light-emitting region EA1, a second pattern 322 surrounding the second subpixel SP2 or second light-emitting region EA2, and a third pattern 323 surrounding the third subpixel or third light-emitting region. The first pattern 321, the second pattern 322, and the third pattern 323 may be spaced apart and not connected to each other. The top surface of the planarization layer 160 may be exposed by the first pattern 321, the second pattern 322, and the third pattern 323. The top surface of the planarization layer 160 exposed by the first pattern 321, the second pattern 322, and the third pattern 323 may contact the second bank 330.

[0123] The first bank 320 may be made of at least one of, but is not limited to, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), an organic insulating material such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, or a photosensitive material containing a black pigment.

[0124] The first bank 320 may include a light-blocking material and an initiator consisting of a single molecule of an oligomer component.

[0125] Since the first bank 320 contains a black pigment, it also contains a dispersant to prevent aggregation of the black pigment. The dispersant of the first bank 320 is a monomolecular oligomer component and is highly susceptible to thermal decomposition. Therefore, during processes performed at high temperatures, foreign matter or particles may be generated, which may cause degradation of the display device. Therefore, since the first bank 320 is disposed in a portion of the non-emitting area (NEA) as in the display device 100 according to an embodiment of the present invention, the generation of foreign matter or particles may be reduced, thereby preventing degradation of the display device.

[0126] The second bank 330 may be disposed on the first bank 320 and the planarization layer 160 in the non-emitting area NEA. The second bank 330 may at least partially overlap the first bank 320 or may cover the entire first bank 320 and be disposed continuously in the non-emitting area NEA. Although FIG. 3 illustrates the second bank 330 covering the entire first bank 320, the second bank 330 may be disposed continuously in the non-emitting area NEA while exposing a portion of the top surface of the first bank 320. In this case, the top and side surfaces of the first bank 320 may be exposed by the second bank 330 and may be in contact with a portion of the light-emitting element layer 340. That is, the second bank 330 may cover at least a portion of the outer surface of the first bank 320. For example, the second bank 330 may cover the entire outer surface of the first bank 320. Alternatively, the second bank 330 may expose an edge region of the outer surface of the first bank 320, and the projection of the edge portion of the outer surface of the first bank 320 on the substrate 110 may overlap half of the projection of the end of the first electrode 310 on the substrate 110.

[0127] 3, the length of the end of the first electrode 310 may be 2.5 μm, and the projected length of the edge of the first bank 320 (exposed by the second bank 330) on the substrate 110 may be 1.78 μm. When the second bank 330 covers the entire outer surface of the first bank 320, the side angle between the first bank 320 and the first electrode may be 58.4°. When the second bank 330 exposes an edge region of the outer surface of the first bank 320, the side angle between the first bank 320 and the first electrode may be 17.9°.

[0128] The second bank 330 may include a trench T due to the first pattern 321 and the second pattern 322 of the first bank 320 that are spaced apart from each other.

[0129] The trench T of the second bank 330 may be formed by removing a portion of the first bank 320. The trench T may be formed in a shape that is obliquely recessed from the top surface, but is not limited thereto and may be formed in various shapes.

[0130] The trench T formed in the second bank 330 may increase the length of the light emitting element layer 340 disposed on the second bank 330. For example, the light emitting element layer 340 formed after the second bank 330 is disposed along the trench T of the second bank 330. This increases the distance that electrons travel within the light emitting element layer 340 to adjacent subpixels, thereby preventing electrons formed within the light emitting element layer 340 from traveling to adjacent subpixels during operation.

[0131] The second bank 330 may include two spacers and a connecting portion. The two spacers may be disposed on the first pattern 321 and the second pattern 322, respectively, and may protrude in a direction away from the substrate 330. That is, the two spacers may protrude toward the encapsulation portion 400. The connecting portion may connect the two spacers to form a trench T.

[0132] The second bank 330 may be made of, but is not limited to, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), an organic insulating material such as BCB (Benzocyclobutene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, or a transparent material. The second bank 330 may include a light-transmitting material.

[0133] Since the first bank 320 contains black pigment, foreign matter or particles are generated, but since the second bank 330 covers the first bank 320, the foreign matter or particles generated in the first bank 320 can be prevented from moving into the display device 100.

[0134] Although only the first pattern 321 and the second pattern 322 are shown in FIG. 3, the third pattern 323 can also be applied in the same manner.

[0135] The light emitting element layer 340 may be disposed on the first electrode 310 and the bank 420. The light emitting element layer 340 may include an emitting layer (EML) for emitting light of a specific color for each of the plurality of subpixels SP1, SP2, and SP3. The emitting layer may be a layer from which light is emitted. For example, holes generated in the first electrode 310 and electrons generated in the second electrode 350 may be injected into the emitting layer. The injected holes and electrons may combine to generate excitons in the emitting layer. Light may be generated when the generated excitons fall from an excited state to a ground state.

[0136] For example, the light-emitting layer may include one of a red light-emitting layer that emits red light, a green light-emitting layer that emits green light, a blue light-emitting layer that emits blue light, and a white light-emitting layer. If the light-emitting device layer 340 includes a white light-emitting layer, a color filter for converting white light from the white light-emitting layer into light of another color may be disposed on the light-emitting device layer 340. In addition to the light-emitting layer, the light-emitting device layer 340 may further include, but is not limited to, a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), an electron injection layer (EIL), and the like.

[0137] The light-emitting layer of the light-emitting element layer 340 may be arranged in each of the multiple subpixels SP1, SP2, and SP3, and the hole injection layer (HIL), hole transport layer (HTL), electron blocking layer (EBL), hole blocking layer (HBL), electron transport layer (ETL), and electron injection layer (EIL) of the light-emitting element layer 340 may be arranged over the entire display area AA.

[0138] The light emitting element layer 340 of the display device 100 according to an embodiment of the present specification may be an emitting unit. The emitting unit may be disposed in at least one light emitting element layer. For example, a stack structure may be formed by stacking a plurality of light emitting element layers between the first electrode 310 and the second electrode 350. In this case, a charge generation layer may be further disposed between the plurality of light emitting element layers. A plurality of light emitting units may be disposed for each subpixel SP. The light emitting unit will be described in detail below with reference to FIG. 4.

[0139] A second electrode 350 may be disposed on the light-emitting element layer 340. The second electrode 350 may be a cathode electrode. The second electrode 350 supplies electrons to the light-emitting element layer 340 and may be made of a conductive material with a low work function.

[0140] When the display device 100 is a top emission type, the second electrode 350 may be disposed using a transparent conductive material that transmits light, such as, but not limited to, at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).

[0141] Alternatively, the conductive layer may be disposed using a semi-transparent material that transmits light, such as, but not limited to, at least one of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag.

[0142] When the display device 100 is a bottom emission type, the second electrode 350 may be disposed as a reflective electrode that reflects light and may be made of an opaque conductive material. For example, the second electrode 350 may be made of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.

[0143] The encapsulant 400 may be disposed on the second electrode 350. The encapsulant 400 may protect the light emitting element layer 340 from external moisture, oxygen, or foreign substances. For example, the encapsulant 400 may prevent the penetration of external oxygen and moisture to prevent oxidation of the light emitting material and the electrode material.

[0144] The encapsulant 400 may be made of a transparent material so that light emitted from the light emitting device layer 340 can be transmitted therethrough.

[0145] The sealing unit 400 may include a first sealing layer 410, a second sealing layer 420, and a third sealing layer 430 that block the penetration of moisture and oxygen. In this case, the sealing unit 400 may have a structure in which the first sealing layer 410, the second sealing layer 420, and the third sealing layer 430 are alternately stacked.

[0146] The first and third encapsulation layers 410 and 430 may be made of at least one inorganic material such as, but not limited to, silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlOz).The first and third encapsulation layers 410 and 430 may be formed using a vacuum deposition method such as, but not limited to, chemical vapor deposition (CVD) or atomic layer deposition (ALD).

[0147] The first encapsulation layer 410 and the third encapsulation layer 430 may be formed of at least two or more layers. For example, the first encapsulation layer 410 may have a three-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx) / silicon oxide (SiOx), but is not limited thereto. Alternatively, the first encapsulation layer 410 may have a four-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx) / silicon oxide (SiOx) / silicon oxide (SiOx), but is not limited thereto.

[0148] The second encapsulation layer 420 can cover foreign matter or particles that may occur during the manufacturing process and can also planarize the surface of the first encapsulation layer 410. For example, the second encapsulation layer 420 may be a particle cover layer, and is not limited to this term.

[0149] The second sealing layer 420 may be an organic material, for example, silicon oxycarbonate (SiOCz), epoxy, polyimide, polyethylene, acrylate-based polymer, etc., but is not limited thereto.

[0150] The second sealing layer 420 may be made of a thermosetting or photocurable material that is cured by heat or light.

[0151] The first encapsulation layer 410 may extend into the non-display area NA. For example, the first encapsulation layer 410 may be disposed so as to cover the dam 117. The third encapsulation layer 430 may extend into the non-display area NA. For example, the third encapsulation layer 430 may be disposed on the first encapsulation layer 410 and so as to cover the dam 117.

[0152] The touch unit 500 may be disposed on the sealing unit 400 .

[0153] The touch unit 500 may include a first touch electrode 540_R, a first touch connection electrode 520, a second touch electrode, and a second touch connection electrode 540_C.

[0154] The first touch electrode 540_R, the first touch connection electrode 520, the second touch electrode, and a portion of the second touch connection electrode 540_C may be disposed to overlap with the bank 420.

[0155] The first touch electrode 540_R, the second touch electrode 520, the first touch connection electrode 520, and the second touch connection electrode 540_C may be formed in a mesh pattern in which metal lines having a small line width intersect with each other. The mesh pattern may have a diamond shape. The shape of the mesh pattern may be, but is not limited to, a square, a pentagon, a hexagon, a circle, an ellipse, or the like.

[0156] The first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C may be arranged using an opaque conductive material with low resistance, such as, but not limited to, a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof.

[0157] For example, the first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C may have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of conductive metal material, but is not limited thereto.

[0158] The first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C may be made of the same material as the source electrode 250 and the drain electrode 270.

[0159] A touch buffer layer 510 may be disposed on the encapsulation unit 400. The touch buffer layer 510 may prevent chemicals (such as a developer or an etchant) used in the manufacturing process of the touch unit 500 or external moisture from penetrating into the organic light emitting element layer 340. In addition, the touch buffer layer 510 may prevent a problem in which a plurality of touch sensor metals disposed on the touch buffer layer 510 are disconnected due to external impact, and may block interference signals that may be generated when the touch unit is driven.

[0160] The touch buffer layer 510 may be made of at least one of inorganic insulating materials such as silicon nitride (SiNx) or silicon oxide (SiOx) or organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, and the touch buffer layer 510 may be configured in multiple layers, but is not limited thereto.

[0161] A first touch connection electrode 520 may be disposed on the touch buffer layer 510 .

[0162] For example, the first touch connection electrode 520 may be disposed between adjacent first touch electrodes 540_R in the first direction (or X-axis direction). The first touch connection electrode 520 may electrically connect a plurality of adjacent first touch electrodes 540_R spaced apart in the first direction (or X-axis direction), but is not limited thereto.

[0163] The first touch connection electrode 520 may be arranged to overlap with the second touch connection electrode 540_C connecting the adjacent second touch electrode in the second direction (or Y-axis direction). The first touch connection electrode 520 and the second touch connection electrode 540_C may be formed in different layers and thus may be electrically insulated.

[0164] A touch insulating layer 530 may be disposed on the touch buffer layer 510 and the first touch connection electrode 520 .

[0165] The touch insulating layer 530 may include holes for electrically connecting the first touch electrode 540_R and the first touch connection electrode 520.

[0166] The touch insulating layer 530 can electrically insulate the second touch electrode and the second touch connection electrode 540_C.

[0167] The touch insulating layer 530 may be composed of, but is not limited to, a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof.

[0168] A first touch electrode 540_R, a second touch electrode, and a second touch connection electrode 540_C may be disposed on the touch insulating layer 530.

[0169] The first touch electrode 540_R and the second touch electrode 540_R may be spaced apart from each other. At least one first touch electrode 540_R adjacent to each other in the first direction (or X-axis direction) may be spaced apart from each other. At least one first touch electrode 540_R adjacent to each other in the first direction (or X-axis direction) may be connected to a first touch connection electrode 520 disposed between the plurality of first touch electrodes 740_R. For example, the plurality of adjacent first touch electrodes 540_R may be connected to the first touch connection electrode 520 through a hole in the touch insulating layer 530.

[0170] The second touch electrodes adjacent in the second direction (or Y-axis direction) may be connected by the second touch connection electrode 540_C. The second touch electrode and the second touch connection electrode 540_C may be formed in the same layer. For example, the second touch connection electrode 540_C may be disposed between the second touch electrodes in the same layer as the second touch electrode. The second touch connection electrode 540_C may be formed extending from the second touch electrode.

[0171] The first touch electrode 540_R, the second touch electrode, and the second touch connection electrode 540_C may be formed in the same process.

[0172] A touch planarization layer 550 may be disposed on the first touch electrode 540_R, the second touch electrode, and the second touch connection electrode 540_C.

[0173] The touch drive circuit may receive a touch sensing signal from the first touch electrode 540_R. The touch drive circuit may also transmit a touch drive signal from the second touch electrode. The touch drive circuit may sense a user's touch using mutual capacitance between the first touch electrodes 540_R and the second touch electrodes. For example, when a touch operation is performed on the display device 100, a capacitance change may occur between the first touch electrode 540_R and the second touch electrode. The touch drive circuit may detect the touch coordinates by sensing the capacitance change.

[0174] FIG. 4 is a cross-sectional view of a light-emitting unit of a display device according to an embodiment of the present invention.

[0175] For ease of explanation, only two light emitting element layers are shown, but two or more light emitting element layers and one or more charge generation layers included between the two or more light emitting element layers may be further included.

[0176] The light emitting element layer 340 of the display device 100 according to the present specification may be an emitting unit. The emitting unit may include at least one light emitting element layer 340. For example, a stack structure may be formed by stacking a plurality of light emitting element layers between the first electrode 310 and the second electrode 350. In this case, a charge generation layer may be further disposed between the plurality of light emitting element layers. A plurality of light emitting units may be disposed for each subpixel SP.

[0177] When the light-emitting element layer 340 is composed of a light-emitting unit, the light-emitting unit may include a first light-emitting element layer 341, a second light-emitting element layer 343, and a charge generation layer 342 disposed between the first light-emitting element layer 341 and the second light-emitting element layer 343.

[0178] The trench T formed in the second bank 330 may increase the length of the light-emitting units disposed on the second bank 330. For example, the light-emitting units are disposed so as to have a bend along the trench T formed in the second bank 330, which increases the distance that electrons in the layers constituting the light-emitting units travel to adjacent subpixels, thereby preventing electrons formed inside the light-emitting units from traveling to adjacent subpixels during operation.

[0179] A first electrode 310, a first light-emitting element layer 341, a charge generation layer 342, a second light-emitting element layer 343, and a second electrode 350 may be sequentially disposed on a substrate 110 having a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3.

[0180] The first light emitting element layer 341 may include a hole injection layer 341-A, a first hole transport layer 341-B, a first light emitting layer 341-C, and a first electron transport layer 341-D.

[0181] The second light-emitting element layer 343 may include a second hole-transporting layer 343-A, a second light-emitting layer 343-B, a second electron-transporting layer 343-C, and an electron-injecting layer 343-D.

[0182] The charge generation layer 342 may further include an n-type charge generation layer n-CGL, 342-n that helps inject electrons into the first light emitting element layer 341 and a p-type charge generation layer p-CGL, 342-p that helps inject holes into the second light emitting element layer 343.

[0183] The first light-emitting layer 343-C and the second light-emitting layer 343-B may be arranged in a pattern spaced apart from each other to correspond to the respective subpixels. For example, the first light-emitting layer 341-C and the second light-emitting layer 343-B may be arranged at least in part at the end of the bank.

[0184] The hole injection layer 341-A serves to facilitate the injection of holes and may be made of, but is not limited to, any one or more selected from the group consisting of HATCN (1,4,5,8,9,11-hexaazatriphenylene-hexanitrile), CuPc (cupper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), and NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine).

[0185] The first hole transport layer 341-B and the second hole transport layer 343-A serve to facilitate the transport of holes and may be made of, but are not limited to, any one or more selected from the group consisting of NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), TPD (N,N'-bis-(3-mePHylphenyl)-N,N'-bis-(phenyl)-benzidine), s-TAD, and MTDATA (4,4',4''-Tris(N-3-mePHylphenyl-N-phenyl-amino)-triphenylamine).

[0186] The first electron transport layer 341-D and the second electron transport layer 343-C serve to facilitate the transport of electrons and may be made of any one or more selected from the group consisting of Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4oxadiazole), TAZ, spiro-PBD, BAlq, and SAlq, but are not limited thereto.

[0187] The electron injection layer 343-D serves to facilitate electron injection, and may be made of, but is not limited to, Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4oxadiazole), TAZ, spiro-PBD, BAlq, or SAlq.

[0188] The first light-emitting layer 341-C and the second light-emitting layer 343-B may be disposed in the light-emitting region EA, may be disposed on the first bank 320 or the second bank 330, and may be spaced apart between adjacent subpixels. For example, the first light-emitting layer 341-C and the second light-emitting layer 343-B may be deposited on each subpixel using a fine metal mask (FMM).

[0189] The first light-emitting layer 341-C and the second light-emitting layer 343-B may be overlapped. The first light-emitting layer 341-C and the second light-emitting layer 343-B may include light-emitting materials that emit red, green, and blue light, respectively, and the light-emitting materials may be formed using phosphorescent or fluorescent materials.

[0190] For example, in the case of the first red light-emitting layer 341-C1 and the second red light-emitting layer 343-B1 disposed in the first subpixel SP1, the first red light-emitting layer 341-C1 and the second red light-emitting layer 343-B1 may be made of a phosphorescent material including a host material including CBP (carbazole biphenyl) or mCP (1,3-bis(carbazol-9-yl)) and a dopant including at least one selected from the group consisting of PIQIr(acac) (bis(1-phenylisoquinoline)acetylacetonate iridium), PQIr(acac) (bis(1-phenylquinoline)acetylacetonate iridium), PQIr (tris(1-phenylquinoline)iridium), and PtOEP (octaethylporphyrin platinum), or alternatively, may be made of a fluorescent material including, but not limited to, PBD:Eu(DBM)3(Phen) or Perylene.

[0191] In the case of the first green light-emitting layer 341-C2 and the second green light-emitting layer 343-B2 disposed in the second subpixel SP2, the first green light-emitting layer 341-C2 and the second green light-emitting layer 343-B2 may be made of a phosphorescent material containing a host material including CBP or mCP and a dopant material such as an Ir complex including Ir(ppy)3 (fac tris(2-phenylpyridine)iridium), or alternatively, may be made of a fluorescent material including Alq3 (tris(8-hydroxyquinolino)aluminum), but is not limited thereto.

[0192] The first blue light-emitting layer 341-C3 and the second blue light-emitting layer 343-B3 disposed in the third subpixel SP3 may be made of a phosphorescent material including a host material such as CBP or mCP and a dopant material such as (4,6-F2ppy)2Irpic, and may be made of a fluorescent material including, but not limited to, any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylarylene (DSB), distyrylarylene (DSA), PFO-based polymers, and PPV-based polymers.

[0193] The first light-emitting layer 341-C and the second light-emitting layer 343-B may further include an auxiliary light-emitting layer, for example, the auxiliary light-emitting layer may be disposed below or above the first light-emitting layer 341-C and the second light-emitting layer 343-B. The auxiliary light-emitting layer may emit the same color as the first light-emitting layer 341-C and the second light-emitting layer 343-B, respectively, or may emit a different color.

[0194] The n-type charge generation layer 342-n may be formed of an alkali metal, an alkali metal compound, or an organic material or compound thereof that functions as an electron injector. For example, it may be formed of a mixed layer of an n-type material such as an anthracene derivative doped with lithium (Li) or cesium (Cs), but is not limited thereto.

[0195] The p-type charge generation layer 342-p may be formed of an organic material that is used as a hole injection layer material, such as, but not limited to, a single layer of a p-type material such as HATCN or F4-TCNQ.

[0196] Some of the components constituting the light-emitting units may be disposed throughout the entire display area AA. For example, the charge generation layer 342, the hole injection layer 341-A, the hole transport layers 341-B and 343-A, the electron transport layers 341-D and 343-C, and the electron injection layer 343-D are continuously disposed in the plurality of subpixels SP1, SP2, and SP3. This narrow spacing between the subpixels may result in distortion of image information due to lateral current leakage between adjacent pixels. However, by arranging the light-emitting units along the bends formed on the top of the banks, the distance over which electrons travel to adjacent subpixels is increased, thereby preventing electrons generated within the light-emitting element layer from traveling to adjacent pixels during operation. FIG. 5 illustrates the arrangement of light-emitting and non-light-emitting regions in a display device according to another embodiment of the present invention. FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 5. The display device 100' of Figures 5 and 6 is substantially the same as the display device 100 of Figures 1 to 4 except for the subpixel arrangement and color filter unit, so duplicated descriptions will be omitted.

[0197] 5, the light emitting area EA may be circular, elliptical, or polygonal in plan view, and the size of the light emitting area EA of each sub-pixel may be different from each other.

[0198] The light emitting area EA may include multiple light emitting areas that emit different colors. For example, the light emitting area EA may include a first light emitting area EA1 that emits red light, a second light emitting area EA2 that emits green light, and a third light emitting area EA3 that emits blue light. Alternatively, the light emitting area EA may include, but is not limited to, a white light emitting area.

[0199] The banks may include a first bank 320 and a second bank 330 .

[0200] The first bank 320 may be arranged to surround all or part of each light-emitting region EA. For example, the first bank 320 may include a first pattern 321 surrounding the first sub-pixel SP1 or first light-emitting region EA1, a second pattern 322 surrounding the second sub-pixel SP2 or second light-emitting region EA2, and a third pattern 323 surrounding the third sub-pixel SP3 or third light-emitting region EA3. The first pattern 321, the second pattern 322, and the third pattern 323 may be arranged to be unconnected and spaced apart from each other.

[0201] The second bank 330 may be disposed in the non-light-emitting area NEA. For example, the second bank 330 may at least partially overlap the first bank 320, or may cover the entire first bank 320 and be disposed continuously in the non-light-emitting area.

[0202] 6, a color filter unit 600 may be further disposed on the touch unit 500. The color filter unit 600 may include a plurality of color filters and a black matrix.

[0203] A fourth insulating layer 610 may be disposed on the touch unit 500. The fourth insulating layer 610 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.

[0204] The fourth insulating layer 610 may be omitted depending on the structure and type of the thin film transistor 200 .

[0205] A black matrix 620 may be disposed on the fourth insulating layer 610 in the non-light-emitting area NEA.

[0206] The black matrix 620 is disposed between the color filters to prevent color mixing.

[0207] The black matrix 620 may be made of at least one of, but is not limited to, an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), an organic insulating material such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, or a photosensitive material containing a black pigment.

[0208] The black matrix 620 may at least overlap the first bank 320. The black matrix 620 may overlap the trenches T of the second bank 330. Alternatively, a portion of the first bank 320 may overlap the black matrix 620. A portion of the first bank 320 may overlap the black matrix 620, and the remaining portion of the first bank 320 may be more adjacent to the light-emitting region than the portion of the first bank and overlap the color filter. The remaining portion of the first bank 320 may not overlap the black matrix.

[0209] According to the display device 100' according to another embodiment of the present invention, the separated portions of the first bank 320 overlap with the black matrix 620, so that even if light incident from outside the display device 100' is reflected, it is hardly affected.

[0210] A color filter 630 may be disposed on the fourth insulating layer in the light emitting area EA.

[0211] The color filter 630 may be composed of a plurality of filters. For example, the color filter 630 may include a first color filter 631, a second color filter 632, and a third color filter 633.

[0212] The first color filter 631 is disposed to correspond to the first sub-pixel SP1 and may include a red color filter material, the second color filter 632 is disposed to correspond to the second sub-pixel SP2 and may include a green color filter material, and the third color filter 633 is disposed to correspond to the third sub-pixel SP3 and may include a red color filter material.

[0213] The ends of the first color filter 631, the second color filter 632, and the third color filter 633 may be disposed on the black matrix 620 and may cover the ends of the black matrix.

[0214] In FIG. 6, the first color filter 631, the second color filter 632, and the third color filter 633 are arranged spaced apart from one another, but they may be in contact with one another or at least partially overlap one another.

[0215] An overcoat layer 640 may be disposed over the color filter 630 .

[0216] The overcoat layer 640 can protect the color filter 630 and the black matrix 620 disposed below the overcoat layer 640, and can reduce or flatten steps.

[0217] An adhesive layer 700 may be disposed on the overcoat layer 640 .

[0218] The color filter unit 600 and the front member 800 can be bonded together using an adhesive layer 700 .

[0219] The adhesive layer 700 may be made of a material having adhesive properties, such as, but not limited to, an optically clear adhesive (OCA) or a pressure sensitive adhesive (PSA).

[0220] A front member 800 may be placed on the adhesive layer 700 .

[0221] The front member 800 can protect the display driver DISP, the touch unit 500, etc., which are disposed below the front member 800, from external impact, moisture, heat, etc. The front member 800 can be made of a material that is impact-resistant and light-transmitting. For example, the front member 800 can be a glass substrate or a film made of a plastic material such as polymethylmethacrylate (PMMA), polyimide (PI), or polyethylene terephthalate (PET), but is not limited thereto. The front member 800 can also be called various names such as a cover window, a window cover, or a cover glass, but is not limited thereto.

[0222] The front member 800 can be bonded to the substrate 110 by a bonding process after the manufacturing process of the components to be disposed on the substrate 110 is completed.

[0223] When the color filter unit 600 is further included on the touch unit 500 as in other embodiments, a polarizer disposed to reduce reflectivity can be eliminated. For example, when light enters the display device 100 from outside, it may be reflected by wiring or patterns made of metal inside the display device 100 and then exit to the outside. In this case, a user using the display device 100 may be able to see the wiring or patterns made of metal inside the display device 100, causing a defect. However, by further including the color filter unit 600, the black matrix of the color filter unit 600 can block the light even if it is reflected by wiring or patterns made of metal inside the display device 100. Therefore, a separate polarizer is not required.

[0224] The above-described embodiment of the present invention will be briefly explained as follows.

[0225] A display device according to an embodiment of the present invention may include a substrate having first and second subpixels, first electrodes respectively disposed in the first and second subpixels, and a bank disposed to cover an end of the first electrode and defining a light-emitting region and a non-light-emitting region surrounding the light-emitting region, wherein the bank may include a first bank disposed on the first electrode and a second bank disposed on the first bank and including a trench.

[0226] In the display device according to the embodiment of the present invention, the first bank may contain a material containing a black pigment, and the second bank may contain a transparent material.

[0227] In the display device according to the embodiment of the present invention, the first bank may include an initiator consisting of a single molecule of an oligomer component.

[0228] In a display device according to an embodiment of the present invention, a first bank may include a first pattern surrounding a first electrode of a first subpixel and a second pattern surrounding a first electrode of a second subpixel and spaced apart from the first pattern.

[0229] In the display device according to the embodiment of the present invention, the second bank may be disposed continuously in the non-light-emitting region, surrounding the entire top and side surfaces of the first bank.

[0230] In the display device according to the embodiment of the present invention, the second bank may be disposed contiguously in the non-light-emitting region, exposing a portion of the top surface of the first bank.

[0231] The display device according to the embodiment of the present invention may further include a planarization layer disposed between the substrate and the first electrode, and an upper surface of the planarization layer may be exposed by the first pattern and the second pattern.

[0232] In the display device according to the embodiment of the present invention, the upper surface of the planarization layer exposed by the first pattern and the second pattern may contact the second bank.

[0233] The display device according to an embodiment of the present invention may further include a light-emitting unit including a plurality of light-emitting layers disposed on the first electrode and the second bank, and a charge generation layer disposed between the plurality of light-emitting layers.

[0234] In the display device according to the embodiment of the present invention, the light emitting units may be arranged to have a bend on the second bank.

[0235] The display device according to the embodiment of the present invention may further include an encapsulation unit disposed on the light emitting unit, a touch unit disposed on the encapsulation layer, and a color filter unit disposed on the touch unit.

[0236] In the display device according to an embodiment of the present invention, the color filter unit may include an insulating layer disposed on the touch unit, a black matrix disposed on the insulating layer and in a non-light-emitting area, and color filters disposed on the black matrix to correspond to first and second sub-pixels.

[0237] In the display device according to the embodiment of the present invention, the first bank may include a first portion overlapping the black matrix and the color filter, and a second portion overlapping the color filter.

[0238] A display device according to an embodiment of the present invention may include a substrate having a display area and a non-display area including a plurality of subpixels, a plurality of light-emitting elements each arranged in the plurality of subpixels and including a first electrode, a light-emitting unit, and a second electrode, a plurality of first banks arranged to cover ends of the first electrodes of the plurality of light-emitting elements and spaced apart from each other, and a second bank arranged on ends of the first electrodes of the plurality of light-emitting elements and on the plurality of second banks, and including trenches.

[0239] In the display device according to the embodiment of the present invention, the first bank may include a light-blocking material, and the second bank may include a light-transmitting material.

[0240] In a display device according to an embodiment of the present invention, a first bank may include a first pattern surrounding a first electrode of a first subpixel and a second pattern surrounding a first electrode of a second subpixel and spaced apart from the first pattern.

[0241] Although the embodiments of the present invention have been described in more detail above with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments and can be variously modified within the scope of the technical concept of the present invention. Therefore, the embodiments disclosed in the present invention are for illustrative purposes only and do not limit the technical concept of the present invention. Therefore, the embodiments described above should be understood to be illustrative in all respects and not restrictive.

Claims

1. a substrate having first and second subpixels; a first electrode disposed in each of the first sub-pixel and the second sub-pixel; a bank that is disposed to cover an end of the first electrode and defines a light-emitting region and a non-light-emitting region that surrounds the light-emitting region; the banks include a plurality of first banks disposed on the first electrodes, and a second bank disposed on the plurality of first banks and including a trench; The display device, wherein the plurality of first banks each contain a material containing a black pigment and are spaced apart from each other in the non-light-emitting region.

2. A display device as described in claim 1, wherein the second bank includes a transparent material.

3. The display device according to claim 2 , wherein the plurality of first banks contain an initiator consisting of a single molecule of an oligomer component.

4. The plurality of first banks include: a first pattern surrounding the first electrode of the first subpixel; The display device of claim 1 , further comprising: a second pattern surrounding the first electrode of the second subpixel and spaced apart from the first pattern.

5. The display device according to claim 4 , wherein the second bank entirely surrounds the top and side surfaces of each of the plurality of first banks and is disposed continuously in the non-light-emitting region.

6. The display device according to claim 4 , wherein the second banks expose a portion of the upper surface of each of the plurality of first banks and are disposed continuously in the non-light-emitting region.

7. further comprising a planarization layer disposed between the substrate and the first electrode; The display device according to claim 5 , wherein the first pattern and the second pattern expose an upper surface of the planarization layer.

8. The display device of claim 7 , wherein the upper surface of the planarization layer exposed by the first pattern and the second pattern contacts the second bank.

9. The display device of claim 1 , further comprising a light-emitting unit including a plurality of light-emitting layers disposed on the first electrode and the second bank, and a charge-generating layer disposed between the plurality of light-emitting layers.

10. The display device according to claim 9 , wherein the light-emitting units are arranged on the second bank so as to have a bend.

11. a sealing portion disposed on the light-emitting unit; a touch unit disposed on the sealing unit; The display device of claim 9 , further comprising: a color filter unit disposed on the touch unit.

12. The color filter portion is an insulating layer disposed on the touch portion; a black matrix disposed on the insulating layer and disposed in the non-light-emitting region; The display device of claim 11 , further comprising: a color filter disposed on the black matrix to correspond to the first sub-pixel and the second sub-pixel.

13. The display device of claim 12 , wherein the first bank includes a first portion overlapping the black matrix and the color filter, and a second portion overlapping the color filter.

14. a substrate including first and second subpixels; a first electrode disposed in each of the first sub-pixel and the second sub-pixel; a bank that is disposed to cover an end of the first electrode and separates a light-emitting region from a non-light-emitting region that surrounds the light-emitting region; The bank comprises: a plurality of first banks disposed on the first electrode, each of the first banks including a material containing a black pigment; a second bank disposed on the plurality of first banks, covering at least a portion of an outer surface of each of the plurality of first banks, and including a transparent material; The display device, wherein the plurality of first banks are spaced apart from each other in the non-light-emitting region.

15. The display device of claim 14 , wherein the second bank covers the entire outer surface of each of the plurality of first banks.

16. 15. The display device of claim 14, wherein the second bank exposes an edge region of the outer surface of each of the plurality of first banks, and a projection of the edge region of the outer surface on the substrate overlaps half of a projection of an end of the first electrode on the substrate.

17. The display device of claim 14 , wherein the second bank includes a trench.

18. a light emitting element layer disposed on the second bank and the first electrode; The display device of claim 17 , further comprising: a second electrode disposed on the light-emitting element layer.

19. The display device according to claim 17 , wherein the second banks are arranged continuously in the non-light-emitting region.

20. The second bank is two spacers protruding in opposite directions from the substrate; a connecting portion that connects the two spacers, 18. The display device of claim 17, wherein the connection portion forms a trench.

21. a light-emitting section including a plurality of light-emitting layers disposed on the first electrode and the second bank; a sealing portion disposed on the light emitting portion; a touch unit disposed on the sealing unit; The display device of claim 14 , further comprising: a color filter unit disposed on the touch unit.

22. The color filter portion is an insulating layer disposed on the touch portion; a black matrix disposed on the insulating layer in the non-light-emitting region; 22. The display device of claim 21, further comprising: a color filter disposed on the black matrix to correspond to the first sub-pixel and the second sub-pixel.

23. The first bank comprises: a first pattern surrounding the first electrode of the first subpixel; a second pattern surrounding the first electrode of the second subpixel and spaced apart from the first pattern; 15. The display device of claim 14, further comprising a planarization layer disposed between the substrate and the first electrode, an upper surface of the planarization layer being exposed by the first pattern and the second pattern.

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