Signal processing aggregation device, signal processing aggregation system, signal processing aggregation method and program

Abstract

This signal processing centralization device (100, 200), which switches accelerators of an off-load destination when off-loading particular processing of an application to the accelerator for a calculation processing, comprises: an accelerator off-loading unit (110) that performs, on the basis of a specified off-load destination, an off-loading to a mounted accelerator (120) or to the accelerator (120) on a remote server side; and an accelerator remote off-loading unit (130) that serializes, packetizes, in a predetermined format, and transmits, as packetized data, the off-loaded data to the accelerator (120) on the remote server side.

Description

[Technical Field]

[0001] The present invention relates to a signal processing aggregation device, a signal processing aggregation system, a signal processing aggregation method, and a program. [Background technology]

[0002] In wireless access systems for mobile communications, the timing of radio signal transmission between terminals and base stations is managed by the MAC (Medium Access Control) Scheduler in the base station as a resource multiplexed in the time and frequency domains, and is achieved by allocating an appropriate RE (Resource Element) to each terminal.

[0003] This section provides an overview of the wireless access system. FIG. 14 is a diagram illustrating an outline of a wireless access system. As shown in FIG. 14, the wireless access system includes a user equipment (UE) 10, an antenna (base station antenna) 20, a base station (BBU: Base Band Unit) 30, and a core network 40.

[0004] UE10 is a group of multiple UE1, UE2, UE3, ..., UEn (n is any natural number), and base station 30 allocates and manages an RE (see hatching or shading in FIG. 10. The hatching or shading pattern distinguishes the REs) to each UE. Note that UE1, UE2, UE3, ..., UEn are collectively referred to as UE10. The antenna 20 is an antenna and a transmitting / receiving unit that wirelessly communicates with the UE 10 (hereinafter, "antenna" refers collectively to the antenna, the transmitting / receiving unit, and its power supply unit). Data transmitted and received is connected to the base station 30 via, for example, a dedicated cable.

[0005] The base station 30 is a stationary radio station established on land that communicates with the UE 10. The base station 30 is dedicated hardware (dedicated device) that performs radio signal processing. Alternatively, the base station 30 is a virtual Radio Access Network (vRAN) that uses a general-purpose server to process radio signals in a signal processing aggregation system for LTE (Long Term Evolution) or 5G (five generation). In a vRAN (described below), general-purpose servers that are inexpensive and available in large quantities can be used as the hardware for the base station 30. The base station 30 includes hardware (HW) 31, an OS etc. 32, and a base station processing application 33.

[0006] The core network 40 is EPC (Evolved Packet Core) / (in the following description, " / " indicates "or") 5GC (5G Core Network) or the like.

[0007] <vran> Explain vRAN. In mobile communications signal processing aggregation systems, high latency and throughput requirements are required, so it has been common for base stations (BBUs) that perform radio signal processing to use dedicated hardware (dedicated devices). In recent years, with the widespread use of general-purpose servers (IA: Intel Architecture servers (Intel: trademark)), the performance of general-purpose servers has improved dramatically, and they have become available at low cost through mass production. As a result, studies are underway on vRAN, which uses general-purpose servers to process radio signals for BBUs in LTE and 5G signal processing aggregation systems.

[0008] In vRAN, it is possible to use general-purpose servers that are inexpensive and readily available as BBU hardware, so a BBU pool can be created by using a regional DC (Data Center) or communications building within a range of several tens of kilometers from the antenna as a centralized location, setting up server racks and installing multiple general-purpose servers in advance (this concept is sometimes referred to as C-RAN (Centralized-RAN)).

[0009] A BBU pool allows multiple base station hardware (general-purpose servers) to be prepared in advance, which has the potential advantage of enabling flexible operation, such as quick hardware replacement (switching) in the event of a hardware failure and dynamic scaling out / in in response to increases or decreases in traffic.

[0010] Fig. 15 is a diagram illustrating an overview of a signal processing device in the base station 30 of the wireless access system of Fig. 14. The same components as in Fig. 14 are assigned the same reference numerals. The server 70 shown in FIG. 15 is a DU server (signal processing device) when the base station functions are separated into a RU (Radio Unit), a DU (Distributed Unit), and a CU (Centralized Unit). The server 70 includes a CPU (Central Processing Unit) 51, an accelerator 52, and a NIC (Network Interface Card) 53. CPUs and accelerators are better suited to different workloads (high processing power) depending on the type of processor. While CPUs are highly versatile, accelerators such as FPGAs (Field Programmable Gate Arrays), GPUs (Graphics Processing Units), and ASICs (Application Specific Integrated Circuits) (hereafter referred to as ACCs) are capable of high-speed and high-efficiency calculations of highly parallel workloads that CPUs are not good at (low processing power). By combining these heterogeneous processors and offloading workloads that CPUs are not good at to the ACCs, offloading technology is being increasingly used to improve overall calculation time and efficiency.

[0011] In vRAN (virtual Radio Access Network), when the CPU alone does not have enough performance to meet the requirements, some processing is offloaded to accelerators capable of high-speed calculations such as FPGAs and GPUs.

[0012] In FIG. 15, the CPU 51 offloads processing such as error correction coding to the accelerator 52, and after the accelerator performs the calculation, the CPU 51 again obtains the calculation result.

[0013] The server device aggregation and switching technology shown in Fig. 16 is a technology for aggregating signal processing units in response to communication volume and failures. Non-Patent Document 1 describes a technique for "changing the server device for establishing a session when a server fails or the like." Fig. 16 is a diagram for explaining the server device aggregation and switching technology described in Non-Patent Document 1. The same components as in Fig. 16 are assigned the same reference numerals. 16, the server 70 is a general-purpose server signal processing device (vDU) installed in a base station, and has an active system and a standby system. The server 70 includes a CPU 51, an accelerator 52, and a NIC 53 in the hardware 50, and has a signal processing application 1 in the software 60. The server 70 is a device oriented toward high performance, for example, by using an accelerator to process all L1 processing (such as forward error correction (FEC) and front haul (FH) functions in L1 baseband processing). The accelerator 52 may consume a large amount of power even when there is no data processing.

[0014] The signal processing devices (vDUs) are aggregated in response to the communication volume or failures. Specifically, this aggregation involves changing the accommodation of the antenna device 20 (symbol a in FIG. 16). [Prior art documents] [Non-patent literature]

[0015] [Non-Patent Document 1] Linux-HA Japan, [online], [Retrieved June 6, 2022], Internet〈https: / / linux-ha.osdn.jp / wp / manual / pacemaker_outline〉 Summary of the Invention [Problem to be solved by the invention]

[0016] Existing technologies can reduce the number of signal processing devices in operation depending on the amount of communication traffic, thereby satisfying <Requirement 1: Resource saving>. However, they do not satisfy <Requirement 2: Availability> because the user terminal temporarily loses connection due to time resynchronization when switching fronthaul. Furthermore, switching requires a function to reconnect to a different signal processing device in the antenna unit, which does not satisfy <Requirement 3: Use of existing devices>.

[0017] Furthermore, the aggregation technology for the signal processing device (vDU) shown in Fig. 16 has the following disadvantages 1 to 4. That is, disadvantage 1 is that the impact on the user equipment (UE) 10 is large, such as session disconnection during switching. Also, disadvantage 2 is that the aggregated server 70-2 (signal processing device (vDU)) needs new functions that satisfy strict performance requirements, such as high-speed radio state transition, to minimize communication interruptions. Furthermore, there is a third disadvantage that consideration must be given to the operation of fronthaul network reassignment and switching when the accommodation of the antenna device 20 is changed (symbol a in FIG. 16 ), and there is a fourth disadvantage that resynchronization processing and HARQ feedback readjustment are required in association with the fronthaul network switching.

[0018] The present invention has been made in light of this background, and an object of the present invention is to dynamically consolidate signal processing into some computational resources without making any changes to the user terminal, signal processing device, or antenna device. [Means for solving the problem]

[0019] In order to solve the above-mentioned problems, the present invention provides a signal processing aggregation device that switches the accelerator to which an application is to be offloaded when the specific processing of the application is offloaded to an accelerator for computational processing, and is characterized by comprising: an accelerator offload unit that offloads to the accelerator installed on the device or to the accelerator on a remote server based on the set offload destination; and a remote accelerator offload unit that serializes the offload data to the accelerator on the remote server, packetizes it in a predetermined format, and transmits the packetized data. [Effects of the Invention]

[0020] According to the present invention, signal processing can be dynamically concentrated in some computational resources without making any changes to the user terminal, signal processing device, or antenna device. [Brief explanation of the drawings]

[0021] [Figure 1] 1 is a schematic diagram showing the concept of an ACC pool of a signal processing aggregation system according to a first embodiment of the present invention. [Figure 2] 1 is a diagram showing a schematic configuration of a signal processing integration system according to a first embodiment of the present invention. [Figure 3] 1 is a configuration diagram of a signal processing aggregation device of a signal processing aggregation system according to a first embodiment of the present invention. [Figure 4] 3 is a diagram illustrating an example of a data structure handled by an accelerator remote offload unit of a signal processing aggregation device of the signal processing aggregation system according to the first embodiment of the present invention. FIG. [Figure 5] 3 is a diagram showing an example of a data structure for exchanging argument data between functions and the IDs of functions of the signal processing aggregate device in the signal processing aggregate system according to the first embodiment of the present invention. FIG. [Figure 6] 1A to 1C are configuration diagrams showing variations in the arrangement of integrated signal processing devices in the integrated signal processing system according to the first embodiment of the present invention. [Figure 7] 10 is a flowchart showing <Sequence 1> in computation offloading before resource aggregation of a signal processing aggregated device in the signal processing aggregated system according to the first embodiment of the present invention. [Figure 8] 10 is a flowchart showing <Sequence 2> in computation offloading when resource aggregation is performed by the signal processing aggregation device of the signal processing aggregation system according to the first embodiment of the present invention. [Figure 9] 10 is a flowchart showing an offload sequence <sequence 3> when resources are aggregated in the signal processing aggregation device of the signal processing aggregation system according to the first embodiment of the present invention. [Figure 10] 10 is a flowchart showing an offload sequence <sequence 3> when resources are aggregated in the signal processing aggregation device of the signal processing aggregation system according to the first embodiment of the present invention. [Figure 11] 10 is a flowchart showing an offload sequence <sequence 3> when resources are aggregated in the signal processing aggregation device of the signal processing aggregation system according to the first embodiment of the present invention. [Figure 12] FIG. 10 is a configuration diagram of a signal processing aggregation device of a signal processing aggregation system according to a second embodiment of the present invention. [Figure 13] FIG. 2 is a hardware configuration diagram showing an example of a computer that realizes the functions of the integrated signal processing device in the integrated signal processing system according to the first and second embodiments of the present invention. [Figure 14] FIG. 1 is a diagram illustrating an overview of a conventional wireless access system. [Figure 15] FIG. 15 is a diagram illustrating an overview of a signal processing device in a base station of the wireless access system of FIG. [Figure 16] FIG. 1 is a diagram illustrating the server device aggregation and switching technology described in Non-Patent Document 1. DETAILED DESCRIPTION OF THE INVENTION

[0022] Hereinafter, a signal processing aggregation system and the like in an embodiment for carrying out the present invention (hereinafter referred to as "the present embodiment") will be described with reference to the drawings. (First embodiment) [overview] 1 is a schematic diagram showing the concept of an ACC pool of a signal processing aggregation system according to a first embodiment of the present invention. This embodiment is applicable to a signal processing aggregation system for EPC / 5GC mobile communications. The same components as those in FIG. 16 are denoted by the same reference numerals. As shown in FIG. 1, the signal processing aggregation system 1000 includes a user equipment (UE) 10, an antenna unit (RU) 20, an ACC pool 500 (accelerator pool) that pools multiple accelerators (ACC) 120-1, 120-2 (collectively referred to as ACC 120), signal processing devices (vDUs) 70-1, 70-2 (collectively referred to as signal processing devices 70) installed on a server, and radio-related states 71-1, 71-2 that store the states of the signal processing devices (vDUs) 70-1, 70-2. For convenience of explanation, the signal processing devices (vDUs) 70-1 and 70-2 and the radio-related states 71-1 and 71-2 are shown outside the server, but the signal processing devices (vDUs) 70-1 and 70-2 and the radio-related states 71-1 and 71-2 are actually inside the server (the server itself). In the following explanation, the servers 70-1 and 70-2 will be referred to as the signal processing devices (vDUs) 70-1 and 70-2.

[0023] The signal processing aggregation system 1000 pools multiple ACCs 52 in the ACC pool 500, thereby achieving aggregation on an accelerator basis (<Feature 1>), and the signal processing device (vDU) 70 is equipped with a signal processing aggregation device 100 (described below), making it possible to change accommodation between the server and the accelerator (<Feature 2>).

[0024] The signal processing integrated system 1000 has the following advantages 1 to 3. Advantage 1: There is no need to switch the vDU itself, so the impact on users during switching is small. In other words, there is no disconnection caused by switching the fronthaul network, so the impact on users during switching is small.

[0025] Advantage 2: There is no need to switch the fronthaul and there is no impact on the radio state, so changes to the fronthaul and antenna unit are minimal. For example, changes to the signal processing device application and antenna device are minimal.

[0026] Advantage 3: No need for fronthaul network switching.

[0027] [Schematic configuration] 2 is a diagram showing a schematic configuration of a signal processing integrated system according to a first embodiment of the present invention, in which the same components as those in FIGS. As shown in FIG. 2, in the base station of the signal processing integration system 1000, a server signal processing device (vDU) 70-1 and a server signal processing device (vDU) 70-2 are connected via a network dedicated to offloading. The signal processing device (vDU) 70-1 includes a CPU 51, an accelerator 120-1, and NICs 53-1 and 53-2 in the hardware 50, and includes a signal processing application 1 and a signal processing aggregation device 100 in the software 60.

[0028] The signal processing unit (vDU) 70-2 includes a CPU 51, an accelerator 120-2, and NICs 53-1 and 53-2 in the hardware 50, and has a signal processing application 1 in the software 60. The signal processing aggregation device 100 determines whether the signal processing of the signal processing application 1 is to be offloaded to an accelerator 120-1 installed in the same server or to a remote server, based on the offload destination previously set by a resource aggregation decision unit 140 (described later). <2> That is, the signal processing aggregation device 100 offloads the signal processing of the signal processing application 1 to the accelerator 120-2 (symbol dd in FIG. 2) via the NIC 53-2 (symbol bb in FIG. 2), the NW connection (dedicated for offloading) (symbol cc in FIG. 2), and the NIC 53-2.

[0029] The base station of the signal processing aggregation system 1000 achieves aggregation of computational resources without affecting communication at user terminals by using the following <Feature 1> and <Feature 2>. <Feature 1>: Resource consolidation without impacting user connections by consolidating accelerator processing between chassis The accelerator 120 is separated from the server and pooled. The accelerator's computational resources are aggregated without changing the upstream and downstream networks. This reduces the power consumption of the signal processing device's computational resources without affecting the connection of user terminals.

[0030] By consolidating only accelerator processing between servers, resource consolidation is achieved without changing the fronthaul or antenna equipment. There is no need for fronthaul switching, and resource consolidation is possible without affecting users. <Requirement 2: Availability> and <Requirement 3: Use of existing equipment> are satisfied.

[0031] <Feature 2>: Deciding on offloading between devices based on estimated communication volume The signal processing aggregation device 100 determines whether to offload accelerator processing between the devices based on the estimated communication volume. When offloading, it controls the power supply of the accelerators, thereby satisfying <Requirement 1: Resource and power saving>. The above <Feature 1> and <Feature 2> will be explained in detail below.

[0032] [Overall configuration] FIG. 3 is a configuration diagram of the signal processing device (vDU) 100 of FIG. As shown in Figure 3, the server <1> The signal processing device (vDU) 70-1 includes a fronthaul interface unit 80, a signal processing unit 90, and a signal processing aggregation device 100. The fronthaul interface unit 80 of the signal processing device (vDU) 70-1 is connected to the fronthaul interface unit (antenna side) 220 of the antenna unit (RU) 20 via the wired section 2. The signal processing device (vDU) 70-1 corresponds to the back end of the antenna unit (RU) 20.

[0033] server <1> The signal processing unit (vDU) 70-1 is connected to a server via a dedicated network (see symbol cc in FIG. 2) that is capable of high-speed communication, for example. <2> The signal processing unit (vDU) 70-2 is connected to the VDU. server <2> The signal processing unit (vDU) 70-2 includes an accelerator (remote side) 120 and an accelerator remote offload unit (remote side) 130.

[0034] [User Equipment (UE) 10] The user terminal 10 is a wireless device such as a mobile phone terminal, and is connected to the antenna device 20 via the wireless section 1. The user terminal 10 converts data to be transmitted into a radio signal and transmits it to the antenna device 20. The user terminal 10 performs signal processing on the radio signal received from the antenna device 20 to restore the data to the intended data of the sender. There are two types of communications between the user terminal 10 and the antenna device 20: uplink (user terminal 10 → antenna device 20 → signal processing device 70-1) and downlink (signal processing device 70-1 → antenna device 20 → user terminal 10).

[0035] [Antenna Unit (RU) 20] The antenna unit (RU) 20 includes a radio antenna unit 21 and a fronthaul interface unit (antenna side) 22. The radio antenna unit 21 is connected to the user equipment (UE) 10 via a radio section 1, and is connected to the signal processing device 70-1 via a wired section 2.

[0036] <Radio antenna part 21> The radio antenna unit 21 is a base station for the user terminal 10 and transmits and receives radio signals to and from the user terminal 10 . The wireless antenna unit 21 performs arithmetic processing on a part of the wireless signal received from the user terminal 10, and then transmits the result to the server. <1> The signal is transmitted to the signal processing device 70-1. The radio antenna unit 21 transmits and receives the following data to and from the user terminal 10. Downlink: Transmits radio signals to the user terminal 10. Uplink: Receives signal data from the fronthaul interface unit (antenna side) 22. Uplink: Receives radio signals from the user terminal 10. Uplink: Transmits signal data to the fronthaul interface unit (antenna side) 22.

[0037] <Fronthaul interface unit (antenna side) 22> The fronthaul interface unit (antenna side) 22 is a network interface for connecting the antenna device 20 to the signal processing device (vDU) 70-1, and takes the form of wired communication. The fronthaul interface unit (antenna side) 22 transmits and receives data to and from the fronthaul interface unit (signal processing device side) 80, and notifies the radio antenna unit 21 of the data. In the uplink, the fronthaul interface unit (antenna side) 22 transmits data notified from the radio antenna unit 21 to the fronthaul interface unit (signal processing device side) 80. In the downlink, the fronthaul interface unit (antenna side) 22 notifies the radio antenna unit 21 of data notified from the fronthaul interface unit (signal processing device side) 80.

[0038] First, the server <1> The signal processing device (vDU) 70-1 will be described. [Signal Processing Unit (vDU) 70-1] The signal processing device (vDU) 70-1 includes a fronthaul interface unit (signal processing device side) 80, a signal processing unit 90, and a signal processing aggregation device 100.

[0039] <Fronthaul interface unit (signal processing device side) 80> The fronthaul interface unit (signal processing device side) 80 is a network interface for connecting the signal processing device 70-1 to the antenna device 20, and takes the form of a wired connection. The fronthaul interface unit (signal processing device side) 80 transmits and receives data to and from the fronthaul interface (antenna side) 22 of the antenna device 20, and notifies the signal processing unit 90 of the data. In the uplink, the fronthaul interface unit (signal processing device side) 80 receives data notified from the fronthaul interface (antenna side) 22 of the radio antenna device 20 and notifies the signal processing unit 90. In the downlink, the fronthaul interface unit (signal processing device side) 80 transmits the data notified from the signal processing unit 90 to the fronthaul interface (antenna side) 22 of the antenna device.

[0040] <Signal Processing Unit 90> The signal processing unit 90 processes wireless signals and performs arithmetic operations to convert between wireless signals and data to be communicated. The signal processing unit 90 notifies the accelerator offload unit 110 to offload part of the processing to an accelerator. The signal processing unit 90 transmits and receives radio signals to be processed to and from the fronthaul interface unit 80. The signal processing unit 90 offloads part of the signal processing to the accelerator offload unit 110.

[0041] [Signal processing aggregation device 100] When offloading specific processing of an application to an accelerator for computation, the signal processing aggregation device 100 switches the accelerator to which the application is to be offloaded. The signal processing aggregation device 100 includes an accelerator offload unit 110 , an accelerator 120 , an accelerator remote offload unit 130 , a resource aggregation determination unit 140 , and an accelerator power control unit 150 . The accelerator offload unit 110, the accelerator 120, and the accelerator remote offload unit 130 constitute an availability function unit 101 that realizes <Requirement 2: Availability>. The resource aggregation determination unit 140 and the accelerator power control unit 150 constitute a power saving function unit 102 that realizes <Requirement 1: Resource and power saving>.

[0042] <Accelerator Offload Section 110> The accelerator offload unit 110 offloads to the accelerator 120 installed therein or to the accelerator 120 on the remote server side, based on the set offload destination.

[0043] The accelerator offload unit 110 offloads data to the accelerator 120 based on the input from the signal processing unit 90. The accelerator offload unit 110 selects the accelerator 120 installed in the same server or the accelerator 120 installed in a remote server based on the offload destination set in advance by the resource aggregation determining unit 140. <2> The offloading to the accelerator 120 is performed via the accelerator remote offload unit 130. The accelerator offload unit 110 receives as input signal data to be processed from the signal processing unit 90. In the example of vRAN, this refers to data to be processed that includes an error correction code in the case of FEC (Forward Error Correction).

[0044] The accelerator offload unit 110 sends the calculation result as an output to the signal processing unit 90. In the embodiment in vRAN, this refers to corrected data that has undergone FEC processing and does not include error correction code. The accelerator offload unit 110 transmits the signal data to be processed received from the signal processing unit 90 to the accelerator 120 and the accelerator remote offload unit 130, and receives the calculation results.

[0045] <Accelerator 120> The accelerator 120 is a server <1> The accelerator offload unit 110 performs the calculations based on instructions from the accelerator offload unit 110.

[0046] The accelerator 120 receives "data to be processed" from the accelerator offload unit 110 as input. In the example of vRAN, this refers to data to be processed that includes error correction codes in the case of FEC. The accelerator 120 notifies the accelerator offload unit 110 of "computation results" as output. In the example of vRAN, the accelerator 120 passes corrected data that has undergone FEC processing and does not include error correction codes.

[0047] The accelerator may have an internal task processing queue, with input instructions (enqueue processing) to be processed and output instructions (dequeue instructions) to be processed results separated. The accelerator 120 may be in the form of a Graphic Processing Unit (GPU), a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), or a dedicated program running on a Central Processing Unit (CPU).

[0048] <Accelerator Remote Offload Unit 130> The accelerator remote offload unit 130 serializes signal data (offload data) to be processed by the accelerator (remote side) 120 on the remote server side, packetizes the data in a predetermined format, and transmits the packetized data.

[0049] The accelerator remote offload unit 130 packetizes the data to be offloaded to the accelerator 120 and transmits the packetized data to a remote server via a network. <2> and request processing. The accelerator remote offload unit 130 serializes the input data, then divides it into packets in a format such as UDP (User Datagram Protocol) / IP (Internet Protocol), and notifies the accelerator remote offload unit (remote side) 130 of the packets.

[0050] The accelerator remote offload unit 130 receives as input signal data to be processed from the accelerator 120. In the vRAN example, this refers to data to be processed that includes error correction code, in the case of FEC. The accelerator remote offload unit 130 transmits packetized data of the function name and argument data to the accelerator remote offload unit (remote side) 130 as an output.

[0051] The accelerator remote offload unit 130 passes the "function name and argument data" as output to the resource aggregation determination unit 140, and receives the calculation result as input.

[0052] Fig. 4 is a diagram illustrating an example of the data structure of data handled by the accelerator remote offload unit 130. Fig. 4 illustrates data to be processed and data including function names corresponding to the processing, as an example of vRAN. The data structure shown in Figure 4 includes an ID that uniquely identifies the function, arguments that include the data to be processed, and a final data bit that identifies whether the data is the last division unit when it is divided into multiple parts during data transfer.

[0053] <Resource aggregation determination unit 140> The resource aggregation determination unit 140 determines whether to aggregate resources of the accelerator 120 based on the "processing volume to be offloaded to the accelerator" of the signal data to be processed. Specifically, the resource aggregation determination unit 140 determines whether to aggregate accelerator resources based on the estimation result of the signal volume to be processed after a certain time.

[0054] In this embodiment, the traffic volume is used as the "amount of processing to be offloaded to the accelerator." Any index other than the traffic volume can be used as a basis for determining the aggregation of accelerator resources, and it may also be, for example, "the amount of load on the accelerator or the amount of offload from the CPU." Note that the relationship between the traffic volume and the "amount of processing to be offloaded to the accelerator" is such that "the amount of processing to be offloaded increases or decreases according to the traffic volume."

[0055] When the resource aggregation decision unit 140 predicts that traffic will be less than a certain level, it instructs the accelerator offload unit 110 to select an aggregation destination and uses the accelerator remote offload unit 130 to aggregate processing remotely. At this time, it instructs the accelerator power control unit 150 to reduce the power consumption of the accelerator power supply that is no longer in use, thereby reducing power consumption.

[0056] The resource aggregation decision unit 140 may be executed periodically at regular time intervals, as shown in sequence 2 (FIG. 8). As another variation, it may be activated when the prediction result of the traffic prediction unit 210 (described later) fluctuates by a certain amount or more. If the resource aggregation decision unit 140 predicts that traffic will be heavier than a certain amount, it instructs the accelerator offload unit 110 to cancel aggregation and causes the accelerator 120 to perform processing using a local accelerator. At this time, it instructs the accelerator power control unit 150 to cancel power saving on the locally installed accelerator power supply.

[0057] The criteria for determining resource aggregation may be based on the performance and availability of computing resources in addition to the traffic volume (the "amount of processing to be offloaded to the accelerator").

[0058] <Accelerator power supply control unit 150> The accelerator power control unit 150 inputs power saving settings to the accelerator 120 installed therein or to the accelerator (remote side) 120 on the remote server side based on instructions from the resource aggregation determination unit 140. Examples of power saving settings notified to the accelerator 120 include "power OFF (shutdown)," "setting the operating frequency," and "writing a small-scale circuit in the case of a Field Programmable Gate Array (FPGA)." The accelerator power supply control unit 150 receives, as input, a notification of power saving setting from the resource aggregation determining unit 140. The accelerator power supply control unit 150 outputs, as output, an instruction to the accelerator 120 to set the power saving setting.

[0059] Next, the server <2> The signal processing unit (vDU) 70-2 will be described. [Signal Processing Unit (vDU) 70-2] The signal processing unit (vDU) 70-2 includes an accelerator (remote side) 120 and an accelerator remote offload unit (remote side) 130.

[0060] <Accelerator (remote side) 120> The accelerator (remote side) 120 is a server <2> The accelerator offload unit 130 is an accelerator hardware specialized for a specific calculation, and performs calculations based on instructions from the accelerator remote offload unit (remote side) 130.

[0061] The accelerator (remote side) 120 receives, as input, "data to be processed" from the accelerator remote offload unit (remote side) 130. The accelerator (remote side) 120 notifies the accelerator remote offload unit (remote side) 130 of "computation results" as output.

[0062] In this embodiment, an accelerator device mounted on another vDU device is used, but it may also be in the form of an offload-dedicated server mounted with only an accelerator.

[0063] <Accelerator remote offload unit (remote side) 130> The accelerator remote offload unit (remote side) 130 offloads computation to the accelerator (remote side) 120 based on a group of packets containing "function name and argument data." The accelerator remote offload unit (remote side) 130 combines multiple input packets and restores them to the form of an ID that uniquely identifies the function and arguments. The accelerator remote offload unit (remote side) 130 issues a computation instruction to the accelerator (remote side) 120 by executing a function that sends data to the accelerator (remote side) 120 based on the ID that uniquely identifies the function and the arguments.

[0064] The data structure of the data handled by the accelerator remote offload unit (remote side) 130 in the example of vRAN is the same as that shown in Fig. 5. That is, as shown in Fig. 5, the data structure of the data handled by the accelerator remote offload unit (remote side) 130 includes the data to be processed and the format of a packet including the function name corresponding to the processing. In the example of vRAN, this refers to the data to be processed including an error correction code in the case of FEC (Forward Error Correction).

[0065] Figure 5 shows an example of a data structure for function IDs and inter-function exchange of argument data. As with the data structure shown in Figure 4, the calculation result includes the name of the executed function (function ID) and the results of that processing (argument 1, argument 2). In the example of vRAN, this refers to corrected data that has undergone FEC processing and does not include error correction codes.

[0066] [Arrangement of signal processing aggregation device 100] Variations in the arrangement of the integrated signal processing device 100 in the integrated signal processing system will now be described. 6 is a configuration diagram showing variations in the arrangement of the signal processing integrated device 100 in the signal processing integrated system. The same components as those in FIG. 3 are given the same reference numerals, and explanations of overlapping parts will be omitted. The signal processing aggregation system 1000A of FIG. 6 is an example in which the resource aggregation decision unit 140 and accelerator power control unit 150 of the signal processing aggregation device 100 are installed in a controller 160 outside the signal processing device (vDU) 70-1.

[0067] The operation of the integrated signal processing system 1000A configured as described above will now be described. [Sequence 1 in computation offloading before resource aggregation] FIG. 7 is a flowchart showing <Sequence 1> in computation offloading before resource aggregation is performed.

[0068] In step S11, the user terminal 10 converts the data to be transmitted into a radio signal and transmits it to the antenna device 20.

[0069] In step S12, the radio antenna unit 21 of the antenna device 20 receives a radio signal from the user terminal 10.

[0070] In step S13, the radio antenna unit 21 performs arithmetic processing on a part of the received radio signal, and then transmits the signal data to the fronthaul interface unit (antenna side) 22.

[0071] In step S14, the fronthaul interface unit (antenna side) 22 transmits and receives data to and from the fronthaul interface unit 80 of the signal processing device 70-1, and notifies the signal processing unit 90.

[0072] In step S15, the signal processing unit 90 of the signal processing device 70-1 processes the wireless signal and performs arithmetic processing to convert between the wireless signal and the data to be communicated. The signal processing unit 90 notifies the accelerator offload unit 110 of the signal processing aggregation device 100 to offload part of the processing to an accelerator.

[0073] In step S16, the accelerator offload unit 110 of the signal processing aggregation device 100 selects the accelerator 120 installed in the same server or the accelerator 120 installed in a remote server based on the offload destination previously set by the resource aggregation decision unit 140. <2> The processing is offloaded to the accelerator (remote side) 120.

[0074] In step S17, the accelerator 120 receives the “data to be processed” from the accelerator offload unit 110 and performs calculations based on instructions from the accelerator offload unit 110.

[0075] In step S18, the signal processing unit 90 receives the calculation result from the accelerator offload unit 110 and ends the processing of this flow.

[0076] [Sequence 2 for offloading computation during resource-intensive execution] FIG. 8 is a flowchart showing <Sequence 2> in computation offloading during resource intensive execution. This flow for determining resource aggregation is started periodically (for example, once every hour) (step S21). In addition to being executed periodically at regular time intervals, as a variation, it can be started when the prediction result of the traffic prediction unit 210 (described later) fluctuates by a certain amount or more.

[0077] In step S22, the resource aggregation determining unit 140 determines whether to aggregate accelerator resources based on the estimated traffic volume (signal volume) to be processed.

[0078] In step S23, the resource aggregation decision unit 140 determines whether the traffic volume to be processed exceeds a set value. If the traffic volume is equal to or less than the set value (step S23: No), the resource aggregation determination unit 140 instructs the accelerator offload unit 110 to select an aggregation destination, and in step S24, the accelerator offload unit 110 aggregates the remote processing to the aggregation destination instructed by the resource aggregation determination unit 140 using the accelerator remote offload unit 130, and then ends the processing of this flow.

[0079] If the traffic volume exceeds the set value in step S23 (step S23: Yes), in step S25 the accelerator power control unit 150 inputs power saving settings to the accelerator 120 based on an instruction (notification of power saving settings) from the resource aggregation determination unit 140. Examples of power saving settings include "power OFF (shutdown)," "setting the operating frequency," and "writing a small-scale circuit in the case of FPGA."

[0080] In step S26, the accelerator 120 notifies the accelerator offload unit 110 of the "computation result" and ends the processing of this flow.

[0081] [Offload sequence when resource is concentrated <Sequence 3>] 9 to 11 are flowcharts showing the offload sequence <Sequence 3> during resource aggregation. <Sequence 3> is the server in Figure 9. <1> Processing (steps S31 to S37) ⇒ Server in Figure 10 <2> Processing (steps S41 to S43) ⇒ Server in Figure 11 <1> The process (steps S51 and S52) is executed.

[0082] The process shown in FIG. 9 in <Sequence 3> will be described. As shown in FIG. 9, in step S31, the user terminal 10 converts data to be transmitted into a radio signal and transmits it to the antenna device 20.

[0083] In step S32, the radio antenna unit 21 of the antenna device 20 receives a radio signal from the user terminal 10.

[0084] In step S33, the radio antenna unit 21 performs arithmetic processing on a part of the received radio signal, and then transmits the signal data to the fronthaul interface unit (antenna side) 22.

[0085] In step S34, the fronthaul interface unit (antenna side) 22 transmits and receives data to and from the fronthaul interface unit 80 of the signal processing device 70-1, and notifies the signal processing unit 90.

[0086] In step S35, the signal processing unit 90 of the signal processing device 70-1 notifies the accelerator offload unit 110 of the signal processing aggregation device 100 to offload part of the processing to the accelerator.

[0087] In step S36, the accelerator offload unit 110 of the signal processing aggregation device 100 transmits the signal data to be processed, received from the signal processing unit 90, to the accelerator remote offload unit 130.

[0088] In step S37, the accelerator remote offload unit 130 <2> The packetized data of the function name and argument data is sent to the accelerator remote offload unit (remote side) 130 of the signal processing device (vDU) 70-2, and the processing of this flow ends. Specifically, the signal processing device (vDU) 70-1 (Figure 3) of the signal processing aggregation device 100 (Figure 2) offloads the signal processing of the signal processing application 1 to the accelerator 120-2 (Figure 2, symbol dd) via the NIC 53-2 (Figure 2, symbol bb), the NW connection (offload only) (Figure 2, symbol cc), and the NIC 53-2.

[0089] Server in Figure 10 in <Sequence 3> <2> The processing will be explained. As shown in FIG. 10, in step S41, the accelerator remote offload unit (remote side) 130 offloads computation to the accelerator (remote side) 120 based on a packet group of "function name and argument data."

[0090] In step S42, the accelerator (remote side) 120 performs calculations based on instructions from the accelerator remote offload unit (remote side) 130.

[0091] In step S43, the accelerator remote offload unit (remote side) 130 receives data to be processed from the accelerator (remote side) 120, combines the input packets, and restores them into the form of an ID that uniquely identifies a function and an argument. <1> The function name and packetized argument data are sent to the accelerator remote offload unit 130, and the processing of this flow is terminated.

[0092] Server in Figure 11 in <Sequence 3> <1> The processing will be explained. As shown in FIG. 11, in step S51, the server <1> The accelerator remote offload unit 130 receives packetized data of the function name and argument data from the accelerator remote offload unit (remote side) 130 , deserializes the data, and passes it to the accelerator offload unit 110 .

[0093] In step S52, the signal processing unit 90 performs signal processing of the wireless signal on the signal processing result including the accelerator processing, and performs arithmetic processing to convert between the wireless signal and the data to be communicated, and then ends the processing of this flow.

[0094] (Second embodiment) 12 is a configuration diagram of a signal processing aggregated device of a signal processing device (vDU) in a signal processing aggregated system according to a second embodiment of the present invention. The same components as those in FIG. 3 are assigned the same reference numerals, and explanations of overlapping parts will be omitted. As shown in FIG. 12, in the base station of the signal processing integration system 1000B, a server signal processing device (vDU) 70-1 and a server signal processing device (vDU) 70-2 are connected via a network dedicated to offloading. The signal processing device (vDU) 70-1 includes a signal processing aggregation device 200.

[0095] The signal processing aggregation device 200 includes an accelerator offload unit 110 , an accelerator 120 , an accelerator remote offload unit 130 , a resource aggregation determination unit 140 , an accelerator power control unit 150 , and a traffic prediction unit 210 .

[0096] The traffic prediction unit 210 transmits the predicted traffic volume to the resource aggregation decision unit 140. Specifically, the traffic prediction unit 210 predicts the mobile phone traffic volume for the next few tens of minutes in the target antenna device 20 based on the time period and weather, and notifies the resource aggregation decision unit 140 of the predicted volume.

[0097] 12 receives the predicted traffic volume (the amount of processing to be offloaded to the accelerator) from the traffic prediction unit 210, and determines whether to aggregate resources based on whether the predicted traffic volume exceeds a preset value. If the resource aggregation decision unit 140 predicts that the traffic volume will be less than the preset value, it instructs the accelerator offload unit 110 on the aggregation destination and uses the accelerator remote offload unit 130 to aggregate processing remotely.

[0098] The accelerator remote offload unit (remote side) 130 shown in Fig. 12 packetizes the calculation results, notifies the traffic prediction unit 210, and responds with the results. The accelerator remote offload unit (remote side) 130 receives a packet of "function name and argument data" from the traffic prediction unit 210 as input. The accelerator remote offload unit (remote side) 130 notifies the traffic prediction unit 210 of the packet data of the "calculation results" as output.

[0099] [Hardware configuration] The signal processing integrated devices 100, 200 (FIGS. 2, 6, 12) of the signal processing integrated systems 1000, 1000A, 1000B according to the above embodiments are realized by a computer 900 having a configuration as shown in FIG. 13, for example. FIG. 13 is a hardware configuration diagram showing an example of a computer 900 that realizes the functions of the signal processing integrated devices 100 and 200. As shown in FIG. The computer 900 includes a CPU 901, a RAM 902, a ROM 903, a HDD 904, an accelerator 905, an input / output interface (I / F) 906, a media interface (I / F) 907, and a communication interface (I / F) 908. The accelerator 905 corresponds to the accelerator 120 in FIGS. 1, 2, 6, and 12.

[0100] The accelerator 905 is an accelerator (device) 120 (FIGS. 1, 2, 6, and 12) that processes at least one of data from the communication I / F 908 and data from the RAM 902 at high speed. Note that the accelerator 905 may be of a type (look-aside type) that executes processing from the CPU 901 or RAM 902 and then returns the execution result to the CPU 901 or RAM 902. On the other hand, the accelerator 905 may be of a type (in-line type) that performs processing between the communication I / F 908 and the CPU 901 or RAM 902.

[0101] The accelerator 905 is connected to an external device 915 via a communication I / F 908. The input / output I / F 906 is connected to an input / output device 916. The media I / F 907 reads and writes data from and to a recording medium 917.

[0102] The CPU 901 operates based on a program stored in the ROM 903 or HDD 904, and controls each unit of the signal processing integrated devices 100, 200 shown in Figures 2, 6, and 12 by executing a program (also called an application or its abbreviation, "app") loaded into the RAM 902. This program can also be distributed via a communication line or recorded on a recording medium 917 such as a CD-ROM and distributed. The ROM 903 stores a boot program executed by the CPU 901 when the computer 900 is started, programs that depend on the hardware of the computer 900, and the like.

[0103] The CPU 901 controls an input / output device 916, which is made up of input units such as a mouse and a keyboard, and output units such as a display and a printer, via an input / output I / F 906. The CPU 901 acquires data from the input / output device 916 via the input / output I / F 906, and outputs generated data to the input / output device 916. Note that a GPU (Graphics Processing Unit) or the like may be used as a processor together with the CPU 901.

[0104] The HDD 904 stores programs executed by the CPU 901 and data used by the programs. The communication I / F 908 receives data from other devices via a communication network (e.g., a network) and outputs the data to the CPU 901, and also transmits data generated by the CPU 901 to other devices via the communication network.

[0105] The media I / F 907 reads a program or data stored in the recording medium 917 and outputs it to the CPU 901 via the RAM 902. The CPU 901 loads a program related to a target process from the recording medium 917 onto the RAM 902 via the media I / F 907, and executes the loaded program. The recording medium 917 is an optical recording medium such as a DVD (Digital Versatile Disc) or a PD (Phase Change Rewritable Disc), a magneto-optical recording medium such as an MO (Magneto Optical disc), a magnetic recording medium, a conductive memory tape medium, a semiconductor memory, or the like.

[0106] For example, when a computer 900 functions as the signal processing integrated devices 100, 200 configured as one device according to this embodiment, a CPU 901 of the computer 900 executes a program loaded onto a RAM 902 to realize the functions of the signal processing integrated devices 100, 200. Furthermore, data stored in the RAM 902 is stored in an HDD 904. The CPU 901 reads and executes a program relating to a target process from a recording medium 917. Alternatively, the CPU 901 may read a program relating to a target process from another device via a communications network.

[0107] [effect] As described above, the signal processing aggregation devices 100, 200 (FIGS. 2, 6, 12) switch the accelerator to which the application is to be offloaded when the specific processing of the application is offloaded to the accelerator for computational processing, and are provided with an accelerator offload unit 110 that offloads to the accelerator 120 installed therein or to the accelerator 120 on the remote server side based on the set offload destination, and a remote accelerator offload unit 130 that serializes the signal data (offload data) to be processed by the accelerator 120 on the remote server side, packetizes it in a predetermined format, and transmits the packetized data.

[0108] By doing this, the signal processing aggregation devices 100, 200 send offloaded data via the network in cooperation with the accelerator remote offload unit 130 and the accelerator offload unit 110 that performs the offloading. In this case, the computational resources of the accelerators are aggregated without changing the networks before and after the base station server (signal processing aggregation devices 100, 200). In other words, by aggregating on an accelerator-by-accelerator basis, accommodation is changed between the server and the accelerator. Since aggregation is performed only within the base station server without changing the signal connection relationship between the base station (DU RU UE), there is an advantage that the impact of resource switching on the user terminal 10 is small. In addition, there is no change in fronthaul switching or wireless connection, so there is an advantage that no change is required to the antenna device 20.

[0109] In addition, only the accelerator processing is performed between servers (in this embodiment, <1> This allows accelerator resource aggregation without any changes to the fronthaul, the antenna device 20, and the user terminal 10. As a result, signal processing can be dynamically aggregated into some computational resources without any changes to the user terminal, the signal processing device, and the antenna device.

[0110] The signal processing aggregation devices 100 and 200 are provided with a resource aggregation decision unit 140 that decides whether to aggregate resources of the accelerator 120 based on the traffic volume of the signal data to be processed (the volume of processing to be offloaded to the accelerator), and an accelerator power control unit 150 that, based on instructions from the resource aggregation decision unit 140, applies power saving settings to the accelerator 120 installed therein or to the accelerator 120 on the remote server side.

[0111] In this way, accelerators are aggregated and power-saving settings are implemented (for example, accelerator power-off). That is, by consolidating, it is possible to increase the number of empty accelerators, and then power off the empty accelerators. Therefore, power saving can be achieved by turning off unused accelerators / putting them into power-saving mode. As a result, signal processing can be dynamically aggregated to some computing resources without making any changes to the user terminal, signal processing device, or antenna device, and power saving effects can be achieved.

[0112] In the signal processing aggregation devices 100, 200, when the traffic volume is below a predetermined value, the resource aggregation decision unit 140 instructs the accelerator offload unit 110 to select an aggregation destination and uses the accelerator remote offload unit 130 to aggregate resources to the accelerator 120 on the remote server side.

[0113] In this way, resources can be concentrated in the accelerator 120 on the remote server side, thereby realizing resource saving.

[0114] The signal processing aggregation devices 100, 200 are provided with a traffic prediction unit 210 that predicts traffic volume (amount of processing to be offloaded to the accelerator), and the resource aggregation decision unit 140, based on the traffic volume prediction result from the traffic prediction unit 210, instructs the accelerator offload unit 110 on the aggregation destination if the traffic volume is below a predetermined value, and aggregates resources remotely using the accelerator remote offload unit 130.

[0115] By doing this, it is possible to determine whether to offload between chassis based on the estimated communication volume, and to control the power supply of accelerators during offloading. Therefore, by turning off the power or putting unused accelerators into power-saving mode, it is possible to achieve power savings.

[0116] Also, signal processing integrated systems 1000, 1000A, 1000B (Figs. 1, 2, 6, 12) equipped with base stations for processing wireless access signals are provided with an accelerator pool 500 in which accelerators 120 specialized for specific operations are pooled in advance and arranged, and signal processing integrated devices 100, 200 (Figs. 2, 6, 12) that switch the accelerator 120 to be offloaded when specific processing of an application is offloaded to an accelerator for operation processing, and the signal processing integrated devices 100, 200 select the accelerator 120 to be set as the offload destination from the accelerator pool 500 and switch the accelerator 120 to offload to that accelerator 120. The system includes a forwarding unit 110, an accelerator remote offloading unit 130 that serializes and packetizes in a predetermined format the signal data (offload data) to be processed by the accelerators 120 pooled in the accelerator pool 500, and transmits the packetized data as packetized data, a resource aggregation decision unit 140 that decides whether to aggregate accelerator resources based on the traffic volume of the signal data to be processed, and an accelerator power control unit 150 that, when accelerator resource aggregation is to be performed based on an instruction from the resource aggregation decision unit 140, applies power saving settings to the accelerators 120 that have become unused due to the accelerator resource aggregation.

[0117] In this way, only accelerator processing can be consolidated between servers, and accelerator resource consolidation can be realized without making any changes to the fronthaul, the antenna device 20, and the user terminal 10. Also, it becomes possible to assign only the necessary amount of accelerator resources from the accelerator pool 500, thereby improving resource utilization efficiency. As a result, signal processing can be dynamically consolidated into some computational resources without making any changes to the user terminal, signal processing device, or antenna device.

[0118] It should be noted that, among the processes described in the above embodiments, all or part of the processes described as being performed automatically can be performed manually, or all or part of the processes described as being performed manually can be performed automatically using a known method. In addition, the information including the processing procedures, control procedures, specific names, various data, and parameters shown in the above documents and drawings can be changed as desired unless otherwise specified. Furthermore, the components of each device shown in the figure are conceptual functional components and do not necessarily have to be physically configured as shown in the figure. In other words, the specific form of distribution and integration of each device is not limited to that shown in the figure, and all or part of them can be functionally or physically distributed and integrated in any unit depending on various loads, usage conditions, etc.

[0119] Furthermore, some or all of the above-described configurations, functions, processing units, processing means, etc. may be implemented in hardware, for example, by designing them as an integrated circuit. Furthermore, the above-described configurations, functions, etc. may be implemented in software that allows a processor to interpret and execute programs that implement the respective functions. Information on the programs, tables, files, etc. that implement the respective functions may be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC (Integrated Circuit) card, SD (Secure Digital) card, or optical disk. [Explanation of symbols]

[0120] 10 User Equipment (UE) 20 Antenna device 21 Radio antenna section 22 Fronthaul interface unit (antenna side) 40 Core Network 70, 70-1, 70-2 Signal Processing Unit (vDU) (Server) 80 Fronthaul interface unit (signal processing device side) 90 Signal Processing Section 100,200 Signal Processing Device 110 Accelerator Off-road Section 120,120-1,120-2 Accelerator 130 Accelerator Remote Offload Unit 140 Resource aggregation decision unit 150 Accelerator power supply control unit 160 Controller 210 Traffic Prediction Unit 500 ACC Pool (Accelerator Pool) 1000, 1000A, 1000B Signal Processing Aggregation System< / vran>

Claims

1. A signal processing aggregation device that switches an accelerator to which an application is to be offloaded when the application is to be offloaded to the accelerator for calculation processing, an accelerator offload unit that offloads to the accelerator installed in the accelerator or the accelerator on the remote server side based on the set offload destination; an accelerator remote offload unit that serializes offload data to the accelerator on the remote server side, packetizes the data in a predetermined format, and transmits the packetized data. A signal processing aggregation device characterized by:

2. a resource aggregation determination unit that determines whether to aggregate resources of the accelerator based on a processing amount of signal data to be processed that is to be offloaded to the accelerator; an accelerator power control unit that inputs settings related to power saving to the accelerator installed therein or the accelerator on the remote server side based on an instruction from the resource aggregation determination unit.

2. The signal processing aggregation device according to claim 1.

3. The resource aggregation determination unit If the amount of processing to be offloaded to the accelerator is equal to or less than a predetermined value, the accelerator offload unit is instructed to select a destination for consolidation, and the accelerator remote offload unit is used to consolidate resources to the accelerator on the remote server side.

3. The signal processing aggregation device according to claim 2.

4. a traffic prediction unit that predicts a processing amount to be offloaded to the accelerator; The resource aggregation determination unit instructs the accelerator offload unit to select an aggregation destination and aggregates resources remotely using the accelerator remote offload unit when the traffic volume is equal to or less than a predetermined value based on the traffic volume prediction result from the traffic prediction unit.

3. The signal processing aggregation device according to claim 2.

5. A signal processing aggregation system comprising a base station for processing radio access signals, An accelerator pool is a pool of accelerators specialized for specific operations that are arranged in advance. a signal processing aggregation device that switches the accelerator to which a specific process of an application is to be offloaded when the specific process is offloaded to the accelerator for calculation processing; The signal processing aggregation device an accelerator offload unit that selects an accelerator as a set offload destination from the accelerator pool and offloads to the selected accelerator; an accelerator remote offload unit that serializes offload data to the accelerators pooled in the accelerator pool, packetizes the data in a predetermined format, and transmits the packetized data; a resource aggregation determination unit that determines whether to aggregate accelerator resources based on the amount of signal data to be processed that is to be offloaded to the accelerator; an accelerator power control unit that, when accelerator resource consolidation is performed based on an instruction from the resource consolidation determination unit, inputs settings related to power saving to the accelerator that has become unused due to the accelerator resource consolidation. A signal processing aggregation system comprising:

6. A signal processing aggregation method for a signal processing aggregation device that switches an accelerator to which an application is offloaded when the application offloads a specific process to the accelerator for computation, comprising: The signal processing aggregation device offloading the data to the accelerator installed in the computer or the accelerator on the remote server based on the set offload destination; Serializing the offload data to be processed by the accelerator on the remote server side, packetizing the data in a predetermined format, and transmitting the packetized data. A signal processing aggregation method comprising:

7. A program for causing a computer to function as the signal processing aggregation device according to any one of claims 1 to 4.

Images