Time constant control circuit for low-pass filter provided in transimpedance amplifier for optical communication receiver, time constant switching transimpedance amplifier (TIA), optical communication receiver, passive optical network system, and in-vehicle optical network system

Abstract

To provide a time constant control circuit, a time constant switching TIA, an optical communication receiving device, a PON system, or an on-vehicle optical network system that improves responsiveness to burst signals.SOLUTION: A time constant control circuit 100 of a low-pass filter for a TIA includes: a low-pass filter circuit 101 composed of resistor elements and capacitor elements; and a switching signal generation unit 114 that outputs a time constant switching signal for switching a time constant according to an output voltage VLPF of the low-pass filter circuit 101. The low-pass filter circuit 101 includes: a resistor switching unit 111 that receives the time constant switching signal and switches a resistance value; a capacitor charging unit 113 that charges some capacitors of the capacitor elements with the output voltage VLPF of the low-pass filter circuit 101, and stops charging on receiving the time constant switching signal; and a capacitor switching unit 112 that connects some of the capacitors to an output of the low-pass filter circuit 101 and switches a capacitance value.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a circuit for appropriately controlling the time constant of a low-pass filter provided in a transimpedance amplifier (TIA) for an optical communication receiving device such as a passive optical network system or an in-vehicle optical network system. [Background technology]

[0002] The development of optical communication systems, typified by passive optical network (PON) systems, is progressing rapidly. Optical communication systems are not limited to the telecommunications industry; applications to in-vehicle optical networks are also being considered. In optical communication systems, transimpedance amplifiers (TIAs) are installed in optical communication receivers and have the function of converting optical signals to electrical signals and amplifying weak electrical signals with high sensitivity. TIAs require adjustment of transimpedance gain and conversion from single-phase signals to differential signals, and these are often achieved by detecting the intermediate voltage of the TIA output using a low-pass filter (LPF). The response of the low-pass filter needs to be optimized according to the input signal pattern.

[0003] The optical signal in a PON system is a burst signal with a preamble period and a payload period. The preamble period has a data pattern consisting of alternating "1" and "0" bits. The payload period has a CID (Consecutive Identical Digit) period, which is a period in which the same code is repeated, and the maximum CID length depends on the encoding method.

[0004] The preamble period appears at the beginning of the input data frame of the burst signal, and its duration is much shorter than the payload period. The time constant of the low-pass filter used to detect the intermediate voltage of the TIA output must respond quickly to stabilize operation at the beginning of the frame, so the time constant of the low-pass filter must be set to a small value during the preamble period. On the other hand, the time constant of the low-pass filter during the payload period must be large enough to stabilize the intermediate voltage, especially during the CID period. Therefore, the appropriate time constant for the payload period is much larger than the appropriate time constant for the preamble period, and a single time constant cannot satisfy both requirements.

[0005] Patent document 1 describes a burst signal receiving device equipped with a control circuit that switches the time constant so that the time constant set at the beginning of a signal when a burst signal is received is shorter than the time constant set at the later stage of the signal. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-177577 Summary of the Invention [Problem to be solved by the invention]

[0007] The burst signal receiving device described in Patent Document 1 switches only the resistance value of the low-pass filter. By varying the capacitance value in addition to the resistance values ​​of the components of the low-pass filter, it becomes possible to switch to a larger time constant, enabling flexible circuit design to improve responsiveness to burst signals. To change the capacitance value of the low-pass filter, a fully charged capacitor must be inserted to prevent the low-pass filter's output voltage from changing. However, because charging the capacitor with the low-pass filter's output voltage requires that the capacitor be connected to the low-pass filter circuit in advance, this method has not been used for time constant control in conventional devices.

[0008] An object of the present invention is to provide a time constant control circuit, a time constant switching TIA, an optical communication receiving device, a passive optical network system, or an in-vehicle optical network system that improves responsiveness to a burst signal. [Means for solving the problem]

[0009] A time constant control circuit according to the present invention includes a low-pass filter circuit and a switching signal generating unit that outputs a time constant switching signal, and the low-pass filter circuit has a capacitor switching unit and a capacitor charging unit that are controlled by the time constant switching signal. This allows the capacitance value of the low-pass filter circuit to be switched, enabling flexible circuit design.

[0010] A time constant control circuit according to the present invention includes a low-pass filter circuit having a resistance element and a capacitance element, and a switching signal generating unit that outputs a time constant switching signal for switching the time constant of the low-pass filter circuit in accordance with the output voltage of the low-pass filter circuit. The low-pass filter circuit is characterized by having: a resistance switching unit that switches the resistance value of the low-pass filter circuit in response to the time constant switching signal; a capacitor charging unit that charges some of the capacitors constituting the capacitance element with the output voltage of the low-pass filter circuit and stops the charging in response to the time constant switching signal; and a capacitor switching unit that switches the capacitance value of the low-pass filter circuit in response to the time constant switching signal by connecting some of the capacitors to the output of the low-pass filter circuit.

[0011] This configuration makes it possible to switch both the resistance and capacitance of the low-pass filter circuit, facilitating switching to a larger time constant and enabling flexible circuit design. Furthermore, because the output voltage of the low-pass filter circuit charges some of the capacitors in the capacitor elements, no charge transfer occurs when a capacitor is inserted during time constant switching, minimizing the impact on the operation of the low-pass filter circuit.

[0012] In the time constant control circuit according to the present invention, the switching signal generating unit is preferably configured to output the time constant switching signal after a predetermined delay time has elapsed since the output voltage of the low-pass filter circuit has changed in comparison with a predetermined threshold value.

[0013] According to the above configuration, the time constant of the low-pass filter circuit is switched after a predetermined delay time has elapsed, so that the time constant can be switched after the output voltage of the low-pass filter circuit has sufficiently stabilized at the time constant before the time constant is switched. [Effects of the Invention]

[0014] According to the time constant control circuit, the time constant switching TIA, the optical communication receiving device, the passive optical network system, and the in-vehicle optical network system of the present invention, the responsiveness to burst signals can be improved. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a configuration diagram of a passive optical network (PON) system according to an embodiment of the present invention. [Figure 2] 1 is a configuration diagram of an in-vehicle optical network system according to an embodiment of the present invention. [Figure 3] 1 is a circuit diagram of a time constant switching TIA and an optical communication receiving device according to an embodiment of the present invention. [Figure 4] FIG. 4 is an example of a specific circuit diagram of the amplifier circuit in FIG. 3. [Figure 5] FIG. 2 is a circuit diagram of a time constant control circuit according to an embodiment of the present invention. [Figure 6] FIG. 6 is an equivalent circuit diagram of the time constant control circuit of FIG. 5 at a first time constant. [Figure 7] FIG. 6 is an equivalent circuit diagram of the time constant control circuit of FIG. 5 at a second time constant. [Figure 8] The waveforms during the preamble period are shown in FIG. 8(a) which shows the input current waveform, and FIG. 8(b) which shows the voltage waveforms at various parts of the time constant control circuit. [Figure 9]9A and 9B show waveforms in the preamble period and the payload period, where FIG. 9A is the input current waveform and FIG. 9B is the output voltage waveform of the low-pass filter circuit. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, specific shapes, materials, directions, numerical values, etc. are examples for facilitating understanding of the present invention, and can be appropriately changed according to the application, purpose, specifications, etc. Furthermore, it is originally anticipated that the components of the embodiments and modifications described below can be selectively combined.

[0017] 1 is a configuration diagram of a passive optical network (PON) system 1 of the present invention. The PON system 1 is a type of optical communication system, and is a technology in which optical signals transmitted via optical fibers from multiple on-premises devices (ONUs: Optical Network Units) 2A, 2B, 2C, etc. are combined by an optical coupler 3 and guided to an optical line terminal (OLT, Optical Line Terminal) (not shown) installed in a communication station. In recent years, the application of PON systems to in-vehicle optical networks has been studied.

[0018] 1 includes a plurality of on-premises devices (ONUs) 2, an optical coupler 3, an optical / electrical signal conversion device 4, and a signal processing device 5, but the configuration is not limited to this. The PON system 1 in Fig. 1 shows only the upstream communication path along which optical signals from ONUs 2A to 2C travel to the OLT in the communication station.

[0019] ONUs 2A to 2C are optical line terminals installed in ordinary homes. ONUs 2A to 2C are connected to networks and computers within the home. Each ONU 2A to 2C is paired with an OLT installed in a communications station to send and receive optical signals.

[0020] The optical coupler 3 functions to couple optical signals transmitted from the plurality of ONUs 2A to 2C via optical cables into a series of optical signals. The series of optical signals coupled by the optical coupler 3 is a burst signal in the present invention.

[0021] The optical / electrical signal conversion device 4 has an optical / electrical signal conversion function for converting the burst signal, which is an optical signal received from the optical coupler 3, into a current signal, a current / voltage conversion function for converting the current signal into a voltage signal, and a differential amplification function for further amplifying the voltage signal and converting the single-ended signal into a differential signal. The optical / electrical signal conversion device 4 is an optical communication receiving device 10, which will be described later.

[0022] The signal processing device 5 receives the differential signal output from the optical / electrical signal conversion device 4 and performs signal processing. Specifically, the signal processing device 5 relays the signal received from the optical line to the line or device on the upper network side. In addition, the signal processing device 5 also has a function of combining optical signals to be transmitted to each ONU 2 on the downstream communication path (not shown) and sending the combined optical signals to the optical line, but this function is omitted in the present invention.

[0023] Figure 2 shows the configuration of an in-vehicle optical network system 6, an application of a PON system. In the in-vehicle optical network system 6 in Figure 2, only the configuration of the receiving system is shown. The in-vehicle optical network system 6 comprises one master 7 and multiple gateways (GW) 81-8N. Each gateway is connected by a unidirectional ring-shaped optical fiber 9. The master 7 transmits signals to all gateways 81-8N as burst signals via the optical fiber 9. The signals from each gateway 81-8N are received by optical switches SW1-SWN. The signals received by the optical switches SW1-SWN are input to optical communication receiving devices RX1-RXN. The optical signals are converted into current signals by photodiodes in the optical communication receiving devices RX1-RXN, and the current signals are converted into voltage signals and amplified by TIAs. The amplified signals are transferred to the downstream ECU.

[0024] In the in-vehicle optical network system 6 of Figure 2, each gateway 81 to 8N, like the PON system of Figure 1, has an optical communication receiving device RX1 to RXN that converts a burst signal into a current signal and a voltage signal, further amplifies the voltage signal, and converts a single-phase signal into a differential signal.

[0025] Next, the optical communication receiving device 10 will be described in detail.

[0026] 3 is a circuit diagram of an optical communication receiving device 10 constituting the optical / electrical signal conversion device 4 in the PON system 1. The optical communication receiving device 10 includes a photodiode PD that receives a burst signal, and a time constant switching TIA 20 that is connected to the photodiode PD and receives a current signal.

[0027] The photodiode PD receives an optical signal, which is a burst signal output from the optical coupler 3 in the PON system 1 of Fig. 1. The photodiode PD receives the burst signal and converts it into a current signal.

[0028] The time constant switching TIA 20 includes a TIA 21, a time constant control circuit 100, and a differential amplifier circuit DA. As will be described later, the time constant control circuit 100 includes a low-pass filter circuit (LPF) 101 and a switching signal generating unit 114.

[0029] The TIA 21 includes an amplifier circuit (for example, an inverting amplifier circuit) and a feedback resistor Rf. The TIA 21 converts the current signal flowing from the photodiode PD into a voltage signal, amplifies it in the amplifier circuit, and outputs an output voltage V TIA When the amplitude of the input current is Ii, the output voltage V TIA is V TIA =RfxIi. However, V TIA is below the power supply voltage, and the output voltage waveform is distorted for large input currents. Also, since the frequency band of the amplifier circuit improves as Rf decreases, it is necessary to set the feedback resistor Rf appropriately according to the input current range and bit rate. The output voltage V converted by the TIA21 TIAis input to a time constant control circuit 100 having a differential amplifier circuit DA and a low-pass filter circuit 101 (see FIG. 5) at the subsequent stage.

[0030] As will be described later, the time constant control circuit 100 includes a low-pass filter circuit 101 and a switching signal generating unit 114 that outputs a time constant switching signal. The low-pass filter circuit 101 of the time constant control circuit 100 receives a voltage signal from the TIA 21 and outputs an intermediate voltage. The time constant control circuit 100 of the present invention has a function of switching the time constant of the low-pass filter circuit 101. Details will be described later.

[0031] The differential amplifier circuit DA has two input terminals and two output terminals. The input terminals receive the voltage V TIA and the output voltage V of the time constant control circuit 100 (specifically, the low-pass filter circuit 101). LPF The output terminals of the differential amplifier circuit DA are a non-inverting output terminal and an inverting output terminal. In the differential amplifier circuit DA of this embodiment, the output voltage V TIA and the output voltage V of the time constant control circuit 100 LPF As already mentioned, the differential output voltage of the differential amplifier circuit DA is output to the signal processing device 5 at the subsequent stage.

[0032] Figure 4 shows a circuit diagram of an inverting amplifier circuit, which is an example of an amplifier circuit. The inverting amplifier circuit includes a p-MOSFET and an n-MOSFET. The drain terminals of the p-MOSFET and n-MOSFET are connected to each other, and the gate terminals are connected to each other. The source terminal of the p-MOSFET is connected to the power supply voltage Vdd. The source terminal of the n-MOSFET is connected to the circuit ground (GND). The inverting amplifier circuit inverts and amplifies the voltage input to the IN terminal (gate terminal) and outputs it to the OUT terminal (drain terminal). Therefore, in the TIA 21 in Figure 3, when the output current of the photodiode PD increases, the output voltage of the TIA 21 decreases.

[0033] The time constant control circuit 100 of the present invention will be described in detail with reference to Figs. 5 to 7. Fig. 5 is a circuit diagram of the time constant control circuit 100 of the present invention. Fig. 6 is an equivalent circuit diagram of the time constant control circuit 100 of Fig. 5 when the low-pass filter circuit 101 has a first time constant, and Fig. 7 is an equivalent circuit diagram of the time constant control circuit of Fig. 5 when the low-pass filter circuit 101 has a second time constant. S , the second time constant is T L When T S <T L There is a relationship between

[0034] The time constant control circuit 100 is connected to the output terminal V TIA and the input terminal of the differential amplifier circuit DA. The time constant control circuit 100 is composed of a low-pass filter circuit 101 and a switching signal generating unit 114. The low-pass filter circuit 101 includes a resistance switching unit 111, a capacitor switching unit 112, and a capacitor charging unit 113.

[0035] The low-pass filter circuit 101 forms an RC low-pass filter including a plurality of resistor elements R1 and R2 and a plurality of capacitor elements C1 and C2. TIA is filtered by the low-pass filter circuit 101 to produce a voltage V LPF By appropriately setting the time constant of the low-pass filter circuit 101, the output voltage V LPF is the output voltage V of the TIA21 TIA The voltage may be an intermediate voltage.

[0036] The first time constant of the low-pass filter circuit 101 is determined by the resistor R1 and the capacitor C1. As will be described later, at the beginning of the preamble period of the burst signal, the time constant of the low-pass filter circuit 101 is equivalent to the first time constant. Hereinafter, in the present invention, when referring to values ​​such as the resistor R1, R1 and the suffix will be expressed as subscripts.

[0037] The resistance switching unit 111 includes a resistance R1, a resistance R2, and a transmission gate TG1 connected in parallel to the resistance R1 and the resistance R2. The transmission gate TG1 switches between a low resistance r on and high resistance r off Therefore, by connecting the transmission gate TG1 in parallel with the resistor R2, the resistance value in parallel with the resistor R2 becomes a low resistance value r on and high resistance value r off The low resistance value r on and high resistance value r off The relationship between on < <R1,R2<<r off The transmission gate TG1 has a low resistance r on When the transmission gate TG1 is connected to the high resistance r off When this occurs, both ends of resistor R2 are essentially open.

[0038] The transmission gate TG1 is configured with the source and drain terminals of an n-MOSFET and a p-MOSFET connected in inverse parallel. The transmission gate TG1 can be made to function as a switch by inputting voltages with inverted logic to the gate terminals. In other words, by inputting a high-level voltage to the gate terminal of the n-MOSFET and a low-level voltage to the gate terminal of the p-MOSFET, a low resistance value r is created between the drain and source of the transmission gate TG1. on By inputting a low-level voltage to the gate terminal of the n-MOSFET and a high-level voltage to the gate terminal of the p-MOSFET, a high resistance value r is created between the drain and source of the transmission gate TG1. off The transmission gates TG2 and TG3, which will be described later, also operate in a similar manner.

[0039] The capacitor switching unit 112 includes a capacitor C1 and a series circuit of a transmission gate TG3 and a capacitor C2 connected in parallel to the capacitor C1. The capacitor switching unit 112 is connected to the output terminal (output voltage V LPF ) and the power supply voltage Vdd. By inputting a low-level voltage to the gate terminal of the n-MOSFET of the transmission gate TG3 and a high-level voltage to the gate terminal of the p-MOSFET, the transmission gate TG3 has a high resistance value r off In effect, the capacitor C2 is connected to the output terminal (output voltage V LPF ) is disconnected from the gate terminal of the n-MOSFET of the transmission gate TG3. By inputting a high-level voltage to the gate terminal of the p-MOSFET, the transmission gate TG3 has a low resistance value r on In effect, the capacitor C2 is connected to the output terminal (output voltage V LPF ) and is connected across the capacitor C1.

[0040] The capacitor charging unit 113 includes a series circuit of a voltage follower OP and a transmission gate TG2. The input of the voltage follower OP is the output voltage V LPF is input. Therefore, the output voltage of the voltage follower OP is also V LPF The voltage follower OP is an impedance conversion circuit, and the input and output are separated, so that the circuit connected to the output side has almost no effect on the input side. By inputting a high-level voltage to the gate terminal of the n-MOSFET of the transmission gate TG2 and a low-level voltage to the gate terminal of the p-MOSFET, the transmission gate TG2 has a low resistance value r on The capacitor C2 is connected to the output voltage V LPF is input via the voltage follower OP. In this case, the output voltage V LPFThe output voltage V of the low-pass filter circuit 101 is LPF By inputting a low-level voltage to the gate terminal of the n-MOSFET of the transmission gate TG2 and a high-level voltage to the gate terminal of the p-MOSFET, the transmission gate TG2 has a high resistance value r off The capacitor C2 is connected to the output of the voltage follower OP, that is, the output voltage V LPF This disconnects the capacitor C2 from the power supply, stopping the charging of the capacitor C2.

[0041] The switching signal generating unit 114 includes a comparator COMP, a delay circuit 115, and an inverter 116. The switching signal generating unit 114 generates a time constant switching signal V TG + and its inverted signal V TG -(Hereafter, V TG +, V TG - are called the time constant switching signal). TG +, V TG - is input to the control terminals of the transmission gates TG1 to TG3, and as described above, the state of the transmission gates TG1 to TG3 (low resistance value r on and high resistance value r off ) to switch the time constant of the low-pass filter circuit 101.

[0042] The switching signal generating unit 114 uses a comparator COMP to convert the output voltage V LPF and a given threshold voltage V REF and the output voltage V of the low-pass filter circuit 101 is compared. LPF is a given threshold voltage V REF When the voltage drops below or exceeds the predetermined delay time Δ td After the time constant switching signal V TG +, V TG Specifically, the time constant switching signal V TG +, V TGAt this time, a signal that is logically inverted from the previous signal is output, and the states of the transmission gates TG1 to TG3 change.

[0043] The delay circuit 115 is configured by connecting a plurality of inverter circuits INV in series. The delay circuit 115 receives the output voltage V of the preceding comparator COMP. COMP Enter V TG The delay circuit 115 outputs a delay time Δ between the input voltage and the output voltage, which is the delay time of the inverter circuit INV multiplied by the number of stages (even multiple). td Therefore, the delay circuit 115 generates a predetermined delay time V COMP A predetermined delay time Δ td The voltage V delayed by TG + and outputs the time constant switching signal V TG The output voltage V of the delay circuit 115 TG + is output to the gate terminals of the n-MOSFETs of the transmission gates TG1 and TG2 and the gate terminal of the p-MOSFET of the transmission gate TG3. The output voltage V TG + is also input to the inverter 116 in the subsequent stage, and the inverter 116 outputs the voltage V TG + reversed voltage V TG - Outputs voltage V TG - is output to the gate terminal of the p-MOSFET of the transmission gate TG1, TG2 and the gate terminal of the n-MOSFET of the transmission gate TG3. By configuring in this way, the transmission gates TG1, TG2 have low resistance r on and high resistance r off The timing of this is the same, and the transmission gate TG3 is connected to TG1 and TG2 through a low resistance r on and high resistance r off The timing at which this occurs is reversed.

[0044] Next, details of switching the time constant will be described with reference to Figs. 6 to 9. Figs. 6 and 7 show equivalent circuits for different time constants of the time constant control circuit 100. Fig. 8(a) shows the input current waveform during the preamble period, and Fig. 8(b) shows the voltage waveforms of various parts of the time constant control circuit 100 during the preamble period. Fig. 9(a) shows the input current waveform during the preamble period and the payload period, and Fig. 9(b) shows the output voltage waveform V of the low-pass filter circuit 101 during the corresponding periods. LPF This shows:

[0045] FIG. 6 shows the output voltage V of the low-pass filter circuit 101 during the preamble period of the burst signal. LPF is a given threshold voltage V REF When the output voltage V of the low-pass filter circuit 101 is larger than LPF is a given threshold voltage V REF After the specified delay time Δ td 8(a) shows an equivalent circuit diagram of the time constant control circuit 100. When a burst signal is received and the preamble period begins, a current starts to flow from the photodiode PD (see FIG. 3) as shown in FIG. 8(a). The output voltage V of the TIA 21 TIA is the output of the inverting amplifier circuit, so when the current of the photodiode PD increases, the output voltage V of TIA21 TIA Therefore, as shown in FIG. 8(b), when the preamble period begins, the output voltage V LPF gradually decreases until a predetermined threshold voltage V REF will fall below this.

[0046] During the preamble period, V LPF >V REF When , the output voltage V of the comparator COMP COMP is at a high level. Therefore, the output voltage V TG + is also at a high level. The output voltage V TG - is at a low level. At this time, the transmission gates TG1 and TG2 are connected through a low resistance r on The transmission gate TG3 has a high resistance roff Therefore, the equivalent circuit of the time constant control circuit 100 is as shown in FIG.

[0047] V LPF V REF When the voltage drops below , the output voltage of the comparator COMP COMP However, the delay time Δt d The output voltage V of the delay circuit 115 TG + indicates a high level, and the output voltage V of the inverter 116 TG - maintains a low level. Therefore, the equivalent circuit of the time constant control circuit 100 maintains the circuit shown in FIG.

[0048] When the equivalent circuit of the time constant control circuit 100 is the circuit shown in FIG. 6, the time constant of the low-pass filter circuit 101 is as follows:

[0049] The transmission gate TG1 in parallel with the resistor R2 has a low resistance r on Low resistance r on The resistance value of the transmission gate TG3 is very small compared to the resistance value R2, and the combined resistance value of the low-pass filter circuit 101 is substantially equal to R1. off and the transmission gate TG2 has a low resistance r on Therefore, the capacitor C2 is connected to the output voltage V of the low-pass filter circuit 101 via the voltage follower OP. LPF is input, and the output voltage V of the low-pass filter circuit 101 LPF Since the voltage follower OP has a very large input impedance, the capacitor C2 is charged by the output voltage V LPF The combined capacitance of the low-pass filter circuit 101 is substantially C1. Therefore, the time constant T S becomes R1C1.

[0050] Figure 7 shows the V LPF <V REF and the delay time Δtd 1 is an equivalent circuit diagram of the time constant control circuit 100 after the time has elapsed. At this time, the output voltage V TG + is at a low level, and the output voltage V of the inverter 116 TG - becomes high level. At this time, the transmission gates TG1 and TG2 are connected to the high resistance off The transmission gate TG3 has a low resistance r on Therefore, the equivalent circuit of the time constant control circuit 100 is as shown in FIG.

[0051] When the equivalent circuit of the time constant control circuit 100 is the circuit shown in FIG. 7, the time constant of the low-pass filter circuit 101 is as follows:

[0052] The transmission gate TG1 in parallel with the resistor R2 has a high resistance r off High resistance r off has a resistance value that is significantly larger than the resistance value R2, so the combined resistance value of the low-pass filter circuit 101 is substantially R1+R2. On the other hand, the transmission gate TG3 has a low resistance r on and the transmission gate TG2 has a high resistance r off Therefore, the capacitor C2 is substantially disconnected from the voltage follower OP, and the low resistance r on via the output terminal of the low-pass filter circuit 101 (output voltage V LPF ) is connected. Therefore, the capacitor C2 is substantially connected in parallel with the capacitor C1, and the combined capacitance of the low-pass filter circuit 101 is substantially C1+C2. Therefore, the time constant T L becomes (R1+R2)(C1+C2).

[0053] From the above, the time constant control circuit 100 sets the first time constant T S (=R1C1), the second time constant T L(=(R1+R2)(C1+C2)). The time constant control circuit 100 of the present invention can switch both the combined resistance value and combined capacitance value that make up the low-pass filter circuit 101. Therefore, the time constant control circuit 100 of the present invention can easily accommodate switching of large time constants. Furthermore, by charging the capacitor C2 before switching via the voltage follower OP, the output voltage V of the low-pass filter circuit 101 can be increased with almost no effect on the operation of the low-pass filter circuit 101. LPF Therefore, by connecting the capacitor C2, the output voltage V LPF Therefore, the capacitance value can be changed without affecting the

[0054] Next, the two time constants T S、 T L The conditions for burst signals are described below.

[0055] The output voltage V of the low-pass filter circuit 101 LPF is the output voltage V of the TIA21 TIA Since it is used as the median value detection of bit Therefore, in order to obtain an intermediate waveform with little fluctuation, it is desirable to set the time constant of the low-pass filter circuit 101 to about 10 times 1 / BR. However, if the time constant is large, the output voltage V of the low-pass filter circuit 101 during the preamble period will LPF It is possible that the time cannot reach a steady state and the intermediate value cannot be acquired. PA Then, the time four times the time constant (the time to reach 98.2% of the steady-state value) is T PA The output voltage V of the low-pass filter circuit 101 during the preamble period is set as follows: LPF Therefore, the time constant T S The relationship between PA / 4≧T S It is necessary to set the resistance value R1 and capacitance value C1 so that

[0056] The payload period includes a bit pattern (CID) in which the same code is repeated. As shown in Figure 9(a), in the 64b / 66b system, when the same code is repeated for up to 66 bits (T in the figure), CID In the payload period, the maximum CID length is T CID During this time, the output voltage V LPF To achieve this, the time constant of the low-pass filter circuit 101 must be T CID Therefore, it is desirable to set the time constant T L The relationship between L ≧10T CID It is necessary to set the resistance values ​​R1 and R2 and the capacitance values ​​C1 and C2 so that

[0057] FIG. 9(b) shows the output voltage waveform V of the low-pass filter circuit 101 according to the time constant control circuit 100 of the present invention. LPF Even during the maximum CID length in the preamble period and the payload period, the output voltage V LPF It can be seen that the voltage output from the power supply 100 is stable and substantially constant.

[0058] Consider the silent period of the burst signal. During the silent period of the burst signal, the time constant of the low-pass filter circuit 101 is the first time constant T S The length of the signal-free period of the burst signal must be set to T INTV Then, the second time constant T L If the time is longer than four times the time constant switching signal V TG + flips from low to high, and V TG - is inverted from high level to low level. INTV / 4≧T L If the resistors R1 and R2 and the capacitors C1 and C2 are set so as to satisfy the above, the time constant can be switched to the time constant for the preamble period without providing a special reset circuit.

[0059] In the time constant control circuit 100 of the above embodiment, both the resistance and capacitance of the low-pass filter circuit 101 are changed, but it may be configured to change only the capacitance. Also, the configuration of the low-pass filter circuit is not limited to an RC filter circuit, and it is possible to change the time constant by switching the resistance and / or capacitance of an RLC filter circuit.

[0060] It should be noted that the present disclosure is not limited to the above-described embodiments and their variations, and it goes without saying that various modifications and improvements are possible within the scope of the matters described in the claims of the present application. [Explanation of symbols]

[0061] 1 Passive Optical Network (PON) system, 2, On-premises unit (ONU), 3 Optical coupler, 4 Optical / electrical signal conversion device, 5 Signal processing device, 6 Vehicle optical network system, 7 Master, 81-8N Gateway, 9 Optical fiber, 10 Optical communication receiving device, 20 Time constant switching TIA, 21 TIA, DA differential amplifier circuit, 100 Time constant control circuit, 101 Low-pass filter circuit, 111 Resistor switching unit, 112 Capacitor switching unit, 113 Capacitor charging unit, 114 Switching signal generation unit, 115 Delay circuit, 116 Inverter

Claims

1. A time constant control circuit including a low-pass filter, A low-pass filter circuit; a switching signal generating unit that outputs a time constant switching signal, which is a binary signal that is inverted after a predetermined time has elapsed since the output value of the low-pass filter circuit starts to fluctuate; Equipped with the low-pass filter circuit includes a capacitor switching unit controlled by the time constant switching signal, a capacitor charging unit, A time constant control circuit having a

2. the time constant switching signal changes so that the time constant of the low-pass filter circuit increases after a predetermined time has elapsed since the output value of the low-pass filter circuit started to fluctuate; 2. The time constant control circuit according to claim 1.

3. A low-pass filter circuit; a switching signal generating unit that outputs a time constant switching signal; the low-pass filter circuit includes a time constant control circuit having a capacitor switching unit controlled by the time constant switching signal and a capacitor charging unit; a transimpedance amplifier (TIA) for an optical communication receiver; a differential amplifier circuit that receives the output voltage of the TIA and the output voltage of the low-pass filter circuit to which the output voltage of the TIA is input, and outputs a differentially amplified signal; A time constant switching TIA comprising:

4. A time constant control circuit for a low-pass filter for a transimpedance amplifier (TIA) for an optical communication receiving device, comprising: a low-pass filter circuit having a resistor element and a capacitor element; a switching signal generating unit that outputs a time constant switching signal for switching a time constant of the low-pass filter circuit in accordance with an output voltage of the low-pass filter circuit, The low-pass filter circuit a resistance switching unit that switches a resistance value of the low-pass filter circuit in response to the time constant switching signal; a capacitor charging unit that charges a part of the capacitors constituting the capacitor element with an output voltage of the low-pass filter circuit and stops charging upon receiving the time constant switching signal; a capacitor switching unit that receives the time constant switching signal and connects the part of the capacitors to the output of the low-pass filter circuit to switch the capacitance value of the low-pass filter circuit. Time constant control circuit.

5. the switching signal generating unit outputs the time constant switching signal after a predetermined delay time has elapsed since the output voltage of the low-pass filter circuit has changed in comparison with a predetermined threshold value.

5. The time constant control circuit according to claim 4.

6. The resistance switching unit a resistor element and a first switch element; In response to the time constant switching signal, the first switch element is switched on and off to increase the resistance value of the low-pass filter circuit; The capacitor switching unit the capacitor element and a second switch element; In response to the time constant switching signal, the second switch element is switched on and off, thereby increasing the capacitance value of the low-pass filter circuit; The capacitor charging unit a voltage follower connected to the output voltage of the low-pass filter circuit; and a third switch element; receiving the time constant switching signal, and switching on and off the third switch element, thereby disconnecting the part of the capacitors from the output voltage of the low-pass filter circuit via the voltage follower; 6. The time constant control circuit according to claim 5.

7. A time constant control circuit according to any one of claims 4 to 6; The TIA; a differential amplifier circuit that receives the output voltage of the TIA and the output voltage of the low-pass filter circuit to which the output voltage of the TIA is input, and outputs a differentially amplified signal; A time constant switching TIA comprising:

8. a photodiode for inputting an optical signal; a time constant switching TIA according to claim 3 or 7, which receives as input a current signal output by the photodiode; An optical communication receiving device comprising:

9. the optical signal is a burst signal having a preamble period and a payload period; The length of the preamble period in the burst signal is defined as TPA, and the maximum time during which the same code continues in the payload period is defined as TCID. When the time constant of the low-pass filter circuit before switching the time constant during the preamble period is TS and the time constant of the low-pass filter after switching the time constant is TL, TPA / 4≧TS and TL≧10TCID Satisfy the 9. The optical communication receiving device according to claim 8.

10. a plurality of home devices; an optical coupler that combines signals from optical fibers connected to each of the plurality of home devices and outputs an optical signal; an optical / electrical signal conversion device having an optical communication receiving device according to claim 8 or 9 for receiving the optical signal output from the optical coupler; a signal processing device that receives the differentially amplified signal output from the optical / electrical signal conversion device; A passive optical network (PON) system comprising:

11. An in-vehicle optical network system in which a master and multiple gateways are connected in a ring shape by optical fibers, An in-vehicle optical network system, wherein any one of the plurality of gateways comprises the optical communication receiving device according to claim 8 or 9.

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