GPU blanking and glitchless switching in the mux

Abstract

The rendering device [105] signals the display device [170] to capture and play the current frame to maintain a still image while switching between multiple graphics processing units (GPUs) [130, 135] in a multiplexer (MUX). Playing the current frame while switching in the MUX is in progress results in a smooth user experience with no observable screen blanking or artifacts.

Description

[Background technology]

[0001] A typical processing system employs a graphics processing unit (GPU) to generate images that are displayed on a display panel. The GPU generates a series of frames based on information received from a central processing unit (CPU) or other processing unit, and renders the series of frames for a display such as a computer monitor. Some GPUs have higher performance than other GPUs and can render higher-intensity graphics in a shorter time. However, such high-performance GPUs consume more power than lower-performance GPUs, making lower-performance GPUs useful for saving power in scenarios using lower-intensity graphics. To take advantage of the graphics capabilities of a high-performance GPU and the power-saving features of a lower-performance GPU, some processing systems employ multiple GPUs with different performance and power-saving characteristics.

[0002] The present disclosure may be better understood, and its numerous features and advantages made apparent to those skilled in the art by referencing the accompanying drawings, in which: The use of the same reference numbers in different drawings indicates similar or identical items. [Brief explanation of the drawings]

[0003] [Figure 1] FIG. 1 is a block diagram of a processor that uses a multiplexer to switch between multiple graphics processing units (GPUs) while a display panel uses a panel replay protocol, according to some embodiments. [Figure 2] 2 is a block diagram of the control logic of the processor of FIG. 1 for determining which GPU to select to output a frame of pixel data to a display panel, according to some embodiments. [Figure 3]10A-10C illustrate message flows in a panel playback protocol between GPU control logic, an active GPU, and a display panel while GPUs are switched in a multiplexer, according to some embodiments. [Figure 4] FIG. 10 is a block diagram of a connection between a processor and a display panel for signaling to the display panel in a panel playback protocol while a GPU is switched in a multiplexer, according to some embodiments. [Figure 5] 10 is a flowchart illustrating a method of using a panel playback protocol while a GPU that outputs a frame of pixel data to a display panel is switched in a multiplexer, according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0004] In some multi-GPU configurations, a lower-performance GPU is permanently connected to a display panel, and content with high graphics intensity is rendered by the higher-performance GPU and then copied or streamed to the lower-performance GPU and output to the display panel. However, the overhead associated with copying or streaming the rendered content to the lower-performance GPU can impact performance, resulting in reduced frame rates and negatively impacting the user experience.

[0005] 1-5 illustrate a technique for using a panel playback protocol (PRP) for a display device while switching between multiple graphics processing units (GPUs) in a multiplexer (MUX). Switching GPUs in a MUX saves the overhead associated with multi-GPU configurations, where a lower-performance GPU is permanently connected to the display device and content rendered by a higher-performance GPU is copied or streamed to the lower-performance GPU and output to the display device. However, switching GPUs in a MUX takes time, during which the display device may go blank or exhibit user-observable artifacts. Therefore, using a panel playback protocol in which the display panel captures and plays back the most recently displayed frame and maintains a still image of that most recently displayed frame while switching in a MUX provides a smoother user experience without any observable screen blanking or artifacts, enabling low-latency, single-frame switching between GPUs. Additionally, while the GPU is switching, the active GPU uses Advanced Link Power Management (ALPM) to power down the link between the GPU and the display device, thus saving power and improving efficiency.

[0006] FIG. 1 illustrates a processing system 100 including a rendering device 105 that uses a MUX 140 to switch between a low-power GPU 130 and a high-performance GPU 135 while executing a panel playback protocol with a display device 170, according to some embodiments. The processing system 100 is generally configured to execute an instruction set (e.g., a computer program), such as an application 115, to perform designated tasks for the electronic device. Examples of such tasks include controlling aspects of the electronic device's operation, displaying information to a user to provide a particular user experience, communicating with other electronic devices, etc. Accordingly, in different embodiments, the processing system 100 is employed in any of a number of types of electronic devices, such as a desktop computer, a laptop computer, a server, a game console, a tablet, a smartphone, etc. In some embodiments, the rendering device 105 includes a panel VDD 150 and a backlight power supply 155. The panel VDD 150 is configured to provide power to the panel logic of the display device 170, and the backlight power supply 155 is configured to provide power to the backlight of the display device 170.

[0007] To support the execution of the instruction set, rendering device 105 includes multiple processor cores, such as central processing unit (CPU) 110. In some embodiments, each processor core includes one or more instruction pipelines for fetching instructions, decoding the instructions into corresponding operations, dispatching the operations to one or more execution units, executing the operations, and finalizing the operations. In the course of executing instructions, CPU 110 generates graphics operations and other operations associated with the visual display of information. Based on these operations, CPU 110 provides commands and data to multiple graphics processing units (GPUs), shown in FIG. 1 as low-power GPU 130 and high-performance GPU 135. While two GPUs are shown in FIG. 1, in some embodiments, rendering device 105 includes three or more GPUs.

[0008] GPUs 130, 135 are generally configured to receive commands and data associated with graphics operations and other display operations from multiple processor cores. Based on the received commands, GPUs 130, 135 perform operations to generate frames for display. Examples of operations include vector operations, drawing operations, etc. In some embodiments, low-power GPU 130 is implemented as an accelerated processing unit (APU) and is configured to conserve power while rendering frames with low graphics intensity. Meanwhile, high-performance GPU 135 is configured to render frames with high graphics intensity, such as for video games, and consumes more power than low-power GPU 130. In some embodiments, high-performance GPU 135 can render frames at a higher frame rate than low-power GPU 130. The low-power GPU 130 and the high-performance GPU 135 are connected to a multiplexer (MUX) 140, which switches between the low-power GPU 130 and the high-performance GPU 135 to output frames of video to a display device 170, such that only one of the low-power GPU 130 and the high-performance GPU 135 (referred to herein as the active GPU) outputs a rendered frame at a time.

[0009] Control logic 120 is generally configured to determine whether low-power GPU 130 or high-performance GPU 135 will render each frame based on input from application 115, commands received from CPU 110, and input received from power monitor 125. For example, if control logic 120 determines, based on input from application 115 and commands received from CPU 110, that a video game including a graphics-intensive frame has been launched, control logic 120 determines that high-performance GPU 135 should render the frame. If low-power GPU 130 was the active GPU before the launch of the video game, control logic 120 determines to switch between low-power GPU 130 and high-performance GPU 135 via MUX 140. Control logic 120 is further configured to signal display device 170 when a switch between GPUs 130, 135 is to occur.

[0010] Conversely, if control logic 120 receives an indication from power monitor 125 that the battery power is below a threshold, control logic 120 determines that low-power GPU 130 should render the frame to extend battery life. If high-performance GPU 135 was the initially active GPU before the low battery power indication, control logic 120 determines to switch from high-performance GPU 135 to low-power GPU 130 with MUX 140. Control logic 120 and power monitor 125 may be implemented as hard-coded or programmable logic, one or more processors executing software / firmware instructions, or any combination thereof.

[0011] Each rendered frame output from an active GPU is buffered in a frame buffer or other storage component (not shown) of rendering device 105. The active GPU then operates to transmit pixel data representing the buffered frame, along with associated metadata, row by row, over interconnect 160 to display device 170.

[0012] Display device 170 is generally a display device configured to visually display images on a panel based on frames generated by GPUs 130, 135. Thus, in different embodiments, display device 170 is a liquid crystal display (LCD) device, an organic light-emitting diode (OLED) device, or the like. As will be appreciated by those skilled in the art, display device 170 is generally configured to periodically display the most recent frame generated by the active GPU by refreshing display device 170 with pixel data received from the active GPU. Display device 170 includes a frame buffer (not shown) and is capable of implementing a Panel Replay Protocol (PRP).

[0013] To execute the panel playback protocol, display device 170 captures the current frame from the active GPU and stores the frame in a frame buffer. During the PRP, the active GPU suspends providing frames to display device 170, and display device 170 self-refreshes by periodically reading the captured frame from its frame buffer and providing the captured frame for display on the panel of display device 170. Display device 170 switches back to transmitting live frames from the active GPU in response to the active GPU transmitting a frame with a Live Frame indication using the PRP.

[0014] To facilitate glitchless switching between low-power GPU 130 and high-performance GPU 135 at MUX 140 without blanking or artifacts, control logic 120 captures the current video frame in a frame buffer and signals display device 170 to play the captured frame in response to control logic 120 determining that a switch between GPUs 130, 135 is to occur at MUX 140. Display device 170 begins capturing the current frame in a frame buffer in response to receiving the Capture Frame signal. Once the capture is complete, control logic 120 sends a Replay Frame signal to signal display device 170 to maintain a static image by continuously refreshing the panel with the captured frame. While display device 170 is refreshing its panel using the captured frame, control logic 120 disables output from the active GPU, stops sending data to display device 170 over interconnect 160, and initiates a switch from the active GPU 130, 135 to the other GPU 130, 135. For example, if low-power GPU 130 was the first active GPU to render the current frame and control logic 120 determines that a switch to high-performance GPU 135 is desirable based on the graphics intensity of the next frame, control logic 120 disables output from low-power GPU 130 and switches to high-performance GPU 135 at MUX 140 once display device 170 begins self-refreshing using the captured frame.

[0015] After the switching in MUX 140 is completed, control logic 120 turns on high-performance GPU 135. Once the output of high-performance GPU 135 is enabled, control logic 120 programs high-performance GPU 135 to send a Live Frame signal to display device 170 to display new frames transmitted by high-performance GPU 135. In response to receiving the Live Frame signal, display device 170 resynchronizes to the output of high-performance GPU 135.

[0016] In some embodiments, the GPUs 130, 135 employ a pseudo-timing synchronization mechanism (not shown), such as by reading the system time, to ensure that the switch from playing captured frames to displaying live frames output from the newly active GPUs 130, 135 occurs seamlessly. For example, during the switch, output from the low-power GPU 130 is disabled, but the display device 170 plays back captured frames using its internal timing. When the high-performance GPU 135 sends a Live Frame signal, the high-performance GPU 135 uses the pseudo-timing synchronization mechanism to know when to start outputting live frames. As a result, the high-performance GPU 135 outputs live frames in synchronization with the timing of the output of the display device 170. As used herein, "synchronize" and "synchronized" mean that specific points in the display cycles of two or more devices are relatively aligned within a specified amount of time (error).

[0017] In a scenario where high-performance GPU 135 is the initially active GPU and it is desired to switch to low-power GPU 130, for example because the battery is low, control logic 120 disables the output of high-performance GPU 135 while display device 170 self-refreshes using the captured frame and switches to low-power GPU 130. Once the output of low-power GPU 130 is enabled, low-power GPU 130 sends a new frame to display device 170 with a Live Frame indication, and display device 170 resynchronizes to the output of low-power GPU 130. Thus, during the period when low-power GPU 130 and high-performance GPU 135 are switching at MUX 140, display device 170 maintains a static image of the last captured frame output by the initially active GPU, resulting in a glitch-less and artifact-free user experience.

[0018] Panel VDD 150 continuously supplies power to the panel logic of display device 170, and backlight power supply 155 continuously supplies power to keep the backlight of display device 170 lit during switching between GPUs 130, 135 at MUX 140. In some embodiments, panel VDD 150 and backlight power supply 155 are provided to display device 170 independently of MUX 140. In this manner, the power supplied to display device 170 from panel VDD 150 and backlight power supply 155 remains unaffected during GPU switching at MUX 140.

[0019] 2 is a block diagram of a portion 200 of the processing system 100 of FIG. 1, illustrating control logic 120 of the rendering device 105 for determining which GPU to select to output a frame of pixel data to the display device 170, according to some embodiments. The control logic 120 includes a graphics intensity meter 225 and a GPU selector 235. The control logic 120 receives frame data 205 based on an application 115 executing on the CPU 110 (not shown) and power information 220 from a power monitor 125. The power monitor 125 includes a battery usage meter 210.

[0020] Battery usage meter 210 monitors whether processing system 100 is operating in battery mode and the amount of battery power remaining. Power monitor 125 compares the amount of battery power remaining with a battery power threshold 215. Power monitor 125 provides power information 220 to control logic 120 indicating whether the amount of battery power remaining is below battery power threshold 215. In some embodiments, battery usage meter 210 monitors the rate of battery power consumption, power monitor 125 compares the rate of battery power consumption with a battery power consumption rate threshold, and power information 220 includes an indication of whether the rate of battery power consumption is above the battery power consumption rate threshold. Battery usage meter 210 is implemented as hard-coded or programmable logic, one or more processors executing software / firmware instructions, or any combination thereof.

[0021] The graphics intensity meter 225 calculates the level of graphics intensity for each frame based on the pixel data 205 and compares it to the graphics intensity threshold 230. If the graphics intensity of the frame exceeds the graphics intensity threshold 230, the GPU selector 235 selects the high-performance GPU 235 to render the frame. In some embodiments, if the power information 220 indicates that the remaining battery power is below the battery power threshold 215, the GPU selector 235 overrides the selection of the high-performance GPU 135 (not shown) to render frames whose graphics intensity exceeds the graphics intensity threshold 230 in order to extend battery life. If the graphics intensity of the frame is below the graphics intensity threshold 230, the GPU selector 235 selects the low-power GPU 130 (not shown) in order to conserve battery life. The graphics intensity meter 225 may be implemented as hard-coded or programmable logic, one or more processors executing software / firmware instructions, or any combination thereof.

[0022] 3 illustrates a message flow 300 between control logic 120, an active GPU 330 (i.e., either low-power GPU 130 or high-performance GPU 135 is currently active), and display device 170 for using a panel playback protocol (PRP) to play back captured frames while GPUs 130, 135 are switched at MUX 140, according to some embodiments. At time T1, display device 170 provides an indication 302 to control logic 120 that display device 170 supports PRP. After T1, control logic 120 determines that a GPU switch will occur at MUX 140 for the frame and provides an indication (not shown) to active GPU 330 that a GPU switch will occur at MUX 140, either from low-power GPU 130 to high-performance GPU 135 or from high-performance GPU 135 to low-power GPU 130. In response to receiving the indication, active GPU 330 sends Capture Frame signal 304 with the current frame to display device 170 at time T2.

[0023] At time T3, in response to receiving signal 304 to capture the current frame, display device 170 performs operation 306 of capturing the current frame in a frame buffer. After display device 170 captures the current frame in its frame buffer, at time T4, active GPU 330 sends Replay Frame signal 308 to display device 170, signaling display device 170 to maintain a still image of the captured current frame. At time T5, in response to receiving Replay Frame signal 308, display device 170 performs operation 310 of replaying the current frame on each refresh cycle of display device 170 to maintain a still image while control logic 120 performs operation 312 of switching GPUs 130, 135 in MUX 140. The operation 312 of switching the GPUs 130, 135 in the MUX 140 includes disabling output from the initially active GPU 130, 135 (i.e., the GPU 130, 135 that rendered the captured frame), switching the GPUs 130, 135 in the MUX 140, powering up the initially inactive GPU 130, 135 (i.e., the GPU 130, 135 that did not render the captured frame), and enabling the initially inactive (now newly active) GPU 130, 135 to output to the display device 170. Once the newly active GPU 130, 135 is enabled to output, at time T6, the active GPU 330 sends a Live Frame signal 314 and the new frame to the display device 170 to signal the display device 170 to power on and ready to accept input from the rendering device 105 via the interconnect 160.In response to receiving the Live Frame signal 314, the display device 170 powers on ready to accept input from the rendering device 105 via the interconnect 160 and resynchronizes with the output of the newly active GPU 130, 135.

[0024] 4 is a block diagram of a portion 400 of the processing system 100 of FIG. 1 , illustrating connections on the interconnect 160 between the rendering device 105 and the display device 170 for signaling the display device 170 to enter and exit panel self-refresh mode while the GPUs 130, 135 are being switched in the multiplexer 140, according to some embodiments. The interconnect 160 includes sets of pins 402, 404, 406, 408. The set of pins 402 is the main link through which active video signals are transmitted from the rendering device 105 to the display device 170. In some embodiments, the Capture Frame signal 304 for capturing the current frame before the GPU switching in the MUX 140 is an information packet or metadata transmitted during the vertical blanking region of the current frame. In some embodiments, the active GPU 330 uses the Advanced Link Power Management (ALPM) feature of eDP to put the set of pins 402 to sleep or power down while the GPUs 130, 135 are being switched with the MUX 140. Once the GPU switching is complete, the newly active GPU 130, 135 reads the panel state to determine that the display device 170 is in an ALPM sleep state. The newly active GPU 130, 135 wakes up the set of pins 402 and begins transmitting frames to the display device 170.

[0025] Pin set 404 is an auxiliary (AUX) channel that rendering device 105 uses to send a Live Frame signal 314 to display device 170 using the ALPM feature of eDP to wake up display device 170 and display the new frame sent by the newly active GPU 130, 135 after GPU switching at MUX 140 is complete. In some embodiments, Live Frame signal 314 is an information packet or metadata sent during the vertical blanking region of the new frame. In some embodiments, pin sets 402 and 404 are not used by rendering device 105 while GPU switching at MUX 140 is occurring.

[0026] Set of pins 406 is used by panel VDD 150 of rendering device 105 to power the panel logic of display device 170. Similarly, set of pins 408 is the channel through which backlight power supply 155 supplies power to the backlight of display device 170. Sets of pins 406 and 408 remain active while GPUs are switched at MUX 140, so that display device 170 remains powered on and the panel backlight of display device 170 remains illuminated during GPU switching at MUX 140.

[0027] 5 is a flowchart illustrating a method 500 for using a panel refresh protocol to signal a display device to self-refresh using captured frames while a GPU outputting frames of pixel data to the display device is switched in a multiplexer, according to some embodiments. In some embodiments, method 500 is performed by a processing system, such as processing system 100 of FIG. 1.

[0028] At block 502, control logic 120 receives an indication 302 from display device 170 that display device 170 supports the panel refresh protocol. At block 504, control logic 120 receives pixel data 205 for a current frame from CPU 110 based on a currently executing application 115. At block 506, control logic 120 determines a graphics intensity level for the frame. At block 508, control logic 120 receives power information 220 from power monitor 125. At block 510, control logic 120 determines, based on the graphics intensity level and power information 220, whether to switch GPUs 130, 135 in MUX 140 due to graphics requirements and / or power constraints. For example, if low-power GPU 130 is the active GPU, rendering a frame, and outputting the rendered frame through MUX 140, and control logic 120 determines that the graphics intensity level of the next frame will exceed a threshold and there is sufficient battery power, control logic 120 determines at MUX 140 to switch to high-performance GPU 135. However, if the remaining battery power is below a threshold, in some embodiments, control logic 120 determines not to switch to high-performance GPU 135 and to maintain low-power GPU 130 as the active GPU. Conversely, if high-performance GPU 135 is the active GPU and control logic 120 determines that the graphics intensity level of the next frame will not exceed a threshold or there is insufficient battery power to maintain high-performance GPU 135 as the active GPU, control logic 120 determines at MUX 140 to switch to low-power GPU 130.

[0029] If control logic 120 determines in block 510 not to switch GPUs 130, 135 in MUX 140, then method flow returns to block 504, where the next frame of pixel data is received. If control logic 120 determines in block 510 to switch GPUs 130, 135 in MUX 140, then method flow proceeds to block 512. In block 512, active GPU 130, 135 sends a Capture Frame signal to capture the current frame and a Replay Frame signal to display device 170 to play the captured frame. In response to receiving the Capture Frame signal, display device 170 captures the current frame in a frame buffer and refreshes the panel using the current frame. While display device 170 is playing the current frame, control logic 120 switches GPUs 130, 135 in MUX 140 in block 514. Once the switching in MUX 140 is complete, control logic 120 turns on the newly active GPU 130, 135. Once the newly active GPU 130, 135 is enabled to output the rendered frame, the newly active GPU 130, 135 sends a Live Frame signal to the display device 170 in block 516 to display the new frame sent by the newly active GPU 130, 135. Upon receiving the Live Frame signal, the display device 170 resynchronizes to the output of the newly active GPU 130, 135.

[0030] As disclosed herein, in some embodiments, a method includes, in a rendering device of a processor, signaling a display panel to capture and play back a first frame of pixel data output from a first graphics processing unit (GPU); in response to the display panel capturing and playing back the first frame, switching from outputting pixel data from the first GPU to the display panel to output pixel data from a second GPU to the display panel; and in response to completing the switch, signaling the display panel to display a second frame transmitted by the second GPU. In one aspect, the method includes disabling outputting pixel data from the first GPU in response to the display panel playing back the first frame. In another aspect, signaling the display panel to capture and play back the first frame includes signaling the display panel to capture the first frame in metadata of the first frame and signaling the display panel to maintain a still image of the captured first frame.

[0031] In one aspect, the method includes powering down a link between the rendering device and the display panel while switching from outputting pixel data from a first GPU to outputting pixel data from a second GPU to the display panel. In another aspect, the method includes, in control logic of a processor, selecting the first GPU or the second GPU to output pixel data of the frame based on at least one of a graphics intensity of the frame and a battery power budget of the processor, wherein the switching is further performed in response to selecting the second GPU to output pixel data of the frame. In yet another aspect, the method includes outputting pixel data of the frame from the first GPU in response to determining that the graphics intensity of the frame is higher than a threshold, the first GPU being a higher performance GPU than the second GPU. In yet another aspect, the method includes outputting pixel data of the frame from the second GPU in response to the graphics intensity of the frame being lower than a threshold. In yet another aspect, the transmission of the second frame is synchronized between the second GPU and internal timing of the display panel.

[0032] In some embodiments, a method includes outputting pixel data from a first graphics processing unit (GPU) of a processor to a display panel, signaling the display panel to play a current frame of the pixel data output from the first GPU, disabling output of pixel data from the first GPU in response to the display panel having played the current frame, switching to output of pixel data from a second GPU to the display panel, and signaling the display panel to display the frame output from the second GPU in response to the second GPU having output the pixel data. In one aspect, the method includes determining that the display panel is capable of maintaining a still image while output of pixel data from the first GPU is disabled. In another aspect, signaling the display panel to play the current frame includes signaling the display panel to capture the current frame of pixel data output from the first GPU in a frame buffer and signaling the display panel to maintain a still image of the captured current frame.

[0033] In one aspect, the method includes powering down a link between the processor and the display panel while switching from outputting pixel data from a first GPU to outputting pixel data from a second GPU to the display panel. In another aspect, the method includes selecting, in control logic of the processor, the first GPU or the second GPU for outputting pixel data of the frame based on at least one of a graphics intensity of the frame and battery power of the processor. In yet another aspect, determining includes outputting pixel data of the frame from the first GPU in response to a graphics intensity of the frame being higher than a threshold, wherein the first GPU is a higher performance GPU than the second GPU.

[0034] In one aspect, the method includes outputting pixel data for the frame from the second GPU in response to graphics intensity of the frame being below a threshold. In another aspect, the second GPU that outputs the pixel data is synchronized to the output of the display panel.

[0035] In some embodiments, a device includes a first graphics processing unit (GPU), a second GPU, and control logic configured to switch between outputting pixel data from the first GPU to a display panel and outputting pixel data from the second GPU to the display panel, wherein the first GPU is configured to signal the display panel to play a current frame of pixel data output from the first GPU in response to detecting that the device has switched from outputting pixel data from the first GPU to the display panel to outputting pixel data from the second GPU to the display panel, and the second GPU is configured to signal the display panel to display the frame of pixel data output from the second GPU in response to the second GPU having output the pixel data. In one aspect, the first GPU is further configured to disable output of the pixel data in response to the display panel having captured and played back the current frame. In another aspect, in response to receiving an indication that the control logic is switching from outputting pixel data from the first GPU to the display panel to outputting pixel data from the second GPU to the display panel, the first GPU is further configured to signal the display panel to capture a current frame output from the first GPU in a frame buffer and signal the display panel to play the current frame.

[0036] In one aspect, in response to the second GPU outputting the pixel data, the second GPU is further configured to signal the display panel to power on to a ready state for accepting input from the device via the interconnect and output the pixel data to the display panel. In another aspect, the control logic is configured to select the first GPU or the second GPU for outputting the pixel data of the frame based on at least one of a graphics intensity of the frame and a battery power of the device. In yet another aspect, the control logic is further configured to select the first GPU for outputting the pixel data of the frame in response to the graphics intensity of the frame being higher than a threshold, the first GPU being a GPU with higher performance than the second GPU.

[0037] In some embodiments, the above-described apparatus and techniques are implemented in a system that includes one or more integrated circuit (IC) devices (also called integrated circuit packages or microchips), such as the processing system 100 described with reference to FIGS. 1-5 . Electronic design automation (EDA) and computer-aided design (CAD) software tools can be used in the design and manufacture of these IC devices. These design tools are typically represented as one or more software programs. The one or more software programs include code executable by a computer system for operating the computer system to operate on code representing the circuits of one or more IC devices to perform at least a portion of a process for designing or adapting a manufacturing system for producing the circuits. This code may include instructions, data, or a combination of instructions and data. The software instructions representing the design or manufacturing tools are typically stored on a computer-readable storage medium accessible to the computing system. Similarly, code representing one or more stages of the design or manufacture of the IC devices is stored on and accessed from the same or a different computer-readable storage medium.

[0038] A computer-readable storage medium includes any non-transitory storage medium or combination of non-transitory storage media that can be accessed by a computer system during use to provide instructions and / or data to the computer system. Such storage media may include, but are not limited to, optical media (e.g., compact discs (CDs), digital versatile discs (DVDs), Blu-ray discs), magnetic media (e.g., floppy disks, magnetic tape, magnetic hard drives), volatile memory (e.g., random access memory (RAM) or cache), non-volatile memory (e.g., read-only memory (ROM) or flash memory), or micro-electromechanical systems (MEMS)-based storage media. The computer-readable storage medium (e.g., system RAM or ROM) may be internal to the computing system, the computer-readable storage medium (e.g., a magnetic hard drive) may be permanently attached to the computing system, the computer-readable storage medium (e.g., an optical disk or Universal Serial Bus (USB)-based flash memory) may be removably attached to the computing system, or the computer-readable storage medium (e.g., network-accessible storage (NAS)) may be coupled to the computer system via a wired or wireless network.

[0039] In some embodiments, certain aspects of the techniques described above are implemented by one or more processors of a processing system executing software. The software includes one or more sets of executable instructions stored or otherwise tangibly embodied in a non-transitory computer-readable storage medium. The software may include instructions and specific data that, when executed by one or more processors, operate the one or more processors to perform one or more aspects of the techniques described above. The non-transitory computer-readable storage medium may include, for example, a magnetic or optical disk storage device, a solid-state storage device such as flash memory, a cache, a random access memory (RAM), or other non-volatile memory device(s). The executable instructions stored on the non-transitory computer-readable storage medium may be implemented as source code, assembly language code, object code, or other form of instructions that can be interpreted or otherwise executed by one or more processors.

[0040] In addition to the above, it should be noted that not all activities or elements described in the summary description are required, that some of the particular activities or devices may not be required, that one or more additional activities may be performed, and that one or more additional elements may be included. Furthermore, the order in which the activities are listed is not necessarily the order in which they are performed. Also, the concepts have been described with reference to specific embodiments. However, those skilled in the art will recognize that various modifications and variations can be made without departing from the scope of the invention as set forth in the claims. Accordingly, the specification and drawings should be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention.

[0041] Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and features from which any benefit, advantage, or solution may arise or be manifested are not construed as critical, essential, or essential features of any or all claims. Moreover, the specific embodiments described above are illustrative only, since the disclosed invention may be modified and practiced in different, but similar manners apparent to those skilled in the art having the benefit of the teachings herein. No limitations are intended to the details of construction or design herein shown, other than as described in the appended claims. It is therefore apparent that the specific embodiments described above may be altered or modified, and that all such variations are considered within the scope of the disclosed invention. Accordingly, the protection sought herein is set forth in the appended claims.

Claims

1. 1. A method comprising: providing one or more signals from a first graphics processing unit (GPU) of a rendering device to a display panel that instructs the display panel to capture and reproduce a first frame of pixel data output from the first GPU; in response to a signal from the first GPU, switching from outputting pixel data from the first GPU to the display panel to outputting pixel data from a second GPU to the display panel in response to the display panel capturing and playing back the first frame; powering down a link between the rendering device and the display panel during the switching; and providing, by the second GPU, in response to completing the switching, one or more signals to the display panel instructing the display panel to display a second frame transmitted by the second GPU. method.

2. and disabling output of pixel data from the first GPU in response to the display panel reproducing the first frame.

10. The method of claim 1.

3. providing one or more signals to the display panel instructing the display panel to capture and play the first frame; the first GPU providing the first frame to the display panel, the first frame including metadata that instructs the display panel to capture the first frame; the first GPU providing a signal to the display panel instructing the display panel to maintain a still image of the captured first frame; The method of claim 1 or 2.

4. The control logic further includes selecting the first GPU or the second GPU for outputting pixel data of the frame based on at least one of a graphics intensity of the frame and a battery power amount of the rendering device; the switching is in response to selecting the second GPU to output pixel data for the frame. The method of any one of claims 1 to 3.

5. outputting pixel data of the frame from the first GPU in response to determining that the graphics intensity of the frame is higher than a threshold; the first GPU is a GPU with higher performance than the second GPU; The method of claim 4.

6. and outputting pixel data of the frame from the second GPU in response to the graphics intensity of the frame being lower than the threshold. The method of claim 5.

7. the transmission of the second frame is synchronized between the second GPU and the internal timing of the display panel. The method of any one of claims 1 to 6.

8. A rendering device, comprising: a first graphics processing unit (GPU) configured to provide one or more signals to a display panel that instruct the display panel to capture and reproduce a first frame of pixel data output from the first GPU; a second GPU; and control logic configured to switch from outputting pixel data from the first GPU to the display panel to outputting pixel data from the second GPU to the display panel in response to the display panel capturing and playing back the first frame, wherein during the switching, a link between the rendering device and the display panel is powered down; the second GPU is configured to, in response to completing the switching, provide one or more signals to the display panel that instruct the display panel to display a second frame of pixel data output from the second GPU. Rendering device.

9. The first GPU comprises: and further configured to disable output of pixel data in response to the display panel capturing and playing back the first frame. The rendering device of claim 8.

10. the first GPU, in response to receiving an indication that the control logic disables output of pixel data from the first GPU, providing the first frame to the display panel, the first frame including metadata that instructs the display panel to capture the first frame; providing a signal to the display panel instructing the display panel to reproduce the first frame; and further configured to: Rendering device according to claim 8 or 9.

11. the control logic is configured to select the first GPU or the second GPU for outputting pixel data of the frame based on at least one of a graphics intensity of the frame and a battery power of the rendering device. A rendering device according to any one of claims 8 to 10.

12. the control logic is further configured to select the first GPU for outputting pixel data of the frame in response to the graphics intensity of the frame being greater than a threshold; the first GPU is a GPU with higher performance than the second GPU; The rendering device of claim 11.

13. the control logic is configured to synchronize transmission of a second frame between the second GPU and internal timing of the display panel. A rendering device according to any one of claims 8 to 12.

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