Nonlinear compensation circuit and optical transceiver
The nonlinear compensation circuit efficiently addresses the challenge of high computational demands in optical transmission by reducing decision thresholds and amplitude levels, enhancing SNR and output power in optical transceivers.
Patent Information
- Application Number
- JP2022056189
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-30
- Publication Date
- 2026-01-06
- Estimated Expiration
- 2042-03-30
AI Technical Summary
Existing algorithms for compensating nonlinear distortion in optical transmission require significant computational resources, and lookup table (LUT)-based methods face challenges with increased circuit size as the input signal level increases.
A nonlinear compensation circuit that detects combinations of input signal levels, uses a memory to store correction values, and applies these values to correct nonlinear distortion without a large increase in calculation, employing a reduced number of decision thresholds and amplitude levels to manage circuit size.
The solution effectively compensates for nonlinear distortion with minimal computational overhead, improving signal-to-noise ratio (SNR) and enabling higher output power in optical transceivers, regardless of the multilevel signal level.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a nonlinear compensation circuit and an optical transceiver. [Background technology]
[0002] With the advancement of modulation and demodulation technologies, optical transmission and reception using high-level multilevel signals is becoming mainstream. Optical data communication transmission and reception requires low waveform distortion and a high signal-to-noise ratio (SNR). Waveform distortion due to the nonlinearity of the transmitting analog device limits the transmission performance of high-level multilevel signals. As shown in Figure 1, the nonlinearity of the transmitting analog device includes the effects of electrical nonlinear distortion in the digital-to-analog converter (DAC) and driver amplifier (AMP) connected to the output of the transmitting digital signal processor (TxDSP), as well as the effects of the nonlinear electro-optic (EO) characteristics of the Mach-Zehnder (MZ) modulator. The MZ modulator modulates the light incident from a light source (tunable laser diode: TLD) with the signal input from the driver amplifier (AMP). The nonlinearity described above distorts the waveform of the modulated optical signal and degrades the SNR.
[0003] In addition, as the multilevel level of a signal increases, the peak-to-average power ratio (PAPR) increases. Increasing the output signal power of a multilevel signal with high PAPR further degrades the SNR due to the nonlinearity of the transmitter device, limiting the increase in the power of the output light. Algorithms proposed to compensate for nonlinear distortion include Volterra filters (see, for example, Non-Patent Document 1), polynomial approximation methods (see, for example, Non-Patent Document 2), and lookup table (LUT) correction (see, for example, Non-Patent Document 3). [Prior art documents] [Non-patent literature]
[0004] [Non-Patent Document 1] Jin Zhe, Song Zhihuan and He Jiaming, "Volterra series based predistortion for broadband RF power," Journal of Systems Engineering and Electronics, 19(4), 666-671 (2008) [Non-patent document 2] Zhenning Tao, Tong Ye, Xiaofei Su, Yangyang Fan, Yanhui Qi, Hisao Nakashima and Takeshi Hoshida, "Nonlinear Characteristic of Wideband Coherent Receiver and the Application of Wiener-Hammerstein Model," Asia Communications and Photonics Conference, S4B.4 (2019) [Non-patent document 3] Jian Hong Ke, Ying Gao, and John C. Cartledge, "400 Gbit / s single-carrier and 1 Tbit / s three-carrier superchannel signals using dual polarization 16-QAM with look-up table correction and optical pulse shaping," Optics Express 22(1), 71-84 (2014) Summary of the Invention [Problem to be solved by the invention]
[0005] Algorithms for compensating for nonlinear distortion require a large amount of calculation. A circuit and implementation method that efficiently compensates for nonlinear distortion with a small amount of calculation is desired. While LUT-based compensation, which can be implemented with a relatively small amount of calculation, is promising, the LUT method has the problem that the circuit size increases when the input signal level (multiple levels) increases. In the embodiments, a nonlinear compensation circuit that suppresses an increase in the amount of calculation regardless of the multilevel level of the signal, and an optical transceiver using the same are provided. [Means for solving the problem]
[0006] In an embodiment, the nonlinear compensation circuit comprises: a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; It has. [Effects of the Invention]
[0007] A nonlinear compensation circuit that suppresses an increase in the amount of calculation regardless of the multilevel level of a signal, and an optical transceiver using the same are realized. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a diagram illustrating the occurrence of nonlinear distortion on the transmitting side. [Figure 2] FIG. 10 is a diagram illustrating the relationship between output signal power and SNR. [Figure 3] 1 is a schematic diagram of an optical transceiver to which a nonlinear compensation circuit according to an embodiment is applied; [Figure 4] FIG. 2 is a schematic diagram of a nonlinear compensation circuit. [Figure 5] FIG. 10 is a diagram illustrating a first example of setting an input signal and a threshold value. [Figure 6] FIG. 10 is a diagram illustrating an example of the configuration of an LUT. [Figure 7] FIG. 10 is a diagram illustrating another example of the configuration of the LUT. [Figure 8] FIG. 10 is a diagram illustrating a second example of setting an input signal and a threshold value. [Figure 9] FIG. 10 is a diagram illustrating a third example of setting an input signal and a threshold value. [Figure 10] FIG. 10 is a diagram illustrating generation of correction values to be written in an LUT. [Figure 11] FIG. 2 is a schematic diagram of an LUT correction value generation circuit. [Figure 12] 10A and 10B are diagrams illustrating the effect of nonlinear compensation according to an embodiment. [Figure 13] 10A and 10B are diagrams illustrating the effect of nonlinear compensation according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0009] The nonlinear compensation technology of the embodiment will be described below with reference to the drawings. According to the study by the inventors, when a signal with a large amplitude is input to an analog device such as a DAC or a driver amplifier in an optical transmission front-end (electrical / optical conversion) circuit, the SNR deteriorates due to the nonlinearity of the analog device. Specifically, as shown in Fig. 2, when the output signal amplitude of the DAC or the driver amplifier is increased and the amplitude of the drive signal that drives the modulator is increased to increase the output optical power of the optical transmitter, the SNR decreases due to the influence of the nonlinearity once the output optical power exceeds a certain level, and transmission quality deteriorates.
[0010] Implementing nonlinear compensation processing using a complex algorithm to compensate for waveform distortion caused by such nonlinearity increases the amount of calculation, making it difficult to efficiently compensate for nonlinear distortion. In the embodiments, nonlinear distortion is compensated for without requiring a complex algorithm or a large amount of calculation. The nonlinear compensation technology of the embodiments is generally applicable to digital coherent optical transceivers, digital signal processing, and equalization processing in optical communications. In the following description, the same components are designated by the same reference numerals, and duplicated explanations may be omitted.
[0011] 3 is a schematic diagram of an optical transceiver 100 to which a nonlinear compensation circuit (referred to as "NLC" in the drawing) 10 according to an embodiment is applied. The optical transceiver 100 includes a transmitting DSP 20Tx, a receiving DSP 20Rx, a transmitting front-end circuit 30, and a receiving front-end circuit 40. The transmitting front-end circuit 30 and the receiving front-end circuit 40 are connected to a transmission line 5, and transmit and receive optical signals to and from the transmission line 5.
[0012] The transmission front-end circuit 30 includes a DAC 31, a driver (DRV) 32, a Mach-Zehnder optical modulator (MZM) 33, and a light source (LD) 34. Nonlinear distortion may occur in analog devices such as the DAC 31 and the driver 32, and in the optical modulator 33. Such nonlinear distortion may be compensated for in advance by the nonlinear compensation circuit 10 using a method described below.
[0013] The transmitting-side DSP 20Tx has a symbol generator 21 that generates data symbols according to a modulation / demodulation method, and a Nyquist filter 22 that smooths the waveform of the generated data symbols. The nonlinear compensation circuit 10 may be provided between the symbol generator 21 and the Nyquist filter 22, or may be provided after the Nyquist filter 22.
[0014] When the nonlinear compensation circuit 10 is connected to the output of the symbol generator 21, the input waveform to the nonlinear compensation circuit 10 is symbol information, limiting the available signal amplitude and enabling nonlinear compensation at 1 sps (samples per symbol). This configuration allows for a small circuit size. When the nonlinear compensation circuit 10 is provided after the Nyquist filter 22, nonlinear compensation can be performed using a waveform similar to that input to devices that generate nonlinear distortion, such as the DAC 31 in the transmit front-end circuit 30. This allows for highly accurate nonlinear compensation, which is expected to improve the performance of optical transmission. By performing nonlinear compensation before the data signal is input to the transmit front-end circuit 30, nonlinear distortion that may occur in the analog devices and optical modulator 33 in the transmit front-end circuit 30 can be pre-equalized.
[0015] The receiver front-end circuit 40 includes an integrated coherent receiver (ICR) 41, an analog-to-digital converter (ADC) 43, and a light source (LD) 44. These components in the receiver front-end circuit 40 are analog devices that handle analog signals. Some optical signals received from the transmission line 5 may not be fully pre-equalized on the transmitting side, resulting in residual nonlinearity. The received signal is converted into an electrical signal by the receiver front-end circuit 40 and digitized, and then input to the receiver DSP 20Rx. The dispersion compensation filter 24 compensates for dispersion in the transmission line 5, and the adaptive equalization filter 25 adaptively equalizes and shapes the waveform. The carrier frequency and phase synchronization circuit 26 restores the original transmitted signal.
[0016] The nonlinear compensation circuit 10 may be connected to the output of the carrier frequency / phase synchronization circuit 26. In this case, the nonlinear distortion remaining in the random received signal, which includes noise generated in the transmission path, is compensated for by the nonlinear compensation circuit 10. As will be described later, the nonlinear compensation circuit 10 arranged in the receiver can successively update the correction value for nonlinear compensation based on the received waveform, making it resistant to fluctuations.
[0017] 3, the nonlinear compensation circuit 10 is provided inside the transmitting DSP 20Tx or the receiving DSP 20Rx, but it may also be provided outside the DSP as a separate arithmetic unit or logic circuit. The nonlinear compensation circuit 10 can be realized by an arithmetic processing circuit such as an LSI circuit or a microprocessor, or a logic circuit such as an ASIC (Application Specific Integrated Circuit) or a Field Programmable Gate Array (FPGA).
[0018] FIG. 4 is a schematic diagram of a nonlinear compensation circuit 10 according to an embodiment. The nonlinear compensation circuit 10 performs nonlinear compensation using an LUT method, but does not necessarily have to have an LUT, and any configuration may be used as long as it can identify an appropriate correction value using memory and calculation functions. As described above, the nonlinear compensation circuit 10 can be provided on both the transmitting side and the receiving side of the optical transceiver 100. The nonlinear compensation circuit 10 has a detection unit 11, an LUT 12, and an adder 13. The LUT 12 is an example of correction value information stored in the memory 120. The adder 13 is an example of a compensator that corrects an input signal using correction value information. N signals x i-N / 2+1 , …, x i , …, x i+N / 2 are input sequentially. The N signals may be data symbols generated according to a modulation method, or digital data after Nyquist waveform processing. Alternatively, they may be signals obtained by sampling the restored received signal waveform. In FIG. 4, assuming one sample per symbol, each signal input to the nonlinear compensation circuit 10 is called a "symbol."
[0019] When a signal is input to the nonlinear compensation circuit 10, the detection unit 11 refers to the decision threshold information and determines the input level for each of a plurality of consecutive symbols (for example, three symbols) to detect a combination of input levels. A specific method for determining the input level will be described later. For convenience, the combination of input levels identified for a plurality of consecutive symbols is referred to as an "address." The decision threshold may be stored in a memory 120 built into a microprocessor or FPGA that implements the nonlinear compensation circuit 10. Alternatively, it may be written in the detection unit 11.
[0020] For example, if an address consists of three consecutive symbols, the ith symbol x i and the symbol x before and after it. i-1 , and x i+1The input level of the symbol is determined. The reason for determining the input levels of the preceding and following symbols is that the input level of a certain symbol is likely to be affected by the data before and after it. A set of input levels of multiple consecutive symbols represents the change in amplitude of the input symbol. The number of symbols that make up an address is not limited to three, and the input levels of five symbols may be used.
[0021] The address corresponding to the address (i.e., the combination of input levels) detected by the detection unit 11 is searched in the LUT 12, and the correction value Δy i is obtained from LUT12. This correction value Δy i is the i-th symbol x i The adder 13 calculates the i-th symbol x i Correction value Δy i are added to compensate for nonlinearity and are output.
[0022] <Decision threshold setting for nonlinear compensation> FIG. 5 shows a first example of an input signal to the nonlinear compensation circuit 10 and threshold settings for input level determination. The input level of, for example, 64QAM (Quadrature Amplitude Modulation) symbol data generated by the symbol generator 21 is determined. In the case of 64QAM, there are eight amplitude levels in the I-axis direction and eight amplitude levels in the Q-axis direction on the constellation (IQ complex plane). Focusing on the Q-axis, seven decision thresholds are set between adjacent symbols in the Q-axis direction, as shown in FIG. 5(c). Setting decision thresholds between all amplitude levels allows for more precise determination. However, as the number of bits increases to 128QAM and 256QAM, the size of the LUT 12 increases, making it difficult to reduce the amount of calculations.
[0023] Therefore, when the multi-level level is high, the number of decision thresholds is limited and several amplitude levels are judged together, as shown in (a) and (b) of Figures 5. This makes it possible to judge the level of the input signal using fewer amplitude levels than the number of amplitude levels determined by the modulation / demodulation method. In (a) of Figure 5, eight amplitude levels on the Q axis are equally grouped in pairs to set three decision thresholds. The level of the input signal is judged to be one of four amplitude levels. The detection unit 11 judges the level of the input signal to be level 1 when the level of the input symbol exceeds decision threshold 1, and judges it to be level 2 when it exceeds decision threshold 2 but is equal to or less than decision threshold 1. Similarly, it judges it to be level 3 when it exceeds decision threshold 3 but is equal to or less than decision threshold 2, and judges it to be level 4 when it is equal to or less than decision threshold 3.
[0024] This determination method reduces the number of possible combinations of amplitude levels for multiple consecutive symbols, allowing for a smaller LUT 12. The threshold determination in the nonlinear compensation circuit 10 is not a strict amplitude determination for signal demodulation, but a level discrimination for selecting an appropriate correction value for nonlinear compensation. Therefore, the nonlinear compensation operation is not hindered even if detailed determination criteria such as those in Figure 5(c) are not necessarily set.
[0025] In Figure 5(b), of the eight amplitude levels along the Q axis, the input level is judged in detail near the peaks and bottoms where the signal is likely to be affected by nonlinear distortion, and multiple amplitude levels are judged together near the center of the amplitude where linearity is relatively high. Five judgment thresholds are set so that the judgment is dense at the ends of the Q axis and coarse in the center, and it is determined which of the six amplitude levels the input level falls into.
[0026] By reducing the number of thresholds used to determine the input level or the number of divided amplitude levels, an increase in the number of addresses can be suppressed, thereby keeping the circuit size of the LUT 12 small. While Figure 5 illustrates an example focusing on the Q axis, a similar determination is made for the amplitude level in the I axis direction.
[0027] Fig. 6 shows an example of the configuration of the LUT 12. This LUT 12 is based on the threshold setting in Fig. 5(c). When 64QAM modulation has eight amplitude levels, from level 1 to level 8, in the Q-axis direction, seven decision thresholds, Level_th1 to Level_th7, are provided between all the amplitude levels.
[0028] For example, the input level of each of three consecutive symbols (or samples) of a signal input to the nonlinear compensation circuit 10 is determined, and an address representing a combination of the input levels of the three symbols is detected. The LUT 12 calculates the address of each of three consecutive symbols x iー1 , x i , x i+1 describes all possible combinations (addresses) of input levels, and for each address, the input symbol x i Describe the correction value Δy given to
[0029] At address 1, all three symbols have amplitude level 1. A nonlinear compensation correction value Δy_1 is assigned to address 1, which represents this combination. At address 2, the input levels of three consecutive symbols are level 1, level 1, and level 2. A nonlinear compensation correction value Δy_2 is assigned to address 2, which represents this combination of input levels. At address 3, the input levels of three consecutive symbols are level 1, level 1, and level 3. A nonlinear compensation correction value Δy_3 is assigned to address 3, which represents this combination of input levels. Because eight amplitude levels and three consecutive input symbols are used, LUT12 describes a total of 8^3 (512) addresses and a correction value Δy for each address. If the number of symbols whose amplitude levels are determined is m and the number of amplitude levels used is L, LUT12 describes L^m addresses and a correction value Δy corresponding to each address.
[0030] The detector 11 detects a combination of input levels for a plurality of consecutive symbols, and when an address representing the combination is determined, the LUT 12 selects a correction value Δy for the corresponding address. i By this correction, nonlinear distortion that may occur in the transmission front-end circuit 30 is compensated for in advance.
[0031] In the case of 64QAM, even if all eight amplitude levels along the Q axis or I axis are determined, the size of the LUT 12 is small, and the amount of calculation is very small compared to known LUT-based nonlinear compensation algorithms. However, as the number of multi-values increases, such as in 128QAM and 256QAM, the size of the LUT 12 may also increase. In such cases, the threshold setting shown in (a) or (b) of Figure 5 is adopted.
[0032] FIG. 7 shows another example of the configuration of the LUT 12. The LUT 12 in FIG. 7 is based on the decision thresholds set by the equal grouping in FIG. 5(a). Of the eight amplitudes in the Q axis (or I axis) direction in 64QAM, the top two input levels that exceed a threshold Level_th1 are determined to be level 1. When the input level exceeds a threshold Level_th2 but is equal to or less than the threshold Level_th1, it is determined to be level 2. When the input level exceeds a threshold Level_th3 but is equal to or less than the threshold Level_th2, it is determined to be level 3, and when it is equal to or less than the threshold Level_th3, it is determined to be level 4.
[0033] In this case, because there are four amplitude levels, the number of addresses in LUT12 that describe the combinations of input levels for three symbols (or samples) is 4^3, or 64, further reducing the size and amount of calculations of LUT12. Because the number of amplitude levels is small, even when determining the input levels of five consecutive symbols, the total number of addresses is 4^5, or 256. When the unequal grouping of Figure 5(b) is adopted, six amplitude levels are used, and LUT12 has 6^3, or 216, addresses and correction values Δy corresponding to the addresses.
[0034] By appropriately setting the decision threshold or the amplitude level to be judged, it is possible to efficiently compensate for nonlinear distortion, regardless of the modulation multi-level, by suppressing the size and amount of calculation of the LUT 12. The same effect can be obtained when the nonlinear compensation circuit 10 is connected to the output of the Nyquist filter 22 or the sampled output of the electrical signal waveform restored by the receiving DSP.
[0035] Figure 8 shows a second example of setting the input signal and threshold. In the first setting example in Figure 5, an appropriate decision threshold is set depending on the modulation method to determine the input level. For example, eight amplitude levels are set for 64QAM, six unequal amplitude levels are set for 128QAM as shown in Figure 5(b), and equal amplitude levels are set for 256QAM as shown in Figure 5(a). In Figure 8, a common decision threshold is used among multiple modulation / demodulation methods.
[0036] The horizontal axis in Figure 8 represents the modulation scheme, and the vertical axis represents the output level of the symbol generator 21, i.e., the input level to the nonlinear compensation circuit 10. Seven thresholds, decision threshold 1 through decision threshold 7, are set in common across different modulation schemes, such as QPSK, 8QAM, 16QAM, 32QAM, 64QAM, 128QAM, 256QAM, and 2A8PSK, to provide eight amplitude levels. Here, the center amplitude between adjacent amplitude levels in the 64QAM symbol output is set as the default threshold. Regardless of the modulation / demodulation scheme used, the generated symbols are always determined to be one of the amplitude levels. With the exception of 128QAM and 256QAM, all symbol levels can be separated and identified using the default thresholds. With 128QAM and 256QAM, some symbols are grouped together to identify their input levels.
[0037] By setting a common decision threshold, the same effect as limiting the number of threshold levels for modulation / demodulation with a high degree of multi-value is achieved, and the scale of the LUT 12 can be kept small.
[0038] Figure 9 shows a third example of input signal and threshold setting. This threshold setting can be used, for example, when performing nonlinear compensation on a random input signal restored on the receiving side. Seven decision thresholds, 1 to 7, are set for the input waveform. Sampling is performed on the restored electrical waveform at predetermined timings. The sampled signal always belongs to one of the amplitude levels. An address representing the combination of the amplitude levels of multiple consecutive samples is detected, and a correction value Δy is obtained from the address written in LUT 12. Using the correction value Δy, the receiving side can compensate for nonlinear distortion remaining in the transmitted signal.
[0039] <Calculation of correction value Δy> 10 shows the generation of the correction value written in the LUT 12. The correction value Δy written in the LUT 12 is calculated based on the transmitted signal and the received signal. Here, a configuration in which the nonlinear compensation circuit 10 is connected to the output of the symbol generator 21 is taken as an example. Except for the LUT correction value generation circuit 50, the basic configuration of the optical transceiver 100 is the same as the configuration shown in FIG. 3, and therefore a duplicated description will be omitted.
[0040] First, the operation at the stage of creating the LUT 12 will be described. A symbol generator 21 in the transmitting DSP 20Tx generates a transmission signal using a known signal, and the known transmission signal is input to the LUT correction value generation circuit 50. Meanwhile, a known signal is received from the transmission path 5, restored by the carrier frequency / phase synchronization circuit 26 in the receiving DSP 20Rx, and input to the LUT correction value generation circuit 50. The LUT correction value generation circuit 50 calculates a correction value to be set in the LUT 12 based on the difference between the transmission signal and the received signal. The calculated correction value Δy may be set as the initial value of the correction term in the LUT 12.
[0041] During actual service, a known signal may be periodically inserted into the transmission data generated by the symbol generator 21, and the correction value may be calculated by the LUT correction value generation circuit 50, thereby updating the correction value of the LUT 12 in real time. The known signal may be, for example, a known training sequence.
[0042] When the nonlinear compensation circuit 10 is connected to the output of the Nyquist filter 22, the waveform after Nyquist filtering may be used as the expected value of the transmission signal, and the LUT correction value generation circuit 50 may generate a correction value by comparing it with a signal obtained by applying Nyquist filtering to the received signal. The LUT correction value generation circuit 50 may be realized by a microprocessor or FPGA for transmission / reception control separate from the DSP, or may be provided inside the reception DSP 20Rx or the transmission DSP 20Tx. Information required for generating a correction value for the LUT 12 (such as the timing of inserting a known signal on the reception side) may be acquired via a communication channel for the system or transmission / reception control.
[0043] 11 is a schematic diagram of the LUT correction value generation circuit 50. The LUT correction value generation circuit 50 includes a multiplier 51, an address determination circuit 52, a subtractor 53, an accumulator / counter 54, and an averaging unit 55. As described above, the correction value for nonlinear compensation of the LUT 12 is generated using the expected value of the transmitted signal (r) and the received signal (s).
[0044] A transmit signal r(1,...,N) and a receive signal are input to an LUT correction value generation circuit 50. Because attenuation in the transmission path 5 causes a level difference between the amplitude of the transmit signal and the amplitude of the receive signal, a multiplier 51 multiplies the receive signal by a coefficient to generate a receive signal s(1,...,N) for comparison. The multiplication coefficient may be a value obtained by dividing the average transmit amplitude by the average receive amplitude. The transmit signal r(1,...,N) and the receive signal s(1,...,N) after multiplication by the coefficient are input to a subtractor 53, which determines the difference Δ(n) between the transmit signal r(n) and the level-adjusted receive signal s(n).
[0045] The transmission signal r(1, ..., N) is input to a subtractor 53 and also to an address determination circuit 52 to obtain an address (p). The address (p) is an address written in the LUT 12. For example, when one address is made up of a set of input levels of three consecutive symbols, the address determination circuit 52 refers to a determination threshold to determine the input levels of each of the three consecutive transmission signals r(n-1), r(n), and r(n+1), and determines an address p(n) that indicates this combination of input levels.
[0046] The current difference Δ(n) obtained by subtractor 53 and the address p(n) determined by address determination circuit 52 are input to accumulator / counter 54. The difference Δ(n) is added to the accumulation field corresponding to address p(n) and accumulated, and the counter for address p(n) is incremented. The reason for accumulating the difference Δ(n) is that when determining the correction value Δy for a certain address p(n), taking the average of multiple difference values allows the value to be compensated for to be determined more objectively.
[0047] "_LUT(p(n))" in the accumulator / counter 54 indicates an accumulated value for address p(n) of the LUT 12, and a new accumulated value is obtained by adding Δ(n) to the previous accumulated value. "_Count(p(n))" indicates a counter value for address p(n), and the counter value is incremented by 1 each time the combination of input levels specified by address p(n) appears.
[0048] When the counter value reaches the end value, the averaging unit 55 calculates the average value of the differences at address p(n). The averaging unit 55 divides the cumulative value _LUT(p) of the differences Δ by the end value _count(p) of the counter to determine the average value of the differences Δ. The average value of the differences is written to the LUT 12 of the nonlinear compensation circuit 10 as the correction value for address p(n).
[0049] By accumulating and averaging the differences between the transmitted and received signals for each address of the input signal (combination of input levels), it is possible to set an appropriate correction value for compensating for nonlinearity. The calculation of the correction value may be performed not only when creating the LUT 12, but also periodically or as needed during actual service, and the correction value Δy may be updated in real time.
[0050] FIG. 12 shows the effect of nonlinear compensation according to the embodiment. The horizontal axis is OSNR (dB) and the vertical axis is Q factor (dB). The line fitted to the black circle data points shows the transmission quality when nonlinear compensation according to the embodiment is applied. The line fitted to the triangular data points shows the transmission quality when only linear compensation is performed. Both show the transmission quality in the 64QAM modulation format. Nonlinear compensation is performed immediately after the symbol generator 21. It can be seen from FIG. 12 that applying nonlinear compensation improves transmission quality.
[0051] FIG. 13 is another graph showing the effect of nonlinear compensation according to the embodiment. The horizontal axis represents the input amplitude to the nonlinear device, and the vertical axis represents the SNR (dB). The nonlinear device is the driver amplifier of the transmit front-end circuit 30. The line formed by fitting the black circle data points represents the SNR when nonlinear compensation according to the embodiment is applied. The line formed by fitting the triangular data points represents the SNR when nonlinear compensation is not performed.
[0052] Without the nonlinear compensation of the embodiment, the degradation of the SNR becomes significant when the input amplitude to a nonlinear device such as a driver amplifier increases. This is as described with reference to FIG. 2. By performing the nonlinear compensation of the embodiment, the degradation of the SNR caused by the input amplitude to a nonlinear device such as a driver amplifier is mitigated. Since the degradation of the SNR is suppressed, the amplitude of the input signal to the analog device in the transmission front end can be increased, and the optical output power can be increased.
[0053] Although the nonlinear compensation of the embodiment has been described above based on a specific configuration example, the present invention is not limited to the above configuration example. For example, the decision thresholds, coefficients, parameters, etc. used for nonlinear compensation may be set in external transmission / reception firmware or control software outside the DSP, or may be set from outside the optical transceiver 100. In the embodiment, the LUT 12 is used as a means for storing correction value information, and an "address" is used as information identifying combinations of input levels. However, this is not limited to these, and any configuration may be adopted as long as it can identify combinations of input levels and the correction values corresponding to each combination. While the correction value Δy set in the LUT 12 is calculated based on the difference between the transmit signal and the level-adjusted receive signal, the correction coefficient may be calculated based on the ratio between the transmit signal and the level-adjusted receive signal so that the ratio approaches 1. In this case, a divider may be used instead of the subtractor 53 in the LUT correction value generation circuit 50, and a multiplier may be used instead of the adder 13 in the nonlinear compensation circuit 10. The adder 13 and multiplier in the nonlinear compensation circuit 10 are examples of compensators that compensate for nonlinear distortion.
[0054] In either case, nonlinear distortion occurring in optical communications is compensated for using a correction value determined based on a combination of multiple input signal levels. By combining several amplitude levels into a single amplitude level through input level determination, nonlinear distortion can be efficiently compensated for with a small circuit scale, even if the signal has a high degree of multi-value. By performing LUT-based nonlinear compensation using correction value information, the power consumption required for nonlinear compensation can be reduced.
[0055] The following notes are added to the above statement. (Appendix 1) a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; A nonlinear compensation circuit having: (Appendix 2) the detection unit determines input levels of a target input signal and a plurality of consecutive input signals including signals before and after the target input signal, and detects a combination of the input levels. 2. The nonlinear compensation circuit of claim 1. (Appendix 3) the detection unit detects the combination of input levels using a decision threshold that distinguishes all amplitude levels determined by a modulation / demodulation method. 2. The nonlinear compensation circuit of claim 1. (Appendix 4) the detection unit detects the combination of input levels using a decision threshold that distinguishes between amplitude levels whose number is smaller than the number of amplitude levels determined by a modulation / demodulation method. 2. The nonlinear compensation circuit of claim 1. (Appendix 5) the detection unit detects the combination of input levels using the determination threshold that groups amplitude levels determined by the modulation / demodulation method equally or unevenly. 5. The nonlinear compensation circuit of claim 4. (Appendix 6) the detection unit distinguishes each amplitude level near a peak and a bottom of the amplitude level determined by the modulation / demodulation method, and detects the combination of the input levels using a decision threshold that combines two or more amplitude levels into one in the center. 6. The nonlinear compensation circuit of claim 5. (Appendix 7) the detection unit detects the combination of input levels of the input signal using a common amplitude level common to a plurality of modulation / demodulation methods. 2. The nonlinear compensation circuit of claim 1. (Appendix 8) the correction value information is configured in a lookup table; When the number of the plurality of input signals for which the combinations of input levels are detected is m and the number of amplitude levels to be identified is L, the lookup table has L^m addresses. 2. The nonlinear compensation circuit of claim 1. (Appendix 9) a transmit digital signal processor; a transmit front-end circuit connected to an output of the transmit digital signal processor; a receiver front-end circuit; a receive digital signal processor connected to an output of the receive front-end circuit; a nonlinear compensation circuit that compensates for nonlinear distortion of a signal to be transmitted and received; The nonlinear compensation circuit comprises: a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; An optical transceiver having: (Appendix 10) the nonlinear compensation circuit is connected to an output of a symbol generator or a Nyquist filter included in the transmission digital signal processor, and corrects the electrical signal supplied to the transmission front-end circuit. 10. The optical transceiver of claim 9. (Appendix 11) the nonlinear compensation circuit corrects nonlinear distortion of the received electrical signal restored by the receiving digital signal processor; 10. The optical transceiver of claim 9. (Appendix 12) a correction value generating circuit that generates the correction value information to be stored in the memory; and 10. The optical transceiver of claim 9, wherein the correction value generation circuit generates the correction value information based on a transmission signal generated by the transmission digital signal processor and a reception signal restored by the reception digital signal processor. (Appendix 13) the correction value generation circuit detects amplitude levels of the plurality of transmission signals, identifies combinations of the amplitude levels, and calculates a correction value for a transmission signal of interest based on a difference or ratio between the transmission signal and the reception signal for each combination of the amplitude levels. 13. The optical transceiver of claim 12. [Explanation of symbols]
[0056] 10 Nonlinear compensation circuit 11 Detection unit 12 LUT 13 Adder (Compensator) 20Tx Transmit DSP 20Rx Receive DSP 21 Symbol Generator 22 Nyquist filter 24 Dispersion Compensation Filter 25 Adaptive Equalization Filter 26 Carrier frequency and phase locked loop circuit 30 Transmit front-end circuit 31 DAC 32 Drivers 33 Optical Modulator 40 Receiver front-end circuit 50 LUT correction value generation circuit 51 Multiplier 52 Address detection circuit 53 Subtractor 54 Accumulator / Counter 120 memory 554 Averaging section
Claims
1. a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; and the detection unit determines input levels of a target input signal and a plurality of consecutive input signals including signals before and after the target input signal, and detects a combination of the input levels; The detection unit detects the combination of input levels using a decision threshold that distinguishes between amplitude levels whose number is smaller than the number of amplitude levels determined by a modulation / demodulation method.
2. A detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; and the detection unit determines input levels of a target input signal and a plurality of consecutive input signals including signals before and after the target input signal, and detects a combination of the input levels; The detection unit detects the combination of input levels using a decision threshold value that is common to a plurality of modulation / demodulation methods and that identifies amplitude levels.
3. the correction value information is configured in a lookup table; When the number of the plurality of input signals for which the combinations of input levels are detected is m and the number of amplitude levels to be identified is L, the lookup table has L^m addresses.
3. The nonlinear compensation circuit according to claim 1.
4. a transmit digital signal processor; a transmit front-end circuit connected to an output of the transmit digital signal processor; a receiver front-end circuit; a receive digital signal processor connected to an output of the receive front-end circuit; a nonlinear compensation circuit that compensates for nonlinear distortion of a signal to be transmitted and received; The nonlinear compensation circuit comprises: a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; and the detection unit determines input levels of a target input signal and a plurality of consecutive input signals including signals before and after the target input signal, and detects a combination of the input levels; The optical transceiver, wherein the detector detects the combination of input levels using a decision threshold that distinguishes between amplitude levels whose number is smaller than the number of amplitude levels determined by a modulation / demodulation method.
5. A transmit digital signal processor; a transmit front-end circuit connected to an output of the transmit digital signal processor; a receiver front-end circuit; a receive digital signal processor connected to an output of the receive front-end circuit; a nonlinear compensation circuit that compensates for nonlinear distortion of a signal to be transmitted and received; The nonlinear compensation circuit comprises: a detection unit that detects a combination of input levels of a plurality of input signals; a memory for storing correction value information for compensating for nonlinear distortion corresponding to possible combinations; a compensator that corrects the input signal using the correction value information acquired from the memory based on the combination detected by the detection unit; and the detection unit determines input levels of a target input signal and a plurality of consecutive input signals including signals before and after the target input signal, and detects a combination of the input levels; The optical transceiver, wherein the detector detects the combination of input levels using a decision threshold for identifying amplitude levels that is common to a plurality of modulation / demodulation methods.
6. a correction value generating circuit that generates the correction value information to be stored in the memory; and 6. The optical transceiver according to claim 4, wherein the correction value generation circuit calculates the correction value based on the transmission signal generated by the transmission digital signal processor and the reception signal restored by the reception digital signal processor.
7. the correction value generation circuit detects amplitude levels of the plurality of transmission signals, identifies combinations of the amplitude levels, and calculates a correction value for a transmission signal of interest based on a difference or ratio between the transmission signal and the reception signal for each combination of the amplitude levels.
7. The optical transceiver according to claim 6.
Citation Information
Patent Citations
Electrical domain compensation of nonlinear effects in optical communication systems
JP2006522508A