Design of photonic integrated circuits based on reverse-engineered component arrays

Abstract

In some embodiments, a method for designing a photonic device is provided. **Solution**: The design optimization system receives an initial design of a photonic device. The initial design includes one or more inputs, one or more outputs, several sub-component regions, and several waveguides for connecting the sub-component regions. The design optimization system simulates each sub-component region to determine the simulated s-parameters of each sub-component region. The design optimization system determines the overall s-parameters of the simulated photonic device based on the simulated s-parameters of each sub-component region and the s-parameters of the waveguides. The design optimization system determines the overall gradient associated with the overall s-parameters. The design optimization system optimizes one or more sub-component regions based on the overall gradient to create an updated design of the photonic device.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Patent Application No. 17 / 828,864, filed May 31, 2022, the contents of which are incorporated herein by reference.

[0002] FIELD OF THE INVENTION The present disclosure relates generally to photonic devices, and particularly, but not exclusively, to photonic integrated circuits, photonic multiplexers, and photonic demultiplexers. [Background technology]

[0003] Optical fiber communications are typically used to transmit information from one location to another via light modulated to carry the information. For example, many telecommunications companies use optical fiber to transmit telephone signals, internet communications, and cable television signals. However, the cost of deploying optical fiber for optical fiber communications can be prohibitive. Therefore, techniques have been developed to more efficiently use the available bandwidth within a single optical fiber. Wavelength division multiplexing is one such technique that bundles multiple optical carrier signals onto a single optical fiber using different wavelengths.

[0004] Furthermore, digital logic has historically been implemented by constructing logic circuits from electrical conductors and other electrical components. To further increase the speed, improve efficiency, and reduce the size of digital logic, other techniques have been sought. One such technique is the use of photonic devices to form photonic integrated circuits, which manipulate light instead of electricity to form logic circuits. Summary of the Invention

[0005] In some embodiments, a non-transitory computer-readable medium is provided having logic stored thereon that, when executed by one or more processors of the computing system, causes the computing system to perform actions to design a photonic device, including receiving, by a design optimization system, an initial design for the photonic device, the initial design including one or more inputs, one or more outputs, a number of subcomponent regions, and a number of waveguides connecting the subcomponent regions, simulating, by the design optimization system, each subcomponent region to determine simulated s-parameters for each subcomponent region, determining, by the design optimization system, an overall s-parameter of the simulated photonic device based on the simulated s-parameters of each subcomponent region and the s-parameters of the waveguides, determining, by the design optimization system, an overall gradient associated with the overall s-parameter, and optimizing, by the design optimization system, the one or more subcomponent regions based on the overall gradient to create an updated design for the photonic device.

[0006] In some embodiments, a method for designing a photonic device is provided. A design optimization system receives an initial design for a photonic device. The initial design includes one or more inputs, one or more outputs, a number of subcomponent regions, and a number of waveguides connecting the subcomponent regions. The design optimization system simulates each subcomponent region to determine simulated s-parameters for each subcomponent region. The design optimization system determines an overall s-parameter of the simulated photonic device based on the simulated s-parameters for each subcomponent region and the s-parameters of the waveguides. The design optimization system determines an overall gradient associated with the overall s-parameter. The design optimization system optimizes one or more subcomponent regions based on the overall gradient to create an updated design for the photonic device. [Brief explanation of the drawings]

[0007] Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, in which like reference numerals refer to like parts throughout the various figures unless otherwise specified. Not every instance of an element is necessarily labeled, so as to avoid cluttering the figures where appropriate. The figures are not necessarily to scale, emphasis instead being placed on illustrating the principles described. To easily identify discussion of any particular element or operation, the most significant digit(s) in a reference numeral refers to the figure number in which that element is first introduced. [Figure 1] FIG. 1 is a functional block diagram illustrating a non-limiting exemplary embodiment of a system for optical communication between two optical communication devices via optical signals, in accordance with various aspects of the present disclosure. [Figure 2A] 1A-1C illustrate non-limiting exemplary embodiments of a demultiplexer and a multiplexer, respectively, according to various aspects of the present disclosure. [Figure 2B] 1A-1C illustrate non-limiting exemplary embodiments of a demultiplexer and a multiplexer, respectively, according to various aspects of the present disclosure. [Figure 2C] 1 illustrates non-limiting exemplary embodiments of distinct wavelength channels of a multi-channel optical signal in accordance with various aspects of the present disclosure. [Figure 3A] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3B] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3C] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3D] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 4A] 1 illustrates a more detailed cross-sectional view of a dispersion region of a non-limiting exemplary embodiment of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 4B] 1 illustrates a more detailed cross-sectional view of a dispersion region of a non-limiting exemplary embodiment of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 5] FIG. 1 is a functional block diagram illustrating a non-limiting exemplary embodiment of a system for generating designs of photonic integrated circuits in accordance with various aspects of the present disclosure. [Figure 6A] 1 illustrates a non-limiting exemplary embodiment of a simulation environment for describing photonic integrated circuits in accordance with various aspects of the present disclosure. [Figure 6B] 1 illustrates a non-limiting exemplary embodiment of a photonic integrated circuit operational simulation in accordance with various aspects of the present disclosure. [Figure 6C] 1 illustrates a non-limiting exemplary embodiment of adjoint simulation within a simulation environment by backpropagating loss values, in accordance with various aspects of the present disclosure. [Figure 7]1 is a flowchart illustrating a non-limiting example embodiment of a design domain of a photonic integrated circuit divided into subcomponent domains in accordance with various aspects of the present disclosure. [Figure 8] FIG. 1 is a block diagram illustrating a non-limiting exemplary embodiment of a system according to various aspects of the present disclosure. [Figure 9A] 1 is a flowchart illustrating a non-limiting exemplary embodiment of a method for optimizing the design of a photonic device according to various aspects of the present disclosure. [Figure 9B] 1 is a flowchart illustrating a non-limiting exemplary embodiment of a method for optimizing the design of a photonic device according to various aspects of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008] Embodiments of techniques for the reverse design of physical devices are described herein in the context of generating designs for photonic integrated circuits (including, but not limited to, multi-channel photonic demultiplexers, multi-channel photonic multiplexers, and photonic logic devices). In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other cases, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

[0009] Throughout this specification, the references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0010] Wavelength division multiplexing and its variants (e.g., dense wavelength division multiplexing, coarse wavelength division multiplexing, etc.) utilize the bandwidth of an optical fiber by bundling multiple optical carrier signals onto a single optical fiber. Once multiple carrier signals are bundled together, they can be transmitted from one location to another over a single optical fiber, where they can be demultiplexed to be read by an optical communication device. However, devices that separate the carrier signals from one another are still prohibitive in terms of cost, size, etc.

[0011] Furthermore, the design of photonic devices, such as those used in optical communications, is traditionally designed through conventional techniques in which a small number of design parameters from a given design or building block may be determined through simple guess-and-check methods or manually guided grid searches, where they are adjusted for suitability for a particular application. However, in reality, these devices may have design parameters ranging from hundreds to billions or more, depending on device size and functionality. Thus, as the functionality of photonic devices increases and manufacturing tolerances improve, allowing for smaller device feature sizes, it becomes increasingly important to fully utilize these improvements through optimized device design.

[0012] Described herein are techniques for the inverse design of photonic integrated circuits (e.g., multi-channel photonic demultiplexers and / or multiplexers and / or logic devices). More specifically, the techniques described in embodiments herein utilize gradient-based optimization in combination with first-principles simulation to generate designs from an understanding of the underlying physics expected to govern the operation of photonic integrated circuits. The embodiments and techniques described herein are not limited to traditional techniques used in the design of photonic devices, where a small number of design parameters of a given building block are adjusted based on their suitability for a particular application. Rather, the first-principles-based design described herein does not necessarily rely on human intuition and may generally result in designs that surpass current state-of-the-art designs in performance, size, robustness, or a combination thereof. Furthermore, rather than being limited to a small number of design parameters resulting from traditional techniques, the embodiments and techniques described herein may provide scalable optimization of a nearly unlimited number of design parameters. While the design and fabrication of photonic integrated circuits is described throughout this specification, it will be understood that similar inverse design techniques may be used to generate designs for other types of physical devices.

[0013] While providing a large design space with many design parameters may increase the variety of functions that can be achieved through inverse design of photonic devices, it should be noted that as the number of design parameters increases, the amount of computational power consumed to simulate performance and update the design increases exponentially. In some embodiments of the present disclosure, techniques are provided to divide a large design space into smaller subcomponents that can be simulated in parallel, thereby significantly reducing the amount of computational power consumed and the amount of time to optimize the design.

[0014] 1 is a functional block diagram illustrating a system 100 for optical communication (e.g., via wavelength division multiplexing or other techniques) between an optical communication device 102 and an optical communication device 120 via an optical signal 110, in accordance with various aspects of the present disclosure. More generally, the optical communication device 102 is configured to transmit information by modulating light from one or more optical sources into a multi-channel optical signal 110 (e.g., a single optical signal including multiple distinct wavelength channels), which is then transmitted from the optical communication device 102 to the optical communication device 120 via an optical fiber, light guide, waveguide, or other photonic device. The optical communication device 120 receives the multi-channel optical signal 110 and demultiplexes each of the multiple distinct wavelength channels from the multi-channel optical signal 110 to extract the transmitted information. It will be understood that in some embodiments, the optical communication device 102 and the optical communication device 120 may be separate, individual devices (e.g., an optical transceiver or transmitter is communicatively coupled to a separate optical transceiver or receiver via one or more optical fibers). However, it is understood that in other embodiments, optical communication device 102 and optical communication device 120 may be part of a single component or device (e.g., a smartphone, a tablet, a computer, an optical device, etc.). For example, optical communication device 102 and optical communication device 120 may both be components on a monolithic integrated circuit embedded within the monolithic integrated circuit and coupled to each other via a waveguide adapted to carry optical signal 110 between optical communication device 102 and optical communication device 120 or otherwise transmit optical signals between one location and another. Furthermore, in other embodiments, at least one of optical communication device 102 and optical communication device 120 may implement logic other than or in addition to wavelength multiplexing or demultiplexing.

[0015] In the illustrated embodiment, optical communication device 102 includes a controller 104, one or more interface devices 112 (e.g., fiber optic couplers, light guides, waveguides, etc.), a multiplexer (mux), a demultiplexer (demux), or a combination thereof (MUX / DEMUX 114), one or more light sources 116 (e.g., light emitting diodes, lasers, etc.), and one or more light sensors 118 (e.g., photodiodes, phototransistors, photoresistors, etc.), coupled to each other. The controller includes one or more processors 106 (e.g., one or more central processing units, application specific circuits, field programmable gate arrays, or otherwise) and memory 108 (e.g., volatile memory such as DRAM and SAM, non-volatile memory such as ROM, flash memory, etc.). It is understood that optical communication device 120 may include the same or similar elements as optical communication device 102, which are omitted for clarity.

[0016] The controller 104 coordinates operation of the optical communication device 102 to transmit and / or receive an optical signal 110 (e.g., a multi-channel optical signal having multiple distinct wavelength channels or otherwise). The controller 104 includes software (e.g., instructions contained in a memory 108 coupled to the processor 106) and / or hardware logic (e.g., an application specific integrated circuit, a field programmable gate array, etc.) that, when executed by the controller 104, causes the controller 104 and / or the optical communication device 102 to perform operations.

[0017] In one embodiment, controller 104 may direct operation of optical communication device 102 to cause light source 116 to generate multiple distinct wavelength channels, which are multiplexed via MUX / DEMUX 114 into a multi-channel optical signal 110, which is then transmitted via interface device 112 to optical communication device 120. In other words, light source 116 may output light having different wavelengths (e.g., 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, 1571 nm, or another) that may be modulated or pulsed via controller 104 to generate multiple distinct wavelength channels representing information. The multiple distinct wavelength channels are then combined or otherwise multiplexed via MUX / DEMUX 114 into a multi-channel optical signal 110, which is transmitted via interface device 112 to optical communication device 120. In the same or another embodiment, the controller 104 may direct the operation of the optical communication device 102 so that multiple separate wavelength channels are demultiplexed via the MUX / DEMUX 114 from the multi-channel optical signal 110 received from the optical communication device 120 via the interface device 112.

[0018] It is understood that in some embodiments, certain elements of optical communication device 102 and / or optical communication device 120 may be omitted to avoid obscuring certain aspects of the present disclosure. For example, optical communication device 102 and optical communication device 120 may include amplification circuitry, lenses, or components to facilitate transmission and reception of optical signal 110. Furthermore, it is understood that in some embodiments, optical communication device 102 and / or optical communication device 120 may not necessarily include all elements illustrated in FIG. 1 . For example, in one embodiment, optical communication device 102 and / or optical communication device 120 are passive devices that operate as intermediate devices that may passively multiplex multiple distinct wavelength channels into and / or demultiplex multiple distinct wavelength channels from multi-channel optical signal 110.

[0019] 2A and 2B illustrate an exemplary demultiplexer 206 and multiplexer 208, respectively, in accordance with various aspects of the present disclosure. The demultiplexer 206 and multiplexer 208 are possible implementations of the MUX / DEMUX 114 illustrated in FIG. 1 and may be part of an integrated photonic circuit, a silicon photonic device, or otherwise.

[0020] 2A , the demultiplexer 206 includes an input region 202 and a plurality of output regions 204. The demultiplexer 206 is configured to receive a multichannel optical signal 110 including a plurality of distinct wavelength channels (e.g., Ch.1, Ch.2, Ch.3, ... Ch.N, each having a center wavelength corresponding to λ1, λ2, λ3, ... λN, respectively) via the input region 202 (e.g., a waveguide that may correspond to the interface device 112 illustrated in FIG. 1 ), optically separate each of the plurality of distinct wavelength channels from the multichannel optical signal 110, and guide each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 204 (e.g., a plurality of waveguides that may correspond to the interface device 112 illustrated in FIG. 1 ). More specifically, in the illustrated embodiment, each of the output regions 204 is configured to receive a plurality of optical signals (e.g., λ1, λ2, λ3, ... λN) including a plurality of distinct wavelength channels (e.g., Ch.1, Ch.2, Ch.3, ... λN, respectively). N ) may be output as a demultiplexed optical signal from the optical fiber 102. The plurality of output regions 204 may each be coupled to a respective optical sensor (e.g., corresponding to optical sensor 118 illustrated in FIG. 1), which may be utilized to convert the demultiplexed optical signal from the multi-channel optical signal 110 into an electrical signal for further processing.

[0021] 2B, multiplexer 208 includes a plurality of input regions 216 and an output region 210. Multiplexer 208 multiplexes a plurality of separate optical signals (e.g., λ1, λ2, λ3, ... λ N2A and 2B are configured to receive the multiplexers 206 and 208, respectively, at a respective one of a plurality of input regions 216 (e.g., a plurality of waveguides that may correspond to the interface devices 112 illustrated in FIG. 1). The multiplexers 208 are structured or otherwise configured to optically combine (i.e., multiplex) each of the plurality of distinct wavelength channels into a multi-channel optical signal 110 that is guided to an output region 210 (e.g., a waveguide that may correspond to the interface devices 112 illustrated in FIG. 1). It will be appreciated that in some embodiments, the demultiplexer 206 illustrated in FIG. 2A and the multiplexer 208 illustrated in FIG. 2B may be bidirectional, such that each device may function as both a demultiplexer and a multiplexer.

[0022] 2C illustrates exemplary distinct wavelength channels of a multi-channel optical signal (e.g., Ch. N is the multi-channel optical signal 110 illustrated in FIGS. 1, 2A, and 2B) in accordance with various aspects of the present disclosure. The exemplary channels may represent individual channels included in a plurality of distinct wavelength channels of the multi-channel optical signal that may be demultiplexed and / or multiplexed by the demultiplexer 206 of FIG. 2A and / or the multiplexer 208 of FIG. 2B. Each of the distinct wavelength channels has a different center wavelength (λ) including at least one of 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, or 1571 nm, or others. N2C , the distinct wavelength channels may have a channel bandwidth 212 that is approximately 13 nm wide. However, in other embodiments, the channel bandwidth may differ from 13 nm wide. Rather, the channel bandwidth may be considered a configurable parameter depending on the structure of the MUX / DEMUX 114 of FIG. 1 , the demultiplexer 206 of FIG. 2A , and / or the multiplexer 208 of FIG. 2B . For example, in some embodiments, each of the multiple distinct wavelength channels may share a common bandwidth that may correspond to 13 nm or others. Referring again to FIG. 2C , the channel bandwidth 212 may be defined as the width of the passband region 218 (i.e., defined as being between PB1 and PB2). The passband region 218 may represent the approximate power transmission of the demultiplexer or multiplexer. It is understood that in some embodiments, the passband region 218 may include ripples, as illustrated in FIG. 2C , corresponding to variations in the passband region 218. In one or more embodiments, the ripple in the passband region about the center value 214 may be + / - 2 dB or less, + / - 1 dB or less, + / - 0.5 dB or less, or other. In some embodiments, the channel bandwidth 212 may be defined by the passband region 218. In other embodiments, the channel bandwidth 212 may be defined by a threshold (e.g., dB th 2A optically separates channel N from multi-channel optical signal 110 and separates the corresponding channel bandwidth (i.e., λ ) of channel N, which is equal to the range of wavelengths above a threshold that are transmitted to output region 204 mapped to channel N. N) In the same or other embodiments, channel isolation (i.e., as defined by channel bandwidth 212) may also be considered when optimizing the design. Isolation may be defined as the ratio between the passband area 218 and the stopband area (e.g., the area less than SB1 and greater than SB2). It should be further understood that the transition band areas (e.g., the first transition area between SB1 and PB1, and the second transition area between PB2 and SB2) are exemplary and may be exaggerated for illustrative purposes. In some embodiments, optimizing the design of a photonic demultiplexer may also include target metrics such as the slope, width, etc. of the transition band areas.

[0023] 3A-3D illustrate different views of an exemplary photonic demultiplexer in accordance with one embodiment of the present disclosure. Photonic demultiplexer 316 is one possible implementation of MUX / DEMUX 114 illustrated in FIG. 1 and demultiplexer 206 illustrated in FIG. 2A. While the following discussion may be directed to photonic integrated circuits capable of demultiplexing multiple distinct wavelength channels from a multi-channel optical signal, it is further understood that in other embodiments, a demultiplexer (e.g., demultiplexer 316) may also, or alternatively, be capable of multiplexing multiple distinct wavelength channels into a multi-channel optical signal in accordance with embodiments of the present disclosure. Similarly, other embodiments may implement functions other than multiplexing / demultiplexing, including, but not limited to, digital logic.

[0024] 3A illustrates a cross-sectional view of demultiplexer 316 along a lateral plane within the active layer defined by width 320 and length 322 of demultiplexer 316. As illustrated, demultiplexer 316 includes an input region 302 (e.g., corresponding to input region 202 illustrated in FIG. 2A), a plurality of output regions 304 (e.g., corresponding to plurality of output regions 204 illustrated in FIG. 2A), and a dispersive region optically disposed between input region 302 and plurality of output regions 304. Input region 302 and plurality of output regions 304 (e.g., output region 308, output region 310, output region 312, and output region 314) may each be a waveguide (e.g., a slab waveguide, a strip waveguide, a slot waveguide, etc.) capable of propagating light along a waveguide path. The dispersion region 332 includes a first material and a second material that are non-uniformly interspersed to form a plurality of interfaces, each corresponding to a change in refractive index of the dispersion region 332, and that collectively structure the dispersion region 332 to optically separate each of the plurality of distinct wavelength channels (e.g., Ch. 1, Ch. 2, Ch. 3, ... Ch. N illustrated in FIG. 2A ) from the multi-channel optical signal (e.g., optical signal 110 illustrated in FIG. 2A ) when the input region 302 receives the multi-channel optical signal, and guide each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 304 (see, e.g., FIG. 3D ). In other words, the input region 302 is adapted to receive a multi-channel optical signal including the plurality of distinct wavelength channels, and the plurality of output regions 304 are each adapted to receive a corresponding one of the plurality of distinct wavelength channels demultiplexed from the multi-channel optical signal via the dispersion region 332.

[0025] As illustrated in FIG. 3A and more clearly shown in FIGS. 3D and 4A-4B, the shape and arrangement of the non-uniformly interspersed first and second materials creates a plurality of interfaces that collectively form a material interface pattern along the cross-sectional area of ​​the dispersion region 332, which is at least partially surrounded by the peripheral region 318, which includes the second material. In some embodiments, the peripheral region 318 has a substantially homogeneous composition, including the second material. In the illustrated embodiment, the dispersion region 332 includes a first side 328 and a second side 330, each of which has an interface with an inner boundary (i.e., the unlabeled dashed line of the peripheral region 318 disposed between the dispersion region 332 and the dash-dotted line corresponding to the outer boundary of the peripheral region 318). The first side 328 and the second side 330 are disposed on opposite sides of the dispersion region 332. The input region 302 is disposed adjacent to the first side 328 (e.g., one side of the input region 302 abuts the first side 328 of the dispersion region 332), while each of the multiple output regions 304 is disposed adjacent to the second side 330 (e.g., one side of each of the multiple output regions 304 abuts the second side 330 of the dispersion region 332).

[0026] In the illustrated embodiment, each of the multiple output regions 304 is parallel to one of the multiple output regions 304. However, in other embodiments, the multiple output regions 304 may not be parallel to one another or disposed on the same side (e.g., one or more of the multiple output regions 304 and / or the input region 302 may be disposed adjacent to the side of the dispersion region 332 adjacent to the first side 328 and / or the second side 330). In some embodiments, when the multiple output regions include at least three output regions, adjacent ones of the multiple output regions are separated from one another by a common separation distance. For example, as illustrated, adjacent output regions 308 and 310 are separated from one another by distance 306, which may be common to the separation distance between other pairs of adjacent output regions.

[0027] 3A , demultiplexer 316 includes four output regions 304 (e.g., output region 308, output region 310, output region 312, output region 314), each mapped to a respective one of the four channels included in the plurality of distinct wavelength channels (i.e., by the structure of dispersion region 332). More specifically, the multiple interfaces of dispersion region 332 defined by the non-uniform interspersion of the first and second materials form a material interface pattern along the cross-sectional area of ​​dispersion region 332 (e.g., as shown in FIG. 3A , 4A , or 4B ) such that when input region 302 splits the multi-channel optical signal, dispersion region 332 optically separates each of the four channels from the multi-channel optical signal and routes each of the four channels to a respective one of four output regions 304.

[0028] It is noted that the first and second materials of the dispersion region 332 are positioned and shaped within the dispersion region such that the material interface pattern is substantially proportional to the design resulting from the inverse design process. The inverse design process is discussed in more detail later in this disclosure. More specifically, in some embodiments, the inverse design process may include iterative gradient-based optimization of a design based at least in part on a loss function incorporating performance losses (e.g., to implement a function) and manufacturing losses (e.g., to implement manufacturability and binarization of the first and second materials), which are reduced or otherwise adjusted via iterative gradient-based optimization to generate a design. In the same or other embodiments, other optimization techniques may be used in place of or in conjunction with the gradient-based optimization. Advantageously, this enables optimization of a nearly unlimited number of design parameters to achieve function and performance within a given area that may not have been possible with traditional design techniques.

[0029] For example, in one embodiment, dispersion region 332 is structured to optically separate each of the four channels from the multi-channel optical signal within a predetermined area of ​​35 μm×35 μm (e.g., as defined by width 324 and length 326 of dispersion region 332) when input region 302 receives the multi-channel optical signal. In the same or another embodiment, the dispersion region is structured to accommodate a common bandwidth for each of the four channels, each of which has a different center wavelength. In one embodiment, the common bandwidth is approximately 13 nm wide, and the different center wavelengths are selected from the group consisting of 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, and 1571 nm. In some embodiments, the entire structure of the demultiplexer 316 (e.g., including the input region 302, the peripheral region 318, the dispersion region 332, and the plurality of output regions 304) fits within a predetermined area (e.g., as defined by the width 320 and the length 322). In one embodiment, the predetermined area is 35 μm by 35 μm. In other embodiments, the dispersion region 332 and / or the demultiplexer 316 fit within other areas that are larger or smaller than 35 μm by 35 μm, it being understood that this may result in changes to the structure of the dispersion region 332 (e.g., the arrangement and shape of the first and second materials and / or other components of the demultiplexer 316).

[0030] In the same or another embodiment, the dispersion region is structured to have, for a given wavelength of one of the plurality of distinct wavelength channels, a power transmission of −2 dB or greater from input region 302 through dispersion region 332 to a corresponding one of the plurality of output regions 304. For example, if channel 1 of a multi-channel optical signal is mapped to output region 308, when demultiplexer 316 receives the multi-channel optical signal at input region 302, dispersion region 332 optically separates channel 1 from the multi-channel optical signal and guides a portion of the multi-channel optical signal corresponding to channel 1 to output region 308 with a power transmission of −2 dB or greater. In the same or another embodiment, dispersion region 332 is structured to have an adverse power transmission (i.e., isolation) for a given wavelength from the input region to any of the plurality of output regions other than the corresponding one of the plurality of output regions of −30 dB or less, −22 dB or less, or other. For example, if channel 1 of the multi-channel optical signal is mapped to output region 308, the adverse power transmission from input region 302 to any other one of the plurality of output regions (e.g., output region 310, output region 312, output region 314) other than the corresponding one of the plurality of output regions (e.g., output region 308) is −30 dB or less, −22 dB or less, or other. In some embodiments, the maximum power reflection from demultiplexer 316 of an input signal (e.g., multi-channel optical signal) received at an input region (e.g., input region 302) reflected back to the input region by dispersive region 332 or otherwise is −40 dB or less, −20 dB or less, −8 dB or less, or other. It is understood that in other embodiments, the power transmission, adverse power transmission, maximum power, or other performance characteristics may differ from the respective values ​​discussed herein, and the structure of dispersive region 332 may vary due to the inherent relationship between the structure, function, and performance of demultiplexer 316.

[0031] 3B illustrates a vertical schematic view or stack of various layers included in an illustrated embodiment of demultiplexer 316. However, it is understood that the illustrated embodiments are not exhaustive and that certain features or elements may be omitted to avoid obscuring certain aspects of the invention. In the illustrated embodiment, demultiplexer 316 includes a substrate 334, a dielectric layer 336, an active layer 338 (e.g., as shown in cross-section in FIG. 3A), and a cladding layer 340. In some embodiments, demultiplexer 316 may be a photonic integrated circuit or a silicon photonic device that is partially or otherwise compatible with conventional fabrication techniques (e.g., lithography techniques such as photolithography, electron beam lithography, sputtering, thermal evaporation, physical and chemical vapor deposition, etc.).

[0032] In one embodiment, a silicon-on-insulator (SOI) wafer may first be provided, including a support substrate (e.g., a silicon substrate) corresponding to substrate 334, a silicon dioxide dielectric layer corresponding to dielectric layer 336, a silicon layer (e.g., intrinsic, doped, or other), and an oxide layer (e.g., intrinsic, grown, or other). In one embodiment, the silicon in active layer 338 may be selectively etched by lithographically creating a pattern on the SOI wafer that is transferred to the SOI wafer via a dry etching process (e.g., via a photoresist mask or other hard mask) to remove portions of the silicon. The silicon may be etched all the way down to dielectric layer 336 to form voids, which may then be backfilled with silicon dioxide, which is then encapsulated with silicon dioxide to form cladding layer 340. In one embodiment, there may be several etch depths, including a full etch depth of silicon, to obtain the target structure. In one embodiment, the silicon may be 206 nm thick, so the full etch depth may be 206 nm. In some embodiments, this may be a two-step encapsulation process, where two silicon dioxide depositions are performed with an intermediate chemical mechanical planarization used to provide a flat surface.

[0033] 3C illustrates a more detailed view of the active layer 338 (relative to FIG. 3B) along a portion of the peripheral region 318 that includes the input region 302 of FIG. 3A. In the illustrated embodiment, the active layer 338 includes a first material 342 having a refractive index of ε1 and a second material 344 having a refractive index of ε2, different from ε1. The homogeneous regions of the first material 342 and the second material 344 may form a waveguide or a portion of a waveguide corresponding to the input region 302 and the multiple output regions 304, as illustrated in FIGS. 3A and 3C.

[0034] 3D illustrates a more detailed view of the active layer 338 along the dispersive region 332 (relative to FIG. 3B ). As previously described, the active layer 338 includes a first material 342 (e.g., silicon) and a second material 344 (e.g., silicon dioxide) that are non-uniformly interspersed to form a plurality of interfaces 346 that collectively form a material interface pattern. Each of the plurality of interfaces 346 forming the interface pattern corresponds to a change in the refractive index of the dispersive region 332 to structure the dispersive region (i.e., the shape and arrangement of the first material 342 and the second material 344) to at least partially provide the functionality of the demultiplexer 316 (i.e., optical separation of a plurality of distinct wavelength channels from a multi-channel optical signal when the input region 302 receives the multi-channel optical signal and respective guidance of each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 304).

[0035] As shown in FIGS. 3A-3D, in the illustrated embodiment of demultiplexer 316, the change in refractive index is shown as being consistent in the vertical direction (i.e., it is understood that first material 342 and second material 344 form an interface that is substantially perpendicular or orthogonal to the lateral plane or cross-section of demultiplexer 316). However, in the same or other embodiments, multiple interfaces (e.g., interface 346 illustrated in FIG. 3D) may not be substantially orthogonal to the lateral plane or cross-section of demultiplexer 316.

[0036] Figure 4A illustrates a more detailed cross-sectional view of the dispersion region of an exemplary photonic demultiplexer 400, according to an embodiment of the present disclosure. Figure 4B illustrates a more detailed view of the interface pattern formed by the shape and arrangement of the first material 410 and the second material 412 for the dispersion region of the photonic demultiplexer 400 of Figure 4A. The photonic demultiplexer 400 is one possible implementation of the MUX / DEMUX 114 illustrated in Figure 1, the demultiplexer 206 illustrated in Figure 2A, and the demultiplexer 316 illustrated in Figures 3A-3D.

[0037] 4A and 4B, photonic demultiplexer 400 includes an input region 402, a plurality of output regions 404a-404d, and a dispersive region 406 optically disposed between input region 402 and the plurality of output regions 404a-404d. Dispersive region 406 is at least partially surrounded by a peripheral region 408 that includes an inner boundary 414 and an outer boundary 416. It will be understood that like-named or labeled elements of photonic demultiplexer 400 may similarly correspond to like-named or labeled elements of other demultiplexers described in embodiments of the present disclosure.

[0038] The first material 410 (i.e., the black regions within the dispersive region 406) and the second material 412 (i.e., the white regions within the dispersive region 406) of the photonic demultiplexer 400 are non-uniformly interspersed to create a plurality of interfaces that collectively form the material interface pattern 420 illustrated in FIG. 4B . More specifically, an inverse design process utilizing iterative gradient-based optimization, Markov chain Monte Carlo optimization, or other optimization techniques is combined with first-principles simulation to generate a design that is substantially replicated by the dispersive region 406 in a proportional or scaled manner to provide the desired functionality of the photonic demultiplexer 400. In the illustrated embodiment, the dispersive region 406 is structured to optically separate each of a plurality of distinct wavelength channels from the multi-channel optical signal when the input region 402 receives the multi-channel optical signal and to respectively guide each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 404 a–404 d. More specifically, the plurality of output regions 404a-404d are respectively mapped to wavelength channels having center wavelengths corresponding to 1271 nm, 1291 nm, 1311 nm, and 1331 nm. In another embodiment, the plurality of output regions 404a-404d are respectively mapped to wavelength channels having center wavelengths corresponding to 1506 nm, 1514 nm, 1551 nm, and 1571 nm.

[0039] As illustrated in FIG. 4B , material interface pattern 420, which is defined by the black lines in dispersion region 406 and corresponds to the refractive index change in dispersion region 406, includes multiple protrusions 422a and 422b. First protrusion 422a is formed from first material 410 and extends from peripheral region 408 into dispersion region 406. Similarly, second protrusion 422b is formed from second material 412 and extends from peripheral region 408 into dispersion region 406. As further illustrated in FIG. 4B , dispersion region 406 includes multiple islands 424a and 424b formed from either first material 410 or second material 412. Multiple islands 424a and 424b include a first island 424a formed from first material 410 and surrounded by second material 412. The plurality of islands 424 a and 424 b also includes a second island 424 b formed from a second material 412 and surrounded by a first material 410 .

[0040] In some embodiments, the material interface pattern 420 includes one or more dendritic shapes, each of which is defined as a branched structure formed from the first material 410 or the second material 412 and having widths that alternately increase and decrease in size along a corresponding direction. Referring back to FIG. 4A , for clarity, the dendritic structure 418 has a black border and is labeled with a white arrow. As can be seen, the width of the dendritic structure 418 alternatively increases and decreases in size along a corresponding direction (i.e., the white arrow overlapping the length of the dendritic structure 418) to create a branched structure. It is understood that in other embodiments, there may be no protrusions, no islands, no dendritic structures, or any number, including zero, of protrusions, islands of any material included in the dispersion region 406, dendritic structures, or a combination thereof.

[0041] In some embodiments, the inverse design process includes manufacturing steps to enforce a minimum feature size to ensure the manufacturability of the design. In the illustrated embodiment of the photonic demultiplexer 400 illustrated in FIGS. 4A and 4B, the material interface pattern 420 is shaped to enforce a minimum feature size within the dispersion region 406 such that no interfaces within the cross-sectional area formed by the first material 410 and the second material 412 have a radius of curvature less than a threshold size. For example, if the minimum feature size is 150 nm, the radius of curvature for any of the interfaces is the reciprocal of half the minimum feature size (i.e., 1 / 75 nm -1 ) has a dimension below a threshold size corresponding to a minimum feature size. Enforcing such a minimum feature size prevents the reverse design process from generating designs that are not manufacturable by considering manufacturing constraints, limitations, and / or yield. In the same or other embodiments, different or additional checks on metrics related to manufacturability may be utilized to enforce a minimum width or spacing as the minimum feature size.

[0042] FIG. 5 is a functional block diagram illustrating a system 500 for generating designs for photonic integrated circuits (i.e., photonic devices) according to one embodiment of the present disclosure. System 500 can be utilized to perform an inverse design process that generates designs using iterative gradient-based optimization that considers the fundamental physics governing the operation of photonic integrated circuits. More specifically, system 500 is a design tool that can be utilized to optimize structural parameters of photonic integrated circuits (e.g., the shape and placement of first and second materials within the dispersion regions of embodiments of the present disclosure) based on first-principles simulations (e.g., electromagnetic simulations to determine the field response of a photonic device to an excitation source) and iterative gradient-based optimization. In other words, system 500 can provide designs resulting from the inverse design process that are substantially replicated (i.e., proportionally scaled) by dispersion regions 332 and 406 of demultiplexer 316 and photonic demultiplexer 400, respectively, as illustrated in FIGS. 3A and 4A.

[0043] As illustrated, system 500 includes a controller 512, a display 502, an input device 504, a communication device 506, a network 508, a remote resource 510, a bus 534, and a bus 520. Controller 512 includes a processor 514, a memory 516, local storage 518, and a photonic device simulator 522. Photonic device simulator 522 includes an operational simulation engine 526, manufacturing loss calculation logic 528, calculation logic 524, an adjoint simulation engine 530, and an optimization engine 532. It will be appreciated that in some embodiments, controller 512 may be a distributed system.

[0044] The controller 512 is coupled to a display 502 (e.g., a light emitting diode display, a liquid crystal display, etc.) coupled through a bus 520 to a bus 534 for displaying information to a user utilizing the system 500 to optimize structural parameters of a photonic device (i.e., a demultiplexer). An input device 504 is coupled to the bus 534 through the bus 520 for communicating information and command selections to the processor 514. The input device 504 may include a mouse, trackball, keyboard, stylus, or other computer peripheral to facilitate interaction between a user and the controller 512. In response, the controller 512 can provide verification of the interaction through the display 502.

[0045] Another device that may optionally be coupled to the controller 512 is a communications device 506 for accessing remote resources 510 of the distributed system via a network 508. The communications device 506 may include any of a number of networking peripheral devices, such as those used to couple to an Ethernet, the Internet, a wide area network, or the like. The communications device 506 may further include mechanisms that provide connectivity between the controller 512 and the outside world. Note that any or all of the components and associated hardware of the system 500 illustrated in FIG. 5 may be used in various embodiments of the present disclosure. The remote resources 510 may be part of a distributed system and may include any number of processors, memory, and other resources for optimizing the structural parameters of a photonic device.

[0046] The controller 512 orchestrates the operation of the system 500 to optimize structural parameters of a photonic device. The processor 514 (e.g., one or more central processing units, graphics processing units, and / or tensor processing units, etc.), the memory 516 (e.g., volatile memory such as DRAM and SRAM, non-volatile memory such as ROM, flash memory, etc.), the local storage 518 (e.g., magnetic memory such as a computer disk drive), and the photonic device simulator 522 are coupled to each other through a bus 520. The controller 512 includes software (e.g., instructions contained in the memory 516 coupled to the processor 514) and / or hardware logic (e.g., an application-specific integrated circuit, a field-programmable gate array, etc.) that, when executed by the controller 512, cause the controller 512 or the system 500 to perform operations. The operations may be based on instructions stored in any one or combination of the memory 516, the local storage 518, the physical device simulator 522, and the remote resources 510 accessed through the network 508.

[0047] In the illustrated embodiment, components of photonic device simulator 522 are utilized to optimize structural parameters of photonic devices (e.g., MUX / DEMUX 114 of FIG. 1 , demultiplexer 206 of FIG. 2A , multiplexer 208 of FIG. 2B , demultiplexer 316 of FIGS. 3A-3D , and photonic demultiplexer 400 of FIGS. 4A-4B ). In some embodiments, system 500 may optimize structural parameters of photonic devices through, among other things, simulations (e.g., behavioral simulations and adjoint simulations) that utilize finite-difference time-domain (FDTD) methods, finite-difference frequency-domain (FDFD) methods, or any other suitable techniques to model field responses (e.g., electric and magnetic fields within a photonic device). Behavioral simulation engine 526 provides instructions for performing electromagnetic simulations of photonic devices operating in response to excitation sources within a simulation environment. In particular, the operational simulation determines field responses of the simulation environment (and thus the photonic device described by the simulation environment) in response to excitation sources to determine performance metrics of the physical device (e.g., based on an initial photonic device description or input design describing structural parameters of the photonic device within the simulation environment having multiple voxels). The structural parameters may correspond, for example, to the specific design, material composition, dimensions, etc. of the physical device. The fabrication loss calculation logic 528 provides instructions for determining fabrication losses utilized to enforce minimum feature sizes to ensure manufacturability. In some embodiments, the fabrication losses are also used to perform binarization of the design (i.e., so that the photonic device includes a first material and a second material interspersed to form multiple interfaces). The calculation logic 524 computes a loss metric based on the performance metric and the fabrication losses, which is determined via a loss function incorporating the performance losses.An adjoint simulation engine 530 is utilized in conjunction with the behavioral simulation engine 526 to perform adjoint simulations of the photonic device and back-propagate the loss metric through the simulation environment via a loss function to determine how changes in the structural parameters of the photonic device affect the loss metric. An optimization engine 532 is utilized to update the structural parameters of the photonic device to reduce the loss metric and generate a revised description of the photonic device (i.e., revise the design).

[0048] 6A-6C illustrate non-limiting example embodiments of an initial setup of a simulation environment 606 that describes a photonic device, performs operational simulation of the photonic device in response to an excitation source within the simulation environment 608, and performs adjoint simulation of the photonic device within the simulation environment 610, according to various aspects of the present disclosure. The initial setup of the simulation environment, the one-dimensional representation of the simulation environment, the operational simulation of the physical device, and the adjoint simulation of the physical device may be implemented using the system 500 illustrated in FIG.

[0049] As illustrated in Figures 6A-6C, the simulation environment is represented in two dimensions. However, it is understood that other dimensionality (e.g., three-dimensional space) may be used to describe the simulation environment and the photonic device. In some embodiments, optimization of the structural parameters of the photonic device illustrated in Figures 6A-6C may be achieved through an inverse design process that includes, among other things, simulations (e.g., motional simulations and adjoint simulations) that model field responses (e.g., electric and magnetic fields) to excitation sources using the finite-difference time-domain (FDTD) method, the finite-difference frequency-domain (FDFD) method, or any other suitable technique.

[0050] FIG. 6A illustrates an exemplary simulation environment 606 for describing a photonic integrated circuit (i.e., a photonic device such as a waveguide, demultiplexer, etc.) in accordance with a non-limiting embodiment of the present disclosure. More specifically, in response to receiving an initial description of a photonic device defined by one or more structural parameters (e.g., an input design), a system (e.g., system 500 of FIG. 5) configures the simulation environment 606 to represent the photonic device. As illustrated, the simulation environment 606 (and subsequently the photonic device) is described by a plurality of voxels 612, each representing an individual (i.e., discretized) element of two-dimensional (or other dimensional) space. Each of the voxels 612 is illustrated as a two-dimensional square. However, it is understood that a voxel may be represented as a cube or other shape in three-dimensional space. It is understood that the particular shape and dimensions of the plurality of voxels 612 may be adjusted depending on the simulation environment 606 and the photonic device being simulated. Furthermore, note that only a portion of the voxels 612 are shown to avoid obscuring other aspects of the simulated environment 606 .

[0051] Each of the plurality of voxels 612 may be associated with a structural value, a field value, and a source value. Collectively, the structural values ​​of the simulation environment 606 describe structural parameters of the photonic device. In one embodiment, the structural values ​​may correspond to a dielectric constant, a magnetic permeability, and / or a refractive index that collectively describe a structural (i.e., material) boundary or interface (e.g., material interface pattern 420 of FIG. 4B ) of the photonic device. For example, an interface 616 may represent a location within the simulation environment 606 where the dielectric constant changes and define a boundary of the photonic device where a first material contacts or otherwise creates an interface with a second material. The field values ​​describe a field (or loss) response calculated (e.g., via Maxwell's equations) in response to an excitation source described by the source values. The field response may correspond, for example, to a vector describing the electric and / or magnetic field (e.g., in one or more orthogonal directions) at a particular time step for each of the plurality of voxels 612. Thus, the field response may be based at least in part on the structural parameters of the photonic device and the excitation source.

[0052] In the illustrated embodiment, the photonic device corresponds to an optical demultiplexer having a design region 614 (e.g., corresponding to dispersion region 332 of FIG. 3A and / or dispersion region 406 of FIG. 4A), where structural parameters of the physical device may be updated or otherwise modified. More specifically, through an inverse design process, an iterative gradient-based optimization of a loss metric determined from a loss function is performed to generate a design of a photonic device that functionally causes a multi-channel optical signal to be demultiplexed and guided from input port 602 to a corresponding one of output ports 604. Thus, input port 602 of the photonic device (e.g., corresponding to input region 302 of FIG. 3A, input region 402 of FIG. 4A, etc.) corresponds to the location of a pump source for providing an output (e.g., a Gaussian pulse, a wave, a waveguide mode response, etc.). The output of the excitation source interacts with the photonic device based on the structural parameters (e.g., the electromagnetic wave corresponding to the excitation source may be perturbed, retransmitted, attenuated, refracted, reflected, diffracted, scattered, absorbed, dispersed, amplified, or otherwise altered as the wave propagates through the photonic device in the simulated environment 606). In other words, the excitation source may alter the field response of the photonic device, which depends on the underlying physics governing the physical domain and structural parameters of the photonic device. The excitation source is positioned to originate from or otherwise be proximate to the input port 602 and propagate through the design space 614 toward the output port 604 of the photonic device (or otherwise affect the field values ​​of multiple voxels). In the illustrated embodiment, the input port 602 and the output port 604 are positioned outside the design space 614. In other words, in the illustrated embodiment, only a portion of the structural parameters of the photonic device are optimizable.

[0053] However, in other embodiments, the entire photonic device may be placed within the design domain 614, such that the structural parameters may represent any portion or the entire photonic device design. The electric and magnetic fields within the simulation environment 606 (and subsequently the photonic device) may vary in response to an excitation source (e.g., represented by field values ​​of individual voxels that collectively correspond to the field response of the simulation environment). The output ports 604 of the optical demultiplexer may be used to determine performance metrics of the photonic device in response to an excitation source (e.g., power transmission from the input port 602 to a particular one of the output ports 604). An initial description of the photonic device, including initial structural parameters, excitation sources, performance parameters or metrics, and other parameters describing the photonic device, is received by a system (e.g., system 500 of FIG. 5) and used to configure the simulation environment 606 for performing a first-principles-based simulation of the photonic device. These specific values ​​and parameters may be defined directly by a user (e.g., a user of system 500 of FIG. 5), indirectly (e.g., via controller 512, by culling predefined values ​​stored in memory 516, local storage 518, or remote resource 510), or by a combination thereof.

[0054] 6B illustrates a non-limiting exemplary embodiment of an operational simulation of a photonic device in response to an excitation source within a simulated environment 608 in accordance with various aspects of the present disclosure. In the illustrated embodiment, the photonic device is an optical demultiplexer structured to optically separate each of a plurality of distinct wavelength channels included in a multi-channel optical signal received at an input port 602 and respectively guide each of the plurality of distinct wavelength channels to a corresponding one of a plurality of output ports 604. An excitation source may be selected (randomly or otherwise) from the plurality of distinct wavelength channels and originates from the input port 602 with a specified spatial, phase, and / or temporal profile. The operational simulation is performed over multiple time steps, including the illustrated time step. When performing the operational simulation, changes to the field response (e.g., field values) of each of a plurality of voxels 612 are incrementally updated in response to the excitation source over the multiple time steps. The change in the field response at a particular time step is based at least in part on the structural parameters, excitation source, and field response of the simulated environment 610 at an immediately preceding time step included in the multiple time steps. Similarly, in some embodiments, source values ​​for multiple voxels 612 are updated (e.g., based on spatial and / or temporal profiles describing the excitation source). It is understood that the motion simulation is incremental, and the field values ​​(and source values) of the simulated environment 610 are incrementally updated at each time step as time progresses for each of multiple time steps during the motion simulation. It is further noted that in some embodiments, the updating is an iterative process, and each update of the field and source values ​​is based at least in part on previous updates of the field and source values.

[0055] Once the operational simulation reaches a steady state (e.g., changes in field values ​​in response to the pump source substantially stabilize or decrease to a negligible value) or otherwise terminates, one or more performance metrics may be determined. In one embodiment, the performance metric corresponds to the power transmitted at a corresponding one of the output ports 604 mapped to the distinct wavelength channels being simulated by the pump source. In other words, in some embodiments, the performance metric represents the power (at one or more frequencies of interest) in the target mode shape at a particular location of the output port 604. A loss value or metric of the input design (e.g., the initial design and / or any refined design with updated structural parameters) based at least in part on the performance metric may be determined via a loss function. The loss metric, in conjunction with the adjoint simulation, may be utilized to determine a structural gradient (e.g., the effect of the structural parameters on the loss metric) for updating or otherwise modifying the structural parameters to reduce the loss metric (i.e., increase the performance metric). Note that the loss metric may be further based on manufacturing loss values ​​and / or other loss values ​​utilized to enforce a minimum feature size of the photonic device to facilitate the manufacturability of the device.

[0056] FIG. 6C illustrates a non-limiting example embodiment of an adjoint simulation within a simulation environment 610 by backpropagating a loss metric in accordance with various aspects of the present disclosure. More specifically, an adjoint simulation is a backward-in-time simulation in which the loss metric is treated as an excitation source that interacts with a photonic device to cause a loss response. In other words, an adjoint (or virtual source) based on the loss metric is placed at an output domain (e.g., output port 604) or other location corresponding to the location used when determining the performance metric. The adjoint source is treated as a physical stimulus or excitation source during the adjoint simulation. The loss response of the simulation environment 608 is calculated (e.g., backward in time) for each of multiple time steps in response to the adjoint source. The loss response collectively refers to the loss values ​​of multiple voxels 612 that are incrementally updated in response to the adjoint source over multiple time steps. A change in the loss response based on the loss metric may correspond to a loss gradient, which indicates how changes in the field response of the physical device affect the loss metric. The loss gradient and field gradient may be combined in an appropriate manner to determine the structural gradient of the photonic device / simulation environment (e.g., how changes in the structural parameters of the photonic device in the simulation environment affect the loss metric). Once the structural gradient for a particular cycle (e.g., operational simulation and adjoint simulation) is known, the structural parameters may be updated to reduce the loss metric and generate a revised description or design of the photonic device.

[0057] In some embodiments, the iterative cycle of performing operational and adjoint simulations, determining structural gradients, and updating structural parameters to reduce the loss metric is performed continuously as part of an inverse design process utilizing iterative gradient-based optimization. An optimization scheme such as gradient descent may be utilized to determine a specific amount or degree of change to the structural parameters of the photonic device to incrementally reduce the loss metric. More specifically, after each cycle, the structural parameters are updated (e.g., optimized) to reduce the loss metric. The operational simulations, adjoint simulations, and structural parameter updates are repeated iteratively until the loss metric substantially converges or is otherwise below or within a threshold or range such that the photonic device provides desired performance while maintaining manufacturability.

[0058] While the above-described inverse design process is effective, as the size of the design space 614 increases, the amount of computational time spent performing operational simulations, adjoint simulations, gradient determination, and structural parameter updates increases significantly. Furthermore, the number of iterations before loss metrics converge may similarly increase as the size of the design space 614 increases. Unfortunately, for some desired functions (e.g., multiplexing / demultiplexing specific wavelengths and / or multiplexing / demultiplexing a specific number of wavelengths with each other and / or implementing digital logic), a smaller design space 614 may not provide enough physical area for the desired functionality to be implemented. For example, given the physical characteristics of wave propagation through the design space 614, a minimum distance may be required for the wave to transform from a first position or orientation to a second position or orientation. That said, excessively increasing the area of ​​the design space 614 may result in more computational resources being devoted to simulations and gradient calculations than would actually result.

[0059] Thus, in some embodiments of the present disclosure, simulation and optimization of a large design space 614 may be achieved by dividing the design space into subcomponent spaces connected by waveguides. The simulation and optimization of each subcomponent space may be computed simultaneously, and the waveguide simulation may be pre-computed to accelerate the simulation and optimization of the entire design. The total size of the design space, even when divided into subcomponent spaces, is still available to implement functionality, thus dramatically reducing computation time while maintaining the benefits of a large design space.

[0060] 7 is a schematic diagram illustrating a non-limiting example embodiment of a photonic integrated circuit design domain divided into subcomponent regions according to various aspects of the present disclosure. In the photonic integrated circuit 700, an input waveguide 704, a first output waveguide 706, a second output waveguide 708, and a third output waveguide 710 are provided around the periphery of the design domain, similar to the input region 402 and output regions 404a-404d illustrated in FIGS. 4A and 4B and the input ports 602 / output ports 604 illustrated in FIGS. 6A-6C. However, instead of a single monolithic design domain 614 as illustrated in previous figures, the design domain of the photonic integrated circuit 700 is divided into multiple subcomponent regions 702.

[0061] In the illustrated embodiment, each of the subcomponent regions 702 is of a matching size. By selecting matching sizes for the subcomponent regions 702, concurrent simulation of each of the subcomponent regions 702 is completed substantially simultaneously, and because each of the subcomponent regions 702 is significantly smaller than the entire design domain, the computational resources for simulating each subcomponent region 702 are dramatically reduced compared to the entire design domain (especially considering that the computational complexity of a simulation is exponential with the simulated area).

[0062] Photonic integrated circuit 700 includes multiple internal waveguides 712 connecting subcomponent regions 702. The computational complexity of simulating photonic integrated circuit 700 is further reduced by using standard shapes and sizes for internal waveguides 712 and by excluding internal waveguides 712 themselves from the optimization process. Thus, the s-parameters of a single internal waveguide 712 can be calculated once and then reused during future simulations of the entire photonic integrated circuit 700, dramatically reducing the total area simulated while preserving the overall size of photonic integrated circuit 700, thereby enabling the implementation of complex functions that utilize a larger overall size. Regions of photonic integrated circuit 700 that are not within subcomponent regions 702 or internal waveguides 712 can be separated by opaque barriers and ignored during optimization.

[0063] The internal waveguide 712 is defined by structural parameters that specify the material within the region of the internal waveguide 712. While the illustrated internal waveguide 712 is shown as having straight walls and a single material, in some embodiments, the internal waveguide 712 may have more complex structural parameters, including, but not limited to, regular or irregular features along the walls and / or within the center of the internal waveguide 712. Additionally, as described above, at least a portion of the internal waveguide 712 may be curved to connect subcomponent regions 702 that are not horizontally or vertically adjacent.

[0064] While a photonic integrated circuit 700 is illustrated in which multiple subcomponent regions 702 are fully connected by pairs of straight internal waveguides 712, it will be understood that this is merely a non-limiting example. In some embodiments, more or fewer internal waveguides 712 may be used, and they may be arranged in irregular patterns. Furthermore, in some embodiments, internal waveguides 712 of various shapes may be used, including, but not limited to, curved internal waveguides 712, so that subcomponent regions 702 other than vertically or horizontally adjacent subcomponent regions 702 may be connected. The s-parameters of the curved internal waveguides 712 are also pre-simulated to be plugged into the overall simulation, as described above for the illustrated straight internal waveguides 712.

[0065] 8 is a block diagram illustrating a non-limiting exemplary embodiment of a system according to various aspects of the present disclosure. Overall, the illustrated embodiment of system 800 is configured to generate a proposed segmented design, optimize the proposed segmented design, and manufacture a physical device based on the proposed segmented design.

[0066] As shown, system 800 includes a design generation system 814, a manufacturing system 816, and a design optimization system 802. Communication between design generation system 814, design optimization system 802, and manufacturing system 816 may occur via a network (not shown), via exchange of removable computer-readable media (not shown), or via any other suitable technique. While design generation system 814, manufacturing system 816, and design optimization system 802 are illustrated as separate systems, in some embodiments, portions of these systems may be integrated. As one non-limiting example, design generation system 814 and design optimization system 802 may be integrated into a single system. Also, in some embodiments, the system illustrated in FIG. 8 as a single system may be divided into multiple systems.

[0067] In some embodiments, design generation system 814 may include one or more computing devices configured to generate a proposed design that achieves a desired result. For example, design generation system 814 may provide a user interface that accepts specifications of the number of input ports, the number of output ports, the desired functionality of the proposed design (including, but not limited to, the expected output at each output port given a particular input at each input port), the size of the design domain, the number and / or size of subcomponent domains, and / or any other aspect of the proposed design. In some embodiments, design generation system 814 may automatically generate some aspects of the proposed design, including, but not limited to, the size and / or number of subcomponent domains 702, the number and / or location of internal waveguides 712 connecting the subcomponent domains 702, etc.

[0068] In some embodiments, manufacturing system 816 may be any suitable system for manufacturing a segmented design. In some embodiments, manufacturing system 816 may be a photolithography system or an additive manufacturing system. In some embodiments, manufacturing system 816 may have characteristics including minimum feature size, minimum feature shape, and / or other constraints that help define the segmented design that manufacturing system 816 is capable of manufacturing. To that end, manufacturing system 816 may include a design rule checker configured to process a proposed segmented design to determine whether the proposed segmented design complies with the constraints of manufacturing system 816.

[0069] In some embodiments, design optimization system 802 may be any suitable computing device or collection of computing devices configured to provide the described functionality. In some embodiments, design optimization system 802 may be one or more computing devices of a server computing device, a desktop computing device, a laptop computing device, a mobile computing device, a tablet computing device, or a cloud computing system. In some embodiments, design optimization system 802 may include components or provide functionality described with respect to system 500 illustrated in FIG. 5 and described above, and / or system 500 of FIG. 5 may include components or provide functionality described with respect to design optimization system 802.

[0070] As shown, design optimization system 802 includes one or more processors 810, a network interface 812, and a computer-readable medium 804. In some embodiments, one or more processors 810 may include multiple processors and / or multiple processing cores to provide significant computing power. In some embodiments, network interface 812 may be configured to communicate with design generation system 814 and / or manufacturing system 816 via any suitable type of wired network (including, but not limited to, Ethernet, FireWire, and USB), a wireless network (including, but not limited to, 2G, 3G, 4G, 5G, LTE, Wi-Fi, WiMAX, and Bluetooth), or a combination thereof. In some embodiments, instead of network interface 812, design optimization system 802 may be configured to communicate with design generation system 814 and / or manufacturing system 816 via the transfer of a removable computer-readable medium (not shown).

[0071] As shown, computer-readable medium 804 stores logic that, when executed by one or more processors 810 , causes design optimization system 802 to provide a subcomponent optimization engine 806 and an overall optimization engine 808 .

[0072] In some embodiments, the subcomponent optimization engine 806 is configured to simultaneously simulate the subcomponent regions 702 of the proposed segmented design, determine gradients for the subcomponent regions 702, and optimize the subcomponent regions 702 based on the gradients. In some embodiments, the global optimization engine 808 is configured to use the simulations of the subcomponent regions 702 and pre-computed simulations of the internal waveguides 712 to determine global s-parameters for the proposed segmented design and determine global gradients for the proposed segmented design. In some embodiments, the global optimization engine 808 is also configured to optimize the positions of one or more internal waveguides 712 as part of the optimization process. Further details about the actions performed by the subcomponent optimization engine 806 and the global optimization engine 808 are provided below.

[0073] As used herein, an "engine" refers to logic embodied in hardware or software instructions and written in a programming language such as C, C++, C#, COBOL, Java™, PHP, Perl, HTML, CSS, JavaScript, VBScript, ASPX, Go, or Python. An engine may be compiled into an executable program or written in an interpreted programming language. Software engines can be called from other engines or from themselves. Generally, engines described herein refer to logic modules that can be merged with other engines or divided into sub-engines. An engine can be stored in any type of computer-readable medium or computer storage device and stored on and executed by one or more general-purpose computers, thus creating an engine or a special-purpose computer configured to provide its functionality. An engine can be implemented by logic programmed into an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or another hardware device.

[0074] As used herein, the term "computer-readable medium" refers to a removable or non-removable device implementing any technology capable of storing, in a volatile or non-volatile manner, information read by a processor of a computing device, including, but not limited to, hard drives, flash memory, solid-state drives, random-access memory (RAM), read-only memory (ROM), CD-ROMs, DVDs, or other disk storage devices, magnetic cassettes, magnetic tapes, and magnetic disk storage devices. A computer-readable medium may also include multiple devices configured to collectively store the described information.

[0075] 9A-9B are flowcharts illustrating non-limiting exemplary embodiments of methods for optimizing the design of a photonic device according to various aspects of the present disclosure. In method 900, design optimization system 802 accelerates the simulation and optimization of a proposed segmented design of a photonic device using simulation and optimization of sub-component domains 702 along with pre-calculated performance characteristics of internal waveguides 712.

[0076] The method 900 proceeds from a start block to block 902, where the design generation system 814 generates a proposed design including a number of input ports and a number of output ports and provides the proposed design to the design optimization system 802. The proposed design may also include one or more desired performance characteristics associated with each output port for various expected inputs to each input port so that simulated performance can be compared to the desired performance characteristics for optimization purposes. In some embodiments, the proposed design may indicate one or more constraints on the overall design, including, but not limited to, constraints on the size and / or shape of the overall design, the location of one or more of the input ports and / or one or more of the output ports, and / or other constraints.

[0077] At block 904, the global optimization engine 808 of the design optimization system 802 determines an initial design based on the proposed design, including a number of subcomponent regions 702 and a number of internal waveguides 712. In some embodiments, the number of subcomponent regions 702 may be automatically determined by the global optimization engine 808. For example, the global optimization engine 808 may retrieve the overall design size and / or shape from the proposed design and automatically divide the initial design into subcomponent regions 702 of predetermined sizes based on the size and / or shape. For example, the global optimization engine 808 may retrieve the overall design size and / or shape from the proposed design and automatically divide the initial design into a predetermined number of subcomponent regions 702 spaced apart by a predetermined amount based on the size and / or shape. In some embodiments, specifications for the subcomponent regions 702 and / or internal waveguides 712 may be provided in the proposed design.

[0078] In some embodiments, the proposed design may provide several internal waveguides 712 used to connect each of the subcomponent regions 702. For example, in the proposed design for the photonic integrated circuit 700 illustrated in FIG. 7, two internal waveguides 712 are specified to connect each of the subcomponent regions 702. In some embodiments, the proposed design may indicate more or fewer internal waveguides 712 to connect each of the subcomponent regions 702. In some embodiments, the proposed design may also specify the shape (e.g., straight, curved, etc.) of the internal waveguides 712. In some embodiments, the proposed design may indicate that fewer than all of the subcomponent regions 702 should be fully connected in the initial design, such that some subcomponent regions 702 may be connected by more or fewer internal waveguides 712 than others. In some embodiments, the proposed design may provide specific locations for the internal waveguides 712. In some embodiments, the global optimization engine 808 may determine the specific locations of the internal waveguides 712 based on guidance provided by the proposed design. In some embodiments, the global optimization engine 808 can automatically determine both the number and location of the internal waveguides 712.

[0079] In block 906, the subcomponent optimization engine 806 of the design optimization system 802 initializes each subcomponent region. In some embodiments, the initialization includes determining an initial set of structural parameters (e.g., a pattern of materials within voxels 612 (e.g., pixels, segments)) for each subcomponent region 702. In some embodiments, the initialization may set the materials within the voxels 612 to a single value. In some embodiments, the initialization may set the materials within the voxels 612 to a random value. In some embodiments, the initialization may set the materials within the voxels 612 to match the structural parameters of a previously designed physical device.

[0080] At block 908, the global optimization engine 808 determines the s-parameters of the internal waveguides 712. In some embodiments, the global optimization engine 808 may determine the s-parameters by simulating the performance of a sample internal waveguide using FDTD, FDFD, or any other suitable method for generating s-parameters for a sample internal waveguide. The global optimization engine 808 may then use the s-parameters determined for each internal waveguide 712 used in the design. The s-parameters may be determined separately for each type of internal waveguide used in the design (e.g., a straight internal waveguide of a given length, a curved internal waveguide, etc.), but may be reused each time an internal waveguide of the same size and shape is used in the design. In some embodiments, the global optimization engine 808 may store the s-parameters of the internal waveguides in a reference data store. In some embodiments, the global optimization engine 808 may determine the s-parameters of the internal waveguides 712 by retrieving previously determined s-parameters from the reference data store.

[0081] The method 900 then proceeds through a continuation terminal (“terminal A”) to block 910, where the subcomponent optimization engine 806 simultaneously simulates the subcomponent domains to obtain simulated s-parameters for each subcomponent domain. The structural parameters for each subcomponent domain 702 may be used in a simulation using an FDTD method, an FDFD method, or any other appropriate method for generating simulated s-parameters. Any appropriate technique may be used to simultaneously simulate the subcomponent domains 702. For example, a multithreaded method may be used to run multiple simulations simultaneously on one or more processing cores. As another example, serverless functions or other distributed computing techniques may be used to distribute the simulation of each subcomponent domain 702 among multiple cloud-based computing devices. By using subcomponent domains 702 of matching size, the simulations take substantially similar amounts of time to complete, and no simulation acts as a bottleneck.

[0082] In block 912, the global optimization engine 808 combines the simulated s-parameters with the s-parameters of the internal waveguide 712 to determine the overall s-parameters of the initial design. One characteristic of s-parameters known to those skilled in the art is that the s-parameters of a composite circuit can be modeled by combining the s-parameters of individual components with simple operations such as matrix multiplication, more complex techniques such as the Gunnar algorithm described in Filipsson, Gunnar, "A new general computer algorithm for S-matrix calculation of interconnected multiports," 11th European Microwave Conference, IEEE, 1981 (incorporated herein by reference in its entirety), or any other suitable technique. Thus, by appropriately combining the simulated s-parameters of the subcomponent regions 702 with the s-parameters of the internal waveguide 712, the overall s-parameters can be easily determined. In some embodiments, the s-parameters of the input and output ports may also be considered.

[0083] The method 900 then proceeds to a continuation terminal ("terminal B"). From terminal B (FIG. 9B), the method 900 proceeds to block 914, where the global optimization engine 808 determines a global gradient of the global loss function based on the desired performance characteristics. In some embodiments, a comparison of the desired performance and the global s-parameters may be performed to determine a performance loss value. To calculate the global gradient, a derivative of the performance loss value may be determined.

[0084] At block 916, the subcomponent optimization engine 806 updates structural parameters of one or more subcomponent regions based on the global gradient. In some embodiments, the global gradient indicates changes to be made to structural parameters within the entire design space 614 to reduce the difference between the overall performance loss value and the desired performance. The changes indicated by the global gradient are mapped to the appropriate subcomponent regions 702 so that the appropriate changes can be made to the subcomponent regions 702. Because all of the subcomponent regions 702 can be updated using a single global gradient, the effect is to optimize all of the subcomponent regions 702 at once, rather than using individual optimization of each subcomponent region 702. Thus, eliminating the individual optimization of the subcomponent regions 702 dramatically saves computational resources.

[0085] In some embodiments, all of the subcomponent regions 702 may be optimized each time block 916 is reached in method 900. In some embodiments, a subset of the subcomponent regions 702 may be optimized during each iteration of block 916. For example, the first level of subcomponent regions 702 (i.e., the subcomponent regions 702 closest to the output port) may be optimized during the first iteration, the second level of subcomponent regions 702 (i.e., the set of subcomponent regions 702 immediately upstream of the first level of subcomponent regions 702) may be optimized during the second iteration, and so on. Similarly, each subset may be processed over two or more iterations before moving on to the next subset.

[0086] At optional block 918, the global optimization engine 808 optimizes the position of one or more waveguides. In some embodiments, the global optimization engine 808 can determine whether overall performance is improved by moving the position of one or more of the internal waveguides 712, input ports, and / or output ports. This can be accomplished by monitoring performance values ​​along the perimeter of the photonic integrated circuit 700 and / or individual subcomponent regions 702, and moving waveguides if the global optimization engine 808 determines that performance is better with the waveguides in different positions. A detailed description of techniques for moving waveguide positions is provided in commonly owned, co-pending U.S. patent application Ser. No. 17 / 586,370, filed Jan. 27, 2022, the entire disclosure of which is incorporated herein by reference in its entirety for all purposes.

[0087] In some embodiments, the global optimization engine 808 may review field values ​​in neighboring subcomponent regions 702, and if it determines that the signal strength passing through a waveguide is less than a threshold amount, the associated waveguide may be removed from the design to simplify future calculations. Optional block 918 is illustrated as optional because in some embodiments the waveguide positions may be fixed and / or optimization of the waveguide positions may not be performed during every iteration of method 900.

[0088] Method 900 then proceeds to decision block 920, where a determination is made as to whether method 900 has been performed to optimize the design. In some embodiments, the optimization may continue until a desired level of performance is achieved. In some embodiments, the optimization may continue until the performance loss value converges to a local minimum (i.e., further iterations are not expected to further improve performance). In some embodiments, the optimization may be performed for a predetermined number of iterations, and the determination may check whether that number of iterations has already been performed.

[0089] If it is determined at decision block 920 that method 900 has not been performed, the result of decision block 920 is "NO" and the method 900 returns to block 910 via terminal A to perform a subsequent optimization iteration. Otherwise, if method 900 has been performed, the result of decision block 920 is "YES" and the method 900 proceeds to optional block 922.

[0090] At optional block 922, the global optimization engine 808 identifies unused subcomponent regions. In some embodiments, the global optimization engine 808 may review the simulated field values ​​in the subcomponent regions 702 (determined during the simulation at block 910) to determine whether there are any subcomponent regions 702 that do not receive any signals during operation of the photonic integrated circuit 700. In some embodiments, the global optimization engine 808 may identify unused subcomponent regions 702 by finding subcomponent regions 702 from which all waveguides have been removed by the processing at optional block 918.

[0091] In optional block 924, the global optimization engine 808 removes all waveguides connected to the unused subcomponent regions 702 and structural parameters of the unused subcomponent regions 702. Because no signals are reaching the unused subcomponent regions 702, the structural parameters and their associated waveguides (if any remain after processing in optional block 918) can be removed without affecting the performance of the remainder of the photonic integrated circuit 700.

[0092] In optional block 926, the global optimization engine 808 inserts other functionality into unused subcomponent regions. In some embodiments, predetermined test structures with unique input and output ports may be inserted to replace the removed subcomponent regions 702. This is advantageous because structures that may be used to test the manufacturing process of the remainder of the photonic integrated circuit 700 are located as physically close as possible to the photonic integrated circuit 700, eliminating the need to reserve space within the photonic integrated circuit 700 that would otherwise be available to provide the functionality of the photonic integrated circuit 700. In some embodiments, the "other functionality" may be inserted by laying out multiple photonic integrated circuits 700 on a single wafer such that unused portions of the photonic integrated circuits 700 interlace with each other in order to fit more photonic integrated circuits 700 on a single wafer. Optional blocks 922, 924, and 926 are illustrated as optional because, in some embodiments, the method 900 may leave unused subcomponent regions 702 within the photonic integrated circuit 700.

[0093] At block 928, the design optimization system 802 sends the updated design to the manufacturing system 816 to manufacture the photonic device. The manufacturing system 816 can then manufacture the photonic device as defined by the updated design.

[0094] The method 900 then proceeds to an end block and ends.

[0095] In the foregoing description, numerous specific details are set forth to provide a thorough understanding of various embodiments of the present disclosure. However, those skilled in the art will recognize that the techniques described herein may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

[0096] Throughout this specification, the references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0097] The order in which some or all of the blocks appear in each method flowchart should not be considered limiting. Rather, one skilled in the art having the benefit of this disclosure will understand that the actions associated with some of the blocks may be performed in various orders not illustrated, or even in parallel.

[0098] The processes described above are described with reference to computer software and hardware. The described techniques may constitute machine-executable instructions embodied in a tangible or non-transitory machine (e.g., computer) readable storage medium that, when executed by a machine, causes the machine to perform the described operations. Furthermore, the processes may be embodied in application specific integrated circuits ("ASICs") or other hardware, such as

[0099] The above description of illustrated embodiments of the present invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise form disclosed. While specific embodiments of and examples for the present invention have been described herein for illustrative purposes, those skilled in the art will recognize that various modifications are possible within the scope of the present invention.

[0100] These modifications can be made to the invention in light of the above detailed description. In general, the terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed herein. Rather, the scope of the invention should be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

Claims

1. 1. A non-transitory computer-readable medium having stored thereon logic that, in response to execution by one or more processors of a computing system, causes the computing system to perform actions to design a photonic device, the actions including: receiving, by a design optimization system, an initial design of the photonic device, the initial design including one or more inputs, one or more outputs, a number of subcomponent regions, and a number of waveguides connecting the subcomponent regions; simulating each subcomponent domain with the design optimization system to determine simulated s-parameters for each subcomponent domain; determining, by the design optimization system, overall s-parameters of a simulated photonic device based on the simulated s-parameters of each subcomponent region and the s-parameters of the waveguide; determining, by the design optimization system, a global gradient associated with the global s-parameter; optimizing, with the design optimization system, one or more subcomponent regions based on the global gradient to generate an updated design of the photonic device; 1. A non-transitory computer-readable medium, comprising:

2. The action is 10. The non-transitory computer-readable medium of claim 1, further comprising repeating the simulating, determining, and optimizing actions until a simulated performance of the simulated photonic device reaches a predetermined threshold or until a predetermined number of iterations have been performed.

3. The action is The non-transitory computer-readable medium of claim 1 , further comprising providing the updated design to a manufacturing system to manufacture the photonic device.

4. The action is retrieving predetermined s-parameters of the waveguide; 2. The non-transitory computer-readable medium of claim 1, wherein determining the overall s-parameters of the simulated photonic device based on the simulated s-parameters of each subcomponent region and the s-parameters of the waveguide comprises using the retrieved predetermined s-parameters of the waveguide.

5. 10. The non-transitory computer-readable medium of claim 1, wherein simulating each subcomponent domain to determine simulated s-parameters for each subcomponent domain comprises simulating each subcomponent domain simultaneously.

6. The non-transitory computer-readable medium of claim 1 , wherein optimizing a subcomponent region comprises updating at least one of a size of the subcomponent region and a structural parameter of the subcomponent region.

7. The action is The non-transitory computer-readable medium of claim 1 , further comprising optimizing at least one of a position and a shape of the at least one waveguide.

8. The non-transitory computer-readable medium of claim 7 , wherein optimizing the position of the at least one waveguide comprises removing at least one waveguide.

9. The action is 10. The non-transitory computer-readable medium of claim 8, further comprising, in response to determining that a subcomponent region is not connected to any waveguides, removing the subcomponent region from the updated design.

10. The action is The non-transitory computer-readable medium of claim 9 , further comprising inserting a predetermined test structure to replace the removed sub-component region.

11. 1. A method for designing a photonic device, the method comprising: receiving, by a design optimization system, an initial design of the photonic device, the initial design including one or more inputs, one or more outputs, a number of subcomponent regions, and a number of waveguides connecting the subcomponent regions; simulating each subcomponent domain with the design optimization system to determine simulated s-parameters for each subcomponent domain; determining, by the design optimization system, overall s-parameters of a simulated photonic device based on the simulated s-parameters of each subcomponent region and the s-parameters of the waveguide; determining, by the design optimization system, a global gradient associated with the global s-parameter; optimizing, by the design optimization system, one or more subcomponent regions based on the global gradient to create an updated design of the photonic device.

12. 12. The method of claim 11 , further comprising repeating the simulating, determining, and optimizing actions until a simulated performance of the simulated photonic device reaches a predetermined threshold or until a predetermined number of iterations have been performed.

13. The method of claim 11 , further comprising providing the updated design to a manufacturing system to manufacture the photonic device.

14. retrieving predetermined s-parameters of the waveguide; 12. The method of claim 11 , wherein determining the overall s-parameters of the simulated photonic device based on the simulated s-parameters of each subcomponent region and the s-parameters of the waveguide comprises using the retrieved predetermined s-parameters of the waveguide.

15. The method of claim 11 , wherein simulating each subcomponent domain to determine simulated s-parameters for each subcomponent domain comprises simulating each subcomponent domain simultaneously.

16. The method of claim 11 , wherein optimizing a subcomponent region comprises updating at least one of a size of the subcomponent region and a structural parameter of the subcomponent region.

17. The method of claim 11 , further comprising optimizing at least one of a position and a shape of the at least one waveguide.

18. 20. The method of claim 17, wherein optimizing the position of the at least one waveguide comprises removing at least one waveguide.

19. 20. The method of claim 18, further comprising, in response to determining that a subcomponent region is no longer connected to any waveguides, removing the subcomponent region from the updated design.

20. 20. The method of claim 19, further comprising adding predetermined test structures to replace the removed sub-component regions.

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