Multilayer substrate
The multilayer substrate design addresses deformation and short circuits by dividing conductor layers into regions with varying thicknesses, particularly reinforcing the cavity area with thicker layers to maintain structural integrity during bonding.
Patent Information
- Application Number
- JP2024526298
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-06-09
- Filing Date
- 2023-05-06
- Publication Date
- 2026-01-14
- Estimated Expiration
- 2043-05-06
AI Technical Summary
The laminated substrate described in Patent Document 1 has a weakened structure where the cavity is provided, leading to potential deformation during thermocompression bonding, which can cause short circuits between conductors.
A multilayer substrate design with a first laminate and a second laminate, where the first conductor layers are divided into three regions - positive, intermediate, and negative - with the positive region layers having greater thickness than the intermediate, and these layers are positioned to reinforce the cavity area, preventing deformation and short circuits.
The design effectively suppresses short circuits and deformation during thermocompression bonding by reinforcing the cavity area with thicker conductor layers, maintaining structural integrity and preventing conductor contact.
Smart Images

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Figure 0007798193000003
Abstract
Description
[Technical Field]
[0001] The present invention relates to a multilayer substrate having a structure in which insulating layers are stacked. [Background technology]
[0002] A known example of a conventional invention relating to a multilayer substrate is the laminated substrate described in Patent Document 1. This laminated substrate has a structure in which multiple dielectric layers are stacked in the vertical direction, and a cavity for mounting electronic components is provided on the top surface of the laminated substrate. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-19643 Summary of the Invention [Problem to be solved by the invention]
[0004] In the laminated substrate described in Patent Document 1, the vertical thickness of the portion of the laminated substrate where the cavity is provided is smaller than the vertical thickness of the portion of the laminated substrate where the cavity is not provided. Therefore, the strength of the portion of the laminated substrate where the cavity is provided is low. As a result, during the thermocompression bonding process of the laminated substrate, the laminated substrate may deform, which may cause the cavity to deform. In this case, a short circuit may occur between conductors provided near the cavity.
[0005] Therefore, an object of the present invention is to prevent short circuits from occurring in a multilayer substrate in which a second laminate is fixed on a first laminate. [Means for solving the problem]
[0006] A multilayer substrate according to one embodiment of the present invention comprises: a first laminate having a structure in which a plurality of first insulator layers are laminated in the Z-axis direction; a second laminate having a structure in which a plurality of second insulator layers are laminated in the Z-axis direction; a plurality of first conductor layers provided on the first laminate; It is equipped with the second stacked body is located in the positive direction of the Z axis of the first stacked body, the second laminate is fixed to the first laminate by bonding the first insulating layer and the second insulating layer together, a first region in which the first stack and the second stack are present as viewed in the Z-axis direction, and a second region in which the first stack is present and the second stack is not present as viewed in the Z-axis direction, The first laminate is divided into three equal parts in the Z-axis direction, and the resulting regions are defined as a positive region, an intermediate region, and a negative region, the positive region, the intermediate region, and the negative region are arranged in this order in the negative direction of the Z axis, the plurality of first conductor layers include one or more positive region first conductor layers and one or more intermediate region first conductor layers; At least a portion of each of the one or more positive region first conductor layers is located in the positive region; the entirety of each of the one or more intermediate region first conductor layers is located in the intermediate region; The thickness in the Z-axis direction of at least one of the one or more positive region first conductor layers is greater than the thickness in the Z-axis direction of the one or more intermediate region first conductor layers. [Effects of the Invention]
[0007] According to the multilayer board of the present invention, the occurrence of short circuits is suppressed in a multilayer board in which a second laminate is fixed on a first laminate. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a cross-sectional view of a multilayer substrate 10. [Figure 2] FIG. 2 is a top view of the multilayer substrate 10. As shown in FIG. [Figure 3]FIG. 3 is a top view of the multilayer substrate 10a. [Figure 4] FIG. 4 is a top view of the multilayer substrate 10b. [Figure 5] FIG. 5 is a top view of the multilayer substrate 10c. [Figure 6] FIG. 6 is a top view of the multilayer substrate 10d. [Figure 7] FIG. 7 is a cross-sectional view of the multilayer substrate 10e. [Figure 8] FIG. 8 is a cross-sectional view of the multilayer substrate 10f. [Figure 9] FIG. 9 is a cross-sectional view of the multilayer substrate 10g. [Figure 10] FIG. 10 is a cross-sectional view of the multilayer substrate 10h. [Figure 11] FIG. 11 is a cross-sectional view of the multilayer substrate 10i. [Figure 12] FIG. 12 is a cross-sectional view of the multilayer substrate 10j. [Figure 13] FIG. 13 is a cross-sectional view of the multilayer substrate 10k. [Figure 14] FIG. 14 is a cross-sectional view of the multilayer substrate 10l. [Figure 15] FIG. 15 is a cross-sectional view of the multilayer substrate 10m. [Figure 16] FIG. 16 is a top view of the multilayer substrate 10m. DETAILED DESCRIPTION OF THE INVENTION
[0009] (Embodiment) [Electronic device structure] The structure of a multilayer substrate 10 according to an embodiment of the present invention will be described below with reference to the drawings. Fig. 1 is a cross-sectional view of the multilayer substrate 10. Fig. 2 is a top view of the multilayer substrate 10.
[0010] In this specification, directions are defined as follows: The direction in which the first insulator layers 16a to 16f are stacked is defined as the up-down direction. The up-down direction coincides with the Z-axis direction. Directions perpendicular to the up-down direction are defined as the left-right direction and the front-rear direction. The left-right direction and the front-rear direction are perpendicular to each other. Note that the up-down direction, the front-rear direction, and the left-right direction in this embodiment do not necessarily coincide with the up-down direction, the front-rear direction, and the left-right direction when the multilayer substrate 10 is in use.
[0011] Hereinafter, X is a component or member of the multilayer substrate 10. In this specification, unless otherwise specified, each part of X is defined as follows: The front part of X means the front half of X. The rear part of X means the rear half of X. The left part of X means the left half of X. The right part of X means the right half of X. The upper part of X means the upper half of X. The lower part of X means the lower half of X. The front end of X means the front end of X. The rear end of X means the rear end of X. The left end of X means the left end of X. The right end of X means the right end of X. The upper end of X means the upper end of X. The lower end of X means the lower end of X. The front end of X means the front end of X and its vicinity. The rear end of X means the rear end of X and its vicinity. The left end of X means the left end of X and its vicinity. The right end of X means the right end of X and its vicinity. The upper end of X means the upper end of X and its vicinity. The lower end of X means the lower end of X and its vicinity.
[0012] First, the structure of a multilayer substrate 10 will be described with reference to Figures 1 and 2. The multilayer substrate 10 is used in a wireless communication terminal such as a smartphone. As shown in Figure 1, the multilayer substrate 10 includes a first laminate 12a, a second laminate 12b, a protective layer 18, first conductor layers 20a to 20f, and second conductor layers 21a to 21e.
[0013] As shown in Fig. 2, the first laminate 12a has a plate shape with upper and lower main surfaces aligned in the vertical direction. As shown in Fig. 1, the first laminate 12a has a structure in which first insulator layers 16a to 16f are stacked in the vertical direction (Z-axis direction). The first insulator layers 16a to 16f are aligned in this order from top to bottom. The first insulator layers 16a to 16f are fused together with adjacent layers in the vertical direction. The material of the first insulator layers 16a to 16f is, for example, a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer.
[0014] The first conductor layers 20a to 20f are provided on the first laminate 12a. The first conductor layers 20a to 20f are arranged in this order from top to bottom. The first conductor layer 20a (the most positive first conductor layer) is located at the top (positive direction of the Z axis) of the conductor layers in the first laminate 12a. In this embodiment, each of the first conductor layers 20a to 20f is fixed to the lower main surfaces of the first insulating layers 16a to 16f. Each of the first conductor layers 20a to 20f has a first main surface S1 and a second main surface S2 having a surface roughness greater than that of the first main surface S1. The surface roughness is, for example, an arithmetic surface roughness. In this specification, a main surface having a greater surface roughness is indicated by a thick line. In this embodiment, the first main surface S1 is located below the second main surface S2. The second main surfaces S2 of the first conductor layers 20a-20f are in contact with the lower main surfaces of the first insulator layers 16a-16f, respectively. As a result, the second main surfaces S2 of any of the first conductor layers 20a-20f are in contact with all of the first insulator layers 16a-16f. Each of the first conductor layers 20a-20f is fixed to the first insulator layers 16a-16f by the anchor effect.
[0015] The first conductor layers 20a to 20f are connected by interlayer connection conductors (not shown), thereby forming an electric circuit.
[0016] The first conductor layers 20a to 20f are formed by patterning metal foil attached to the lower main surfaces of the first insulating layers 16a to 16f. The metal foil is, for example, copper foil.
[0017] The protective layer 18 serves to protect the first conductor layer 20f, which will be described later. The protective layer 18 covers the lower surface (the surface located in the negative direction of the Z axis) of the first laminate 12a. However, the second main surfaces S2 of the first conductor layers 20a to 20f do not contact the protective layer 18. The material of the protective layer 18 is different from the material of the first insulator layers 16a to 16f. The protective layer 18 is not included in the first laminate 12a.
[0018] As shown in Fig. 2, the second laminate 12b has a plate shape with upper and lower main surfaces aligned in the vertical direction. As shown in Fig. 1, the second laminate 12b has a structure in which second insulator layers 17a to 17e are stacked in the vertical direction (Z-axis direction). The second insulator layers 17a to 17e are aligned in this order from top to bottom. The second insulator layers 17a to 17e are fused together with adjacent layers in the vertical direction. The second insulator layers 17a to 17e are made of, for example, a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer.
[0019] The second laminate 12b is located above the first laminate 12a (in the positive direction of the Z axis). The second laminate 12b is fixed to the first laminate 12a by bonding the first insulator layer 16a and the second insulator layer 17e. In this embodiment, the first insulator layer 16a and the second insulator layer 17e are fused together.
[0020] The second laminate 12b has a ring shape when viewed in the vertical direction. In this embodiment, the second laminate 12b has rectangular outer and inner edges when viewed in the vertical direction. The second laminate 12b overlaps a portion of the first laminate 12a when viewed in the vertical direction. As a result, when viewed in the vertical direction (Z-axis direction), there is a first region A1 where the first laminate 12a and the second laminate 12b are present, and a second region A2 where the first laminate 12a is present but the second laminate 12b is not present when viewed in the vertical direction (Z-axis direction). The second region A2 is surrounded by the first region A1 when viewed in the vertical direction. As a result, a cavity C is formed in the multilayer substrate 10.
[0021] The second conductor layers 21a to 21e are provided on the second laminate 12b. In this embodiment, the second conductor layers 21a to 21e are fixed to the lower main surfaces of the second insulating layers 17a to 17e, respectively. The second conductor layers 21a to 21e are electrically connected by interlayer connection conductors (not shown). As a result, the second conductor layers 21a to 21e form, for example, one or more coils. In this case, the second conductor layers 21a to 21e located in the left first region A1 form one coil. The second conductor layers 21a to 21e located in the right first region A1 form one coil. Furthermore, the second conductor layers 21a to 21e are electrically connected to at least one of the first conductor layers 20a to 20f by the interlayer connection conductors (not shown).
[0022] The second conductor layers 21a to 21e are formed by patterning metal foil attached to the lower main surfaces of the second insulating layers 17a to 17e. The metal foil is, for example, copper foil.
[0023] The regions obtained by dividing the first laminate 12a into three equal parts in the vertical direction (Z-axis direction) are defined as a positive region A11, an intermediate region A12, and a negative region A13. The positive region A11, the intermediate region A12, and the negative region A13 are arranged in this order downward (negative direction of the Z-axis).
[0024] The first conductor layers 20a to 20f include one or more positive region first conductor layers, one or more intermediate region first conductor layers, and one or more negative region first conductor layers. In this embodiment, the one or more positive region first conductor layers are first conductor layers 20a and 20b. The one or more intermediate region first conductor layers is first conductor layer 20c. The one or more negative region first conductor layers are first conductor layers 20d to 20f.
[0025] At least a portion of each of the first conductor layers 20a, 20b (one or more positive region first conductor layers) is located in the positive region A11. In this embodiment, the entire first conductor layer 20a is located in the positive region A11. A portion of the first conductor layer 20b is located in the positive region A11. Furthermore, at least one of the first conductor layers 20a, 20b (one or more positive region first conductor layers) overlaps with the boundary B between the first region A1 and the second region A2 when viewed in the vertical direction (Z-axis direction). In this embodiment, the first conductor layers 20a, 20b overlap with the boundary B between the first region A1 and the second region A2 when viewed in the vertical direction.
[0026] The entire first conductor layer 20c (intermediate region first conductor layer) is located in the intermediate region A12.
[0027] At least a portion of each of the first conductor layers 20d to 20f (one or more negative region first conductor layers) is located in the negative region A13. In this embodiment, the entire first conductor layer 20e is located in the negative region A13. Portions of the first conductor layers 20d and 20f are located in the negative region A13.
[0028] The thickness in the vertical direction (Z-axis direction) of the first conductor layer 20a (the most positive first conductor layer, one or more positive region first conductor layers) and the first conductor layer 20b (one or more positive region first conductor layers) is greater than the thickness in the vertical direction (Z-axis direction) of the first conductor layer 20c (one or more intermediate region first conductor layers). In this specification, the vertical thickness of a conductor layer refers to the thickness in the normal direction to the main surface of the conductor layer. Therefore, if the conductor layer is curved, the vertical direction will deviate from the vertical direction in the drawings. The vertical thickness of the first conductor layers 20d to 20f is the same as the vertical thickness of the first conductor layer 20c. Note that in this specification, the phrase "the vertical thickness of the first conductor layers 20a, 20b is greater than the vertical thickness of the first conductor layer 20c" does not include cases where the vertical thickness of the first conductor layers 20a, 20b is greater than the vertical thickness of the first conductor layer 20c due to manufacturing errors. The manufacturing error is, for example, 10% of the thickness of the first conductor layer 20c in the vertical direction.
[0029] [effect] According to the multilayer substrate 10, it is possible to prevent short circuits from occurring in the multilayer substrate 10 in which the second laminate 12b is fixed on the first laminate 12a. More specifically, the vertical thickness of the portion of the multilayer substrate 10 in which the cavity C is provided is smaller than the vertical thickness of the portion of the multilayer substrate 10 in which the cavity C is not provided. Therefore, the strength of the portion of the multilayer substrate 10 in which the cavity C is provided tends to be low.
[0030] Therefore, at least a portion of each of the first conductor layers 20a, 20b is located in the positive region A11. The vertical thickness of the first conductor layers 20a, 20b is greater than the vertical thickness of the first conductor layer 20c. As a result, the first conductor layers 20a, 20b, which have high strength, are located near the upper main surface of the first laminate 12a. That is, the first conductor layers 20a, 20b, which have high strength, are located near the bottom surface of the cavity C. As a result, during a thermocompression bonding process of the first laminate 12a and the second laminate 12b, the area near the bottom surface of the cavity C is less likely to deform, and the cavity C is less likely to deform. Therefore, the occurrence of short circuits between the first conductor layers 20a-20f provided near the cavity C is suppressed.
[0031] In the multilayer substrate 10, during the thermocompression bonding process of the first laminate 12a and the second laminate 12b, large deformation of the multilayer substrate 10 is suppressed. More specifically, during the thermocompression bonding process of the first laminate 12a and the second laminate 12b, large forces are concentrated at the boundary B between the first region A1 and the second region A2. Therefore, the multilayer substrate 10 is likely to deform large at the boundary B.
[0032] Therefore, the first conductor layers 20a and 20b overlap the boundary B between the first region A1 and the second region A2 when viewed in the vertical direction. The vertical thickness of the first conductor layers 20a and 20b is greater than the vertical thickness of the first conductor layer 20c, so the first conductor layers 20a and 20b have high strength. As a result, significant deformation of the multilayer substrate 10 at the boundary B is suppressed.
[0033] (First to fourth modified examples) Multilayer substrates 10a to 10d according to first to fourth modifications will be described below with reference to the drawings. Figures 3 to 6 are top views of multilayer substrates 10a to 10d.
[0034] 3, in the multilayer substrate 10a, the second laminate 12b has an angular U-shape when viewed in the vertical direction. As a result, the first region A1 is located in a portion of the periphery of the second region A2 when viewed in the vertical direction. The first region A1 is not located in front of the second region A2.
[0035] 4, in the multilayer substrate 10b, the second laminate 12b has an L-shape when viewed in the vertical direction. As a result, the first region A1 is located in a portion of the periphery of the second region A2 when viewed in the vertical direction. The first region A1 is not located in front of or to the right of the second region A2.
[0036] In the multilayer substrate 10c, as shown in FIG. 5, a first region A1 and a second region A2 are arranged side by side in the vertical direction.
[0037] 6, the multilayer substrate 10d has two first regions A1a and A1b when viewed in the vertical direction. The second region A2 is located between the first region A1a and the first region A1b when viewed in the vertical direction.
[0038] (Fifth Modification) A multilayer substrate 10e according to a fifth modified example will be described below with reference to the drawings. Fig. 7 is a cross-sectional view of the multilayer substrate 10e.
[0039] The multilayer substrate 10e differs from the multilayer substrate 10 in that the vertical thickness of the first conductor layer 20a is smaller than the vertical thickness of the first conductor layer 20b. The vertical thickness of the first conductor layer 20a is equal to the vertical thickness of the first conductor layers 20c to 20f. The other structure of the multilayer substrate 10e is the same as that of the multilayer substrate 10. 10 The multilayer substrate 10e can achieve the same effects as the multilayer substrate 10.
[0040] Furthermore, in the multilayer substrate 10e, the first conductor layer 20b located below the first conductor layers 20a and 20b located in the positive region A11 has a large thickness in the vertical direction. This reduces deformation of the first laminate 12a in the intermediate region A12 and the negative region A13 of the first laminate 12a. Furthermore, because deformation of the first laminate 12a is reduced near the first conductor layer 20b, short circuits are less likely to occur in the first conductor layer 20a located above the first conductor layer 20b.
[0041] (Sixth Modification) A multilayer substrate 10f according to a sixth modified example will be described below with reference to the drawings. Figure 8 is a cross-sectional view of the multilayer substrate 10f.
[0042] The multilayer substrate 10f differs from the multilayer substrate 10e in that the vertical thickness of the first conductor layer 20e located in the negative region A13 is greater than the vertical thickness of the first conductor layer 20c located in the intermediate region A12. As such, the other structure of the multilayer substrate 10f is the same as that of the multilayer substrate 10e, and therefore a description thereof will be omitted. The multilayer substrate 10f can achieve the same effects as the multilayer substrate 10e.
[0043] Furthermore, in the multilayer substrate 10f, the first conductor layer 20e located in the negative area A13 has a large thickness in the vertical direction, which reduces deformation of the first laminate 12a in the negative area A13 of the first laminate 12a.
[0044] In the multilayer substrate 10f, the vertical thickness of the first conductor layers 20b and 20e is greater than the vertical thickness of the first conductor layer 20c, which makes the first region A1 have a vertically symmetrical structure, making it less likely for the first laminate 12a to warp.
[0045] (Seventh Modification) A multilayer substrate 10g according to a seventh modification will be described below with reference to the drawings. Fig. 9 is a cross-sectional view of the multilayer substrate 10g.
[0046] The multilayer substrate 10g differs from the multilayer substrate 10f in that the thicknesses in the vertical direction (Z-axis direction) of the second conductor layers 21a, 21e located at both ends in the vertical direction (Z-axis direction) of the second conductor layers 21a-21e are greater than the thicknesses in the vertical direction (Z-axis direction) of the remaining second conductor layers 21b-21d. This makes the second laminate 12b less likely to deform. The other structure of the multilayer substrate 10g is the same as that of the multilayer substrate 10f, so a description thereof will be omitted. The multilayer substrate 10g can achieve the same effects as the multilayer substrate 10f.
[0047] In the multilayer substrate 10g, the vertical thickness of the first conductor layers 20b and 20e is greater than the vertical thickness of the first conductor layer 20c, which makes the first region A1 have a vertically symmetrical structure, making it less likely for the first laminate 12a to warp.
[0048] (Eighth Modification) A multilayer substrate 10h according to an eighth modification will be described below with reference to the drawings. Fig. 10 is a cross-sectional view of the multilayer substrate 10h.
[0049] The multilayer substrate 10h differs from the multilayer substrate 10f in that the vertical thicknesses of the first conductor layers 20a, 20b located in the positive region A11 and the first conductor layers 20d-20f located in the negative region A13 are greater than the vertical thickness of the first conductor layer 20c located in the intermediate region A12. This makes the first laminate 12a less likely to deform. The other structure of the multilayer substrate 10h is the same as that of the multilayer substrate 10f, so a description thereof will be omitted. The multilayer substrate 10h can achieve the same effects as the multilayer substrate 10f.
[0050] (Ninth Modification) A multilayer substrate 10i according to a ninth modification will be described below with reference to the drawings. Fig. 11 is a cross-sectional view of the multilayer substrate 10i.
[0051] The multilayer substrate 10i differs from the multilayer substrate 10 in that the vertical thickness of the first conductor layer 20a is greater than the vertical thickness of the first conductor layers 20b to 20f. This makes the vicinity of the upper main surface of the first conductor layer 20a less likely to deform. As a result, deformation of the cavity C is effectively suppressed. The other structure of the multilayer substrate 10i is the same as that of the multilayer substrate 10, so a description thereof will be omitted. The multilayer substrate 10i can achieve the same effects as the multilayer substrate 10.
[0052] (Tenth Modification) A multilayer substrate 10j according to a tenth modification will be described below with reference to the drawings. Fig. 12 is a cross-sectional view of the multilayer substrate 10j.
[0053] The multilayer substrate 10j differs from the multilayer substrate 10 in that it further includes a third laminate 12c. The third laminate 12c has the same structure as the second laminate 12b. The third laminate 12c is located below the first laminate 12a (in the negative direction of the Z axis). The third laminate 12c is fixed to the first laminate 12a by bonding the first insulator layer 16f and the third insulator layer 19a. In this embodiment, the first insulator layer 16f and the third insulator layer 19a are fused together. The other structure of the multilayer substrate 10j is the same as that of the multilayer substrate 10, so a description thereof will be omitted. The multilayer substrate 10j can achieve the same effects as the multilayer substrate 10.
[0054] (Eleventh Modification) A multilayer substrate 10k according to an eleventh modification will be described below with reference to the drawings. Fig. 13 is a cross-sectional view of the multilayer substrate 10k.
[0055] The multilayer substrate 10k differs from the multilayer substrate 10 in the following points. The first conductor layer 20a is located on the upper main surface (main surface located in the positive direction of the Z axis) of the first insulator layer 16a, which is located highest (in the positive direction of the Z axis) among the first insulator layers 16a to 16f. The first conductor layer 20f is located on the lower main surface (main surface located in the negative direction of the Z axis) of the first insulator layer 16f, which is located lowest (in the negative direction of the Z axis) among the first insulator layers 16a to 16f.
[0056] More specifically, a first conductor layer 20a is fixed to the upper main surface of the first insulator layer 16a. A first conductor layer 20f is fixed to the lower main surface of the first insulator layer 16f. A protective layer 18a is laminated on the first insulator layer 16a. A protective layer 18b is laminated below the first insulator layer 16f. However, no conductor layer is located on the upper main surface of the protective layer 18a or the lower main surface of the protective layer 18b. The rest of the structure of the multilayer substrate 10k is the same as that of the multilayer substrate 10. The multilayer substrate 10k can achieve the same effects as the multilayer substrate 10.
[0057] (12th Modification) A multilayer substrate 10l according to a twelfth modification will be described below with reference to the drawings. Fig. 14 is a cross-sectional view of the multilayer substrate 10l.
[0058] Multilayer substrate 10l differs from multilayer substrate 10 in that the vertical thickness T1 of the portion of first insulator layer 16a (the most positive first insulator layer) that contacts first conductor layer 20a (the negative side adjacent first conductor layer) is smaller than the vertical thickness of first conductor layer 20a.
[0059] More specifically, the first insulator layer 16a is located at the top of the insulator layers in the first laminate 12a. That is, the first insulator layer 16a is joined to the second insulator layer 17e of the second laminate 12b and forms the bottom surface of the cavity C. The first conductor layer 20a is in contact with the lower main surface of the first insulator layer 16a and is located directly below the first insulator layer 16a. The first insulator layers 16a and 16b are arranged so that the vertical thickness T1 of the portion of the first insulator layer 16a that is in contact with the first conductor layer 20a is smaller than the vertical thickness of the first conductor layer 20a. This increases the rigidity near the bottom surface of the cavity C. As a result, deformation of the cavity C is more effectively suppressed when stress is applied to the multilayer substrate 10l or when the first laminate 12a and the second laminate 12b are thermocompression bonded. The other structure of the multilayer substrate 10l is the same as that of the multilayer substrate 10, and therefore a description thereof will be omitted. The multilayer substrate 10l can achieve the same effects as the multilayer substrate 10.
[0060] (13th Modification) A multilayer substrate 10m according to a thirteenth modified example will be described below with reference to the drawings. Fig. 15 is a cross-sectional view of the multilayer substrate 10m. Fig. 16 is a top view of the multilayer substrate 10m.
[0061] The multilayer substrate 10m differs from the multilayer substrate 10 mainly in the following points. The thickness of the first stack 12a in the vertical direction is smaller than the thickness of the second stack 12b in the vertical direction. The second area A2 surrounds the first area A1 when viewed in the vertical direction.
[0062] More specifically, the first laminate 12a includes first insulating layers 16a-16d stacked in the vertical direction and first conductor layers 20a-20d fixed to the lower main surfaces of the first insulating layers 16a-16d. The second laminate 12b includes second insulating layers 17a-17f stacked in the vertical direction and second conductor layers 21a-21f fixed to the lower main surfaces of the second insulating layers 17a-17f. With this structure, the vertical thickness of the first laminate 12a is smaller than the vertical thickness of the second laminate 12b. As shown in FIG. 16, the first laminate 12a surrounds the second laminate 12b in the vertical direction. As a result, the second region A2 surrounds the first region A1 in the vertical direction. In the multilayer substrate 10m, the vertical thickness of the first laminate 12a is smaller than the vertical thickness of the second laminate 12b, thereby increasing the flexibility of the second region A2. The other structures of the multilayer substrate 10m are the same as those of the multilayer substrate 10, so a description thereof will be omitted. The multilayer substrate 10m can achieve the same effects as the multilayer substrate 10.
[0063] (Other embodiments) The multilayer substrate according to the present invention is not limited to multilayer substrates 10, 10a to 10m, and can be modified within the scope of the invention. The configurations of multilayer substrates 10, 10a to 10m may be combined arbitrarily.
[0064] The number of first conductor layers 20c (intermediate region first conductor layers) located in the intermediate region A12 may be two or more. In this case, each of the two or more intermediate region first conductor layers is entirely located in the intermediate region A12.
[0065] The vertical thickness of at least one of the positive-region first conductor layers needs to be greater than the vertical thickness of one or more of the intermediate-region first conductor layers. Therefore, the vertical thickness of one positive-region first conductor layer may be greater than the vertical thickness of one or more of the intermediate-region first conductor layers, or the vertical thickness of two or more positive-region first conductor layers may be greater than the vertical thickness of one or more of the intermediate-region first conductor layers.
[0066] The first insulator layers 16a to 16f do not have to be made of a single material. For example, the first insulator layer 16b may be an adhesive layer that bonds the first insulator layer 16a to the first insulator layer 16c. In this case, the materials of the first insulator layers 16a and 16c are different from the material of the first insulator layer 16b.
[0067] The number of positive region first conductor layers is not limited to 2. The number of positive region first conductor layers may be 1, or may be 3 or more.
[0068] The number of negative region first conductor layers is not limited to 3. The number of negative region first conductor layers may be 1 or 2, or may be 4 or more.
[0069] For example, in the multilayer substrate 10, the vertical thicknesses of the first insulator layers 16a-16f and the second insulator layers 17a-17e are uniform. In the multilayer substrate 101, the vertical thicknesses of the first insulator layers 16a and 16b are different from each other and are also different from the vertical thicknesses of the first insulator layers 16c-16f and the second insulator layers 17a-17e. In this way, the vertical thicknesses of the first insulator layers 16a-16f and the second insulator layers 17a-17f may or may not be uniform.
[0070] The protective layers 18, 18a, and 18b may have openings through which the conductive layers are exposed for connection with other elements.
[0071] The present invention has the following structure.
[0072] (1) a first laminate having a structure in which a plurality of first insulator layers are laminated in the Z-axis direction; a second laminate having a structure in which a plurality of second insulator layers are laminated in the Z-axis direction; a plurality of first conductor layers provided on the first laminate; It is equipped with the second stacked body is located in the positive direction of the Z axis of the first stacked body, the second laminate is fixed to the first laminate by bonding the first insulating layer and the second insulating layer together, a first region in which the first stack and the second stack are present as viewed in the Z-axis direction, and a second region in which the first stack is present and the second stack is not present as viewed in the Z-axis direction, The first laminate is divided into three equal parts in the Z-axis direction, and the resulting regions are defined as a positive region, an intermediate region, and a negative region, the positive region, the intermediate region, and the negative region are arranged in this order in the negative direction of the Z axis, the plurality of first conductor layers include one or more positive region first conductor layers and one or more intermediate region first conductor layers; At least a portion of each of the one or more positive region first conductor layers is located in the positive region; the entirety of each of the one or more intermediate region first conductor layers is located in the intermediate region; a thickness in the Z-axis direction of at least one of the one or more positive region first conductor layers is greater than a thickness in the Z-axis direction of the one or more intermediate region first conductor layers; Multilayer board.
[0073] (2) the plurality of first insulator layers include a most positive first insulator layer, and the most positive first insulator layer is located furthest in the positive direction of the Z axis among the insulator layers in the first stacked body; the plurality of first conductor layers include a negative-side adjacent first conductor layer, and the negative-side adjacent first conductor layer is in contact with a principal surface of the most positive first insulator layer that is located in the negative direction of the Z axis; a thickness in the Z-axis direction of a portion of the most positive first insulator layer that contacts the negative-side adjacent first conductor layer is smaller than a thickness in the Z-axis direction of the negative-side adjacent first conductor layer; The multilayer substrate according to (1).
[0074] (3) the plurality of first conductor layers include a most positive first conductor layer, and the most positive first conductor layer is located furthest in the positive direction of the Z axis among the conductor layers in the first laminate; The thickness of the most positive first conductor layer in the Z-axis direction is greater than the thickness of the one or more intermediate region first conductor layers in the Z-axis direction. The multilayer substrate according to (1) or (2).
[0075] (4) Each of the plurality of first conductor layers has a first main surface and a second main surface having a surface roughness greater than a surface roughness of the first main surface, the second main surface of any one of the first conductor layers is in contact with all of the first insulator layers; A multilayer substrate according to any one of (1) to (3).
[0076] (5) the first conductor layer is located on a main surface, located in the positive direction of the Z axis, of a first insulator layer, located furthest in the positive direction of the Z axis, among the plurality of first insulator layers; the first conductor layer is located on a main surface, located in the negative direction of the Z axis, of the first insulator layer, which is located furthest in the negative direction of the Z axis among the plurality of first insulator layers; A multilayer substrate according to any one of (1) to (4).
[0077] (6) The multilayer substrate comprises: a protective layer covering a surface of the first stacked body located in the negative direction of the Z axis, It also has the second main surface of the first conductor layer is not in contact with the protective layer; (4) The multilayer substrate according to (4).
[0078] (7) the plurality of first conductor layers include one or more negative region first conductor layers; at least a portion of each of the one or more negative region first conductor layers is located in the negative region; a thickness in the Z-axis direction of at least one of the one or more negative region first conductor layers is greater than a thickness in the Z-axis direction of the one or more intermediate region first conductor layers; A multilayer substrate according to any one of (1) to (6).
[0079] (8) At least one of the one or more positive region first conductor layers overlaps the boundary between the first region and the second region when viewed in the Z-axis direction. A multilayer substrate according to any one of (1) to (7).
[0080] (9) The multilayer substrate comprises: A plurality of second conductor layers provided on the second laminate, It also has the thickness in the Z-axis direction of the second conductor layers located at both ends in the Z-axis direction among the plurality of second conductor layers is greater than the thickness in the Z-axis direction of the remaining second conductor layers; A multilayer substrate according to any one of (1) to (8).
[0081] (10) The thickness of the first stacked body in the Z-axis direction is smaller than the thickness of the second stacked body in the Z-axis direction. A multilayer substrate according to any one of (1) to (9). [Explanation of symbols]
[0082] 10,10a~10m: Multilayer board 12a: First laminate 12b: Second laminate 12c: Third laminate 16a to 16f: first insulating layer 17a to 17f: second insulating layer 18,18a,18b: Protective layer 19a: Third insulating layer 20a to 20f: First conductor layer 21a to 21f: second conductor layer A1:First area A11: Positive area A12: Intermediate area A13: Negative area A2:Second area B: Boundary C: Cavity S1: First main surface S2: 2nd principal surface
Claims
1. a first stack having a structure in which a plurality of first insulator layers are stacked in the Z-axis direction; a second stack having a structure in which a plurality of second insulator layers are stacked in the Z-axis direction; a plurality of first conductor layers provided on the first laminate; It is equipped with the second stacked body is located in the positive direction of the Z axis of the first stacked body, the second stacked body is fixed to the first stacked body by bonding the first insulating layer and the second insulating layer together, a first region in which the first stack and the second stack are present as viewed in the Z-axis direction, and a second region in which the first stack is present and the second stack is not present as viewed in the Z-axis direction, The first laminated body is divided into three equal parts in the Z-axis direction, and the resulting regions are defined as a positive region, an intermediate region, and a negative region, the positive region, the intermediate region, and the negative region are arranged in this order in the negative direction of the Z axis, the plurality of first conductor layers include one or more positive region first conductor layers and one or more intermediate region first conductor layers; At least a portion of each of the one or more positive region first conductor layers is located in the positive region; each of the one or more intermediate region first conductor layers is entirely located in the intermediate region; a thickness in the Z-axis direction of at least one of the one or more regular region first conductor layers is greater than a thickness in the Z-axis direction of the one or more intermediate region first conductor layers; Multilayer board.
2. the plurality of first insulator layers include a most positive first insulator layer, and the most positive first insulator layer is located furthest in the positive direction of the Z axis among the insulator layers in the first stacked body; the plurality of first conductor layers include a negative-side adjacent first conductor layer, and the negative-side adjacent first conductor layer is in contact with a principal surface of the most positive first insulator layer that is located in the negative direction of the Z axis; a thickness in the Z-axis direction of a portion of the most positive first insulator layer that contacts the negative-side adjacent first conductor layer is smaller than a thickness in the Z-axis direction of the negative-side adjacent first conductor layer; The multilayer substrate according to claim 1 .
3. the plurality of first conductor layers include a most positive first conductor layer, and the most positive first conductor layer is located furthest in the positive direction of the Z axis among the conductor layers in the first stacked body; a thickness of the most positive first conductor layer in the Z-axis direction is greater than a thickness of the one or more intermediate region first conductor layers in the Z-axis direction; The multilayer substrate according to claim 1 or 2.
4. Each of the plurality of first conductor layers has a first main surface and a second main surface having a surface roughness greater than a surface roughness of the first main surface, the second main surface of any one of the first conductor layers is in contact with all of the first insulator layers; The multilayer substrate according to claim 1 or 2.
5. the first conductor layer is located on a main surface, located in the positive direction of the Z-axis, of a first insulator layer, located furthest in the positive direction of the Z-axis among the plurality of first insulator layers; the first conductor layer is located on a main surface, located in the negative direction of the Z-axis, of a first insulator layer, located furthest in the negative direction of the Z-axis, among the plurality of first insulator layers; The multilayer substrate according to claim 1 or 2.
6. The multilayer substrate comprises: a protective layer covering a surface of the first stacked body located in the negative direction of the Z axis, It also has the second main surface of the first conductor layer is not in contact with the protective layer; The multilayer substrate according to claim 4 .
7. the plurality of first conductor layers include one or more negative region first conductor layers; at least a portion of each of the one or more negative region first conductor layers is located in the negative region; a thickness in the Z-axis direction of at least one of the one or more negative region first conductor layers is greater than a thickness in the Z-axis direction of the one or more intermediate region first conductor layers; The multilayer substrate according to claim 1 or 2.
8. At least one of the one or more positive region first conductor layers overlaps the boundary between the first region and the second region when viewed in the Z-axis direction. The multilayer substrate according to claim 1 or 2.
9. The multilayer substrate comprises: A plurality of second conductor layers provided on the second laminate, It also has the thickness in the Z-axis direction of the second conductor layers located at both ends in the Z-axis direction among the plurality of second conductor layers is greater than the thickness in the Z-axis direction of the remaining second conductor layers; The multilayer substrate according to claim 1 or 2.
10. The thickness of the first stacked body in the Z-axis direction is smaller than the thickness of the second stacked body in the Z-axis direction. The multilayer substrate according to claim 1 or 2.
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