Switching control circuits, power supply circuits

Abstract

To provide a switching control circuit and a power source circuit in which a current supplied by an internal regulator is restricted.SOLUTION: A switching power source circuit includes a transformer including a primary coil and an auxiliary coil for generating a voltage according to a current flowing through the primary coil, a first switching element for controlling a current flowing through the primary coil, and a switching control circuit 40. The switching control circuit includes a signal output circuit including a driving signal generation circuit that generates a driving signal on the basis of a feedback voltage Vfb corresponding to an output voltage, and a first driving circuit for switching the first switching element on the basis of the driving signal, and regulators 330, 331 that generate a second power source voltage Vreg of a target level for operating the first driving circuit and a driving current Ireg of the first driving circuit by using a first power source voltage Vcc of a first capacitor which is charged with a current from the auxiliary coil. When the driving current reaches a first prescribed value, the regulators are controlled to reduce the driving current.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a switching control circuit and a power supply circuit. [Background technology]

[0002] Some power supply circuits include a coil, an auxiliary coil electromagnetically coupled to the coil, a switching element that controls the current flowing through the coil, and a switching control circuit that switches the switching element. Some switching control circuits operate on a power supply voltage generated from a voltage generated in the auxiliary coil in response to the current flowing through the coil (for example, Patent Documents 1 to 8). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-115998 [Patent Document 2] Japanese Patent Application Laid-Open No. 2001-086742 [Patent Document 3] Japanese Patent Application Laid-Open No. 2010-273432 [Patent Document 4] Japanese Patent Application Laid-Open No. 2012-120316 [Patent Document 5] Japanese Patent Application Laid-Open No. 2014-138458 [Patent Document 6] Japanese Patent Application Publication No. 2018-191391 [Patent Document 7] Japanese Patent Application Publication No. 2019-088136 [Patent Document 8] Patent Publication No. 2021-125941 Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, when the switching control circuit is configured as a module, the above-mentioned power supply voltage may be generated by a regulator external to the module by receiving voltage from the auxiliary coil. Generally, providing an external regulator increases the number of components required to configure the power supply circuit, which can increase the cost of the power supply circuit. Therefore, the regulator may be provided inside the module. However, when a regulator is provided inside the module, if the regulator's output current becomes large, heat generation in the module may occur.

[0005] The present invention has been made in view of the above-mentioned problems in the prior art, and an object of the present invention is to provide a switching control circuit that limits the current supplied by an internal regulator. [Means for solving the problem]

[0006] The switching control circuit of the present invention, which solves the above-mentioned problems, is a switching control circuit that controls the switching of the first switching element of a power supply circuit that generates an output voltage from an input voltage, and includes a first coil, a second coil that generates a voltage according to the current flowing through the first coil, and a first switching element that controls the current flowing through the first coil.The switching control circuit includes a drive signal generation circuit that generates a drive signal based on a feedback voltage that corresponds to the output voltage, a first drive circuit that switches the first switching element based on the drive signal, a regulator that generates a second power supply voltage of a target level for operating the first drive circuit and a drive current for the first drive circuit using a first power supply voltage of a first capacitor that is charged with the current from the second coil, and a control circuit that controls the regulator so that the drive current becomes smaller when the drive current reaches a first predetermined value.

[0007] The power supply circuit of the present invention, which solves the above-mentioned problems, is a power supply circuit that generates an output voltage from an input voltage, and includes a first coil, a second coil that generates a voltage corresponding to the current flowing through the first coil, a first switching element that controls the current flowing through the first coil, and a switching control circuit that controls the switching of the first switching element, wherein the switching control circuit includes a drive signal generation circuit that generates a drive signal based on a feedback voltage that corresponds to the output voltage, a first drive circuit that switches the first switching element based on the drive signal, a regulator that generates a second power supply voltage of a target level for operating the first drive circuit and a drive current for the first drive circuit, using a first power supply voltage of a first capacitor that is charged with current from the second coil, and a control circuit that controls the regulator to reduce the drive current when the drive current reaches a first predetermined value. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a switching control circuit that limits the current supplied by the internal regulator. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a diagram illustrating an example of a switching power supply circuit 10. FIG. [Figure 2] FIG. 2 is a diagram showing an example of a chip configuration of a switching control circuit 40. [Figure 3] FIG. 2 is a diagram showing an example of a circuit configuration of a switching control circuit 40. [Figure 4] FIG. 2 is a diagram illustrating an example of a start-up circuit 300. [Figure 5] FIG. 3 is a diagram illustrating an example of a power supply circuit 320. [Figure 6] FIG. 10 is a diagram illustrating an example of a signal output circuit 370. [Figure 7] FIG. 4 is a diagram illustrating an example of an operation when the switching control circuit 40 is started up. [Figure 8] 4 is a diagram for explaining a current when the switching control circuit 40 is started. FIG. [Figure 9] FIG. 10 is a diagram showing an example of the waveform of a drive current Ireg. DETAILED DESCRIPTION OF THE INVENTION

[0010] At least the following matters will become clear from the description of this specification and the accompanying drawings.

[0011] =====This embodiment===== <<<Outline of Switching Power Supply Circuit 10>>> 1 is a diagram showing an example of the configuration of a switching power supply circuit 10 according to one embodiment of the present invention. The switching power supply circuit 10 is an LLC current resonance type power supply circuit that generates an output voltage Vout of a target level to a load 11 from a predetermined input voltage Vin.

[0012] The switching power supply circuit 10 includes capacitors 20, 21, 22, and 32, a resistor 23, NMOS transistors 24 and 25, a transformer 26, a control block 27, diodes 28 to 31, a constant voltage circuit 33, and a light emitting diode 34. The switching power supply circuit 10 operates based on a full-wave rectifier circuit (REC) 12 that full-wave rectifies an AC voltage Vac, and an input voltage Vin from a power factor correction circuit 100.

[0013] The power factor correction circuit 100 corrects the power factor and generates a DC voltage (that is, an input voltage Vin (for example, 400 V)) from the output of the full-wave rectifier circuit 12.

[0014] Capacitor 20 stabilizes the voltage between the power supply line to which input voltage Vin is applied and the ground line on the ground side, and removes noise, etc. Capacitor 21 is a so-called resonant capacitor that forms a resonant circuit together with the excitation inductance and leakage inductance determined based on coils L1 to L3 of transformer 26.

[0015] The capacitor 22 and the resistor 23 constitute a circuit that divides and detects the resonant current Icr flowing through the capacitor 21, and the capacitor 22 and the resistor 23 connected in series are connected in parallel to the capacitor 21.

[0016] Furthermore, the resistor 23 generates a voltage Vis based on a current obtained by dividing the resonant current Icr. Therefore, the voltage Vis is a voltage that corresponds to the resonant current Icr. Note that when the resonant current Icr flows in the direction of the arrow shown in FIG. 1, the resonant current Icr is called a positive resonant current Icr, and in this case the voltage Vis is a positive voltage.

[0017] Here, if the node to which the NMOS transistors 24 and 25 are connected is referred to as node CP, the direction in which the resonant current Icr flows from node CP to capacitor 21 via primary coil L1 is the positive direction. On the other hand, the direction in which the resonant current Icr flows from capacitor 21 to node CP via primary coil L1 is the negative direction. Note that the resonant current Icr in FIG. 1 is depicted by an arrow indicating the resonant current Icr flowing in the positive direction.

[0018] The NMOS transistor 24 is a low-side power transistor, and the NMOS transistor 25 is a high-side power transistor. Specifically, the NMOS transistors 24 and 25 are connected in series between a node to which the input voltage Vin is applied and a node to which the ground voltage is applied. In this embodiment, the NMOS transistors 24 and 25 are used as switching elements, but they may also be PMOS transistors or bipolar transistors, for example. The NMOS transistor 24 corresponds to a "first switching element," and the NMOS transistor 25 corresponds to a "second switching element."

[0019] The transformer 26 includes a primary coil L1, secondary coils L2 and L3, and an auxiliary coil La, and is insulated from the primary coil L1, the secondary coils L2 and L3, and the auxiliary coil La. In the transformer 26, a voltage is generated in the secondary coils L2 and L3 on the secondary side and in the auxiliary coil La in response to a change in voltage across the primary coil L1 on the primary side.

[0020] The primary coil L1 has one end connected to the drain of the NMOS transistor 24 and the source of the NMOS transistor 25, and the other end connected to the source of the NMOS transistor 24 via the capacitor 21.

[0021] Therefore, when switching of the NMOS transistors 24 and 25 starts, the voltages of the secondary coils L2 and L3 and the auxiliary coil La change. The primary coil L1 and the secondary coils L2 and L3 are electromagnetically coupled with opposite polarities, while the primary coil L1 and the auxiliary coil La are electromagnetically coupled with the same polarity. The primary coil L1 corresponds to the "first coil," and the auxiliary coil La corresponds to the "second coil."

[0022] The control block 27 is a circuit block for controlling the switching of the NMOS transistors 24 and 25, and will be described in detail later.

[0023] The diodes 28 and 29 full-wave rectify the AC voltage Vac and apply it to the switching control circuit 40 as a voltage Vh.

[0024] Diodes 30 and 31 rectify the voltages of the secondary coils L2 and L3, and capacitor 32 smoothes the rectified voltage. As a result, a smoothed output voltage Vout is generated in capacitor 32. The output voltage Vout becomes a DC voltage at a target level.

[0025] The constant voltage circuit 33 is a circuit that generates a constant DC voltage, and is configured using, for example, a shunt regulator.

[0026] The light-emitting diode 34 is an element that emits light with an intensity corresponding to the difference between the output voltage Vout and the output of the constant voltage circuit 33, and forms a photocoupler together with a phototransistor 52, which will be described later. In this embodiment, as the level of the output voltage Vout increases, the intensity of the light emitted from the light-emitting diode 34 increases.

[0027] <<<Control Block 27>>> The control block 27 includes a switching control circuit 40, diodes 50, 56 to 58, capacitors 51, 53 to 55, and a phototransistor 52.

[0028] The switching control circuit 40 is a circuit that controls the switching of the NMOS transistors 24 and 25, and has terminals VCC, REG, GND, FB, IS, HO, LO, VS, VB, and VH.

[0029] Terminal VCC is a terminal to which a power supply voltage Vcc corresponding to the voltage from auxiliary coil La of transformer 26 is applied. Terminal VCC is connected to the cathode of diode 50 and a capacitor 51 with one end grounded. When capacitor 51 is charged by current from auxiliary coil La of transformer 26, the charging voltage of capacitor 51 becomes power supply voltage Vcc. Note that capacitor 51 corresponds to the "first capacitor," and power supply voltage Vcc corresponds to the "first power supply voltage."

[0030] The terminal GND is a terminal to which a ground voltage is applied, and is connected to, for example, the housing of a device in which the switching power supply circuit 10 is provided.

[0031] Terminal FB is a terminal at which a feedback voltage Vfb corresponding to the output voltage Vout is generated, and is connected to phototransistor 52 and capacitor 53. Phototransistor 52 passes a bias drive current I0, the magnitude of which corresponds to the intensity of light from light-emitting diode 34, from terminal FB to ground, and capacitor 53 is provided to remove noise between terminal FB and ground. Therefore, phototransistor 52 operates as a transistor that generates a sink current.

[0032] Terminal IS is a terminal for detecting the current value of the resonant current of the primary coil L1. Here, a voltage corresponding to the current value of the resonant current of the primary coil L1 is generated at the node where capacitor 22 and resistor 23 are connected. Therefore, a voltage Vis corresponding to the current value of the resonant current of the primary coil L1 is applied to terminal IS.

[0033] The terminal LO is a terminal from which a drive signal Vdr1 for driving the NMOS transistor 24 is output, and the gate of the NMOS transistor 24 is connected.

[0034] The terminal HO is a terminal from which a drive signal Vdr2 for driving the NMOS transistor 25 is output, and the gate of the NMOS transistor 25 is connected.

[0035] The terminal VS is a terminal to which the voltage of the connection node connecting the drain terminal of the NMOS transistor 24 and the source terminal of the NMOS transistor 25 is applied. When the NMOS transistor 24 is turned on, the ground voltage is applied to the terminal VS, and when the NMOS transistor 25 is turned on, the input voltage Vin is applied to the terminal VS.

[0036] The terminal REG is a terminal from which a power supply circuit 320 (described later) of the switching control circuit 40 outputs a power supply voltage Vreg, and is connected to a capacitor 54 that stabilizes the power supply voltage Vreg. A current Ireg is also output from the terminal REG.

[0037] A voltage Vb used as a power supply voltage for a buffer 607 (described later) that outputs a drive signal Vdr2 is applied to terminal VB. Also connected to terminal VB are one end of a capacitor 55 that stabilizes voltage Vb and the cathode of a diode 56. The other end of capacitor 55 is connected to terminal VS, and the anode of diode 56 is connected to terminal REG.

[0038] Furthermore, when the input voltage Vin is applied to the terminal VS, the potential of the voltage Vs at the terminal VS serves as a reference potential for the voltage Vb for turning on the NMOS transistor 25. Furthermore, when the NMOS transistor 24 is turned on and the voltage Vs becomes the ground voltage, the diode 56 charges the capacitor 55 based on the voltage Vreg. When the NMOS transistor 25 is turned on and the voltage Vs becomes the input voltage Vin, the voltage Vb becomes the power supply voltage of the buffer 607 based on the voltage charged to the capacitor 55.

[0039] A voltage Vh corresponding to the AC voltage Vac is applied to the terminal VH. The switching control circuit 40 receives the voltage Vh at a start-up circuit 300 (described later) and charges the capacitor 51. As a result, when the switching control circuit 40 starts up, the power supply voltage Vcc is generated in the capacitor 51.

[0040] <<<Chip configuration of switching control circuit 40>>> 2 is a diagram showing the chip configuration of the switching control circuit 40. The switching control circuit 40 is composed of integrated circuits 200 and 220. The integrated circuit 200 is composed of high-voltage semiconductor elements, and receives voltages Vh, Vb, and Vs, and a ground voltage, from terminals VH, VB, VS, and GND. Here, a buffer 607 (described later) and a startup element 400 (described later) are included in the integrated circuit 200.

[0041] The integrated circuit 220 is composed of low-voltage semiconductor elements, and receives voltages Vreg, Vcc, Vfb, Vis, and ground voltage from terminals REG, VCC, FB, IS, and GND. Of the circuits included in the switching control circuit 40, all except for the buffer 607 and the startup element 400 are included in the integrated circuit 220. The integrated circuit 200 corresponds to the "first integrated circuit," and the integrated circuit 220 corresponds to the "second integrated circuit."

[0042] <<<Details of the switching control circuit 40>>> FIG. 3 is a diagram showing an example of the circuit configuration of the switching control circuit 40. Here, FIG. 3 shows the circuits included in each of the integrated circuits 200 and 220 in the form of functional blocks. The switching control circuit 40 is a semiconductor module that switches the NMOS transistors 24 and 25 based on the magnitude of the resonance current Icr. The switching control circuit 40 includes a start-up circuit 300, a selection circuit 310, a power supply circuit 320, undervoltage lockout (UVLO) circuits (UVLO) 322, 350, and 351, regulators 330 and 331, a reference voltage circuit 340, a setting circuit 360, and a signal output circuit 370. The switching control circuit 40 may be configured by a single integrated circuit, instead of a semiconductor module including the integrated circuits 200 and 220.

[0043] ==Start Circuit 300== When the switching control circuit 40 starts up, the start-up circuit 300 charges the capacitor 51 based on the voltage Vh to generate the voltage Vcc. As shown in FIG. 4, the start-up circuit 300 includes a start-up element 400 and a charging circuit 410.

[0044] ===Activation Device 400=== The startup element 400 generates a charging voltage Vsup based on a voltage Vh that corresponds to the AC voltage Vac. Specifically, the startup element 400 (e.g., a JFET) generates a voltage Vsup of a predetermined level (e.g., 30 V) from the voltage Vh that corresponds to the AC voltage Vac.

[0045] ===Charging circuit 410=== The charging circuit 410 charges the capacitor 51 with a current Ichg according to the charging voltage Vsup based on the power supply voltage Vcc. Specifically, the charging circuit 410 charges the capacitor 51 when the voltage Vcc is lower than a predetermined level (for example, the level of the reference voltage Vref4).

[0046] On the other hand, the charging circuit 410 stops charging the capacitor 51 when the voltage Vcc reaches a predetermined level (for example, the level of the reference voltage Vref4).

[0047] ==Selection circuit 310== 3 selects a reference voltage from a plurality of reference voltages (for example, reference voltages Vref0 to Vref3) that sets the power supply voltage Vreg output by a power supply circuit 320 (described later) as a target level. Specifically, the selection circuit 310 sets the selected reference voltage from the reference voltages Vref0 to Vref3 that determine the target level of the voltage Vreg as voltage Vsel, based on a signal setting output (details of which will be described later) by a setting circuit 360 (described later).

[0048] ==Power supply circuit 320== The power supply circuit 320 generates a power supply voltage Vreg from the voltage Vcc. Specifically, the power supply circuit 320 drops the voltage Vcc based on the voltage Vsel from the selection circuit 310, and outputs the power supply voltage Vreg. The signal setend from the setting circuit 360 will be described later. As shown in FIG. 5 , the power supply circuit 320 includes a regulator (REG) 500, a control circuit 520, an NMOS transistor 540, an inverter 541, and a Zener diode 550.

[0049] ===Regulator 500=== The regulator 500 drops the power supply voltage Vcc to generate the power supply voltage Vreg. Specifically, the regulator 500 generates the power supply voltage Vreg at a target level from the power supply voltage Vcc based on a reference voltage selected by the selection circuit 310 and a voltage corresponding to the power supply voltage Vreg. The drive current Ireg output from the terminal REG is a current output by PMOS transistors 511 and 530 (described later) of the regulator 500.

[0050] The regulator 500 includes an operational amplifier 510, a PMOS transistor 511, and resistors 512 and 513. The regulator 500 corresponds to the "regulator," and the power supply voltage Vreg corresponds to the "second power supply voltage."

[0051] ====Op Amp 510==== The operational amplifier 510 outputs a gate voltage of the PMOS transistor 511 so that the voltage Vdiv at the connection point between the resistors 512 and 513 becomes the voltage Vsel applied to the inverting input. The operational amplifier 510 also outputs a gate voltage of the PMOS transistor 511 based on the higher of the voltage Vdiv (for example, the voltage Vsel) and the voltage Vstop (for example, the voltage Vdd_a or the ground voltage) applied to the two non-inverting inputs, respectively.

[0052] ====PMOS transistor 511, resistors 512 and 513==== The PMOS transistor 511 outputs a voltage Vreg obtained by dropping the voltage Vcc based on the gate voltage from the operational amplifier 510. Resistors 512 and 513 are connected in series, with one end receiving the voltage Vreg and the other end grounded. The resistors 512 and 513 output a voltage Vdiv at the connection point between the resistors 512 and 513.

[0053] ===Control Circuit 520=== When the drive current Ireg reaches a predetermined value I1_limit0, the control circuit 520 controls the regulator 500 to reduce the drive current Ireg. Specifically, when the drive current Ireg reaches the predetermined value I1_limit0, the control circuit 520 controls the regulator 500 to turn off the PMOS transistors 511 and 530. In this case, the control circuit 520 outputs a voltage Vstop higher than the voltage Vsel, causing the operational amplifier 510 to turn off the PMOS transistor 511 and stop the supply of the drive current Ireg to the regulator 500. The predetermined value I1_limit0 corresponds to a "first predetermined value."

[0054] The control circuit 520 includes PMOS transistors 530, 532, and 534, a resistor 531, current sources 533, 536, and 538, a variable resistor 535, and NMOS transistors 537 and 539.

[0055] ====PMOS transistor 530, resistor 531==== The PMOS transistor 530 is an element that passes a current corresponding to the current flowing through the PMOS transistor 511. Specifically, the gate voltage of the PMOS transistor 511 is applied to the gate of the PMOS transistor 530. As a result, a current corresponding to the current flowing through the PMOS transistor 511 flows through the PMOS transistor 530.

[0056] A voltage Vcc is applied to the source of the PMOS transistor 530 via a resistor 531. A voltage Vreg is applied to the drain of the PMOS transistor 530. Therefore, as the drive current Ireg increases, the source voltage of the PMOS transistor 530 decreases from the voltage Vcc.

[0057] ====PMOS transistor 532, current source 533==== The source voltage of the PMOS transistor 530 is applied to the source of the PMOS transistor 532. The drain and gate of the PMOS transistor 532 are connected together. That is, the PMOS transistor 532 is diode-connected. A current source 533 that supplies a constant current is provided between the drain of the PMOS transistor 532 and the ground.

[0058] When the source voltage of the PMOS transistor 530 decreases, the gate voltage of the PMOS transistor 532 decreases so that the current source 533 can supply a constant current, and the on-resistance also decreases.

[0059] ====PMOS transistor 534, variable resistor 535==== When the current value of the drive current Ireg increases, the PMOS transistor 534 passes a large current, increasing the voltage generated across the variable resistor 535. Specifically, the gate voltage of the PMOS transistor 532 is applied to the gate of the PMOS transistor 534, and the voltage Vcc is applied to the source of the PMOS transistor 534. The variable resistor 535 is provided between the drain of the PMOS transistor 532 and ground.

[0060] When the gate voltage of the PMOS transistor 532 decreases, the gate-source voltage of the PMOS transistor 534 increases, and the on-resistance of the PMOS transistor 534 decreases. Therefore, the current flowing through the PMOS transistor 534 based on the voltage Vcc increases, and the voltage generated across the variable resistor 535 also increases.

[0061] ====Current sources 536, 538, NMOS transistors 537, 539==== The current source 536 and the NMOS transistor 537 function as an inverter that outputs the ground voltage or the voltage Vdd_a at the connection point depending on the gate voltage of the NMOS transistor 537. The same applies to the current source 538 and the NMOS transistor 539.

[0062] The voltage generated across the variable resistor 535 is applied to the gate of the NMOS transistor 537. The source of the NMOS transistor 537 is grounded, and a voltage Vdd_a is applied to the drain via a current source 536. The drain voltage of the NMOS transistor 537 is applied to the gate of the NMOS transistor 539. The source of the NMOS transistor 539 is grounded, and a voltage Vdd_a is applied to the drain via a current source 538.

[0063] From the above, when the voltage generated across the variable resistor 535 exceeds the threshold voltage of the NMOS transistor 537, the NMOS transistor 537 turns on, and the drain voltage of the NMOS transistor 537 becomes the ground voltage. As a result, the NMOS transistor 539 turns off, and the voltage Vstop, which is the drain voltage of the NMOS transistor 539, becomes the voltage Vdd_a. Note that the voltage Vdd_a is higher than the voltage Vsel. As a result, when the drive current Ireg becomes a predetermined value (for example, I1_limit0), the control circuit 520 causes the regulator 500 to stop generating the power supply voltage Vreg.

[0064] ===NMOS transistor 540=== When the output of the power supply voltage Vreg via the terminal REG is to be stopped, the NMOS transistor 540 is turned on to discharge the capacitor 54 in Fig. 1. Specifically, the power supply voltage Vcc rises and the NMOS transistor 540 is kept on until the setting circuit 360 outputs the signal setend indicating completion of setting of the internal circuitry of the switching control circuit 40 (e.g., the selection circuit 310).

[0065] Furthermore, when the low voltage protection circuit 351 (described later) outputs a signal rst_ic to reset the switching control circuit 40, the setting circuit 360 outputs a signal setend indicating that the setting of the internal circuit is incomplete, and so the NMOS transistor 540 is turned on. The drain of the NMOS transistor 540 is connected to the terminal REG, and a signal obtained by inverting the logic level of the signal setend by an inverter 541 is input to the gate. The source of the NMOS transistor 540 is grounded.

[0066] ===Zener diode 550=== The Zener diode 550 is an element that prevents the power supply voltage Vreg generated by dropping the power supply voltage Vcc from becoming too high even if the power supply voltage Vcc rises extremely.

[0067] ===Undervoltage protection circuit (UVLO) 322=== 3 stops the operation of the signal output circuit 370 when the power supply voltage Vreg drops. Specifically, the low voltage protection circuit 322 stops the operation of the drive signal generation circuit 605 (described later) when the power supply voltage Vreg reaches a predetermined level Vref_reg_off that is lower than the target level. Here, "stopping the operation of the drive signal generation circuit 605" means that the drive signal generation circuit 605 outputs low-level (hereinafter referred to as "L" level) drive signals Vlo and Vho to stop switching of the NMOS transistors 24 and 25.

[0068] In this case, the low voltage protection circuit 322 outputs a signal rst_sw0 that stops the operation of the drive signal generation circuit 605. On the other hand, when the power supply voltage Vreg is higher than a predetermined level Vref_reg_off, the low voltage protection circuit 322 outputs a signal rst_sw0 that operates the drive signal generation circuit 605.

[0069] As a result, the low-voltage protection circuit 322 prevents the buffers 606 and 607 (described later) from malfunctioning when the power supply voltage Vreg drops while the power supply voltage Vcc is high. The low-voltage protection circuit 322 corresponds to a "first protection circuit."

[0070] 5, the low voltage protection circuit 322 changes the resistance value of the variable resistor 535 based on whether the power supply voltage Vreg is higher than a predetermined level Vref_reg_off. Specifically, when the power supply voltage Vreg is lower than the predetermined level Vref_reg_off, the low voltage protection circuit 322 sets the resistance value of the variable resistor 535 to R0 so that the value of the drive current Ireg at which the PMOS transistor 511 is turned off is reduced.

[0071] On the other hand, when the power supply voltage Vreg is higher than the predetermined level Vref_reg_off, the low voltage protection circuit 322 sets the variable resistor 535 to a resistance value R1 so as to increase the value of the drive current Ireg that turns off the PMOS transistor 511. Note that the resistance value R0 is greater than the resistance value R1.

[0072] In this embodiment, when the variable resistor 535 has a resistance value R0, the NMOS transistor 537 turns on when the drive current Ireg reaches a predetermined value I1_limit0. As a result, the control circuit 520 controls the regulator 500 so that the drive current Ireg decreases.

[0073] Furthermore, when the variable resistor 535 has a resistance value R1, the NMOS transistor 537 turns on when the drive current Ireg reaches a predetermined value I1_limit1. As a result, the control circuit 520 controls the regulator 500 to reduce the drive current Ireg. Note that the predetermined value I1_limit0 is smaller than the predetermined value I1_limit1.

[0074] Therefore, in this embodiment, when the power supply voltage Vreg is lower than the target level, the control circuit 520 controls the regulator 500 so that the drive current Ireg is limited to a smaller value. Note that the predetermined value I1_limit0 corresponds to a "second predetermined value," the predetermined value I1_limit1 corresponds to a "first predetermined value," and the predetermined level Vref_reg_off corresponds to a "first level." Also, in this embodiment, the predetermined value I1_limit0 is, for example, 6 mA, and the predetermined value I1_limit1 is, for example, 30 mA.

[0075] ==Regulator (REG) 330== The regulator 330 in FIG. 3 generates a power supply voltage Vdd_a for an analog circuit inside the switching control circuit 40 from the power supply voltage Vcc based on a bandgap voltage Vbg from a reference voltage circuit 340 (described later).

[0076] ==Regulator (REG) 331= The regulator 331 generates a power supply voltage Vdd_d for the digital circuits inside the switching control circuit 40 from the power supply voltage Vcc based on the bandgap voltage Vbg from the reference voltage circuit 340 .

[0077] ==Reference voltage circuit 340== The reference voltage circuit 340 includes a bandgap circuit (not shown) that generates a bandgap voltage Vbg that serves as a reference for the voltage used in the internal circuitry of the switching control circuit 40. The reference voltage circuit 340 also generates reference voltages (e.g., bandgap voltage Vbg and reference voltages Vref0 to Vref5) from the power supply voltage Vcc based on the bandgap voltage Vbg. In addition to the bandgap voltage Vbg and the reference voltages Vref0 to Vref5, the reference voltage circuit 340 also generates reference voltages (e.g., Vref_reg_off) for detecting the voltage levels of various voltages.

[0078] ==Undervoltage protection circuit (UVLO) 350== The low-voltage protection circuit 350 stops the operation of the drive signal generation circuit 605 (described later) based on the voltage level of the power supply voltage Vcc. Specifically, when the power supply voltage Vcc drops to a predetermined level Vref_vcc_off0 that is lower than the level of the reference voltage Vref4, the low-voltage protection circuit 350 stops the operation of the drive signal generation circuit 605 and stops the operations of the buffers 606 and 607 while continuing to operate the regulator 500. Here, "stopping the operation of the buffers 606 and 607" means that the operation of the drive signal generation circuit 605 stops, causing the buffers 606 and 607 to output drive signals Vdr1 and Vdr2 that turn off the NMOS transistors 24 and 25.

[0079] Furthermore, when the power supply voltage Vcc reaches a predetermined level Vref_vcc_off0, the low voltage protection circuit 350 outputs a signal rst_sw1 that stops the operation of the drive signal generation circuit 605. On the other hand, when the power supply voltage Vcc is higher than the predetermined level Vref_vcc_off0, the low voltage protection circuit 350 outputs a signal rst_sw1 that operates the drive signal generation circuit 605.

[0080] As a result, even if the power supply voltage Vcc drops, the low voltage protection circuit 350 also reduces the value of the drive current Ireg output by the regulator 500, making it possible to prevent the power supply voltage Vreg from dropping. This prevents malfunction of the switching control circuit 40 due to a drop in the power supply voltage Vreg that occurs after a delay following a transient drop in the power supply voltage Vcc. The low voltage protection circuit 350 corresponds to a "second protection circuit," and the predetermined level Vref_vcc_off0 corresponds to a "second level."

[0081] ==Low Voltage Protection Circuit 351== The low-voltage protection circuit 351 stops the operation of the switching control circuit 40 based on the voltage level of the power supply voltage Vcc. Specifically, when the power supply voltage Vcc drops to a predetermined level Vref_vcc_off1 that is lower than the predetermined level Vref_vcc_off0, the low-voltage protection circuit 351 stops the operation of the regulator 500. Here, "stopping the operation of the regulator 500" means that the power supply circuit 320 stops outputting the power supply voltage Vreg via the terminal REG.

[0082] Furthermore, when the power supply voltage Vcc reaches a predetermined level Vref_vcc_off1, the low voltage protection circuit 351 outputs a signal rst_ic that stops the operation of the regulator 500. On the other hand, when the power supply voltage Vcc is higher than the predetermined level Vref_vcc_off1, the low voltage protection circuit 351 outputs a signal rst_ic that operates the regulator 500.

[0083] Furthermore, since a drop in the power supply voltage Vcc may prevent the regulator 500 from outputting a sufficient power supply voltage Vreg, the low voltage protection circuit 351 stops outputting the power supply voltage Vreg and resets the switching control circuit 40. This allows the low voltage protection circuit 351 to suppress malfunction of the switching control circuit 40 caused by an unstable power supply voltage Vreg. The low voltage protection circuit 351 corresponds to a "third protection circuit," and the predetermined level Vref_vcc_off1 corresponds to a "third level."

[0084] ==Setting Circuit 360== 3 sets the internal circuit of the switching control circuit 40 when the switching control circuit 40 is started. Specifically, when the voltage Vh is applied to the terminal VH and the low voltage protection circuit 351 outputs the signal rst_ic that operates the regulator 500, the setting circuit 360 starts operating.

[0085] The setting circuit 360 reads data (e.g., setting) stored in a memory (not shown) and outputs it to set an internal circuit (e.g., selection circuit 310) of the switching control circuit 40. After the setting of the internal circuit is completed, the setting circuit 360 outputs a signal setend indicating that the setting is complete. On the other hand, while the setting of the internal circuit is in progress, the setting circuit 360 outputs a signal setend indicating that the setting of the internal circuit is not yet complete.

[0086] ==Signal Output Circuit 370== The signal output circuit 370 outputs, based on the feedback voltage Vfb, drive signals Vdr1 and Vdr2 that drive the NMOS transistors 24 and 25. As shown in FIG. 6 , the signal output circuit 370 includes resistors 600, 602, and 603, an analog-to-digital converter (ADC) 601, a comparator 604, a drive signal generation circuit 605, and buffers 606 and 607.

[0087] ===Resistance 600=== The resistor 600 generates a feedback voltage Vfb based on the bias current I0 from the phototransistor 52. A predetermined voltage Vdd_a is applied to one end of the resistor 600, and the other end is connected to the terminal FB. Therefore, if the resistance value of the resistor 600 is "Ra", the feedback voltage Vfb generated at the terminal FB is expressed by equation (1).

[0088] Vfb=Vdd-Ra×I0 (1) As described above, in this embodiment, the current value of the bias current I0 increases in response to an increase in the output voltage Vout, so that when the output voltage Vout increases, the feedback voltage Vfb decreases. ===Analog-to-Digital Converter (ADC) 601=== The analog-to-digital converter 601 converts the feedback voltage Vfb into a digital value. Hereinafter, the feedback voltage Vfb converted into a digital value will also be referred to as the feedback voltage Vfb.

[0089] ===Resistance 602, 603=== The resistors 602 and 603 enable the voltage Vis to be processed as a positive voltage within the switching control circuit 40. Specifically, the resistors 602 and 603 are a voltage dividing resistor circuit that enables a voltage corresponding to the voltage Vis to be output as a positive voltage even if the voltage Vis is positive or negative due to the resonant current Icr flowing in a positive or negative direction.

[0090] Resistors 602 and 603 are connected in series, with a voltage Vdd_a applied to one end and a voltage Vis applied to the other end.

[0091] For example, if the voltage Vis varies in the range of -5V to 5V and the voltage Vdd_a is 5V, by making the resistance values ​​of resistors 602 and 603 the same, the voltages output by resistors 602 and 603 will be positive voltages centered around 2.5V.

[0092] ===Comparator 604=== The comparator 604 detects the direction of the resonance current Icr based on the voltages output by the resistors 602 and 603. Specifically, the comparator 604 compares the voltages output by the resistors 602 and 603 with a reference voltage Vref5 (for example, 2.5 V).

[0093] The comparator 604 detects that the resonant current Icr is flowing in the positive direction when the voltages output by the resistors 602 and 603 are higher than the reference voltage Vref5, whereas the comparator 604 detects that the resonant current Icr is flowing in the negative direction when the voltages output by the resistors 602 and 603 are lower than the reference voltage Vref5.

[0094] ===Drive signal generation circuit 605=== Based on the feedback voltage Vfb, the drive signal generation circuit 605 generates drive signals Vlo and Vho for driving the NMOS transistors 24 and 25. Specifically, the drive signal generation circuit 605 generates the drive signals Vlo and Vho based on the feedback voltage Vfb and the detection result of the comparator 604.

[0095] The drive signal generation circuit 605 generates drive signals Vlo and Vho having a high level (hereinafter referred to as "H" level) duty ratio of 50%, for example, based on the feedback voltage Vfb. When the level of the voltage Vfb becomes low, the drive signal generation circuit 605 generates drive signals Vlo and Vho with a high frequency.

[0096] Furthermore, the drive signal generation circuit 605 calculates the time from when the drive signal Vlo or Vho changes to the "L" level to when the polarity of the resonant current Icr is reversed based on the detection result of the comparator 604, and generates the drive signals Vlo and Vho based on this time. This allows the drive signal generation circuit 605 to generate the drive signals Vlo and Vho that reflect the state of the load 11, taking advantage of the fact that the magnitude of the load current included in the resonant current Icr changes depending on the state of the load 11.

[0097] Furthermore, when any of the signals rst_sw0, rst_sw1, and rst_ic that stop the operation of the drive signal generation circuit 605 is input, the drive signal generation circuit 605 stops operating. Here, "the drive signal generation circuit 605 stops operating" means that the drive signal generation circuit 605 generates "L" level drive signals Vlo and Vho.

[0098] ===Buffers 606, 607=== The buffers 606 and 607 switch the NMOS transistors 24 and 25 based on the drive signals Vlo and Vho. Specifically, the buffer 606 operates on the power supply voltage Vreg and outputs a drive signal Vdr1 that switches the NMOS transistor 24 based on the drive signal Vlo. The buffer 607 operates on a voltage Vb that corresponds to the power supply voltage Vreg and outputs a drive signal Vdr2 that switches the NMOS transistor 25 that applies the input voltage Vin to the primary coil L1 based on the drive signal Vho. The buffer 606 corresponds to the "first drive circuit," and the buffer 607 corresponds to the "second drive circuit."

[0099] <<<Operation of the Switching Control Circuit 40>>> Fig. 7 is a diagram showing an example of the operation at the time of startup of the switching control circuit 40. Fig. 8 is a diagram for explaining the current that flows through the switching control circuit 40 when the switching control circuit 40 starts up. Fig. 9 is a diagram showing an example of the waveform of the drive current Ireg at the time of startup of the switching control circuit 40.

[0100] 8, for convenience, the start-up circuit 300 and the PMOS transistor 511 of the regulator 500 that outputs the drive current Ireg are illustrated as a partial block of the switching control circuit 40. In addition, the current Ichg is set to 8 mA here.

[0101] 7, when the AC voltage Vac is applied and the voltage Vh obtained by full-wave rectifying the AC voltage Vac is applied to the terminal VH, the start-up circuit 300 outputs the current Ichg. At this time, the power supply voltage Vcc is lower than the predetermined level Vref_vcc_off1, so the PMOS transistor 511 of the regulator 500 in the low voltage protection circuit 351 is turned off.

[0102] 8(a), the current Ichg output from the start-up circuit 300 is all current Ivcc, charging the capacitor 51. As a result, the power supply voltage Vcc indicated by the solid line in current diagram 7 begins to rise.

[0103] Furthermore, at time t1 in FIG. 7, when the power supply voltage Vcc exceeds the predetermined level Vref_vcc_off1, the low voltage protection circuit 351 changes the signal rst_ic to high level and activates the switching control circuit 40 (that is, activates the regulator 500).

[0104] 8(b), the PMOS transistor 511 of the regulator 500 turns on, and the current Ichg is output as the current Icvv and the current Ireg to the capacitors 51 and 54. Therefore, the power supply voltage Vreg of the regulator 500, indicated by the dotted line in FIG.

[0105] At this timing, the power supply voltage Vreg is lower than the predetermined level Vref_reg_off, so the variable resistor 535 in Fig. 5 has a resistance value R0 (>resistance value R1). Therefore, the control circuit 520 controls the regulator 500 so that the drive current Ireg is limited to a predetermined value I1_limit0 (here, 6 mA).

[0106] Therefore, as shown in Figures 8(b) and 9, the drive current Ireg flows at approximately the predetermined value I1_limit0 (here, 6 mA). When the value of the drive current Ireg reaches the predetermined value I1_limit0 (here, 6 mA), the control circuit 520 in Figure 5 controls the regulator 500 so that the drive current Ireg decreases.

[0107] Then, when the drive current Ireg becomes smaller than the predetermined value I1_limit0 (here, 6 mA), the regulator 500 outputs the drive current Ireg again. As a result, as shown in Fig. 9, the drive current Ireg becomes a value slightly smaller than the predetermined value I1_limit0 (here, 6 mA). Note that in Fig. 8, the value of the drive current Ireg at this timing is shown as 6 mA for convenience.

[0108] At time t2, when the power supply voltage Vreg rises to a predetermined level Vref_reg_off, the variable resistor 535 in Fig. 5 has a resistance value R1 (<resistance value R0). Therefore, the control circuit 520 controls the regulator 500 so that the drive current Ireg is limited to a predetermined value I1_limit1 (here, 30 mA).

[0109] 8(c), the sum of the current Ichg (8 mA) and the current Ivcc (22 mA) flowing from the capacitor 51 to the PMOS transistor 511 via the terminal VCC becomes the drive current Ireg (30 mA). Note that even at this timing, the drive current Ireg has a waveform similar to that in FIG. 9, although the upper limit value is different.

[0110] When the level of the power supply voltage Vreg approaches the level of the power supply voltage Vcc, the current Ivcc flowing from the capacitor 51 to the PMOS transistor 511 via the terminal VCC decreases.

[0111] Then, at time t3, the level of the power supply voltage Vreg rises and reaches approximately the level of the power supply voltage Vcc, and as shown in Fig. 8(d), the current Ichg assumes a value according to the capacitance values ​​of the capacitors 51 and 54. In this embodiment, the level of the power supply voltage Vreg is determined from the power supply voltage Vcc in consideration of the voltage drop across the PMOS transistor 511.

[0112] Here, the capacitance value of the capacitor 51 is set to 1 / 3 of the capacitance value of the capacitor 54. Therefore, of the current Ichg (8 mA), the current Ivcc is 2 mA and the current Ireg is 6 mA.

[0113] At time t4, the power supply voltage Vcc further increases and exceeds the predetermined level Vref_vcc_off0, and the low voltage protection circuit 350 in FIG. 3 outputs a high-level signal rst_sw1 to start switching (i.e., to operate the drive signal generation circuit 605).

[0114] Then, the drive signal generation circuit 605 outputs drive signals Vlo and Vho that switch the NMOS transistors 24 and 25. As a result, the capacitor 51 is charged by the current from the auxiliary coil La, and the power supply voltage Vcc further increases.

[0115] Furthermore, at time t5, when the power supply voltage Vcc rises and reaches the reference voltage Vref4, the start-up circuit 300 stops charging the capacitor 51. After that, the switching control circuit 40 switches the NMOS transistors 24 and 25 so that the output voltage Vout reaches a target voltage level.

[0116] As described above, in this embodiment, when the switching control circuit 40 starts up, the drive current Ireg of the regulator 500 is limited to a predetermined value (for example, 6 mA and 30 mA). This prevents the current consumption of the regulator 500 from increasing and the heat generation in the switching control circuit 40 from increasing.

[0117] 8(b), the drive current Ireg of the regulator 500 is limited to a current value (for example, 6 mA) smaller than the current Ichg. Therefore, in this embodiment, a portion of the current Ichg flows reliably to the capacitor 51, thereby increasing the power supply voltage Vcc.

[0118] =====Other embodiments===== In FIG. 5, the control circuit 520 is configured to output the voltage Vstop, which is the voltage Vdd_a or the ground voltage, but the control circuit 520 may be configured to output a voltage that is generated across the variable resistor 535 and is higher than the voltage Vsel to the operational amplifier 510 instead of the voltage Vstop.

[0119] This allows the regulator 500 to adjust the on-resistance of the PMOS transistors 511 and 530 based on a voltage higher than the voltage Vsel. As a result, the regulator 500 can adjust the current I1 so as to throttle down the supply of the current I1, rather than stopping or starting the supply of the current I1.

[0120] ===Summary=== The above describes the switching power supply circuit 10 of this embodiment. The switching control circuit 40 includes a drive signal generation circuit 605, a buffer 606, a regulator 500, and a control circuit 520. The switching control circuit 40 generates a power supply voltage Vreg and a drive current Ireg using the built-in regulator 500. The control circuit 520 controls the drive current Ireg so that it is equal to or less than a predetermined value. This makes it possible to provide a switching control circuit that limits the current supplied by the internal regulator.

[0121] The switching control circuit 40 also includes a low-voltage protection circuit 322. The control circuit 520 changes the resistance value of the variable resistor 535 based on the signal rst_sw0 from the low-voltage protection circuit 322. As a result, when the switching control circuit 40 is started up, the drive current Ireg is limited, thereby enabling sufficient charging of the capacitor 51 that generates the power supply voltage. Furthermore, even when the switching control circuit 40 is operating, the drive current Ireg is limited, thereby preventing the switching control circuit 40 from generating heat or the like.

[0122] Furthermore, when the power supply voltage Vreg reaches a predetermined level Vref_reg_off that is lower than the target level, the low voltage protection circuit 322 stops the operation of the drive signal generation circuit 605 (described later). This prevents the buffers 606 and 607 from malfunctioning when the power supply voltage Vcc is high but the power supply voltage Vreg drops.

[0123] The switching control circuit 40 also includes a low-voltage protection circuit 350. When the power supply voltage Vcc drops to a predetermined level Vref_vcc_off0 that is lower than the reference voltage Vref4, the low-voltage protection circuit 350 stops the operation of the drive signal generation circuit 605 and stops the operation of the buffers 606 and 607 while continuing to operate the regulator 500. As a result, even if the power supply voltage Vcc drops, the low-voltage protection circuit 350 also reduces the current value of the drive current Ireg output by the regulator 500, making it possible to prevent the power supply voltage Vreg from dropping.

[0124] The switching control circuit 40 also includes a low-voltage protection circuit 351. When the power supply voltage Vcc drops to a predetermined level Vref_vcc_off1 that is lower than the predetermined level Vref_vcc_off0, the regulator 500 may not be able to output a sufficient power supply voltage Vreg due to the drop in the power supply voltage Vcc. Therefore, the low-voltage protection circuit 351 stops outputting the power supply voltage Vreg and resets the switching control circuit 40. This allows the low-voltage protection circuit 351 to suppress malfunction of the switching control circuit 40 due to an unstable power supply voltage Vreg.

[0125] Furthermore, when the drive current Ireg reaches a predetermined value I1_limit0, the control circuit 520 stops the regulator 500 from generating the power supply voltage Vreg, thereby preventing the switching control circuit 40 from generating heat or the like.

[0126] The switching control circuit 40 also includes a selection circuit 310. This allows the power supply circuit 320 to output a power supply voltage Vreg at a target level based on the reference voltage selected by the selection circuit 310.

[0127] The switching control circuit 40 also includes a start-up circuit 300. As a result, when the switching power supply circuit 10 is incorporated into a power supply system, the switching control circuit 40 can generate a power supply voltage for a circuit that controls the power supply system.

[0128] Furthermore, switching control circuit 40 includes buffer 607, startup circuit 300 includes startup element 400 and charging circuit 410, buffer 607 and startup element 400 are included in integrated circuit 200, and all circuits included in switching control circuit 40 other than buffer 607 and startup element 400 are included in integrated circuit 220. Furthermore, integrated circuit 200, which is made up of high-voltage semiconductor elements, and integrated circuit 220, which is made up of low-voltage semiconductor elements, are manufactured using different processes. That is, integrated circuit 200 is manufactured using a process capable of manufacturing high-voltage semiconductor elements, and integrated circuit 220 is manufactured using a process capable of manufacturing semiconductor elements that can be highly integrated. This allows for a reduction in the manufacturing cost of switching control circuit 40.

[0129] The above-described embodiments are intended to facilitate understanding of the present invention and are not intended to limit the present invention. Furthermore, the present invention may be modified or improved without departing from the spirit thereof, and the present invention includes equivalents thereof. [Explanation of symbols]

[0130] 10 Switching power supply circuit 11 Load 12 Full wave rectifier circuit (REC) 20~22,32,51,53~55 Capacitors 23,512,513,531,600,602,603 ​​Resistance 24, 25, 537, 539, 540 NMOS transistors 26 Transformer 27 Control Blocks 28~31,50,56~58 Diodes 33 Constant voltage circuit 34 Light-emitting diode 40 Switching control circuit 52 Phototransistor 100 Power factor correction circuit 200,220 Integrated Circuits 300 Starter Circuit 310 Selection circuit 320 Power circuit 322,350,351 Low voltage protection circuit 330,331,500 Regulator 340 Reference Voltage Circuit 360 Setting circuit 370 Signal Output Circuit 400 Starting element 410 Charging circuit 510 Op-Amp 511,530,532,534 PMOS transistors 520 Control circuit 533,536,538 current source 535 variable resistor 550 Zener diode 601 Analog-to-Digital Converter 604 Comparator 605 Drive signal generation circuit 606,607 buffers

Claims

1. A switching control circuit for controlling switching of the first switching element of a power supply circuit that generates an output voltage from an input voltage, the power supply circuit comprising: a first coil; a second coil that generates a voltage according to a current flowing through the first coil; and a first switching element that controls the current flowing through the first coil, a drive signal generating circuit that generates a drive signal based on a feedback voltage corresponding to the output voltage; a first drive circuit that switches the first switching element based on the drive signal; a regulator that generates a second power supply voltage of a target level for operating the first drive circuit and a drive current for the first drive circuit, using a first power supply voltage of a first capacitor that is charged with a current from the second coil; a control circuit that controls the regulator so that the drive current decreases when the drive current reaches a first predetermined value; A switching control circuit comprising:

2. 2. The switching control circuit according to claim 1, a first protection circuit for detecting whether the second power supply voltage is higher than a first level; The control circuit When the second power supply voltage is lower than the first level, the regulator is controlled so that the driving current decreases when the driving current reaches a second predetermined value, and when the second power supply voltage is higher than the first level, the regulator is controlled so that the driving current decreases when the driving current reaches the first predetermined value; the first level is lower than the target level; The second predetermined value is smaller than the first predetermined value. Switching control circuit.

3. 3. The switching control circuit according to claim 2, the first protection circuit stops operation of the drive signal generation circuit when the second power supply voltage becomes lower than the first level; A switching control circuit comprising:

4. 4. The switching control circuit according to claim 2 or 3, a second protection circuit that stops operation of the first drive circuit while allowing the regulator to operate when the first power supply voltage drops to a second level; A switching control circuit comprising:

5. 5. The switching control circuit according to claim 4, a third protection circuit that stops operation of the regulator when the first power supply voltage drops to a third level that is lower than the second level; A switching control circuit comprising:

6. The switching control circuit according to any one of claims 1 to 5, The control circuit When the drive current reaches the first predetermined value, the regulator stops generating the second power supply voltage, thereby controlling the drive current to be reduced. Switching control circuit.

7. The switching control circuit according to any one of claims 1 to 6, a selection circuit for selecting a reference voltage that sets the second power supply voltage to the target level from a plurality of reference voltages; The regulator generating the second power supply voltage at the target level based on the selected reference voltage and a voltage corresponding to the second power supply voltage; Switching control circuit.

8. The switching control circuit according to any one of claims 1 to 7, a start-up circuit that charges the first capacitor based on a voltage corresponding to an AC voltage; A switching control circuit comprising:

9. 9. A switching control circuit according to claim 8, a second drive circuit that operates on a voltage corresponding to the second power supply voltage and switches a second switching element that applies the input voltage to the first coil based on the drive signal; The startup circuit an activation element that generates a charging voltage based on a voltage corresponding to the AC voltage; a charging circuit configured to charge the first capacitor with a current corresponding to the charging voltage based on the first power supply voltage; Including, the second driving circuit and the starting element are included in a first integrated circuit; Among the circuits included in the switching control circuit, those other than the second drive circuit and the startup element are included in a second integrated circuit. Switching control circuit.

10. A power supply circuit that generates an output voltage from an input voltage, A first coil; a second coil that generates a voltage according to the current flowing through the first coil; a first switching element that controls a current flowing through the first coil; a switching control circuit that controls switching of the first switching element; Equipped with The switching control circuit a drive signal generating circuit that generates a drive signal based on a feedback voltage corresponding to the output voltage; a first drive circuit that switches the first switching element based on the drive signal; a regulator that generates a second power supply voltage of a target level for operating the first drive circuit and a drive current for the first drive circuit, using a first power supply voltage of a first capacitor that is charged with a current from the second coil; a control circuit that controls the regulator so that the drive current decreases when the drive current reaches a first predetermined value; A power supply circuit including:

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