Image sensor and image pickup device

Abstract

To contribute charge generated during reset to the photoelectric conversion output.SOLUTION: An imaging element includes a first storage unit having a first potential and to which photoelectrically converted charges are transferred, a second storage unit having a second potential lower than the first potential, a control unit that controls connection between the first storage unit and the second storage unit, a control signal generation unit that generates a control signal according to the amount of charge stored in the second storage unit, and a reset unit that resets the potential of the second storage unit.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an imaging element and an imaging device. [Background technology]

[0002] There are known imaging devices such as CMOS sensors that output signals based on charges transferred from a photoelectric conversion unit such as a photodiode to a floating diffusion. There has been a demand for accurate detection of the signals based on the charges transferred to the floating diffusion. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-23590 Summary of the Invention

[0004] The imaging device according to the first aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 a discharge section that discharges the charge from the storage section; and a first transistor that receives a first control signal output based on the amount of charge from the storage section, the discharge section discharging the charge from the storage section; and a potential of the storage section that is higher than the potential of the storage section when the charge from the storage section is being discharged by the discharge section. No. 1 The device includes a control unit that increases the potential of a charge transfer path that electrically connects the photoelectric conversion unit and the storage unit. The imaging device according to the second aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 a discharge section that discharges the charge from the storage section; and a first transistor that receives a first control signal output based on the charge amount of the storage section, the discharge section discharging the charge from the storage section. No. 1The image sensor further includes a control unit that controls the charge transfer path that electrically connects the photoelectric conversion unit and the storage unit so that the charge is held in the charge transfer path. The imaging device according to the third aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 The device comprises a charge transfer path to which charges converted by a photoelectric conversion section are transferred, a storage section to accumulate charges from the charge transfer path, a discharge section to discharge the charges from the storage section, and a control section having a transistor to which a control signal is applied that is output based on the amount of charge in the storage section, and the control section makes the potential of the charge transfer path higher than the potential of the storage section when the charge in the storage section is being discharged by the discharge section. The imaging device according to the fourth aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 The device comprises a charge transfer path to which charges converted by a photoelectric conversion section are transferred, a storage section that accumulates charges from the charge transfer path, a discharge section that discharges the charges from the storage section, and a control section having a transistor to which a control signal is applied that is output based on the amount of charge in the storage section, and the control section controls so that charges are retained in the charge transfer path when the charges from the storage section are being discharged by the discharge section. The imaging device according to the fifth aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 an accumulation section that accumulates the electric charge converted by the photoelectric conversion section; a discharge section that discharges the electric charge from the accumulation section; No. 1 The device comprises a control unit that controls a charge transfer path that electrically connects the photoelectric conversion unit and the storage unit, and a control circuit that controls the discharge unit so that the charge in the storage unit is discharged based on the amount of charge in the storage unit, and the control circuit controls the control unit so that the potential of the charge transfer path becomes higher than the potential of the storage unit when the charge in the storage unit is being discharged by the discharge unit. The imaging device according to the sixth aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 an accumulation section that accumulates the electric charge converted by the photoelectric conversion section; a discharge section that discharges the electric charge from the accumulation section; No. 1The device comprises a control unit that controls a charge transfer path that electrically connects the photoelectric conversion unit and the storage unit, and a control circuit that controls the discharge unit so that the charge in the storage unit is discharged based on the amount of charge in the storage unit, and the control circuit controls the control unit so that charge is retained in the charge transfer path when the charge in the storage unit is being discharged by the discharge unit. The imaging device according to the seventh aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 The device comprises a charge transfer path to which charges converted by a photoelectric conversion section are transferred, an accumulation section to accumulate charges from the charge transfer path, a discharge section to discharge charges from the accumulation section, a control section to control the charge transfer path, and a control circuit to control the control section based on the amount of charge in the accumulation section, wherein the control circuit controls the control section so that the potential of the charge transfer path is higher than the potential of the accumulation section. 。 The imaging device according to the eighth aspect of the invention converts light into an electric charge. No. 1 a photoelectric conversion unit; No. 1 The device comprises a charge transfer path to which charges converted by a photoelectric conversion unit are transferred, a storage unit that accumulates charges from the charge transfer path, a discharge unit that discharges charges from the storage unit, a control unit that controls the charge transfer path, and a control circuit that controls the control unit based on the amount of charge in the storage unit, and the control circuit controls the control unit so that charges are retained in the charge transfer path when charges from the storage unit are being discharged by the discharge unit. The imaging device according to the ninth aspect of the invention comprises the imaging device according to the first to third aspects. 8 The imaging device includes an imaging element according to any one of the above aspects. [Brief explanation of the drawings]

[0005] [Figure 1] 1 is a block diagram illustrating a configuration of an imaging device according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating a cross-sectional structure of an imaging element. [Figure 3] FIG. 2 is a circuit diagram illustrating the configuration of a pixel of an imaging element. [Figure 4]4(a) to 4(d) are schematic diagrams illustrating the potential of the charge transfer path in the pixel. [Figure 5] 5(a) and 5(b) are schematic diagrams illustrating the potential of the charge transfer path in a pixel. [Figure 6] FIG. 2 is a circuit diagram illustrating the configuration of an A / D conversion circuit. [Figure 7] 5 is a diagram illustrating a timing chart illustrating main signal waveforms in the state of FIG. 4(d). FIG. DETAILED DESCRIPTION OF THE INVENTION

[0006] Hereinafter, an embodiment of the invention will be described with reference to the drawings. <Configuration of imaging device> FIG. 1 is a block diagram illustrating the configuration of an imaging device equipped with an imaging element according to an embodiment. The imaging device 1 includes a photographing optical system 2, an imaging element 3, and a control unit 4. The imaging device 1 is, for example, a camera. The photographing optical system 2 forms a subject image on the imaging element 3. The imaging element 3 captures the subject image formed by the photographing optical system 2 and generates an image signal. The imaging element 3 is, for example, a CMOS image sensor. The control unit 4 outputs a control signal to the imaging element 3 for controlling the operation of the imaging element 3. The control unit 4 also functions as an image generation unit that performs various image processes on the image signal output from the imaging element 3 and generates image data. The photographic optical system 2 may be configured to be detachable from the imaging device 1.

[0007] <Cross-sectional structure of the image sensor> FIG. 2 is a diagram illustrating the cross-sectional structure of the image sensor 3 in FIG. 1. The image sensor 3 shown in FIG. 2 is a back-illuminated image sensor. The image sensor 3 includes a first substrate 111, a second substrate 112, a third substrate 113, and a fourth substrate 114. The first substrate 111, the second substrate 112, the third substrate 113, and the fourth substrate 114 are each formed of a semiconductor substrate or the like. The first substrate 111 is stacked on the second substrate 112 via wiring layers 140 and 141. The second substrate 112 is stacked on the third substrate 113 via wiring layers 142 and 143. The third substrate 113 is stacked on the fourth substrate 114 via wiring layers 144 and 145.

[0008] Incident light L, indicated by the white arrow, is incident in the positive direction of the Z axis. As shown by the coordinate axes, the rightward direction on the paper, perpendicular to the Z axis, is the positive X axis, and the forward direction on the paper, perpendicular to the Z and X axes, is the positive Y axis. The imaging element 3 has a first substrate 111, a second substrate 112, a third substrate 113, and a fourth substrate 114 stacked in the direction in which the incident light L is incident.

[0009] The imaging element 3 further includes a microlens layer 101, a color filter layer 102, and a passivation layer 103. The passivation layer 103, the color filter layer 102, and the microlens layer 101 are stacked on a first substrate 111 in this order. The microlens layer 101 has a plurality of microlenses ML. The microlenses ML focus incident light onto the photoelectric conversion units 12, which will be described later. The color filter layer 102 has a plurality of color filters F. The passivation layer 103 is made of a nitride film or an oxide film.

[0010] First substrate 111, second substrate 112, third substrate 113, and fourth substrate 114 each have a first surface 105a, 106a, 107a, or 108a on which gate electrodes and gate insulating films are provided, and a second surface 105b, 106b, 107b, or 108b different from the first surface. Various elements such as transistors are provided on first surfaces 105a, 106a, 107a, or 108a. Wiring layers 140, 141, 144, and 145 are stacked and provided on first surface 105a of first substrate 111, first surface 106a of second substrate 112, first surface 107a of third substrate 113, and first surface 108a of fourth substrate 114, respectively. Furthermore, wiring layers (inter-substrate connection layers) 142, 143 are respectively stacked on the second surface 106b of the second substrate 112 and the second surface 107b of the third substrate 113. The wiring layers 140 to 145 are layers including a conductor film (metal film) and an insulating film, and each has a plurality of wirings, vias, etc. arranged therein.

[0011] The elements on the first surface 105a of the first substrate 111 and the elements on the first surface 106a of the second substrate 112 are electrically connected by connecting portions 109 such as bumps or electrodes via wiring layers 140 and 141. Similarly, the elements on the first surface 107a of the third substrate 113 and the elements on the first surface 108a of the fourth substrate 114 are electrically connected by connecting portions 109 such as bumps or electrodes via wiring layers 144 and 145. In addition, the second substrate 112 and the third substrate 113 have a plurality of through electrodes 110. The through electrode 110 of the second substrate 112 connects the circuits provided on the first surface 106a and the second surface 106b of the second substrate 112 to each other, and the through electrode 110 of the third substrate 113 connects the circuits provided on the first surface 107a and the second surface 107b of the third substrate 113 to each other. The circuit provided on the second surface 106b of the second substrate 112 and the circuit provided on the second surface 107b of the third substrate 113 are electrically connected by connecting parts 109 such as bumps or electrodes via inter-substrate connecting layers 142, 143. In the embodiment, a case where first substrate 111, second substrate 112, third substrate 113, and fourth substrate 114 are stacked is exemplified, but the number of stacked substrates may be more or less than that in the embodiment. Furthermore, first substrate 111, second substrate 112, third substrate 113, and fourth substrate 114 may be referred to as the first layer, second layer, third layer, and fourth layer, respectively.

[0012] <Pixel configuration> 3 is a circuit diagram illustrating the configuration of a pixel of the image sensor 3. The pixel 10 includes a photoelectric conversion unit 12 such as a photodiode (PD) and a readout unit 30 that reads out a signal based on the charge generated by the photoelectric conversion unit 12. The pixels 10 are configured in the first layer. The readout section 30 may be configured in one of the second, third, and fourth layers, or may be configured separately in multiple layers from the first to fourth layers.

[0013] The photoelectric conversion section 12 has a function of converting incident light into electric charges and storing the photoelectrically converted electric charges. The readout section 30 has a transfer section 13, a discharge section 14, a first floating diffusion (FD1) 15, a second floating diffusion (FD2) 19, a control switch section 20, an amplifier section 16, and a current source 17.

[0014] The transfer unit 13 is controlled by a signal φTX. The signal φTX is generated, for example, by a pixel control unit (not shown). The charges photoelectrically converted by the photoelectric conversion unit 12 are transferred to the second floating diffusion 19 or the first floating diffusion 15 via the transfer unit 13. The transfer unit 13 forms a charge transfer path between the photoelectric conversion unit 12 and the second floating diffusion 19 or the first floating diffusion 15. The transfer unit 13 is configured to pass the charges overflowing from the photoelectric conversion unit 12 even when it is turned off by the signal φTX.

[0015] The control switch unit 20 is controlled by a signal φOF. The signal φOF is generated based on an output signal φOF- from a second control circuit 210, which will be described later with reference to FIG. 6, for example. The control switch unit 20 switches between holding the charge from the photoelectric conversion unit 12 in the first floating diffusion 15 and not holding the charge from the photoelectric conversion unit 12 in the first floating diffusion 15. In the embodiment, holding the charge in the first floating diffusion 15 corresponds to not sending the charge to the second floating diffusion 19, and not holding the charge from the photoelectric conversion unit 12 in the first floating diffusion 15 corresponds to sending the charge to the second floating diffusion 19 via the control switch unit 20.

[0016] The second floating diffusion 19 holds (accumulates) the charge sent from the photoelectric conversion unit 12 when a discharge unit 14, which will be described later, is turned off by a signal φRES. The first floating diffusion 15 temporarily holds (accumulates) the charge overflowing from the photoelectric conversion unit 12 when the control switch unit 20 is turned off by the signal φOF. The amplifier 16 amplifies the signal due to the charge accumulated in the second floating diffusion 19 and outputs it to a signal line 18. In the example shown in Fig. 3, the amplifier 16 is configured by a transistor M3 whose drain terminal, gate terminal, and source terminal are connected to a power supply VDD, the second floating diffusion 19, and the current source 17, respectively.

[0017] The discharge unit (reset unit) 14 is controlled by a signal φRES. The signal φRES is generated by, for example, a second control circuit 210, which will be described later with reference to FIG. 6. The discharge unit 14 discharges the charge accumulated in the second floating diffusion 19 and resets the potential of the second floating diffusion 19 to the potential of the power supply VDD (referred to as a reset potential). Furthermore, the control switch unit 20 is also used as needed to discharge the charge in the first floating diffusion 15, as will be described later with reference to FIG. 4(a). The transfer section 13, the control switch section 20, and the discharge section 14 are respectively configured by a transistor M1, a transistor M4, and a transistor M2. The readout section 30 described above transmits a signal (photoelectric conversion signal) corresponding to the charge generated by the photoelectric conversion section 12 via a signal line 18 to an A / D conversion circuit, which will be described later.

[0018] <Potential diagram of the charge transfer path> The potential of the charge transfer path in the pixel 10 will be described with reference to FIGS. 4(a) to 4(d), 5(a), and 5(b). In the embodiment, the potential is expressed based on the reset potential. FIGS. 4(a) to 4(d), 5(a), and 5(b) are schematic diagrams illustrating the potential of the charge transfer path in the pixel 10. These diagrams show the level of the potential of the charge transfer path along the dashed line AB in FIG. 3. The horizontal axis shows the charge transfer path from position A to position B, and the vertical axis shows the level of the potential. In the embodiment, the potential of the photoelectric conversion unit 12 is the highest (in other words, the depletion potential of the photoelectric conversion unit 12 is the lowest), and the potential of the second floating diffusion 19 during reset is the lowest (in other words, the reset potential is the highest).

[0019] Furthermore, as will be described later with reference to Figure 4(d), the potential of the first floating diffusion 15 is configured to be lower than that of the photoelectric conversion section 12 (in other words, the potential of the first floating diffusion 15 is higher than the depletion potential of the photoelectric conversion section), and higher than the potential of the second floating diffusion 19 immediately before reset (in other words, the potential of the first floating diffusion 15 is lower than the potential of the second floating diffusion 19 immediately before reset). The high or low potential may be set, for example, by changing the concentration of impurity ions implanted into the semiconductor substrate that constitutes the photoelectric conversion section 12, the second floating diffusion 19, and the first floating diffusion 15.

[0020] 4(a) shows a state in which, in addition to resetting the second floating diffusion 19, charges are also discharged from the photoelectric conversion unit 12 and the first floating diffusion 15. The signals φTX, φOF, and φRES turn on the transistors M1, M4, and M2 of each pixel. The charges accumulated in the photoelectric conversion unit 12 and the first floating diffusion 15 move to the second floating diffusion 19, which has the lowest potential. Furthermore, the reset operation discharges the charges in the second floating diffusion 19, and the potential of the second floating diffusion 19 is reset to the reset potential.

[0021] 4(b) shows a state where exposure of the photoelectric conversion unit 12 has started, in other words, a state where accumulation of charges generated by photoelectric conversion has started. The signals φTX, φOF, and φRES turn the transistors M1, M4, and M2 of each pixel on, off, and on, respectively.

[0022] 4(c) shows a state in which the charge accumulated in the photoelectric conversion unit 12 exceeds the storage capacity of the photoelectric conversion unit 12 and overflows. As in the case of FIG. 4(b), transistors M1, M4, and M2 are turned off, on, and off, respectively. The charge that overflowed from the photoelectric conversion unit 12 to the first floating diffusion 15 moves via transistor M4 to the second floating diffusion 19, which has a lower potential than the first floating diffusion 15, and is accumulated there. As a result, the potential of the second floating diffusion 19 begins to drop.

[0023] FIG. 4(d) shows a state in which the amount of charge accumulated in the second floating diffusion 19 reaches a predetermined amount and the potential of the second floating diffusion 19 drops to the threshold potential. Transistors M1, M4, and M2 are turned off, on, and off, respectively, as in FIGS. 4(b) and 4(c). When the potential of the second floating diffusion 19 drops to the threshold potential, this change in potential is amplified by transistor M3 and read as a pixel signal. The second control circuit 210, described later, generates a signal φRES that resets the second floating diffusion 19 based on the signal level of the read pixel signal. Therefore, the threshold potential corresponds to the potential of the second floating diffusion 19 immediately before resetting.

[0024] 5(a) shows a state in which the second floating diffusion 19 is reset while the charges in the photoelectric conversion unit 12 and the first floating diffusion 15 are retained. The signals φTX, φOF, and φRES turn the transistors M1, M4, and M2 of each pixel on, off, and on, respectively. In FIG. 4(d), the charges retained in the second floating diffusion 19 are discharged via transistor M2, and the potential of the second floating diffusion 19 is reset to the reset potential.

[0025] The charge that flows into the first floating diffusion 15 while the second floating diffusion 19 is being reset is held in the first floating diffusion 15 because the transistor M4 is turned off. In other words, the charge is temporarily stored in the first floating diffusion 15.

[0026] FIG. 5(b) shows a state in which charge accumulation has resumed in the second floating diffusion 19 after reset. The signals φTX, φOF, and φRES turn transistors M1, M4, and M2 of each pixel on, off, and on, respectively. The charge accumulated in the first floating diffusion 15 in FIG. 5(a) is transferred via transistor M4 to and accumulated in the second floating diffusion 19, which has a lower potential than the first floating diffusion 15. In other words, the charge transferred from the photoelectric conversion unit 12 to and accumulated in the first floating diffusion 15 during the reset operation of the second floating diffusion 19 is accumulated in the second floating diffusion 19 without being lost. After the state of Figure 5(b), the on / off of transistors M1, M4 and M2 of each pixel is controlled so as to repeat the states of Figures 4(c), 4(d), 5(a) and 5(b) until the exposure time set in the imaging device 1 ends.

[0027] In this embodiment, during the exposure time set in the imaging device 1, accumulation of a predetermined amount of charge in the second floating diffusion 19 and resetting of the second floating diffusion 19 are repeatedly performed. Therefore, the amount of charge generated per pixel during the exposure time can be expressed as the product of the amount of charge when the threshold potential described with reference to FIG. 4(d) is reached and the number of times the second floating diffusion 19 is reset. This method of calculating the amount of charge using an A / D conversion method is called pulse count A / D conversion because a pulse signal is generated each time the potential of the second floating diffusion 19 reaches the threshold potential and the number of generated pulse signals is counted. An example of a circuit for counting the number of times the second floating diffusion 19 per pixel is reset will be described with reference to FIG.

[0028] ​6 is a circuit diagram illustrating the configuration of an A / D conversion circuit 250 according to an embodiment. As described above, a signal based on the charge held in the second floating diffusion 19 is amplified by the amplifier 16 and read out as a pixel signal via the signal line 18. The pixel signal is input to a terminal 41 of a comparator 40 serving as a comparison unit. The first control circuit 200 generates a reference signal of a predetermined voltage level, for example, based on an instruction from a pixel control unit (not shown). The reference signal corresponds to the voltage level of the pixel signal generated in a state where the potential of the second floating diffusion 19 has dropped to the threshold potential, as described with reference to FIG. 4(d). The reference signal generated by the first control circuit 200 is input to a terminal 42 of the comparator 40.

[0029] The comparator 40 compares the pixel signal from the pixel 10 with the reference signal, and when the level of the pixel signal from the pixel 10 substantially matches the level of the reference signal, transitions the potential of the output signal 40_Out. In this embodiment, when the potential of the second floating diffusion 19 drops to the threshold potential (the state shown in FIG. 4(d)), the output signal 40_Out of the comparator 40 is inverted from H level to L level. The output signal 40_Out is input to an inverter circuit 44.

[0030] The inverter circuit 44 has multiple inverters connected to it, and the outputs are sequentially inverted and transmitted. By connecting multiple inverters, the output signal of the inverter circuit 44 is inverted to L level at a delayed timing compared to the output signal 40_Out of the comparator 40. The inclusion of such a delay circuit can stabilize the circuit operation. The number of inverter stages may be changed as appropriate.

[0031] The output signal of the inverter circuit 44 is input to the second control circuit 210. Based on the inversion of the output signal of the inverter circuit 44 from H level to L level, the second control circuit 210 generates a pulse-shaped count signal 210_Out, a signal φRES, and a signal φOF−.

[0032] The count signal 210_Out is supplied to the counter circuit 220. The counter circuit 220 counts the number of count signals 210_Out input thereto, in other words, the number of times the second floating diffusion 19 per pixel is reset.

[0033] The signal φRES is a signal that controls the transistor M2 that constitutes the discharge unit 14, and is supplied to the discharge unit 14. The second control circuit 210 generates the signal φRES, which has a pulse half width wider than that of the count signal 210_Out, based on instructions from, for example, a pixel control unit (not shown), and outputs the signal φRES at a timing delayed from that of a signal φOF− (described later). The pulse half width of the signal φRES is, for example, 50 nsec or less.

[0034] The signal φOF- is the source of the signal φOF that controls the transistor M4 constituting the control switch unit 20. In this embodiment, the signal φOF is obtained by inverting the logical level of the signal φOF- using an inverter circuit 46. The second control circuit 210 generates φOF- with a pulse half-width wider than that of the count signal 210_Out, for example, based on an instruction from a pixel control unit (not shown). The pulse half-width of the signal φOF- is, for example, 60 nsec.

[0035] The count value of the counter circuit 220 is output to the data bus 300 via the selector circuit 230. When the exposure time set in the imaging device 1 ends, the counter circuit 220 reads out the count value and then resets it. That is, the counter circuit 220 counts the number of count signals 210_Out that are input after the exposure time starts, and resets the count value when the exposure time ends.

[0036] <Explanation of timing chart> 7 is a timing chart illustrating the waveforms of the main signals when the potential of the second floating diffusion 19 drops to the threshold potential, as described with reference to FIG. 4(d). From top to bottom, the timing chart shows the waveforms of the signal φOF, the signal Sig_FD2 indicating the potential of the second floating diffusion 19, the output signal 40_Out of the comparator 40, the count signal 210_Out, and the signal φRES.

[0037] If the time when the potential of the second floating diffusion 19 drops to the threshold potential is t1, the comparator 40 inverts the output signal 40_Out from H level to L level. Based on the inversion of the input signal from H level to L level, the second control circuit 210 outputs a pulse-shaped count signal 210_Out and also outputs a signal φOF- with a wider pulse half-width. The signal φOF shown in FIG. 7 is a signal obtained by inverting the logic level of the signal φOF- using an inverter circuit 46. The second control circuit 210 further outputs a signal φRES with a narrower pulse half-width than the signal φOF- at time t2, which is a predetermined time (e.g., 5 nsec) later than time t1.

[0038] With this configuration, the signal φRES is output after the signal φOF, which is the source of the signal φOF-, is output. Therefore, as shown in FIG. 5(a), the transistor M4 constituting the control switch unit 20 is turned off, and then the transistor M2 constituting the discharge unit 14 is turned on to start the reset operation of the second floating diffusion 19. When the reset operation of the second floating diffusion 19 starts, the level of the signal Sig_FD2 indicating the potential of the second floating diffusion 19 rises, and the second floating diffusion 19 is reset to the reset potential.

[0039] At time t3, the reset operation of the second floating diffusion 19 based on the signal φRES ends. At time t3, the control signal φOF turns off the transistor M4 that constitutes the switch unit 20. After the reset operation ends, the control signal φOF turns on the transistor M4 that constitutes the switch unit 20, and charge accumulation in the second floating diffusion 19 resumes. With this configuration, the charge that flows into the first floating diffusion 15 during the reset operation of the second floating diffusion 19 is held in the first floating diffusion 15 because the transistor M4 is turned off (FIG. 5(a)). In other words, it is possible to avoid discharge due to the reset operation. The charge accumulated in the first floating diffusion 15 during the reset operation moves to the second floating diffusion 19 when the charge accumulation in the second floating diffusion 19 resumes (FIG. 5(b)).

[0040] According to the embodiment described above, the following advantageous effects can be obtained. (1) The imaging element 3 mounted on the imaging device 1 includes a first floating diffusion 15 having a first potential to which photoelectrically converted charges are transferred, a second floating diffusion 19 having a second potential lower than the first potential, a control switch unit 20 that controls the connection between the first floating diffusion 15 and the second floating diffusion 19, an A / D conversion circuit 250 that generates a control signal according to the amount of charge accumulated in the second floating diffusion 19, and a discharge unit 14 that resets the potential of the second floating diffusion 19. This configuration makes it possible to detect a signal based on the charge generated during the reset operation of the second floating diffusion 19. For example, while the second floating diffusion 19 is being reset, the control switch unit 20 performs control so that charge does not move from the first floating diffusion 15 to the second floating diffusion 19, thereby preventing the charge that has moved from the first floating diffusion 15 to the second floating diffusion 19 from being discharged by the discharge unit 14 without being detected. Furthermore, after the second floating diffusion 19 has been reset, the control switch unit 20 performs control so that charge is transferred from the first floating diffusion 15 to the second floating diffusion 19, thereby transferring the charge temporarily held in the first floating diffusion 15 to the second floating diffusion 19 and making it possible to detect a signal based on the transferred charge.

[0041] (2) The control switch section 20 prevents the transfer of charges from the first floating diffusion 15 to the second floating diffusion 19 based on the signal φOF as a control signal. With this configuration, the A / D conversion circuit 250 generates the signal φOF at appropriate timing based on the amount of charge accumulated in the second floating diffusion 19. This allows the control switch section 20 to block the transfer of charge from the first floating diffusion 15 to the second floating diffusion 19 at appropriate timing.

[0042] (3) The discharge unit 14 as a reset unit resets the potential of the second floating diffusion 19 while the control switch unit 20 prevents the transfer of charge from the first floating diffusion 15 to the second floating diffusion 19. With this configuration, it is possible to appropriately prevent the charge that has moved from the first floating diffusion 15 to the second floating diffusion 19 from being discharged without being detected.

[0043] (4) The control switch unit 20 controls the potential between the first floating diffusion 15 and the second floating diffusion 19 (transistor M4) to be higher than the first potential, thereby preventing the movement of charge from the first floating diffusion 15 to the second floating diffusion 19. With this configuration, the transfer of charge from the first floating diffusion 15 to the second floating diffusion 19 can be appropriately prevented.

[0044] (5) The control switch unit 20 controls the potential between the first floating diffusion 15 and the second floating diffusion 19 (transistor M4) to be lower than the first potential, thereby transferring charge from the first floating diffusion 15 to the second floating diffusion 19. With this configuration, charges can be transferred appropriately from the first floating diffusion 15 to the second floating diffusion 19.

[0045] (6) The first potential is higher than the potential of the second floating diffusion 19 immediately before being reset by the discharge section 14, that is, the third potential corresponding to the threshold potential. With this configuration, charge can be appropriately transferred from the first floating diffusion 15 to the second floating diffusion 19 until the potential of the second floating diffusion 19 drops to the threshold potential.

[0046] (7) The image sensor 3 further includes a photoelectric conversion unit 12 that converts light into electric charges, and the first potential is lower than a fourth potential corresponding to a depletion potential of the photoelectric conversion unit 12. With this configuration, charges can be transferred appropriately from the photoelectric conversion section 12 to the first floating diffusion 15.

[0047] (8) The image sensor 3 repeats the accumulation of charges by the second floating diffusion 19 and the resetting of the potential of the second floating diffusion 19 by the discharge unit 14 during the set exposure time. With this configuration, accumulation and resetting of charges in pulse count type A / D conversion can be appropriately repeated.

[0048] (Variation 1) In the above-described embodiment, an example has been described in which the imaging element 3 has a back-illuminated configuration. Alternatively, the imaging element 3 may have a front-illuminated configuration in which the wiring layer 140 is provided on the incident surface side where light is incident.

[0049] (Variation 2) In the above-described embodiment, an example has been described in which a photodiode is used as the photoelectric conversion unit 12. However, a photoelectric conversion film may be used as the photoelectric conversion unit 12.

[0050] (Variation 3) The imaging element 3 may be applied to a camera, a smartphone, a tablet, a camera built into a PC, an in-vehicle camera, and the like.

[0051] (Variation 4) In the description of the embodiment, an example of A / D conversion using the pulse count method has been described. In the fourth modification of the embodiment, the pulse count method may be used in combination with another A / D conversion method different from the pulse count method. The other A / D conversion method may be, for example, a single slope A / D conversion method. In the single slope method, a comparator circuit compares the pixel signal from the pixel 10 with a reference signal called a ramp signal. The level of the ramp signal is changed in synchronization with the clock signal of the counter for the single slope method, and is correlated with the count value of the counter for the single slope method. The comparator 40 compares the pixel signal from the pixel 10 with the ramp signal, and when the level of the pixel signal from the pixel 10 substantially matches the level of the ramp signal, transitions the potential of the output signal. In the single slope method, the level of the pixel signal is detected based on the count value of a counter for the single slope method at the point when the level of the pixel signal matches the level of the ramp signal.

[0052] Although various embodiments and modifications have been described above, the present invention is not limited to these. Aspects in which the configurations shown in the embodiments and modifications are used in combination are also included within the scope of the present invention. Other aspects conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention. [Explanation of symbols]

[0053] 1...imaging device, 3...imaging element, 4...control unit, 10...pixel, 12...photoelectric conversion unit, 13...transfer unit, 14...discharge unit, 15...first floating diffusion, 16...amplification unit, 18...signal line, 19...second floating diffusion, 20...control switch unit, M1, M2, M4...transistors, 40...comparator, 44, 46...inverter circuit, 200...first control circuit, 210...second control circuit, 220...counter circuit, 250...A / D conversion circuit

Claims

1. a first photoelectric conversion unit that converts light into electric charges; an accumulation unit that accumulates the charges converted by the first photoelectric conversion unit; a discharge unit that has a first transistor to which a first control signal is applied based on the amount of charge in the storage unit, and that discharges the charge in the storage unit; a control unit that makes a potential of a charge transfer path that electrically connects the first photoelectric conversion unit and the storage unit higher than a potential of the storage unit when the charge of the storage unit is being discharged by the discharge unit; An imaging element comprising:

2. a first photoelectric conversion unit that converts light into electric charges; an accumulation unit that accumulates the charges converted by the first photoelectric conversion unit; a discharge unit that has a first transistor to which a first control signal is applied based on the amount of charge in the storage unit, and that discharges the charge in the storage unit; a control unit that controls the charge transfer path that electrically connects the first photoelectric conversion unit and the storage unit so that the charge is held in the charge transfer path that electrically connects the first photoelectric conversion unit and the storage unit when the charge of the storage unit is being discharged by the discharge unit; An imaging element comprising:

3. 3. The imaging device according to claim 1, the control unit lowers the potential of the charge transfer path when the charge of the storage unit is not being discharged by the discharge unit to a value lower than the potential of the charge transfer path when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

4. 4. The imaging device according to claim 1, the control unit sets a potential of the charge transfer path higher than a potential of the storage unit when the charge of the storage unit is not being discharged by the discharge unit. Image sensor.

5. 5. The imaging device according to claim 1, the control unit has a second transistor to which a second control signal is applied, the second control signal being output based on the amount of charge in the storage unit, and controls the charge transfer path to retain the charge when the charge in the storage unit is being discharged by the discharge unit. Image sensor.

6. 6. The imaging device according to claim 5, the first transistor includes a first gate to which the first control signal is applied; the second transistor includes a second gate to which the second control signal is applied; Image sensor.

7. 7. The imaging device according to claim 6, the first transistor is turned on when the first control signal is applied to the first gate; Image sensor.

8. 8. The imaging device according to claim 6, the second transistor is turned off when the second control signal is applied to the second gate; Image sensor.

9. 9. The imaging device according to claim 1, An imaging element having a first terminal to which a signal based on the amount of charge in the storage section is input, and a second terminal to which a reference signal is input, and including a comparison section that compares the value of the signal input to the first terminal with the value of the reference signal input to the second terminal.

10. 10. The imaging device according to claim 9, an imaging element including a conversion unit that converts the signal into a digital signal based on the comparison result of the comparison unit;

11. The imaging device according to claim 10, the conversion unit converts the signal into a digital signal based on the number of times the output signal output as the comparison result of the comparison unit is output. Image sensor.

12. The imaging device according to any one of claims 9 to 11, an imaging element including a control circuit that outputs the first control signal based on a comparison result of the comparison section;

13. The imaging device according to any one of claims 1 to 12, the first photoelectric conversion unit is disposed on a first semiconductor substrate; the discharge portion is disposed on a second semiconductor substrate stacked on the first semiconductor substrate; Image sensor.

14. The imaging device according to claim 13, the control unit is disposed on the first semiconductor substrate; Image sensor.

15. 15. The imaging device according to claim 14, the storage portion is disposed on the first semiconductor substrate; Image sensor.

16. 15. The imaging device according to claim 14, the storage portion is disposed on the second semiconductor substrate; Image sensor.

17. The imaging device according to claim 13, the control unit is disposed on the second semiconductor substrate; Image sensor.

18. 18. The imaging device according to claim 17, the storage portion is disposed on the first semiconductor substrate; Image sensor.

19. 18. The imaging device according to claim 17, the storage portion is disposed on the second semiconductor substrate; Image sensor.

20. The imaging device according to any one of claims 13 to 19, An imaging element comprising: a first connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate, the first connection portion having first conductive members that are arranged to face each other in a stacking direction in which the first semiconductor substrate and the second semiconductor substrate are stacked.

21. The imaging device according to claim 20, the first conductive member is disposed between the first photoelectric conversion unit and the second semiconductor substrate in the stacking direction; Image sensor.

22. The imaging element according to claim 20 or claim 21, the first semiconductor substrate has a second photoelectric conversion unit that converts light into electric charges and is disposed adjacent to the first photoelectric conversion unit; Image sensor.

23. The imaging device according to claim 22, An imaging element comprising a second connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate and has second conductive members arranged to face each other in the stacking direction.

24. The imaging device according to claim 23, the second conductive member is disposed between the second photoelectric conversion unit and the second semiconductor substrate in the stacking direction. Image sensor.

25. The imaging element according to any one of claims 13 to 24, An imaging element comprising a third semiconductor substrate stacked together with the first semiconductor substrate and the second semiconductor substrate.

26. The imaging device according to claim 25, the second semiconductor substrate has a first through electrode; Image sensor.

27. The imaging device according to claim 26, the third semiconductor substrate has a second through electrode; Image sensor.

28. a first photoelectric conversion unit that converts light into electric charges; a charge transfer path through which the charges converted by the first photoelectric conversion unit are transferred; a storage section for storing charges from the charge transfer path; a discharge section that discharges the charge of the storage section; a control section having a transistor to which a control signal is applied that is output based on the charge amount of the storage section; Equipped with the control unit makes the potential of the charge transfer path higher than the potential of the storage unit when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

29. a first photoelectric conversion unit that converts light into electric charges; a charge transfer path through which the charges converted by the first photoelectric conversion unit are transferred; a storage section for storing charges from the charge transfer path; a discharge section that discharges the charge of the storage section; a control section having a transistor to which a control signal is applied that is output based on the charge amount of the storage section; Equipped with the control unit controls the charge transfer path to hold the charge when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

30. 30. The imaging device according to claim 28 or 29, the control unit lowers the potential of the charge transfer path when the charge of the storage unit is not being discharged by the discharge unit to a value lower than the potential of the charge transfer path when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

31. 31. The imaging device according to claim 28, the control unit sets a potential of the charge transfer path higher than a potential of the storage unit when the charge of the storage unit is not being discharged by the discharge unit. Image sensor.

32. 32. The imaging device according to claim 28, the transistor includes a gate to which the control signal is applied; Image sensor.

33. 33. The imaging device according to claim 32, The transistor is turned off when the control signal is applied to the gate. Image sensor.

34. 34. The imaging device according to claim 28, An imaging element having a first terminal to which a signal based on the amount of charge in the storage section is input, and a second terminal to which a reference signal is input, and including a comparison section that compares the value of the signal input to the first terminal with the value of the reference signal input to the second terminal.

35. 35. The imaging device according to claim 34, an imaging element including a conversion unit that converts the signal into a digital signal based on the comparison result of the comparison unit;

36. 36. The imaging device according to claim 35, the conversion unit converts the signal into a digital signal based on the number of times the output signal output as the comparison result of the comparison unit is output. Image sensor.

37. 37. The imaging device according to claim 34, an imaging element including a control circuit that outputs the control signal based on the comparison result of the comparison section;

38. 38. The imaging device according to claim 28, the first photoelectric conversion unit is disposed on a first semiconductor substrate; the control unit is disposed on a second semiconductor substrate stacked on the first semiconductor substrate; Image sensor.

39. 39. The imaging device according to claim 38, the storage portion is disposed on the first semiconductor substrate; Image sensor.

40. 39. The imaging device according to claim 38, the storage portion is disposed on the second semiconductor substrate; Image sensor.

41. The imaging element according to any one of claims 38 to 40, An imaging element comprising: a first connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate, the first connection portion having first conductive members that are arranged to face each other in a stacking direction in which the first semiconductor substrate and the second semiconductor substrate are stacked.

42. The imaging device according to claim 41, the first conductive member is disposed between the first photoelectric conversion unit and the second semiconductor substrate in the stacking direction; Image sensor.

43. The imaging element according to claim 41 or claim 42, the first semiconductor substrate has a second photoelectric conversion unit that converts light into electric charges and is disposed adjacent to the first photoelectric conversion unit; Image sensor.

44. The imaging device according to claim 43, An imaging element comprising a second connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate and has second conductive members arranged to face each other in the stacking direction.

45. The imaging device according to claim 44, the second conductive member is disposed between the second photoelectric conversion unit and the second semiconductor substrate in the stacking direction. Image sensor.

46. The imaging device according to any one of claims 38 to 45, An imaging element comprising a third semiconductor substrate stacked together with the first semiconductor substrate and the second semiconductor substrate.

47. The imaging device according to claim 46, the second semiconductor substrate has a first through electrode; Image sensor.

48. The imaging device according to claim 47, the third semiconductor substrate has a second through electrode; Image sensor.

49. a first photoelectric conversion unit that converts light into electric charges; an accumulation unit that accumulates the charges converted by the first photoelectric conversion unit; a discharge section that discharges the charge of the storage section; a control unit that controls a charge transfer path that electrically connects the first photoelectric conversion unit and the accumulation unit; a control circuit that controls the discharge unit so that the charge of the storage unit is discharged based on the amount of charge of the storage unit; Equipped with the control circuit controls the control unit so that the potential of the charge transfer path becomes higher than the potential of the storage unit when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

50. a first photoelectric conversion unit that converts light into electric charges; an accumulation unit that accumulates the charges converted by the first photoelectric conversion unit; a discharge section that discharges the charge of the storage section; a control unit that controls a charge transfer path that electrically connects the first photoelectric conversion unit and the accumulation unit; a control circuit that controls the discharge unit so that the charge of the storage unit is discharged based on the amount of charge of the storage unit; Equipped with the control circuit controls the control unit so that charges are held in the charge transfer path when the charges in the storage unit are being discharged by the discharge unit. Image sensor.

51. 51. The imaging device according to claim 49 or claim 50, the control circuit controls the control unit so that the potential of the charge transfer path when the charge of the storage unit is not being discharged by the discharge unit is lower than the potential of the charge transfer path when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

52. 52. The imaging device according to claim 49, the control circuit controls the control unit so that the potential of the charge transfer path when the charge in the storage unit is not being discharged by the discharge unit is higher than the potential of the storage unit. Image sensor.

53. 53. The imaging device according to any one of claims 49 to 52, An imaging element having a first terminal to which a signal based on the amount of charge in the storage section is input, and a second terminal to which a reference signal is input, and including a comparison section that compares the value of the signal input to the first terminal with the value of the reference signal input to the second terminal.

54. 54. The imaging device according to claim 53, an imaging element including a conversion unit that converts the signal into a digital signal based on the comparison result of the comparison unit;

55. 55. The imaging device according to claim 54, the conversion unit converts the signal into a digital signal based on the number of times the output signal output as the comparison result of the comparison unit is output. Image sensor.

56. 56. The imaging device according to claim 53, The control circuit controls the discharge unit based on the comparison result of the comparison unit. Image sensor.

57. 57. The imaging device according to claim 49, the first photoelectric conversion unit is disposed on a first semiconductor substrate; the discharge portion is disposed on a second semiconductor substrate stacked on the first semiconductor substrate; Image sensor.

58. 58. The imaging device according to claim 57, the control unit is disposed on the first semiconductor substrate; Image sensor.

59. 59. The imaging device according to claim 58, the storage portion is disposed on the first semiconductor substrate; Image sensor.

60. 59. The imaging device according to claim 58, the storage portion is disposed on the second semiconductor substrate; Image sensor.

61. 58. The imaging device according to claim 57, the control unit is disposed on the second semiconductor substrate; Image sensor.

62. 62. The imaging device according to claim 61, the storage portion is disposed on the first semiconductor substrate; Image sensor.

63. 62. The imaging device according to claim 61, the storage portion is disposed on the second semiconductor substrate; Image sensor.

64. a first photoelectric conversion unit that converts light into electric charges; a charge transfer path through which the charges converted by the first photoelectric conversion unit are transferred; a storage section for storing charges from the charge transfer path; a discharge section that discharges the charge of the storage section; a control unit for controlling the charge transfer path; a control circuit that controls the control unit based on the amount of charge in the storage unit; Equipped with the control circuit controls the control unit so that the potential of the charge transfer path becomes higher than the potential of the storage unit. Image sensor.

65. a first photoelectric conversion unit that converts light into electric charges; a charge transfer path through which the charges converted by the first photoelectric conversion unit are transferred; a storage section for storing charges from the charge transfer path; a discharge section that discharges the charge of the storage section; a control unit for controlling the charge transfer path; a control circuit that controls the control unit based on the amount of charge in the storage unit; Equipped with the control circuit controls the control unit so that charges are held in the charge transfer path when the charges in the storage unit are being discharged by the discharge unit. Image sensor.

66. 66. The imaging device according to claim 64 or claim 65, the control circuit controls the control unit so that the potential of the charge transfer path when the charge of the storage unit is not being discharged by the discharge unit is lower than the potential of the charge transfer path when the charge of the storage unit is being discharged by the discharge unit. Image sensor.

67. 67. The imaging device according to claim 64, the control circuit controls the control unit so that the potential of the charge transfer path when the charge in the storage unit is not being discharged by the discharge unit is higher than the potential of the storage unit. Image sensor.

68. 68. The imaging device according to any one of claims 64 to 67, An imaging element having a first terminal to which a signal based on the amount of charge in the storage section is input, and a second terminal to which a reference signal is input, and including a comparison section that compares the value of the signal input to the first terminal with the value of the reference signal input to the second terminal.

69. 69. The imaging device according to claim 68, an imaging element including a conversion unit that converts the signal into a digital signal based on the comparison result of the comparison unit;

70. 70. The imaging device according to claim 69, the conversion unit converts the signal into a digital signal based on the number of times the output signal output as the comparison result of the comparison unit is output. Image sensor.

71. 71. The imaging device according to claim 68, The control circuit controls the control unit based on the comparison result of the comparison unit. Image sensor.

72. 72. The imaging device according to claim 64, the first photoelectric conversion unit is disposed on a first semiconductor substrate; the control unit is disposed on a second semiconductor substrate stacked on the first semiconductor substrate; Image sensor.

73. 73. The imaging device according to claim 72, the storage portion is disposed on the first semiconductor substrate; Image sensor.

74. 73. The imaging device according to claim 72, the storage portion is disposed on the second semiconductor substrate; Image sensor.

75. The imaging element according to any one of claims 72 to 74, An imaging element comprising: a first connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate, the first connection portion having first conductive members that are arranged to face each other in a stacking direction in which the first semiconductor substrate and the second semiconductor substrate are stacked.

76. The imaging device according to claim 75, the first conductive member is disposed between the first photoelectric conversion unit and the second semiconductor substrate in the stacking direction; Image sensor.

77. The imaging element according to claim 75 or claim 76, the first semiconductor substrate has a second photoelectric conversion unit that converts light into electric charges and is disposed adjacent to the first photoelectric conversion unit; Image sensor.

78. The imaging device according to claim 77, An imaging element comprising a second connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate and has second conductive members arranged to face each other in the stacking direction.

79. The imaging device according to claim 78, the second conductive member is disposed between the second photoelectric conversion unit and the second semiconductor substrate in the stacking direction. Image sensor.

80. The imaging element according to any one of claims 72 to 79, An imaging element comprising a third semiconductor substrate stacked together with the first semiconductor substrate and the second semiconductor substrate.

81. The imaging device according to claim 80, the second semiconductor substrate has a first through electrode; Image sensor.

82. The imaging device according to claim 81, the third semiconductor substrate has a second through electrode; Image sensor.

83. 75. The imaging device according to claim 1, an image pickup element including a transfer section that is disposed on the charge transfer path closer to the first photoelectric conversion section than the control section and that transfers the charges converted by the first photoelectric conversion section;

84. 84. The imaging device according to claim 83, the transfer unit transfers the charges overflowing from the first photoelectric conversion unit to the charge transfer path. Image sensor.

85. An imaging device comprising the imaging element according to any one of claims 1 to 84.

86. 86. The imaging device of claim 85, an imaging device comprising a generation unit electrically connected to the imaging element and configured to generate image data;

87. 87. The imaging device according to claim 85 or claim 86, An imaging device comprising an optical system that emits light to the imaging element.

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