High-frequency signal generator

Abstract

To accommodate higher speed in frequency variable function by shortening delay time, and to obtain high C / N ratio by suppressing spurious signals or phase noise.SOLUTION: A high frequency generation device of the invention includes: (A) a clock signal generation part for generating a clock signal using harmonics component generated by an amplifier having non-linearity; (B) a DDS (Direct Digital Synthesizer) using the clock signal as a system clock for operating internal process, for generating a frequency signal having a frequency set by frequency setting data; and (C) high frequency part configured with non-active type frequency multiplier which does not use an active element, for increasing frequency of the frequency signal generated by the DDS. To accommodate higher speed and higher C / N ratio, the frequency of the DDS frequency signal is increased by using harmonic component generated by the amplifier having non-linearity.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a high frequency signal generator with a variable output frequency. [Background technology]

[0002] Linear amplifier type high frequency power supplies used in semiconductor manufacturing equipment, liquid crystal panel manufacturing equipment, etc. supply high frequency signals (RF signals) in the VHF to UHF band (100 MHz to 1 GHz). High frequency power supplies are equipped with a high frequency signal generator and generate high frequency signals (RF signals) with variable frequencies.

[0003] BACKGROUND ART As a high frequency signal generator that generates a high frequency signal (RF signal) with a variable frequency, a frequency synthesizer using a DDS (Direct Digital Synthesizer) is known (Patent Documents 1 and 2).

[0004] These frequency synthesizers are used as peripherals for DDS, such as frequency mixers and PLL It has a circuit.

[0005] 4A shows an example of the configuration of a high-frequency signal generator equipped with a frequency mixer. High-frequency signal generator 100 includes reference signal oscillator 101 that generates a periodic signal with a specific frequency, DDS 102 that uses the output of reference signal oscillator 101 as a clock signal and generates a signal with a frequency specified by frequency setting data, local oscillator 103 that outputs a local oscillation wave, mixer 104 that mixes the output signal of DDS 102 with the local oscillation wave, multiplier 105 that multiplies the signal mixed by mixer 104, and frequency divider 106 that divides the output signal of multiplier 105. The output frequency is variable by changing the division ratio of frequency divider 106 based on the frequency setting data.

[0006] Figure 4B shows PLL1 shows an example of the configuration of a high frequency signal generator having a circuit. The high frequency signal generator 110 comprises a clock signal source 111 that outputs a clock signal, a DDS 112 that generates a signal of a frequency specified by frequency setting data based on the clock signal, a PLL circuit 113 that outputs an oscillation signal of a set frequency based on the frequency of the DDS signal, and a control unit 114 that outputs frequency setting data. The PLL circuit 113 comprises a phase comparator 113a, a loop filter 113b, and a voltage controlled oscillator (VCO). VCO ) 113c and a frequency divider 113d. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-124740 [Patent Document 2] Japanese Patent Application Publication No. 2022-113497 Summary of the Invention [Problem to be solved by the invention]

[0008] Using conventional DDS Around High-frequency signal generators, such as frequency synthesizers that generate frequency signals with variable wave numbers, have problems such as delay times that occur within PLL circuits, and a decrease in the carrier-to-noise ratio (C / N ratio) due to spurious and phase noise that occur in DDS peripheral devices and PLL circuits.

[0009] When making the frequency variable, the frequency mixer (mixer) and the voltage controlled oscillator (VCO) of the PLL circuit VCO ) response characteristics cause a delay in the output signal, and the lock-up time required for the PLL output to lock to a specified frequency within the PLL loop is approximately ten ms~number hundred ms.

[0010] FIG. 5 shows an example of the delay time of a high-frequency signal generator equipped with a PLL circuit. When switching the frequency from f1 to f2, a process is performed to write the PLL frequency data to the DDS. In this case, a write time of 1.72 ms is required, for example. do.

[0011] In addition, frequency mixers and voltage controlled oscillators (VCOs) in PLL circuits VCO Spurious and phase noise caused by circuit elements such as EMI / RF noise reduce the carrier-to-noise ratio (C / N ratio) of the frequency signal generated by the high-frequency signal generator.

[0012] Figure 6 is a schematic diagram for explaining spurious and phase noise. When the modulation signal that phase-modulates the carrier signal is a periodic signal, spurious harmonics occur at frequencies that are integer multiples of the fundamental wave. Phase noise occurs in both sidebands of the carrier and is expressed as the carrier-to-noise ratio (C / N ratio).

[0013] When a high-frequency signal generator is required to have a high-speed variable frequency and an output signal with a high C / N ratio, conventional high-frequency signal generators have the problem that it is difficult to achieve high speeds and a high C / N ratio due to delays in lock-up time, spurious signals, and phase noise.

[0014] The present invention aims to solve the above-mentioned conventional problems, and to shorten the delay time in the variable frequency function to accommodate higher speeds, and to suppress spurious and phase noise to accommodate a high C / N ratio. [Means for solving the problem]

[0015] The high frequency signal generator of the present invention comprises: (A) a clock signal generating unit that generates a clock signal using harmonic components generated by a nonlinear amplifier; (B) A DDS (Direct Digital Synthesizer) that uses the clock signal as a system clock for operating internal processing and generates a frequency signal having a frequency set by the frequency setting data; (C) A high frequency multiplier that uses no active elements and that increases the frequency of the frequency signal generated by the DDS; Equipped with.

[0016] (A: Clock signal generation section) The high-frequency signal generator of the present invention uses a clock signal generated by a clock signal generation unit as a system clock for operating the internal processing of the DDS. The clock signal generation unit includes a nonlinear amplifier, which generates harmonic components relative to the fundamental wave due to the nonlinearity. The high-frequency signal generator of the present invention generates a high-frequency signal using the harmonic components generated by the amplifier, and uses this high-frequency signal as the clock signal for the system clock of the DDS.

[0017] The clock signal generating unit can generate a clock signal with a high C / N ratio (carrier-to-noise ratio) and low spurious by using harmonic components generated by the nonlinear amplifier.

[0018] The clock signal generating unit of the present invention comprises: (a) A reference signal oscillator that generates a periodic signal of a specific frequency as a reference signal. (b) A nonlinear amplifier that generates harmonic components of the fundamental wave of the reference signal. (c) Narrow-band harmonic filter (first BPF) that passes only harmonic components (d) A high-frequency amplifier that amplifies the harmonic components that have passed through the narrow-band harmonic filter. Equipped with (e) The output signal of the high frequency amplifier is generated as a clock signal.

[0019] A nonlinear amplifier generates harmonic components in addition to the fundamental frequency due to its nonlinearity. The present invention generates a high-frequency signal to be used as a clock signal by utilizing the harmonic components generated by the nonlinear amplifier. Since the harmonic components are integer multiples of the fundamental frequency, if the fundamental frequency of the reference signal of the reference signal oscillator is highly accurate, the accuracy of the obtained high-frequency signal will also be highly accurate. A buffer amplifier or a class C amplifier can be used as the nonlinear amplifier.

[0020] (B:DDS) The DDS (Direct Digital Synthesizer) generates a frequency signal with a frequency set by the frequency setting data. of The DDS generates a frequency signal with the frequency set by the frequency setting data. By changing the frequency setting data, the frequency of the frequency signal can be made variable.

[0021] The DDS of the present invention performs processing using the clock signal generated by the clock signal generator as the system clock. Since the DDS operates with a clock signal with a high C / N ratio (carrier-to-noise ratio) and low spurious, the C / N ratio of the output frequency is increased.

[0022] (C: High frequency section) The high frequency multiplier increases the frequency of the frequency signal generated by the DDS to generate a high frequency signal. The high frequency multiplier is composed of a non-active frequency multiplier that does not use active elements. In active multipliers, spurious emissions and phase noise occur in frequency bands other than the fundamental frequency due to the non-linearity of the active elements. In contrast, the non-active frequency multiplier included in the high frequency signal generator of the present invention is configured without active elements, and therefore can suppress the generation of spurious emissions and phase noise caused by the non-linearity of the active elements.

[0023] The high frequency part is (f) Differential output section that generates a differential signal of the DDS frequency signal (g) A non-active frequency multiplier that multiplies the frequency of a differential signal (h) A target frequency band filter that passes the target frequency component from the multiplied signal. Equipped with (i) The frequency component that has passed through the target frequency band filter (second BPF) is output as an output signal.

[0024] The differential output section (f) generates a signal with the polarity inverted from the DDS frequency signal, and uses the difference of these signals as the differential output signal, thereby improving noise resistance without reducing the potential difference.A differential amplifier or a harmonic transformer can be used as the differential output section.

[0025] Inactive frequency multipliers (g) do not have the nonlinearity of active elements, so they can suppress spurious and phase noise. As inactive frequency multipliers (g), rectifier multipliers consisting of Schottky diodes or rectifier diodes can be used.

[0026] The frequency converter of the present invention generates a differential signal from the frequency signal of the DDS and multiplies the frequency of the generated differential signal using a non-active frequency multiplier, thereby achieving a stepwise frequency increase. This stepwise frequency increase allows for a high frequency signal with a higher C / N ratio and less spurious emissions than when the frequency is increased at the DDS stage. [Effects of the Invention]

[0027] As described above, according to the high-frequency signal generator of the present invention, the frequency variable function can shorten the delay time to accommodate higher speeds, and suppress spurious and phase noise to accommodate a high C / N ratio. [Brief explanation of the drawings]

[0028] [Figure 1] 1 is a diagram illustrating an example of the configuration of a high-frequency signal generator according to the present invention; [Figure 2] FIG. 10 is a diagram for explaining processing time in a DDS. [Figure 3] FIG. 10 is a diagram illustrating an example of phase noise. [Figure 4] FIG. 1 is a diagram illustrating an example of a conventional configuration of a high-frequency signal generator. [Figure 5] FIG. 10 is a diagram illustrating an example of a delay time of a high-frequency signal generator including a PLL circuit. [Figure 6] FIG. 1 is a schematic diagram for explaining spurious and phase noise. DETAILED DESCRIPTION OF THE INVENTION

[0029] (1) Schematic configuration of the high-frequency signal generator of the present invention The schematic configuration of the high frequency signal generator of the present invention will be described below with reference to FIG. The high frequency signal generator 10 includes a control unit 1, a DDS 2, a clock signal generating unit 3, and a high frequency generating unit 4.

[0030] The control unit 1 determines frequency setting data that sets the frequency of the high-frequency signal output by the high-frequency signal generator 10. The frequency of the high-frequency signal can be made variable by changing the frequency setting data.

[0031] (DDS) A DDS (Direct Digital Synthesizer) 2 receives frequency setting data set by the control unit 1 and generates a frequency signal having a frequency set by the frequency setting data.

[0032] DDS2 is a digitally synthesized frequency synthesizer that linearly increases a series of digital states generated by a phase accumulator to form a periodic numerical ramp representing the instantaneous phase of the output waveform. The numerical ramp is then converted to a sine wave by digitally inputting the phase data into a lookup table that calculates the amplitude of the sine wave. A digital-to-analog converter is applied to the DDS2, which then outputs the desired analog output after filtering. The digital processing of the DDS is based on a system clock generated from an external reference clock.

[0033] The clock signal generating unit 3 generates a clock signal to be used as a system clock in the DDS 2. The high frequency increasing unit 4 increases the frequency of the frequency signal generated by the DDS 2 to a predetermined high frequency.

[0034] (Clock signal generation section) The clock signal generated by the clock signal generating unit 3 is used as a system clock to operate the internal processing of the DDS2. hand It is used.

[0035] The clock signal generating unit 3 of the present invention includes a nonlinear amplifier. This amplifier generates harmonic components relative to the fundamental wave due to the nonlinearity. The high-frequency signal generating device 10 of the present invention generates a high-frequency signal using the harmonic components generated by the amplifier, and uses this high-frequency signal as a clock signal for the system clock of the DDS2.

[0036] The clock signal generating unit 3 uses the amplifier not as a means for amplifying a signal but as a means for generating a high frequency signal. waves DDS2 operates on a clock signal with a high C / N ratio (carrier-to-noise ratio) and low spurious, which increases the C / N ratio of the output frequency.

[0037] Therefore, the high frequency signal generator 10 of the present invention generates a clock signal with a high C / N ratio (carrier to noise ratio) and low spurious by using harmonic components generated by an amplifier having nonlinearity.

[0038] The clock signal generating unit 3 (a) A reference signal oscillator 3a that generates a periodic signal of a specific frequency as a reference signal. (b) A nonlinear amplifier 3b that generates harmonic components of the fundamental wave of the reference signal of the reference signal oscillator 3a. (c) a narrow-band harmonic filter (first BPF) 3c that passes only the harmonic components generated by the nonlinear amplifier 3b; (d) High-frequency amplifier 3d that amplifies the harmonic components that have passed through narrow-band harmonic filter 3c Equipped with (e) The output signal of the high frequency amplifier 3d is generated as a clock signal.

[0039] Nonlinear amplifier 3b generates harmonic components in addition to the fundamental frequency due to its nonlinearity. The harmonic components generated by nonlinear amplifier 3b are used to generate a high-frequency signal used as a clock signal. Since harmonic components are integer multiples of the fundamental frequency, if the fundamental frequency of the reference signal from reference signal oscillator 3a is highly accurate, the high-frequency signal obtained by high-frequency amplifier 3d will also be highly accurate. As an example, a buffer amplifier or a class C amplifier can be used as nonlinear amplifier 3b.

[0040] An example of the clock signal generating unit 3 will be shown below. For example, a 60 MHz crystal oscillator or TCXO is used as the reference signal oscillator 3a. The nonlinear amplifier 3b generates harmonic components with frequencies that are integer multiples of the fundamental wave by passing the 60 MHz reference signal through it. The TCXO is a temperature-compensated crystal oscillator that adds a temperature compensation circuit to the crystal oscillator to suppress frequency fluctuations caused by changes in the ambient temperature.

[0041] For example, narrow-band harmonic filter 3c can be an LC ladder filter, a SAW surface acoustic wave filter, an MCF monolithic crystal filter, etc. When generating a clock signal using a 10th harmonic component, narrow-band harmonic filter 3c should be a band-pass filter BPF with a center frequency of 600 MHz and a bandwidth of ±1 MHz.

[0042] A high frequency signal having a center frequency of 600 MHz that has passed through the narrow band harmonic filter 3c is output as the clock signal Sysclk to be used as the system clock in the DDS2.

[0043] The sampling theorem states that there is a relationship between the DDS2 output frequency fo and the clock signal Sysclk. 、It is required that Sysclk > 2fo. Furthermore, phase noise components are expressed as 20·log(fo / f_sysclk) dB, and the greater the frequency f_sysclk of the clock signal Sysclk is than twice the output frequency fo, the more phase noise and spurious signals are reduced. Furthermore, because DDS2 is configured to generate the output frequency fo by writing frequency data and does not include a PLL circuit, delays due to lock-up time are suppressed.

[0044] FIG. 2 is a diagram for explaining the processing time in DDS2. In the example shown in FIG. 2A, the period required to write frequency data is 32 μs (32×10 -6 sec), and the shift interval for switching frequencies based on frequency data is 16 μs (16 × 10 -6 sec).

[0045] Figure 2B compares an example using a DDS of the present invention with an example using a PLL circuit. Figure 2B(a) is an example using a DDS, and Figure 2B(b) is an example using a PLL circuit. Figure 2B(a) and Figure 2A show the same example, but the time scale in Figure 2B(a) has been reduced to match the time scale of the PLL circuit.

[0046] In an example using a PLL circuit, the interval required to write the PLL frequency data is 1.72 ms, and the shift interval for switching the frequency based on the PLL frequency data is 38.67 ms when switching from 450 MHz to 460 MHz, and 34.67 ms when switching from 460 MHz to 450 MHz.

[0047] (High frequency section) The high frequency converter 4 is configured by a non-active frequency multiplier that does not use an active element, and increases the frequency of the frequency signal generated by the DDS 2.

[0048] The high frequency converter 4 generates a high frequency signal by increasing the frequency of the frequency signal generated by the DDS 2. The high frequency converter 4 is configured by a non-active frequency multiplier that does not use any active elements.

[0049] In active frequency multipliers, spurious emissions and phase noise occur in frequency bands other than the fundamental frequency due to the nonlinearity of the active elements. In contrast, the nonactive frequency multiplier included in the high-frequency signal generator of the present invention is configured without active elements. Because it is configured without active elements, the generation of spurious emissions and phase noise caused by the nonlinearity of the active elements is suppressed.

[0050] The high frequency generating unit 4 is (f) A differential output unit 4a that generates a differential signal of the DDS2 frequency signal (g) a non-active frequency multiplier 4b that multiplies the frequency of the differential signal from the differential output section 4a; (h) a target frequency band filter 4c that passes a target frequency component from the multiplied signal obtained by the inactive frequency multiplier 4b; Equipped with (i) The frequency component that has passed through the target frequency band filter (second BPF) 4c is output as an output signal.

[0051] The differential output unit 4a generates a signal with an inverted polarity relative to the DDS2 frequency signal, and the difference between these signals is used as a differential output signal. By using a differential output signal, common-mode noise can be suppressed and noise resistance can be improved without reducing the potential difference. For example, a differential amplifier or a harmonic transformer can be used as the differential output unit. Figure 1 shows an example configuration using a harmonic transformer as the differential output unit 4a.

[0052] The non-active frequency multiplier 4b does not have the non-linearity of active elements, and therefore can suppress spurious and phase noise. A rectifying multiplier composed of a Schottky diode or a rectifying diode can be used as the non-active frequency multiplier 4b.

[0053] For example, an LC Landau filter, a SAW surface acoustic wave filter, or the like can be applied to the target frequency band filter 4c.

[0054] An example of the frequency in the high frequency generating section 4 is shown below. This example shows how to output a high-frequency signal with a target frequency of 450 MHz using a DDS2 device system clock Sysclk frequency f_sysclk of 1 GSPS (giga samples per second).

[0055] The control unit 1 sends 225 MHz frequency data to the DDS 2, which receives the frequency data and outputs a 225 MHz sine wave signal. The differential output unit 4a converts the 225 MHz sine wave signal into a differential signal. Inactive Frequency Multiplier 4b The 225MHz differential signal is multiplied by 1. When multiplied by 2, a high frequency signal of 450MHz is output.

[0056] The frequency converter 4 of the present invention generates a differential signal from the frequency signal of the DDS 2 and multiplies the frequency of the generated differential signal by the inactive frequency multiplier 4b, thereby increasing the frequency in stages. This stepwise increase in frequency makes it possible to obtain a high-frequency signal with a higher C / N ratio and less spurious than when the frequency is increased at the DDS stage.

[0057] Figure 3 shows an example of phase noise. In Figure 3, the phase noise is ±1kΩ for the output frequency fo. Hz 4 shows the phase noise level at

[0058] In a configuration using a PLL circuit, the output frequency fo is ±1k when 400MHz. Hz On the other hand, in the case of the present invention, the phase noise level is ±1k when the output frequency fo is 220 MHz. Hz The phase noise level at is -75.8dB, and the output frequency fo is ±1k Hz The phase noise level at this point is −76.8 dB. This example shows that the phase noise level of the high-frequency signal generator of the present invention is improved in terms of phase noise suppression compared to a configuration using a PLL circuit. [Industrial Applicability]

[0059] The high frequency signal generator of the present invention can be applied to a high frequency power source (RF generator) used in semiconductor manufacturing equipment, liquid crystal panel manufacturing equipment, and the like. [Explanation of symbols]

[0060] 1. Control section 2 DDS (Direct Digital Synthesizer) 3. Clock signal generation section 3a Reference signal oscillator 3b Nonlinear amplifier 3c Narrowband Harmonic Filter 3d high frequency amplifier 4 High frequency section 4a Differential output section 4b Inactive Frequency Multiplier 4c Target frequency band filter 10 High frequency signal generator 100 High frequency signal generator 101 Reference Signal Oscillator 102 DDS 103 Local Oscillator 104 Mixer 105 Multiplier 106 Frequency divider 110 High frequency signal generator 111 Clock signal source 112 DDS 113 PLL circuit 113a phase comparator 113b Loop Filter 113c Voltage Controlled Oscillator ( VCO ) 113d divider 114 Control Unit

Claims

1. a clock signal generating unit that generates a clock signal using harmonic components generated by a nonlinear amplifier; a DDS (Direct Digital Synthesizer) that uses the clock signal as a system clock for operating internal processing and generates a frequency signal having a frequency set by frequency setting data; a high frequency multiplier configured by an inactive frequency multiplier that does not use an active element, and that increases the frequency of the frequency signal generated by the DDS; Equipped with The high frequency generating unit is a differential output section for generating a differential signal of the frequency signal of the DDS; a non-active frequency multiplier that multiplies the frequency of the differential signal; a target frequency band filter that passes a target frequency component from the multiplied signal; Equipped with The frequency component that has passed through the target frequency band filter is used as an output signal. High frequency signal generator.

2. The clock signal generating unit a reference signal oscillator that generates a periodic signal of a specific frequency as a reference signal; a nonlinear amplifier that generates harmonic components of the fundamental wave of the reference signal; a narrowband harmonic filter that passes only the harmonic components; a high frequency amplifier that amplifies the harmonic components that have passed through the narrow band harmonic filter; Equipped with generating an output signal of the high-frequency amplifier as a clock signal; 2. The high frequency signal generator according to claim 1.

3. The nonlinear amplifier is a buffer amplifier or a class C amplifier.

3. The high frequency signal generator according to claim 2.

4. the differential output unit is a differential amplifier or a harmonic transformer, The non-active frequency multiplier is a rectifying multiplier configured with a Schottky diode or a rectifying diode.

4. The high frequency signal generator according to claim 1.

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