signal processing devices

Abstract

To allow a signal processing device used in a wireless terminal or the like to correctly detect a signal of each frequency from a communication signal including signals of a plurality of frequencies with a simple configuration.SOLUTION: A signal processing device 44 includes: a first detection unit 4421 that detects a communication signal including signals of a plurality of frequencies; and a second detection unit 4422 that detects the communication signal from which a first signal of a first frequency has been removed with a polarity opposite to that of the first detection unit 4421. The signal processing device combines and outputs a detection output of the first detection unit 4421 and a detection output of the second detection unit 4422.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a wireless terminal mounted on, for example, a vehicle and its components. [Background technology]

[0002] For example, in V2X (Vehicle to Everything) services, the wireless terminals (antennas, communication devices and their components) installed in vehicles are becoming more and more sophisticated. While V2X services using the 5.9 GHz band are currently being developed, services using the 26 GHz, 28 GHz and 60 GHz bands are also being considered for the future. Prior art related to V2X services includes, for example, the technology disclosed in Patent Document 1. In this technology, a wireless communication base station performs provisioning for the V2X service, i.e., predicts and prepares resources such as networks and facilities so that they can be provided at the required timing to wireless terminals on vehicles that use the V2X service. That is, when the base station broadcasts V2X support information, the wireless terminals on the vehicles that receive it transmit V2X terminal information. Upon receiving the V2X terminal information, the base station allocates V2X service resources for the wireless terminals on the vehicles. Because the vehicles are moving, the wireless terminals on the vehicles need to correctly receive the V2X support information and quickly transmit the V2X terminal information. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-168495 Summary of the Invention [Problem to be solved by the invention]

[0004] Wireless terminals installed in vehicles and other mobile devices typically have limited installation locations and space. Therefore, wireless terminals often share one or more antennas with onboard communication devices that use communication signals at multiple frequencies. Wireless terminals also have the ability to switch between transmitting and receiving communication signals, modulate multiple signals and superimpose them on a signal line during transmission, and then demultiplex each modulated wave from the signal line and detect the original signal during reception. Serial communication is often used as a communication method to avoid an increase in circuit components. In recent years, digital signals have become increasingly common in onboard communication devices. In such cases, the wireless terminal connected to the onboard communication device is equipped with a means for converting detected signals into digital signals during reception.

[0005] In wireless terminals on mobile devices such as vehicles, when multiple communication signals share a signal line, one of the problems is that the receiving side is prone to unexpected erroneous detection of the communication signal, and the circuit configuration cannot be simplified to avoid this. For example, when multiple modulated waves received via serial communication are branched and each branched signal is directly detected, the waveform of the branched signal becomes distorted, making it easy for the original signal to be erroneously detected. Erroneous detection of the branched signal can lead to malfunctions in on-board communication devices that use the original signal.

[0006] In particular, in the high-frequency bands used by V2X services, unintended signals containing radiation noise at frequencies outside the design range are likely to be mixed into signal lines. Therefore, it is difficult to share a single signal line or electronic circuit for communication signals of multiple frequencies in the high-frequency bands used by V2X services. In such high-frequency bands, it is common to create circuit boards according to the number of communication signals used, and to provide narrowband matching circuits, load fluctuation suppression circuits, etc., on the signal lines formed on each circuit board. This not only increases the cost of circuit design, but also makes it difficult to reduce the circuit area.

[0007] One object of the present invention is to provide a component of a wireless terminal that can accurately detect signals of each frequency from a communication signal that includes signals of multiple frequencies with a simple configuration. Other objects of the present invention will become apparent from the description of this specification. [Means for solving the problem]

[0008] One aspect of the present invention is a signal processing device comprising a first detection unit that detects a communication signal including signals of multiple frequencies, and a second detection unit that detects the communication signal from which a first signal of a first frequency has been removed with a polarity opposite to that of the first detection unit, and which combines and outputs the detection output of the first detection unit and the detection output of the second detection unit. According to this signal processing device, it is possible to correctly detect signals of each frequency, for example, a first signal of a first frequency, from a communication signal containing signals of multiple frequencies, with a simple configuration. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 2 is a diagram illustrating the configuration of a wireless terminal according to the present embodiment. [Figure 2] FIG. 2 is a configuration diagram of a signal processing device included in a wireless terminal. [Figure 3] 1A and 1B are diagrams illustrating an example of the waveforms of a pulse signal in which a transient response occurs and a digital signal after A / D conversion. [Figure 4] FIG. 2 is a diagram illustrating an example of the configuration of a demultiplexing unit. [Figure 5] FIG. 10 is a diagram illustrating an example of a signal transmitted through the f1 path. [Figure 6] FIG. 2 is a diagram illustrating an example of the configuration of a detection unit. [Figure 7] 10A and 10B are diagrams illustrating differences in signal levels of unintended signals depending on whether or not a load resistor is present. [Figure 8] 10A and 10B are diagrams illustrating differences in polarity of unintended signals depending on whether or not a load resistor is present; [Figure 9] FIG. 10 is a diagram showing an example of the waveform of an f1 detection signal. [Figure 10] FIG. 10 is a diagram showing an example of the waveform of an f2 detection signal. [Figure 11]1 is a configuration diagram showing an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0010] An embodiment of the present invention applied to a wireless terminal attached to a vehicle will be described below. FIG. 1 is a configuration diagram of a wireless terminal 1 according to this embodiment. The wireless terminal 1 is a communication device having an ECU (Electronic Control Unit) 2 and a bidirectional amplifier 4 connected to an antenna 3. The ECU 2 is a control unit that controls an in-vehicle communication network and / or vehicle drive control. The antenna 3 is an antenna that enables communication for performing V2X services with an external communication system (hereinafter referred to as "V2X communication"). The bidirectional amplifier 4 is housed in a housing separate from the ECU 2 and the antenna 3. The housing is provided with a unit terminal 11 for connection to the ECU 2 and an antenna terminal 12 for connection to the antenna 3. The ECU 2 and the unit terminal 11, and the antenna 3 and the antenna terminal 12 are connected to each other via RF (Radio Frequency) cables, for example, coaxial cables.

[0011] The bidirectional amplifier 4 includes a front-end module (FEM) 41, a microcontroller unit (MCU) 42, a power supply circuit (PS) 43, and a signal processing device 44. The FEM 41 performs RF processing for various types of information exchanged between the antenna 3 and the ECU 2 via communication signals. The FEM 41 is configured by modularizing components such as a tuner, a transmission / reception switch, a duplexer, a power amplifier that functions during transmission, and a low-noise amplifier that functions during reception. The MCU 42 is one of the control means that controls the FEM 41 and the signal processing device 44 to perform predetermined operations. The MCU 42 transmits information addressed to the ECU 2 from the FEM 41 to the signal processing device 44. The MCU 42 also transmits information addressed to the FEM 41 from the ECU 2 to the signal processing device 44.

[0012] In this specification, the signal line between the ECU 2, the unit terminal 11, and the core wire of the RF cable and the FEM 41 is referred to as the main signal line 401. A cut capacitor C0 that cuts DC components is inserted in the main signal line 401. The signal processing device 44 is also connected to the main signal line 401. A power supply circuit (PS) 43 is also connected to the main signal line 401 via an RF cut inductor L0 that cuts RF components. The power supply circuit (PS) 43 converts power supplied from the ECU 2 into power for driving the bidirectional amplifier 4. Therefore, the power supplied from the ECU 2 and an RF communication signal are superimposed on the main signal line 401. Note that the power supply circuit (PS) 43 may be configured to directly supply power from the ECU 2 to the FEM 41, the MCU 42, and the signal processing device 44 without conversion.

[0013] The signal processing device 44 transmits the following three communication signals in a serial communication format. Tx / Rx signals from ECU2 to FEM41 -CONTROL signal from ECU2 to FEM41 LOG signal from FEM41 to ECU2

[0014] The Tx / Rx signal is a single-pulse signal used for switching control between uplink and downlink (transmission system and reception system) in V2X communication, a Cal response (response for establishing a communication channel) from the MCU 42, and the like. The pulse width of this single-pulse signal is a time width of several μsec to several msec. Because of the above-mentioned role, the Tx / Rx signal is an important signal that does not allow for unnecessary delays or erroneous detection. The Tx / Rx signal is generated by the ECU 2 modulating a subcarrier wave of a first frequency f1, which is lower than the RF signal, using a predetermined modulation method and transmitting it to the signal processing device 44. The signal processing device 44 detects this modulated wave, demodulates the Tx / Rx signal, and transmits it to the MCU 42. The MCU 42 controls the FEM 41 using the Tx / Rx signal. In the following explanation, the modulated Tx / Rx signal may be referred to as an "f1 modulated wave," and the signal obtained by detecting the f1 modulated wave may be referred to as an "f1 detected signal."

[0015] The CONTROL signal is a data sequence (a pulse sequence that represents information by the combination of pulses) signal for changing the settings of the FEM 41 via the MCU 42. This data sequence signal is carried by modulating a carrier wave of the second frequency f2 using a predetermined modulation method. The CONTROL signal is output by the ECU 2. That is, the ECU 2 modulates a subcarrier wave of the second frequency f2, which is lower than the RF signal, using a predetermined modulation method and transmits it to the signal processing device 44. The signal processing device 44 detects this modulated wave, demodulates the CONTROL signal, and transmits it to the MCU 42. The MCU 42 changes the settings of the FEM 41 using the CONTROL signal. In the following explanation, the modulated CONTROL signal may be referred to as an "f2 modulated wave," and the signal obtained by detecting the f2 modulated wave may be referred to as an "f2 detected signal."

[0016] The LOG signal is a data string signal that indicates feedback information such as transmission power, temperature, and keep-alive response (periodic response to prevent communication disconnection). After receiving the CONTROL signal, the MCU 42 transmits the LOG signal to the signal processing device 44. The signal processing device 44 modulates this LOG signal with a subcarrier wave of a third frequency f3, which is lower than the RF signal, using a predetermined modulation method, and transmits it to the ECU 2. In this way, the CONTROL signal The LOG signal and the LOG signal are separated in time and do not overlap. In the following explanation, the modulated LOG signal may be referred to as the "f3 modulated wave," and the signal obtained by detecting the f3 modulated wave may be referred to as the "f3 detected signal."

[0017] The first frequency f1 must have as little delay as possible to allow high-speed switching control of the transmission and reception systems using the Tx / Rx signals. Therefore, the highest possible frequency is used. In contrast, the second frequency f2 and the third frequency f3 are set to frequencies lower than the first frequency f1. Although the frequencies f1, f2, and f3 are typically three different frequencies, they may also be two frequencies, with the second frequency f2 and the third frequency f3 being the same frequency. Using two frequencies simplifies the circuit configuration and reduces costs. The carrier frequency conditions for each signal are as follows: f2 <f3<f1 f3 <f2<f1 f2=f3 <f1 In the following description, it is assumed that the RF signal is 5.9 GHz, and the first frequency f1 is any of 64 to 128 MHz, for example, 125 MHz. The second frequency f2 and the third frequency f3 are any of 4 MHz to 32 MHz, for example, 16 MHz. That is, in this embodiment, an example of a two-frequency case will first be described.

[0018] The Tx / Rx signal and the CONTROL signal arrive as an f1 modulated wave and an f2 modulated wave, respectively, from the ECU 2 to the main signal line 401 of the bidirectional amplifier 4. The LOG signal arrives as an f3 modulated wave modulated by the bidirectional amplifier 4 to the main signal line 401. The modulation method may be common between the ECU 2 and the bidirectional amplifier 4, and any modulation method such as ASK (Amplitude Shift Keying), PWM (Pulse Width Modulation), or the like may be adopted. In this embodiment, an example of adopting ASK-OOK (on-off-keying) will be described. ASK-OOK is a modulation method within ASK that modulates by "outputting / not outputting a signal," and has the advantage that detection (demodulation) is sufficient only for the presence or absence of a signal, and can be realized with a simple circuit configuration.

[0019] The signal processing device 44 will be described in detail. Fig. 2 is a diagram showing an example of the configuration of the signal processing device 44. The signal processing device 44 has a branching unit 441, a detection unit 442, an A / D conversion unit 443, and a modulation unit 444. However, if the MCU 42 has a modulation function, the modulation unit 444 is not necessary.

[0020] The demultiplexing unit 441 demultiplexes the f1 modulated wave, the f2 modulated wave, and the f3 modulated wave. If the demultiplexing is insufficient, the waveform of the detected signal in the downstream detection unit 442 will be distorted, and the output signal of the downstream A / D conversion unit 443 may have content different from the signals of the sender (Tx / Rx signal, CONTROL signal). This will be explained with reference to FIG. 3.

[0021] 3 is a diagram showing an example of the waveforms of a pulse signal in which a transient response occurs and a digital signal after A / D conversion. In Fig. 3, the vertical axis represents DC voltage (V) and the horizontal axis represents time (T). In the case of a pulse signal, the signal level changes suddenly from a steady state, making transient responses 301, 302 such as ringback and steps likely to occur. Assume that the detection unit 442 detects the waveform of the pulse signal demultiplexed by the demultiplexer 441 as is. In this case, if the baseline (threshold voltage of digital conversion, the same applies below) of the A / D converter 443 is near the center of the amplitude of the transient responses 301, 302 at the rising or falling edge of the pulse signal, the pulse signal will be erroneously detected. In other words, a single pulse signal (positive signal) 303 shown by the dashed line in FIG. 3 is detected as an error signal 304 of a data string signal (signal splitting) consisting of two pulses shown by the solid line in FIG. 3. If the MCU 42 processes this error signal 404, the FEM 41 will malfunction.

[0022] An error signal may be generated not only by the transient responses 301 and 302 but also by the inclusion of an unintended signal. The demultiplexer 441 suppresses the transient responses 301 and 302 and eliminates the unintended signal with a simple configuration. In the following description, the signal line branched off from the main signal line 401 and connected to the signal processing device 44 is referred to as a common path 402.

[0023] 4 shows a specific configuration example of the demultiplexing unit 441. The demultiplexing unit 441 has an RF filter 4410, a first filter 4411, a second filter 4412, and a third filter 4413. In this embodiment, all of the filters have a passive configuration using only passive elements, rather than an active configuration using active elements. This makes it possible to prevent the circuit configuration from becoming complicated due to the addition of control signals to the active elements, etc.

[0024] RF filter 4410 is an LC series circuit having an RF signal blocking inductor L1 that has high impedance to an RF signal and a DC component blocking capacitor C1 that blocks DC components, and is inserted between the connection point of main signal line 401 and common path 402. The inductance of RF signal blocking inductor L1 is, for example, 10 nH, and the capacitance of DC component blocking capacitor C1 is, for example, 1 μF.

[0025] The first filter 4411 is a filter that passes a communication signal of a first frequency f1 (including an f1 modulated wave). In this example, the first filter 4411 is configured as an HPF (high pass filter) that passes a communication signal of a frequency of about 80 MHz or more. Specifically, one end of the first filter 4411 is conductively connected to a connection point P1 with the common line 402 after passing through the RF filter 4410 as seen from the main signal line 401. 11 and one end is capacitor C 11 The other end of the inductor L is connected to the 11 and one end is capacitor C 11 The other end of the inductor L 11 Capacitor C connected to one end of 12 and one end is capacitor C 12 The other end of the inductor L is connected to the 12 This forms a CLCL type HPF. 12 The other end of the inductor L 12 The connection point P3 with one end of the signal line 441 is connected to the detection unit 442.

[0026] The second filter 4412 is a filter that passes communication signals of the second frequency f2 (including f2 modulated waves) and communication signals of the third frequency f3 (including f3 modulated waves). In this example, the second filter 4412 is configured as a BPF (band pass filter) that passes second signals of a frequency of approximately 16 MHz. The third filter 4413 is a filter that passes communication signals of the second frequency f2 (including f2 modulated waves). In this example, the third filter 4413 is configured as an LPF (low pass filter) that passes signals of frequencies equal to or lower than approximately 70 MHz. The second filter 4412 and the third filter 4413 form a distribution filter in which signals are distributed via a damping resistor R1.

[0027] The second filter 4412 is inserted, for example, in a signal line connecting a connection point P2 with the common line 402, which is located at a position past the RF filter 4410 as seen from the main signal line 401, and a connection point P5 with the modulation unit 444 or the MCU 42. Specifically, the second filter 4412 is connected to the connection point P2 by a capacitor C 21 and inductor L 21 A CL series circuit consisting of the above and a capacitor C 22 and inductor L 22 and an inductor L, one end of which is connected between the CL series circuit and the LC series circuit and the other end of which is grounded. 23 and capacitor C 23 and an LC parallel circuit consisting of:

[0028] The connection point between the CL series circuit and the LC series circuit and one end of the LC parallel circuit is defined as connection point A. Connection point A is preferably a location where the electrical length from connection point P2 and the electrical length from connection point P5 are approximately equal, or where the impedance looking into connection point P2 and the impedance looking into connection point P5 are approximately equal, or where the phase difference on the connection point P2 side and the phase difference on the connection point P5 side are approximately equal.

[0029] One end of the damping resistor R1 is connected to the connection point A. The other end of the damping resistor R1 is connected to the third filter 4413. One end of the third filter 4413 is connected to the other end of the damping resistor R1, and the other end is connected to a connection point P4 with the detection unit 442. The third filter 4413 is connected to two inductors L 31 , L 32 and one end of the inductor L 31 , L 32 and a capacitor C connected between 31 and one end is inductor L 32 and a capacitor C connected between the node P1 and the node P4, the other end of which is grounded. 32 The LPF can be configured as an LCLC type LPF having the above.

[0030] The second filter 4412 may have a passband consisting of the second frequency f2 and the third frequency f3. The amplitude characteristics are set to Butterworth characteristics. Butterworth characteristics are characteristics in which the passband is flatter than that of a typical BPF, and are also called max flat. By setting the amplitude characteristics to Butterworth characteristics, it is possible to suppress fluctuations in the signal level of the f2 modulated wave or the f3 modulated wave caused by load fluctuations (such as reactance fluctuations in passive elements due to the termination state).

[0031] It should be noted that other types of passive LPFs or HPFs may be used for the third filter 4413. From the viewpoint of making the operation of the distribution filter more stable (operating as designed), it is desirable to set the passbands between the connection points P2 and P4, between the connection points P2 and P5, and between the connection points P4 and P5 so that they are approximately equal to each other.

[0032] Here, damping resistor R1 will be described in detail. Damping resistor R1 not only serves to suppress reflected waves between third filter 4413 and second filter 4412, but also to adjust the distribution level of signals passing through second filter 4412 and third filter 4413.

[0033] The load fluctuations described above can change the phase of the f2 modulated wave or f3 modulated wave, causing the waveform of the f2 modulated wave or f3 modulated wave to deviate from the design. Furthermore, transient responses such as ringback and step can occur due to the effects of the reflected wave balance (deviation in signal level) between the branched signal lines, electrical path differences, and coupling between filters. These phenomena cause distortion in the signal waveform, as shown in Figure 3. Avoiding these phenomena requires precise adjustment and matching for each modulated wave path, which is time-consuming and costly. In this embodiment, these phenomena are suppressed simply by adjusting the signal level distribution using damping resistor R1. The resistance value of damping resistor R1 is approximately 100 Ω, but signal waveform distortion can be suppressed if the resistance is in the range of 30 Ω to 200 Ω. Damping resistor R1 may be a variable resistor, but may also be a fixed resistor if the range in which the above phenomena can be suppressed is known.

[0034] The distribution of the signal level branched by damping resistor R1 only needs to be such that the signal level on the path from connection point P2 to connection point P4 is less than the signal level on the path from connection point P2 to connection point P5. Alternatively, the signal levels may be distributed so that they are equal on the path from connection point P2 to connection point P4 and the path from connection point P4 to connection point P5. In this way, an LC parallel circuit that reduces the signal level at frequencies other than the resonant frequency and damping resistor R1 are connected to connection point A, so that the balance of reflected waves between the third filter 4413 and the second filter 4412 can be adjusted, and unexpected phenomena can be suppressed.

[0035] Furthermore, because the signal level division at the same frequency (f2 = f3) is not affected by the load at the termination, unlike a T-type or π-type resistive divider circuit, the signal division level can be easily adjusted simply by changing the resistance value of damping resistor R1. Therefore, it is possible to realize a demultiplexer 441 that is less susceptible to load fluctuations even in the high frequency band for V2X communication.

[0036] The above explanation is based on the assumption that the second frequency f2 and the third frequency f3 are the same. If the second frequency f2 and the third frequency f3 are different frequencies, the resonant frequency of the second filter 4412 can be set to approximately the third frequency f3 in the LC series circuit and approximately the second frequency f2 in the LC parallel circuit. Note that the positions of the inductor and capacitor in the LC series circuit, CL series circuit, and LC parallel circuit may be interchanged.

[0037] In this way, the demultiplexing unit 441 does not require a separate, complex and precise reflected wave matching and adjustment circuit, such as a circuit for preventing excessive response. Therefore, even in the high frequency bands used in V2X communication, multiple frequencies can be correctly demultiplexed with a simple configuration. Furthermore, not only two frequencies but also three frequencies can be supported without complex circuit changes, which reduces design and development costs. In the following explanation, the signal line for the branched f1 modulated wave may be called the "f1 path," the signal line for the f2 modulated wave the "f2 path," and the signal line for the f3 modulated wave the "f3 path."

[0038] FIG. 5 shows an example of a signal transmitted through the f1 path. The vertical axis represents DC voltage (V), and the horizontal axis represents time (T). If the passive elements of the RF filter 4410 and the first filter 4411 are operating according to their design values, the only signal transmitted through the f1 path will be the f1-modulated wave. However, in reality, due to variations in the passive elements constituting the first filter 4411 or the leakage of unintended signals into the f1 path, unintended signals may be superimposed on the f1 path, as illustrated in FIG. 5. Therefore, it is necessary to ensure sufficient isolation between the f1 path and the f2 path, and between the f1 path and the f3 path. Note that in the example of FIG. 5, the signal level of the f1-modulated wave is significantly higher than that of the unintended signals. However, there are also cases where the signal level of the unintended signals is close to or higher than that of the f1-modulated wave. The detector 442 reliably prevents erroneous detection of the f1-modulated wave even in such cases.

[0039] 6, a specific configuration example of the detection unit 442 will be described. The detection unit 442 has a first detection unit 4421, a second detection unit 4422, and a third detection unit 4423. The first detection unit 4421 detects the first signal of the f1 path output from the demultiplexer 441. The second detection unit 4422 detects a second signal, obtained by removing the f1 modulated wave from the first signal, with polarity opposite to that of the first detection unit 4421. The detection unit 442 combines the detection output of the first detection unit 4421 and the detection output of the second detection unit 4422 and outputs the combined signal. In other words, the detection unit 442 outputs an f1 detection signal (Tx / Rx signal) obtained by combining the two detection outputs to the A / D conversion unit 443. The third detection unit 4423 detects the f2 modulated wave demultiplexed by the distribution filter of the demultiplexing unit 441 and outputs an f2 detection signal (CONTROL signal) to the A / D conversion unit 443.

[0040] The first detection unit 4421 includes a DC component blocking capacitor C2 electrically connected to a connection point P3 connected to the f1 path of the branching unit 441, a load resistor R2 whose other end is grounded, a first detection element D1, a discharge resistor R3 whose other end is grounded, and a smoothing capacitor C5. The discharge resistor R3 and smoothing capacitor C5 are provided to reduce distortion in the detection waveform. The first signal is supplied to the anode of the first detection element D1 via the DC component blocking capacitor C2 and one end of the load resistor R2 whose other end is grounded. The polarity of the signal passing through the first detection element D1 is positive (high active).

[0041] The load resistor R2 is set to a resistance value that causes the baseline of the A / D conversion to approach 0V by passing the DC component of the first signal and the DC component generated by detection to the ground (earth wire). In this example, the load resistor R2 is set to 4.3 kΩ. Note that the load resistor R2 can be replaced with a choke coil. Also, a matching circuit may be inserted for matching purposes.

[0042] The second detection unit 4422 has a fourth filter 4424, one end of which is electrically connected to a connection point P3 connected to the f1 path of the demultiplexer 441, and a second detection element D2 connected with the polarity opposite to that of the first detection element D1. The fourth filter 4424 includes a resonant circuit, such as an inductor L, that has high impedance with respect to the first frequency f1. 41and capacitor C 42 The other end of the first detection element D1 is connected to the cathode of the second detection element D2. The anode of the second detection element D2 is connected to the cathode of the first detection element D1, one end of the discharge resistor R3, and one end of the smoothing capacitor C5.

[0043] The first detection element D1 and the second detection element D2 are diodes that can be used in high frequency bands, and it is desirable that they have the same characteristics. 41 and capacitor C 42 The value of is set to a value that makes the phase difference between the cathode of the first detection element D1 and the anode of the second detection element D2 90 degrees at the connection point between them. However, this phase difference is set to a range exceeding 0 degrees and not exceeding 90 degrees in absolute value. This is because if the phase difference between them exceeds 90 degrees in absolute value and approaches 180 degrees, the polarity of the first detection element D1 and the second detection element D2 may become the same. Note that a phase shifter (reactance element) may be separately inserted before and after the fourth filter 4424 to fine-tune the phase difference between them. Also, a matching circuit may be inserted between the second detection element D2 and the fourth filter 4424 to match unintended signals.

[0044] The third detection unit 4423 includes a DC component cutting capacitor C3 electrically connected to a connection point P4 with the f2 path of the branching unit 441, a load resistor R4 with the other end grounded, a third detection element D3, a discharge resistor R5 for reducing distortion in the detection waveform, and a smoothing capacitor C6. The load resistor R4 is set to a resistance value that causes the baseline of the A / D conversion unit 443 to approach 0V potential by passing DC components present on the f2 path or generated by detection to ground. The capacitance of the smoothing capacitor C6 is, for example, 30 pF. The third detection element D3 can be a diode with the same characteristics as the first detection element D1 and the second detection element D2.

[0045] The signal passing through the first detecting element D1 is a first signal of multiple frequencies including the f1 modulated wave as well as unintended signals, as described above, and has positive polarity with respect to the baseline of the A / D conversion unit 443. Focusing on the unintended signals, if the load resistor R2 were not present, the signal level (V) of the unintended signals would be a predetermined value as shown in the right diagram of Fig. 7, but the presence of the load resistor R2 suppresses the signal level (V) as shown in the left diagram of Fig. 7. On the other hand, the unintended signals passing through the second detecting element D2 are not only matched by the fourth filter 4421, but also have no load resistor, so their signal level (V) is greater than that of the unintended signals passing through the first detecting element D1.

[0046] That is, the signal level of the communication signal detected by the first detection unit 4421 is smaller than the signal level of the communication signal detected by the second detection unit 4422. Therefore, if the load resistor R2 is not provided, the signal level (V) of the non-target signal among the combined outputs of the first detection unit 4421 and the second detection unit 4422 remains positive, as shown in the right diagram of Fig. 8, although it is smaller than the signal level (V) shown in the right diagram of Fig. 7. In contrast, if the load resistor R2 is present as in this embodiment, the signal level (V) of the non-target signal among the combined outputs of the first detection unit 4421 and the second detection unit 4422 becomes negative with respect to the baseline of the A / D conversion unit 443, as shown in the left diagram of Fig. 8.

[0047] The A / D conversion unit 443 has an amplifier and a comparator (signal conversion unit), not shown. A general-purpose operational amplifier can be used as the amplifier. The operational amplifier can be used as an active filter (a low-pass filter controlled by an active element) that removes harmonic components contained in the f1 detection signal and f2 detection signal output from the detection unit 442. The comparator compares the signals with an arbitrarily set threshold (baseline voltage value), converts the f1 detection signal to a Tx / Rx signal, and the f2 detection signal to a CONTROL signal, and inputs them to the MCU 42. In this example, since the original signal is a pulse signal, the signal conversion in the A / D conversion unit 443 mainly involves envelope shaping of signals that exceed the threshold.

[0048] FIG. 9 shows an example waveform of the f1 detection signal input to the A / D converter 443. The f1 detection signal includes the Tx / Rx signals as well as unintended signals. The Tx / Rx signals have no waveform distortion due to transient response or other factors, and the unintended signals have opposite polarity to the Tx / Rx signals. This allows the baseline of the A / D converter 443 to approach 0 V for the Tx / Rx signals, thereby widening the A / D conversion range. As a result, even if the signal level (V) of the unintended signals fluctuates or the signal level (V) of the Tx / Rx signals decreases, the Tx / Rx signals can be correctly A / D converted, maintaining high communication quality. Furthermore, this eliminates the need for additional interference detection circuits or complex detection processes such as signal discrimination and interference signal recognition, thereby reducing costs.

[0049] 10 is a diagram showing an example of the waveform of the f2 detection signal input to the A / D conversion unit 443. In addition to the CONTROL signal, the f2 detection signal contains only the LOG signal as an unintended signal. Moreover, both signals have the same polarity. However, since the LOG signal and the CONTROL signal are separated in time, no interference occurs.

[0050] As described above, in the RF band, conventionally, circuit boards corresponding to the number of communication signals used are created, and narrowband matching circuits, load fluctuation suppression circuits, and the like are provided on the signal lines formed on each circuit board. However, in this embodiment, by employing a distribution filter (third filter 4413 distributed from point A of second filter 4412) in demultiplexing unit 441, it is possible to reduce the circuit area. Furthermore, sufficient isolation of the f1 modulated wave, f2 modulated wave, and f3 modulated wave is possible in detection unit 442. Therefore, even if the circuit components of filters 4411, 4412, and 4413 of demultiplexing unit 441 and detection unit 442 are close to each other, sufficient isolation can be easily ensured.

[0051] [Variations] In the present embodiment, an example has been described in which, among the frequencies used in the V2X service, the first signal of a first frequency includes a modulated wave of a Tx / Rx signal (f1 modulated wave), the second signal of a second frequency includes a modulated wave of a CONTROL signal (f2 modulated wave), and the third signal of a third frequency includes a modulated wave of a LOG signal (f3 modulated wave), but the frequencies and types of signals used are not limited to these. In the present embodiment, an example configuration of the bidirectional amplifier 4, particularly the signal processing device 44, of the wireless terminal 1 mounted on a vehicle has also been described, but the signal processing device 44 can also be used in communication equipment, antenna devices, or mobile communication terminals other than the wireless terminal 1 mounted on a vehicle.

[0052] [Example] Next, an embodiment of the signal processing device 44 will be described. Fig. 11 is a diagram showing an embodiment of the signal processing device 44. In the signal processing device 44 of this embodiment, at least a branching section 441 and a detection section 442 can be realized on a single circuit board 100. The circuit board 100 is provided with one input / output terminal 101, two output terminals 102 and 103, and one input terminal 104. For convenience, the same reference numerals as those shown in Figs. 4 and 6 are used for the electronic circuit elements.

[0053] The input / output terminal 101 is connected to the main signal line 401. The output terminal 102 is connected to a Tx / Rx signal terminal of the A / D conversion unit. The output terminal 103 is connected to a CONTROL signal terminal of the A / D conversion unit. The input terminal 104 is connected to an output terminal of the modulation unit 444 or a LOG signal terminal of the MCU 42. The electronic circuits connected to the input / output terminal 101, the output terminals 102 and 103, and the input terminal 104 are composed of the circuit components and signal lines shown in Figures 4 and 6. The signal lines are distributed constant lines, and the circuit components can be distributed constant components or lumped constant components. For example, a high-frequency printed circuit board conforming to the FR-4 standard can be used for the circuit board 100, but a high-frequency printed circuit board with the same function can also be used.

[0054] According to this embodiment, load fluctuations on the signal line when multiple communication signals share the same signal line, contamination by unintended signals, and erroneous detection of each communication signal caused by these can be avoided by using only one circuit board 100, so that a device equipped with this can be made small and lightweight, and an increase in manufacturing costs can be suppressed. Note that the circuit board 100 may also be configured to be equipped with an AD conversion unit 443 or a modulation unit 444.

[0055] The present embodiment and the disclosure of the present embodiment include the following aspects of the invention. [Aspect 1] The invention of aspect 1 is a signal processing device comprising a first detection unit that detects a communication signal including signals of multiple frequencies, and a second detection unit that detects the communication signal from which a first signal of a first frequency has been removed with a polarity opposite to that of the first detection unit, and which combines and outputs the detection output of the first detection unit and the detection output of the second detection unit. According to the invention of aspect 1, the detection output of the first detection unit is combined (cancelled) with the detection output of the second detection unit for communication signals other than the first signal of the first frequency with the detection output of the first detection unit in opposite polarity, thereby reducing the influence of unintended signals on the first signal.

[0056] [Aspect 2] The invention of aspect 2 is a signal processing device in the invention of aspect 1, wherein the second detection unit detects the communication signal from which the first signal has been removed when the phase difference between the communication signal detected by the first detection unit and the communication signal from which the first signal has been removed is in the range of more than 0 degrees and not more than 90 degrees in absolute value. According to the second aspect of the invention, it is possible to eliminate the possibility that the polarities of the detection output of the first detection unit and the detection output of the second detection unit become the same due to load fluctuations or the like.

[0057] [Aspect 3] A third aspect of the invention is the signal processing device of the first aspect, wherein the signal level of the communication signal detected by the first detection unit is lower than the signal level of the communication signal detected by the second detection unit. According to the invention of aspect 3, the detection output of the non-target signal with the opposite polarity has a higher signal level than the detection output of the non-target signal with the same polarity as the first signal (detection output of the first detection unit), so the signal level of the combined and output non-target signal always has the opposite polarity to the first signal. This widens the A / D conversion range for the first signal, and as a result, the communication sensitivity for the first signal can be improved. Furthermore, since a circuit for processing the non-target signal is not required, design and development costs can be reduced.

[0058] [Aspect 4] A fourth aspect of the invention is a signal processing device according to the third aspect of the invention, wherein the first detection unit has a first detection element, the anode of which receives the communication signal via one end of a resistor whose other end is grounded, and the second detection unit has a second detection element, the cathode of which receives the communication signal via a band-stop filter that blocks the passage of the first signal, and the cathode of the first detection element and the anode of the second detection element are electrically connected. According to the invention of aspect 4, the influence of unintended signals on the first signal can be reduced, and the reduction in the signal level of the first signal by the second detection unit can be reliably suppressed, and this can be easily achieved by combining inexpensive circuit components.

[0059] [Aspect 5] A fifth aspect of the invention is the signal processing device of the fourth aspect of the invention, wherein the first detection element and the second detection element are diodes with the same characteristics. According to the fifth aspect of the invention, the detection output of the first detection element and the detection output of the second detection element are consistent with the design values, thereby reducing circuit design costs and stabilizing characteristics.

[0060] [Aspect 6] The invention of aspect 6 is a signal processing device according to the invention of aspect 1, which amplifies the combined output of the detection output of the first detection unit and the detection output of the second detection unit using an amplifier that also functions as an active filter, and which includes an A / D conversion unit that converts the amplified combined output into a digital signal at a predetermined threshold value. According to the sixth aspect of the invention, it is possible to remove harmonics from the first signal with a simple configuration and convert the first signal into one that is more faithful to the original signal waveform.

[0061] [Aspect 7] The invention of aspect 7 is a signal processing device in any one of aspects 1 to 5, which includes a branching unit that branches the communication signal into the first signal before detection, a second signal of a second frequency different from the first frequency, and a third signal of a third frequency, the branching unit having a first filter that passes the first signal before detection, a second filter that passes the second signal and the third signal, and a third filter that passes only the third signal, and the communication signal including the third signal is distributed and input to the third filter from a predetermined portion of the second filter via a predetermined load. According to the seventh aspect of the invention, the second filter and the third filter constitute one distribution filter, so that it is possible to accommodate not only two frequencies but also three frequencies without making complex circuit changes, thereby reducing design and development costs.

[0062] [Aspect 8] The invention of aspect 8 is a signal processing device in which, in the invention of aspect 7, the second filter has a first LC series circuit to which the first signal and the second signal before detection are input, a second LC series circuit to which the third signal is input, and an LC parallel circuit having one end electrically connected to a connection point between the output of the first LC series circuit and the output of the second LC series circuit and the other end grounded, and the communication signal including the third signal is distributed and input from the connection point to the three filters via damping resistors. According to the invention of aspect 8, a single distribution filter can be constructed from the second filter and the third filter using only general-purpose passive elements such as an LC circuit, i.e., an inductor, a capacitor, and a resistor, making it possible to easily adjust the reflection balance, thereby reducing circuit design costs.

[0063] [Aspect 9] The invention of aspect 9 is a signal processing device in which, in the invention of aspect 8, the second filter has an input / output terminal through which the communication signal is input and output, and an input terminal through which the third signal is input, and the electrical constants when viewed from the connection point to the input / output terminal (P2) are identical or approximately identical to the electrical constants when viewed from the connection point to the input terminal. According to the ninth aspect of the invention, the distribution filter is configured, and thus it is possible to easily achieve a balance in the reflection of the second signal and the third signal.

[0064] [Aspect 10] The invention of aspect 10 is a signal processing device in which, in the invention of aspect 8, the second filter has an input / output terminal through which the communication signal is input and output, and an input terminal through which the third signal is input, and the signal level of the third signal from the connection portion to the input / output terminal is the same or approximately the same as the signal level from the input terminal to the connection portion. According to the tenth aspect of the invention, the distribution filter is configured, and thus the reflection balance between the second signal and the third signal can be easily achieved.

[0065] [Aspect 11] An eleventh aspect of the invention is the signal processing device of the eighth aspect of the invention, wherein the frequency-amplitude characteristics of the second filter are Butterworth characteristics. According to the eleventh aspect of the invention, it is possible to suppress load fluctuations and the occurrence of reflected waves that tend to occur when a distribution filter is configured, as well as fluctuations in signal level caused by these. [Explanation of symbols]

[0066] 1. Wireless terminal 44 Signal Processing Devices 441 Demultiplexer 442 Detection section 4421 1st detector 4422 Second detection unit 4423 3rd detector 443 A / D conversion section 4410 RF Filter 4411 First filter 4412 Second filter 4413 Third filter 4424 4th filter D1 First detection element D2 Second detection element

Claims

1. a first detection unit that detects a communication signal including signals of multiple frequencies; a second detection unit that detects the communication signal from which the first signal of the first frequency has been removed with a polarity opposite to that detected by the first detection unit, a detection output of the first detection unit and a detection output of the second detection unit are combined and output; the second detection unit detects the communication signal from which the first signal has been removed, when the phase difference between the communication signal detected by the first detection unit and the communication signal from which the first signal has been removed is in a range of more than 0 degrees and not more than 90 degrees in absolute value. Signal processing devices.

2. A first detection unit that detects communication signals including signals of multiple frequencies; a second detection unit that detects the communication signal from which the first signal of the first frequency has been removed with a polarity opposite to that detected by the first detection unit, a detection output of the first detection unit and a detection output of the second detection unit are combined and output; the signal level of the communication signal detected by the first detection unit is lower than the signal level of the communication signal detected by the second detection unit; Signal processing devices.

3. the first detection unit has a first detection element, the communication signal being input to an anode via one end of a resistor whose other end is grounded; the second detection unit has a second detection element, the cathode of which receives the communication signal via a band-elimination filter that blocks passage of the first signal; The signal processing device according to claim 2 , wherein the cathode of the first detecting element and the anode of the second detecting element are electrically connected.

4. the first detection element and the second detection element are diodes with the same characteristics; 4. A signal processing device according to claim 3.

5. A first detection unit that detects communication signals including signals of multiple frequencies; a second detection unit that detects the communication signal from which the first signal of the first frequency has been removed with a polarity opposite to that of the first detection unit; an A / D converter that combines and outputs the detection output of the first detector and the detection output of the second detector, amplifies the combined output by an amplifier that also serves as an active filter, and converts the amplified combined output into a digital signal at a predetermined threshold value; Signal processing devices.

6. A first detection unit that detects communication signals including signals of multiple frequencies; a second detection unit that detects the communication signal from which the first signal of the first frequency has been removed with a polarity opposite to that of the first detection unit; a demultiplexing unit that demultiplexes the communication signal into the first signal before detection, a second signal having a second frequency different from the first frequency, and a third signal having a third frequency, a detection output of the first detection unit and a detection output of the second detection unit are combined and output; The demultiplexing unit a first filter that passes the first signal before detection; a second filter that passes the second signal and the third signal; a third filter that passes only the third signal; the communication signal including the third signal is distributed and input to the third filter from a predetermined portion of the second filter via a predetermined load; Signal processing devices.

7. the second filter includes a first LC series circuit to which the first signal and the second signal before detection are input, a second LC series circuit to which the third signal is input, and an LC parallel circuit having one end electrically connected to a connection portion between an output of the first LC series circuit and an output of the second LC series circuit and having the other end grounded; The communication signal including the third signal is distributed and input from the connection portion to the third filter via a damping resistor.

7. A signal processing device according to claim 6.

8. the second filter has an input / output terminal through which the communication signal is input / output and an input terminal through which the third signal is input, and an electrical constant when viewed from the connection portion toward the input / output terminal is the same or substantially the same as an electrical constant when viewed from the connection portion toward the input terminal; 8. A signal processing device according to claim 7.

9. the second filter has an input / output terminal through which the communication signal is input / output and an input terminal through which the third signal is input, and a signal level of the third signal reaching from the connection part to the input / output terminal is the same or substantially the same as a signal level of the third signal reaching from the input terminal to the connection part.

8. A signal processing device according to claim 7.

10. the frequency-amplitude characteristics of the second filter are Butterworth characteristics; 8. A signal processing device according to claim 7.

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