Flux Line Filter

Abstract

Techniques are presented for creating a low pass filter associated with a flux line. The qubit device may include a first substrate and a second substrate. A low pass filter may be formed comprising at least one inductor and at least one capacitor, and respective components of or associated with the low pass filter may be formed on the first or second substrate, and one or more bump bonds may extend between the substrates and connect respective components on the respective substrates. The filter may receive an input signal via an input line, filter the signal, and generate a filtered signal as an output for a flux line in proximity to a coupler having a SQUID loop and one or more flux-tunable qubits formed on one of the substrates. The filter may reduce electrical noise and Purcell attenuation associated with the flux line.

Description

[Technical Field]

[0001] The present disclosure relates to quantum circuits, and more particularly to flux line filters. Summary of the Invention

[0002] The following presents a summary to provide a basic understanding of one or more embodiments of the disclosed subject matter. This summary is not intended to identify key or critical elements or to delineate the scope of any particular embodiments or the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, systems, devices, structures, methods, apparatus, and / or computer program products are presented that can facilitate creating, designing, and / or using filters (e.g., low-pass filters) for flux lines of flux-tunable qubit devices.

[0003] According to an embodiment, a system may include a filter component. The filter component may include an inductor component located on a first substrate component. The filter component may also include a capacitor component located on a second substrate component and associated with the inductor component via a bump bond extending from the first substrate component to the second substrate component.

[0004] Another embodiment relates to a method that may include forming an inductor on a first substrate. The method may also include forming a capacitor on a second substrate, where the capacitor is associated with the inductor via a bump bond extending from the first substrate to the second substrate to facilitate forming a filter.

[0005] Further embodiments relate to a system that may include a filter component. The filter component may include an inductor component formed on a first substrate component. The filter component may also include a capacitor component formed on the first substrate component and associated with the inductor component, the inductor component associated with a second substrate component via a bump bond extending from the first substrate component to the second substrate component, facilitating associating the inductor component with a flux line component formed on the second substrate component.

[0006] These and other features will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 10 shows a diagram of an example, non-limiting device that may include filter components for advantageously filtering an input signal to provide a desired filtered signal and facilitate reducing Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0008] [Figure 2] FIG. 1 illustrates diagrams of example filter components that can advantageously filter an input signal to provide a desired filtered signal and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0009] [Figure 3] 1 illustrates a diagram of a top view of an exemplary interdigital finger capacitor component in accordance with various aspects of an embodiment of the disclosed subject matter;

[0010] [Figure 4]1 illustrates a diagram of a top view of an exemplary spiral inductor component in accordance with various aspects and embodiments of the disclosed subject matter.

[0011] [Figure 5] FIG. 10 illustrates another diagram of example filter components that can advantageously filter an input signal to provide a desired filtered signal and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0012] [Figure 6] FIG. 1 illustrates a diagram of exemplary filter components that may utilize an inductor-capacitor-inductor (LCL) filter to advantageously filter an input signal to provide a desired filtered signal and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0013] [Figure 7] 10 presents diagrams of example graphs of filter circuit simulation results for respective filter components in accordance with various aspects and embodiments of the disclosed subject matter. [Figure 8] 10 presents diagrams of example graphs of filter circuit simulation results for respective filter components in accordance with various aspects and embodiments of the disclosed subject matter.

[0014] [Figure 9] FIG. 10 shows diagrams of example filter components that may include high-order filtering by cascading multiple filter stages, which may advantageously filter an input signal to provide a desired filtered signal, and which may reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0015] [Figure 10]FIG. 1 illustrates diagrams of example filter components that may include high-order filtering by cascading multiple filter stages, advantageously filtering an input signal to provide a desired filtered signal, reducing coupler and qubit device parcel losses, and enabling desired routing or placement of access lines and / or peripheral devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0016] [Figure 11] 1 illustrates a diagram of an example distributed spiral inductor component that may have respective winding portions facing in the same direction and that may be utilized in a filter component in accordance with various aspects and embodiments of the disclosed subject matter.

[0017] [Figure 12] 1 illustrates a diagram of an exemplary distributed spiral inductor component that may have respective winding portions facing in opposite directions and that may be utilized in a filter component (e.g., a low-pass filter component) in accordance with various aspects and embodiments of the disclosed subject matter.

[0018] [Figure 13] FIG. 1 illustrates a block diagram of an example system that may be utilized to create, form, or design qubit devices and / or associated filter components in accordance with various aspects and embodiments of the disclosed subject matter.

[0019] [Figure 14] FIG. 10 shows a flow diagram of an exemplary, non-limiting method for forming a filter component that can be utilized to provide a desired filtered signal to a flux line component and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0020] [Figure 15]FIG. 10 illustrates a flow diagram of another exemplary, non-limiting method for forming a filter component that can be utilized to provide a desired filtered signal to a flux line component and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0021] [Figure 16] FIG. 1 shows a flow diagram of an exemplary, non-limiting method for forming a qubit device including a filter component that can be utilized to provide a desired filtered signal to a flux line component and reduce Purcell losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter.

[0022] [Figure 17] 1 illustrates a block diagram of an exemplary non-limiting operating environment capable of facilitating one or more embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION

[0023] The following detailed description is merely exemplary and is not intended to limit the embodiments and / or the application or uses of the embodiments, nor is it intended to be bound by any expressed or implied information presented in the Background or Summary of the Invention section above or in the Detailed Description section.

[0024] One or more embodiments will now be described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It will be apparent, however, that in various instances, one or more embodiments may be practiced without these specific details.

[0025] Frequency-tunable qubit devices can be useful and desirable in many quantum computing architectures. They can be used, for example, as tunable coupling devices for multi-qubit gate operations.

[0026] There may be frequency-tunable devices based on superconducting quantum interference devices (SQUIDs) that can be tuned using magnetic fields or magnetic flux. In flux-tunable qubit device architectures, it may be desirable to have flux lines located in close proximity to the qubit and coupler devices. Unwanted noise may couple into the flux lines from a dissipative off-chip environment and cause unwanted parcel loss in the qubit devices. Electrical noise may also degrade qubit / coupler performance, for example, by inhibiting the lifetime and dephasing of the qubit / coupler devices, which may adversely limit the achievable gate fidelity for multi-qubit devices. It may also be desirable that signals applied to the flux lines are undistorted.

[0027] As a result, it may be desirable to have a frequency-tunable device in which these and / or other drawbacks are not an issue. For example, it may be desirable to create, realize, or develop advantageously designed flux-tunable qubit devices that may have improved (e.g., higher or enhanced) performance, may have reduced electrical noise in the flux lines, and may have reduced Purcell loss.

[0028] To this end, various embodiments described herein relate to techniques for designing, creating, and / or utilizing filters (e.g., low-pass filters) that may be associated with flux lines of a flux-tunable qubit device. In some embodiments, the qubit device may include a first substrate component and a second substrate component. A filter component (e.g., a low-pass filter component) may be formed that may include a set of inductor components including at least one inductor component and a set of capacitor components including at least one capacitor component, where each component of or associated with the filter component (e.g., each inductor component and capacitor component) may be formed on the first substrate component or the second substrate component, and where one or more bump bond components may extend between and connect each component on the respective substrate component.

[0029] For example, a filter component may be a structure including a capacitor component that may be formed on a first substrate component (e.g., on a qubit chip) and an inductor component that may be formed on a second substrate component (e.g., on an interposer chip), where a bump bond component may be formed to extend from the first substrate component to the second substrate component to facilitate connecting the capacitor component and the inductor component and forming a filter. As another example, a filter component may be a structure including a capacitor component and an inductor component that may be formed on the first substrate component, where the capacitor component and the inductor component may be associated (e.g., connected) with each other to facilitate forming a filter. A bump bond component may be formed to extend from the first substrate component (e.g., from the inductor component on the first substrate component) to the second substrate component (e.g., to a pad component on the second substrate component) to facilitate connecting the inductor component to the second substrate component, which may be associated with a flux line component.

[0030] A filter component (e.g., an inductor component and / or a pad component of the filter component) may be associated with (e.g., connected to) a flux line component that may be advantageously proximate to a SQUID loop of a coupler component (e.g., a qubit / coupler component) associated with one or more qubit components (e.g., flux-tunable qubit components), where the one or more qubit components and the coupler component may be formed on a first substrate component. The filter component may receive an input signal (e.g., an input electrical signal) via the input line component and filter (e.g., low-pass filter) the input signal to generate a filtered signal as an output that may be applied to the flux line component. In response to the filtered signal, the flux line component may generate a desired magnetic field / flux that may be desirably applied to the SQUID loop, which may be proximate to the flux line component, to facilitate advantageously tuning the frequency of the qubit device (e.g., of one or more qubit components of the qubit device). As described more fully herein, the filter components may advantageously mitigate (e.g., reduce or minimize) electrical noise and Purcell attenuation otherwise associated with applying raw (e.g., unprocessed) input signals (e.g., electrical signals) to the flux lines, and may enhance the performance and efficiency of the qubit devices.

[0031] In some embodiments, the filter component may include a ladder network including a set of inductor components and a set of capacitor components, and a higher-order filter may be realized by cascading multiple stages (e.g., LC stages) of inductor and capacitor components. By adding additional LC stages to the filter component, the filter component may have a higher-order filter that may have more stopband attenuation than a single-stage LC filter. The inductor components of the set of inductor components may be formed on a second substrate component (e.g., on an interposer chip), and the capacitor components of the set of capacitor components may be formed on the first substrate component (e.g., a qubit chip) or the second substrate component (e.g., in an alternating fashion), as described more fully herein. Bump bond components may connect the inductor components on the second substrate component to the first substrate component (e.g., pad components on the first substrate component) to facilitate connecting each inductor component to each capacitor component and forming the ladder network.

[0032] These and other aspects and embodiments of the disclosed subject matter will now be described with reference to the drawings.

[0033] FIG. 1 illustrates two diagrams of an exemplary, non-limiting device 100 that may include filter components to facilitate advantageously filtering an input signal, provide a desired (e.g., enhanced, preferred, acceptable, or optimal) filtered signal, and reduce coupler and qubit device parcel losses, in accordance with various aspects and embodiments of the disclosed subject matter. FIG. 1 illustrates a first view 101 that is a cross-sectional side view of device 100 and a second view 102 that is a block diagram of various components of device 100. Device 100 may include a system of various components and circuits that may be arranged to perform one or more desired functions. In some embodiments, device 100 may be or include a qubit device (e.g., a frequency-tunable qubit device). Device 100 may be, for example, a transmon qubit device.

[0034] Device 100 may include a first chip 103 (e.g., a qubit chip) and a second chip 104 (e.g., an interposer chip). In some embodiments, first chip 103 and second chip 104 may be placed relative to one another to form a flip-chip package, where second chip 104 may be inverted (e.g., flipped over) so that the top surface of second chip 104, on which various components and circuitry are formed, faces relatively closely to the top surface of first chip 103, on which various other components and circuitry may be formed. A set of qubit components, including qubit component 106 and qubit component 108, may be located or formed on first substrate component 110 of first chip 103. First chip 103 may also include a coupler component (coupler) 112 (e.g., a qubit / coupler component), which may include a SQUID loop 114, which may be located or formed on first substrate component 110. SQUID loop 114 may include a set of Josephson junctions, including Josephson junction 116 and Josephson junction 118, that may facilitate the performance of the functions of SQUID loop 114 as described herein.

[0035] First chip 103 may further include a capacitor component (C) including capacitor component 120 and capacitor component 122, which may be formed on first substrate component 110. Capacitor component 120 may be located between qubit component 106 and coupler component 112, and may, in part, electrically connect qubit component 106 to coupler component 112. Capacitor component 122 may be located between qubit component 108 and coupler component 112, and may, in part, electrically connect qubit component 108 to coupler component 112.

[0036] It may be desirable to adjust (e.g., tune or modify) the frequency of device 100. In some embodiments, a magnetic flux may be applied to SQUID loop 114 to facilitate tuning the frequency of device 100 (e.g., qubit components 106 and 108 of device 100), where the tuning or adjustment of the frequency of device 100 may be based, at least in part, on the amount of magnetic flux applied to SQUID loop 114. Device 100 may include an input line component (I / P line) 124 that may receive an input signal (e.g., an electrical or current signal) that may be intended to facilitate the generation of magnetic flux that may be applied to SQUID loop 114. In some embodiments, input line component 124 may be formed on second substrate component 126 of second chip 104 (as shown in FIG. 1 ). In other embodiments, input line component 124 may be formed on first substrate component 110 of first chip 103. In some embodiments, input line component 124 may be a coplanar waveguide transmission line having a 50 ohm characteristic impedance.

[0037] Typically, it may be desirable to have flux lines in relatively close proximity to qubit components (e.g., 106, 108) and coupler component 112 to facilitate tuning of the frequency of device 100. Conventionally, the flux lines may be part of the input lines and may receive raw (e.g., unprocessed) input signals. However, the input signals carried by input line component 124 may contain undesired noise (e.g., electrical noise) that may adversely couple to the flux lines from a dissipative off-chip environment. In addition to noise, this may also cause undesired parcel loss for the qubit components when the flux lines receive the raw input signals. This may adversely affect tuning of device 100 (e.g., qubit components 106 and 108 of device 100) and performance of device 100 (e.g., performance of device 100 at frequencies favorable to qubit components 106 and 108 and coupler component 112).

[0038] To facilitate mitigating (e.g., reducing or minimizing) undesired noise associated with the input signal and mitigating undesired Purcell attenuation, according to various embodiments, device 100 may include a filter component 128 (e.g., a low-pass filter component) that may be associated with input line component 124 at the input of filter component 128 and associated with (e.g., electrically connected to) a flux line component (flux line) 130 at the output of filter component 128. Flux line component 130 may include a flux coupler component 132 at an extending end of flux line component 130. According to various embodiments, the flux line portion of flux line component 130 between filter component 128 and flux coupler component 132 may have (e.g., extend) a desired length that may be 1 millimeter (mm), 2 mm, or greater or less than 2 mm. The flux line components 130, including the flux line portions, may advantageously be non-dissipative (e.g., not 50 ohm lines) and may be extended as needed for routing to meet design constraints or otherwise enhance the performance of the device 100, if desired.

[0039] Filter component 128 may receive an input signal from input line component 124 and may advantageously filter (e.g., low-pass filter) the input signal to generate (e.g., generate) a filtered signal as an output to flux line component 130. In response to receiving the filtered signal, flux line component 130, including flux coupler component 132, may generate a desired magnetic field and flux that may be applied to SQUID loop 114 by flux coupler component 132, which may be relatively close to flux coupler component 132 (and flux line component 130), to facilitate advantageously (e.g., improving, suitably, tolerably, or optimally) tuning the frequency of device 100 (e.g., of qubit components 106 and 108 of device 100). Flux coupler component 132 may be coupled to SQUID loop 114 and associated coupler component 112 and qubit components 106 and 108 through a desired mutual inductance. Here, the mutual inductance may be in the range of approximately 1.0 to 2.0 picohenries (pH) (e.g., approximately 0.5 to 1.0 Φ / milliamps (mA)), or may have another desired mutual inductance that may be less than 1.0 pH or greater than 2.0 pH. In some embodiments, filter component 128 may be terminated by an inductive load that may be in the range of approximately 10.0 pH to 500 pH. Filter component 128 may advantageously mitigate (e.g., reduce, minimize, or suppress) electrical noise and Purcell attenuation that would otherwise be associated with applying a raw (e.g., unprocessed) input signal to the flux line, enhancing the performance and efficiency of device 100. Filter component 128 may also advantageously filter the input signal so as not to adversely distort the signal (e.g., the filtered signal) applied to flux line component 130.In certain embodiments, flux line component 130 can be advantageously extended and routed underneath a qubit component (e.g., qubit component 106 or qubit component 108) and / or coupler component 112 without undesirable, significant, or additional parcel loss.

[0040] According to various embodiments, as described more fully herein, respective portions of filter component 128 may be formed on first chip 103 (e.g., first substrate component 110 of first chip 103) and second chip 104 (e.g., second substrate component 126 of second chip 104). For example, filter component 128 may include one or more inductor components (not explicitly shown in FIG. 1 ; shown in other figures and described herein) and one or more capacitor components (not explicitly shown in FIG. 1 ; shown in other figures and described herein) that may be located or arranged on first substrate component 110 and / or second substrate component 126, respectively, and form an LC filter, an LCL filter, or one or more filter stages (e.g., an LC filter stage) of filter component 128. To facilitate connecting the respective components (e.g., inductor components, capacitor components, pad components, or other components) of filter component 128 to one another, filter component 128 may include one or more bump bond components (not explicitly shown in FIG. 1 ; shown in other figures and described herein) that may extend from first substrate component 110 to second substrate component 126, as described more fully herein. According to various embodiments, the respective inductor and capacitor components of filter component 128 may be arranged in a Gaussian filter configuration or a Bessel-Thompson filter configuration.

[0041] Device 100 may also include various connector components (e.g., conductive connectors), such as, for example, connector component 134, connector component 136, connector component 138, and connector component 140. For example, connector component 134 may connect qubit component 106 to capacitor component 120, connector component 136 may connect capacitor component 120 to coupler component 112, connector component 138 may connect coupler component 112 to capacitor component 122, and connector component 140 may connect capacitor component 122 to qubit component 108.

[0042] Various components (e.g., qubit components 106 and 108, coupler component 112, SQUID loop 114, capacitor components 120 and 122, input line component 124, filter component 128, flux line component 130, flux coupler component 132, and other components), connector components (e.g., 134, 136, 138, and 140), and circuitry of device 100 may be formed or created on first substrate component 110 or second substrate component 126 by depositing one or more metallization layers thereon, where the one or more metallization layers may be formed from one or more desired metals or conductive materials that may be or may include one or more desired superconducting materials (e.g., niobium-based superconducting materials), and where the metallization layers may have a desired thickness or height (e.g., a thickness or height on the order of nanometers). A removal or etching process (e.g., a chemical etching process) and / or another desired process may be performed on the metallization layers on the first substrate component 110 and the second substrate component 126 to advantageously selectively remove or etch portions of the metallization layers, while remaining portions of the metallization layers may form and include various components and circuits of the device 100, as described more fully herein.

[0043] Referring to Figure 2, Figure 2 illustrates a diagram of an example filter component 200 that can advantageously filter (e.g., low-pass filter) an input signal to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal and reduce parcel losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter. Filter component 200 can include a first substrate component 202 that can be on a first chip (e.g., a qubit chip) and a second substrate component 204 that can be on a second chip (e.g., an interposer chip) of a device (e.g., a qubit device). In some embodiments, the first chip and second chip can be positioned relative to one another to form a flip-chip package, as described herein. First substrate component 202 and second substrate component 204 may be formed from a desired material, such as a silicon-based material (e.g., a silicon-based dielectric substrate), and may have a desired size (e.g., length, width, and thickness or height) and shape, where the thickness or height of each of substrate components 202 and 204 may be on the order of micrometers (μm), for example. Filter component 200 may be an LC filter, such as a low-pass LC filter, which may have a desired cutoff frequency, for example, in the range of approximately 1.0 gigahertz (GHz) to 2.0 GHz. In some embodiments, filter component 200 may be a lumped-element low-pass filter. Filter component 200 may advantageously mitigate (e.g., reduce, minimize, or suppress) electrical noise and Purcell attenuation that would otherwise be associated with applying a raw (e.g., unprocessed) input signal to the flux line, which may enhance the performance and efficiency of the qubit device. Filter component 200 may also advantageously filter the input signal so as not to adversely distort the signal (e.g., the filtered signal) applied to the flux line component.

[0044] In some embodiments, a capacitor component 206 (e.g., a capacitor) may be formed (e.g., fabricated) or located on the first substrate component 202, for example, between pad components (pads) 208 and 210, which may be formed or located on the first substrate component 202. The pad components 208 and 210 may facilitate connecting the components to one another and / or establishing a connection between the first substrate component 202 and the second substrate component 204 (e.g., via a bump bond component). The capacitor component 206 may be associated (e.g., connected) to the pad components 208 and 210. According to various embodiments, the capacitor component 206 may have a capacitance that may range from about 0.5 picofarads (pF) to about 1.5 pF (e.g., 1.0 pF), or may have a capacitance that may be less than 0.5 pF or greater than 1.5 pF. In particular embodiments, the capacitor component 206 may be or include a planar capacitor, such as an interdigital finger capacitor, hi other embodiments, the capacitor component 206 may be or include a parallel plate capacitor, which may have terminals connected to ground (e.g., connected to a ground plane formed on the first substrate component 202).

[0045] In particular embodiments, the inductor component 212 may be formed or located on the second substrate component 204 in proximity to the pad component 214. For example, the pad component 214 may be part of the inductor component 212 when the coil component 216, including one or more windings (e.g., turns) of the inductor component 212 to achieve a desired amount of inductance, is formed around the pad component 214 (e.g., which may function as a conductor portion of the inductor component 212). According to various embodiments, the inductor component 212 may have an inductance that may range from about 7.0 nanohenries (nH) to about 7.5 nH (e.g., 7.3 nH), or may have another inductance level that may be less than 7.0 nH or greater than 7.5 nH. In some embodiments, the inductor component 212 may be a spiral inductor (e.g., as illustrated in FIG. 3 ) that may be wound in a spiral around the pad component 214 (e.g., the conductor portion of the inductor component 212). In another embodiment, the inductor component 212 can be a meander line inductor.

[0046] To facilitate formation of an LC filter of the filter component 200, the filter component 200 may include a bump bond component (bump bond) 218 ​​that may be associated with (e.g., connected to) a pad component 210 on the first substrate component 202 and extend from the pad component 210 to an inductor component 212 on the second substrate component 204 (e.g., to an internal coil lead of a coil component 216 of the inductor component 212). The pad component 210 may be associated with the capacitor component 206, such that the inductor component 212 may be associated with (e.g., connected to) the capacitor component 206 via the bump bond component 218 and the pad component 210. In some embodiments, the capacitor component 206 may be placed in the circuit of the filter component 200 before the inductor component 212 to avoid or mitigate loading by an inductive load (e.g., if the capacitor were otherwise in parallel with a small inductive load of approximately 180 pH, the small inductive load could essentially short out the capacitor, which may be undesirable).

[0047] In certain embodiments, an input line component 220 may be formed or located on the second substrate component 204 and may be associated with (e.g., connected to) the filter component 200 by connecting to a pad component 222 formed or located on the second substrate component 204. To facilitate connecting the input line component 220 to the capacitor component 206 of the LC filter, a bump bond component 224 may be formed, connect to the pad component 222 on the second substrate component 204, and extend to the pad component 208 on the first substrate component 202.

[0048] Filter component 200 (e.g., an output of filter component 200) may also be associated with (e.g., connected to) a flux line component 226 (a flux line portion of flux line component 226 may extend to a flux coupler component of the flux line component as illustrated in FIG. 2 and described herein), which may be formed on or located on second substrate component 204. For example, flux line component 226 may be connected to the outer coil lead of coil component 216 of inductor component 212. Filter component 200 may advantageously filter an input signal applied to input line component 220 to produce a desired filtered signal (e.g., a low-pass filtered signal), which may be output to flux line component 226, facilitating tuning of the frequency of a qubit device, as described more fully herein.

[0049] Filter component 200 may also include various connector components (e.g., conductive connectors), such as connector component 228 and connector component 230. For example, connector component 228 may connect pad component 208 to capacitor component 206, and connector component 230 may connect capacitor component 206 to pad component 210.

[0050] 3 illustrates a diagram of a top view of an exemplary interdigital finger capacitor component 300 according to various aspects of an embodiment of the disclosed subject matter. In some embodiments, a filter component as described herein may utilize an interdigital finger capacitor component, such as interdigital finger capacitor component 300, to facilitate creating a desired filter (e.g., an LC or LCL low-pass filter) that can be utilized to filter an input signal to generate a filtered signal (e.g., a low-pass filtered signal) that can be applied to a flux line component of a qubit device, as described more fully herein.

[0051] Interdigital finger capacitor component 300 may include a multi-finger structure that can be arranged to generate a desired capacitance. In some embodiments, interdigital finger capacitor component 300 may utilize lumped circuit elements. Interdigital finger capacitor component 300 may include a set of finger components, such as finger component 302, finger component 304, finger component 306, and finger component 308, that can be arranged in an interdigital manner with a desired amount of space (e.g., space 310) between adjacent finger components (e.g., finger component 302 and finger component 304). Interdigital finger capacitor component 300 may also include terminals 312 and 314 that can be used to connect interdigital finger capacitor component 300 to other components of a circuit (e.g., a qubit device). The set of finger components (e.g., 302, 304, 306, and 308), terminals (e.g., 312 and 314), and surrounding capacitor structure 316 may be formed from any desired conductive material and may be formed on the substrate component using any desired fabrication, removal, or etching process, as described more fully herein. Capacitance may be generated across the spaces or gaps between each finger component (e.g., 302, 304, 306, and 308) of the set of finger components. The capacitance level of interdigital finger capacitor component 300 may be based, at least in part, on the width of the finger components (e.g., 302, 304, 306, and 308), the length of the finger components, the amount of space between the finger components, the number of finger components, the number of spaces, and / or other factors or parameters associated with interdigital finger capacitor component 300.

[0052] FIG. 4 shows a diagram of a top view of an exemplary spiral inductor component 400 in accordance with various aspects and embodiments of the disclosed subject matter. In some embodiments, a filter component as described herein may utilize a spiral inductor component such as spiral inductor component 400 to facilitate creation of a desired filter (e.g., an LC or LCL low-pass filter) that may be utilized to filter an input signal to generate a filtered signal (e.g., a low-pass filtered signal) that may be applied to a flux-line component of a qubit device, as described more fully herein. Spiral inductor component 400 may include a conductor portion 402 that may have a desired size and shape and may be formed from a desired conductive material, as described herein. In some embodiments, conductor portion 402 may be circular (or cylindrical) or rounded (e.g., circular when viewed from a top view of conductor portion 402). In a particular embodiment, conductor portion 402 may be a pad component formed on a substrate component, as described herein.

[0053] Spiral inductor component 400 may also include a coil component 404, which may include one or more windings, such as winding 406, winding 408, and winding 410, where one or more windings (e.g., one or more turns) may be formed around and surround conductor portion 402 to facilitate generating a desired amount of inductance. The one or more windings may typically have a shape that may substantially correspond to the shape of conductor portion 402. For example, if conductor portion 402 is circular (or cylindrical) in shape, one or more windings (e.g., 406, 408, and 410) of coil component 404 that surround conductor portion 402 may be substantially circular in shape. The amount of inductance generated by spiral inductor component 400 may be based, at least in part, on the size of conductor portion 402, the number of windings of coil component 404, and / or other factors or parameters associated with spiral inductor component 400.

[0054] The spiral inductor component 400 may also include an internal coil lead 412 that may be associated with (e.g., connected to or integrated with) the innermost winding (e.g., winding 410) of the coil component 404, and an external coil lead 414 that may be associated with the outermost winding (e.g., winding 406) of the coil component 404. The internal coil lead 412 and the external coil lead 414 may be utilized to connect the spiral inductor component 400 to other components or circuits of a qubit device, for example, to facilitate the formation of a filter component (e.g., an LC or LCL low-pass filter component), as described more fully herein.

[0055] Referring to FIG. 5, FIG. 5 illustrates a diagram of an example filter component 500 that can advantageously filter (e.g., low-pass filter) an input signal to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal and reduce parcel losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter. The filter component 500 can include a first substrate component 502 that can be on a first chip (e.g., a qubit chip) and a second substrate component 504 that can be on a second chip (e.g., an interposer chip) of the device (e.g., a qubit device). In some embodiments, the first and second chips can be positioned relative to one another to form a flip-chip package, as described herein. The first substrate component 502 and the second substrate component 504 can be formed from a desired material, such as a silicon-based material. The filter component 500 can be an LC filter, such as a low-pass LC filter, that can have a desired cutoff frequency that can be in the range of, for example, about 1.0 gigahertz (GHz) to about 2.0 GHz. In some embodiments, filter component 500 may be a lumped-element low-pass filter. As described more fully herein, filter component 500 may advantageously mitigate (e.g., reduce, minimize, or suppress) electrical noise and Purcell attenuation that would otherwise be associated with applying raw (e.g., unprocessed) input signals to the flux lines, enhancing the performance and efficiency of qubit devices. Filter component 500 may also advantageously filter the input signal so as not to adversely distort the signal (e.g., the filtered signal) applied to the flux line component.

[0056] In some embodiments, a capacitor component 506 (e.g., a capacitor) may be formed (e.g., fabricated) or located on the first substrate component 502, for example, proximate to a pad component 508 that may be formed or located on the first substrate component 502 (where the pad component 508 may be part of an inductor component 510 described herein). According to various embodiments, the capacitor component 506 may have a desired capacitance that may range from about 1.0 pF to about 2.5 pF (e.g., 2.0 pF), or may have a capacitance that may be less than 1.0 pF or greater than 2.5 pF. For example, the capacitor component 506 typically has a larger capacitance and / or a larger size (e.g., area) than the capacitor component 506 of an LC filter such as those described with respect to FIGS. 2 and 3. Also, according to various embodiments, the capacitor component 506 may be or include a planar capacitor (e.g., an interdigital finger capacitor) or a parallel plate capacitor, where the parallel plate capacitor may have a terminal connected to ground (e.g., connected to a ground plane formed on the first substrate component 502).

[0057] In particular embodiments, the inductor component 510 may be formed or located on the first substrate component 502 in proximity to the pad component 508. For example, the pad component 508 may be part of the inductor component 510 when a coil component 512 including one or more windings (e.g., turns) of the inductor component 510 is formed around the pad component 508 (e.g., may function as the conductor portion of the inductor component 510) to achieve a desired amount of inductance. According to various embodiments, the inductor component 510 may have an inductance that may range from about 7.0 nanohenries (nH) to about 7.5 nH (e.g., 7.3 nH), or may have another inductance level that may be less than 7.0 nH or greater than 7.5 nH. In some embodiments, the inductor component 510 may be a spiral inductor (e.g., as illustrated in FIG. 3 ) that may be wound in a spiral around the pad component 508 (e.g., the conductor portion of the inductor component 510). In another embodiment, the inductor component 510 can be a meander line inductor.

[0058] To facilitate forming an LC filter of filter component 500, capacitor component 506 may be associated with (e.g., connected to) the outer coil lead of coil component 512 of inductor component 510 via connector component 513. In some embodiments, capacitor component 506 may be placed in the circuit of filter component 500 before inductor component 510 to avoid or mitigate loading due to inductive loading, as described herein. In particular embodiments, the capacitance level and / or size (e.g., area) of capacitor component 506 may be larger than capacitor component 206 of FIG. 2 , if desired.

[0059] In some embodiments, an input line component 514 may be formed or located on the first substrate component 502 and may be associated with (e.g., connected to) the filter component 500 by connecting to the capacitor component 506. The filter component 500 (e.g., the output of the filter component 500) may also be associated with (e.g., connected to) a flux line component 516 that may be formed or located on the second substrate component 504 (a flux line portion of the flux line component 516 that may extend to a flux coupler component as described herein is illustrated in FIG. 4). To facilitate connecting the LC filter to the flux line component 516, a bump bond component 518 may be formed to connect to an internal coil lead of the coil component 512 of the inductor component 510 and may extend from the internal coil lead to a pad component 520 that may be formed or located on the second substrate component 504, where the flux line component 516 may be connected to the pad component 520. The filter component 500 advantageously filters an input signal applied to the input line component 514 to produce a desired filtered signal (e.g., a low-pass filtered signal) that may be output to the flux line component 516, which may facilitate tuning the frequency of a qubit device, as described more fully herein.

[0060] FIG. 6 illustrates a diagram of an example filter component 600 that may utilize an LCL filter to advantageously filter (e.g., low-pass filter) an input signal to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal and reduce parcel losses in couplers and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter. For example, filter component 600 may include an LCL filter, while filter component 200 of FIG. 2 may include an LC filter. Except for this, in many aspects, filter component 600 may be substantially identical to filter component 200 of FIG. 2. Filter component 600 may include a first substrate component 202 that may be on a first chip (e.g., a qubit chip) and a second substrate component 204 that may be on a second chip (e.g., an interposer chip) of a device (e.g., a qubit device). In some embodiments, the first and second chips may be arranged relative to one another to form a flip-chip package, as described herein. The filter component 600 may be an LCL filter, such as a low-pass LCL filter, which may have a desired cutoff frequency that may range from about 1.0 GHz to about 2.0 GHz.

[0061] The filter component 600 may include, for example, a capacitor component 602 that may be formed (e.g., fabricated) or located on the first substrate component 202 between the pad component (pad) 208 and the pad component 210. The filter component 600 may also include an inductor component 212 that may be formed or located on the second substrate component 204 proximate the pad component 214. The pad component 214 may be part of the inductor component 212, for example, when the coil component 216, which includes one or more windings (e.g., turns) of the inductor component 212 to achieve a desired amount of inductance, is formed around the pad component 214 (e.g., may function as a conductor portion of the inductor component 212). The filter component 600 may further include an input line component 220, a pad component 222, a flux line component 226, and bump bond components 218 and 224. These various components of the filter component 600 may be arranged in the same or similar manner as described herein with respect to the filter component 200 of FIG. 2.

[0062] The capacitor component 602 of the filter component 600 (e.g., an LCL filter) may have a different (e.g., larger) capacitance and / or may be a different (e.g., larger) size, or may have the same capacitance and / or may be the same size (e.g., area) as the capacitor component 206 utilized in the LC filter of Figure 2. According to various embodiments, the capacitor component 602 may have a capacitance that may range from about 1.0 pF to about 2.0 pF (e.g., 1.6 pF), or may have a capacitance that may be less than 1.0 pF or greater than 2.0 pF.

[0063] In particular embodiments, filter component 600 may include another inductor component, such as inductor component 604, which may include coil component 606 and pad component 222, where pad component 222 may function as a conductor portion of inductor component 604. In some embodiments, coil component 606 may have one winding, while in other embodiments, coil component 606 may include more than one winding (e.g., a relatively small number of windings), but typically may have fewer windings than coil component 216 of inductor component 212 of filter component 600. According to various embodiments, inductor component 212 of filter component 600 may have an inductance that may range from about 7.0 nH to about 7.5 nH (e.g., 7.4 nH), or may have another inductance level that may be less than 7.0 nH or greater than 7.5 nH. Also, according to various embodiments, the inductor component 604 may have an inductance that may range from about 1.0 nH to about 2.0 nH (e.g., 1.5 nH), or may have another inductance level that may be less than 1.0 nH or greater than 2.0 nH, but that inductance level may typically be significantly lower than the inductance level of the inductor component 212 of the filter component 600.

[0064] Filter component 600 may also include various connector components (e.g., conductive connectors), such as connector component 608 and connector component 610. For example, connector component 608 may connect pad component 208 to capacitor component 602, and connector component 610 may connect capacitor component 602 to pad component 210.

[0065] In some embodiments, there may be a separate (e.g., open) area 612 of a desired size (e.g., about 1 mm, or greater or less than 1 mm) between the bump bond component 218 (or associated pad component 210) and the capacitor component 602 (e.g., as shown in partial top view 614 of a first chip (e.g., qubit chip) of filter component 600), where the separate area 612 may be utilized for desired and desirable layout and routing over other components (e.g., resonators or other peripheral components) or other features of the qubit device, as described more fully herein.

[0066] Briefly referring to FIGS. 7 and 8 (in conjunction with FIGS. 1-6 ), FIGS. 7 and 8 present diagrams of example graphs 700 and 800 of filter circuit simulation results for respective filter components (e.g., LC low-pass filter components and LCL low-pass filter components) as described herein in accordance with various aspects and embodiments of the disclosed subject matter. FIG. 7 presents a diagram of an example graph 700 of a filter circuit simulation of the frequency response of respective filter components (e.g., LC low-pass filter components and LCL low-pass filter components) as described herein in accordance with various aspects and embodiments of the disclosed subject matter. Graph 700 shows S in decibels (dB) as a function of frequency (in GHz) for transmission into a 50 Ω load associated with an LC filter component as described herein. 21 7 presents the frequency response 702 of the LC filter component for S (also referred to as S(2,1)). 21 Graph 700 also illustrates the transmission, S, as a function of frequency for transmission into a 50 Ω load associated with an LCL filter component (e.g., a Gaussian LCL filter component) as described herein. 21 7 presents the frequency response 704 of the LCL filter component for

[0067] 8 illustrates a diagram of an example graph 800 related to a simulation of a pulse transmission to an inductive load for each filter component in accordance with various aspects and embodiments of the disclosed subject matter. The example graph 800 includes a graph 802 showing a simulation of a square wave transmission 804 to an inductive load of 180 pH, shown as current (I in mA) as a function of time (nanoseconds (ns)). The example graph 800 may also include a graph 806, which may include simulation results related to a filter circuit simulation of the time-domain response of each filter component (e.g., an LC low-pass filter component and an LCL low-pass filter component) when subjected to the square wave transmission 804 in accordance with various aspects and embodiments of the disclosed subject matter. The graph 806 presents a time-domain response 808 of the LC filter component as current (I in mA) as a function of time (ns) when subjected to the square wave transmission 804 to an inductive load of 180 pH. The graph 800 also presents the time domain response 810 of the LCL filter component as current as a function of time when subjected to a square wave transmission 804 into an inductive load of 180 pH.

[0068] As can be seen from graphs 700 and 800, there is some (e.g., relatively small) overshoot in the frequency response 702 and time-domain response 808 of the LC filter component, and there is relatively little overshoot in the frequency response 704 and time-domain response 810 of the LCL filter component. Thus, in some applications, an LCL filter component (e.g., a Gaussian LCL filter component) may be preferable to an LC filter component because the LCL filter component may have relatively less overshoot than the LC filter component. For the LC and LCL filter components, the cutoff frequency may be in the range of approximately 1.0 GHz to 2.0 GHz, and approximately 12 dB to 15 dB of attenuation may be advantageously achieved in the frequency range of interest for the qubit device, and signal integrity may be advantageously maintained for the baseband signal.

[0069] Referring to FIG. 9 , FIG. 9 illustrates a diagram of an exemplary filter component 900 (e.g., a low-pass filter component) in accordance with various aspects and embodiments of the disclosed subject matter, which may include higher-order filtering by cascading multiple filter stages, and which may advantageously filter (e.g., low-pass filter) an input signal to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal and reduce Purcell losses in couplers and qubit devices.

[0070] The filter component 900 may include a first substrate component 902, which may be on a first chip (e.g., a qubit chip), and a second substrate component 904, which may be on a second chip (e.g., an interposer chip) of a device (e.g., a qubit device). In some embodiments, the first and second chips may be arranged with respect to one another to form a flip-chip package, as described herein. The first substrate component 902 and the second substrate component 904 may be formed from any desired material, such as a silicon-based material. The filter component 900 may be an LC filter, such as a low-pass LC filter, which may include a ladder network including a set of inductor components and a set of capacitor components, and a higher-order filter is realized by cascading multiple stages (e.g., multiple LC stages) of inductor and capacitor components. By adding additional LC stages to the filter component 900, the filter component 900 may have a higher-order filter that may have more stopband attenuation than a single-stage LC filter component. The filter component 900, which utilizes multiple filter stages, may have a desired cutoff frequency, which may be, for example, in the range of approximately 100 megahertz (MHz) to 10.0 GHz. In some embodiments, the filter component 900 may be a lumped-element low-pass filter. The filter component 900 may advantageously mitigate (e.g., reduce, minimize, or suppress) electrical noise and Purcell attenuation that would otherwise be associated with applying a raw (e.g., unprocessed) input signal to the flux line, which may enhance the performance and efficiency of the qubit device. The filter component 900 may also advantageously filter the input signal so as not to adversely distort the signal (e.g., the filtered signal) applied to the flux line component.

[0071] As described more fully herein, the set of inductor components may include inductor component 906, inductor component 908, inductor component 910, and inductor component 912, which may be formed or located on the second substrate component 904. As described more fully herein, the set of capacitor components may include capacitor component 914, capacitor component 916, and capacitor component 918, which may be formed or located on the first substrate component 902 or the second substrate component 904, for example, in an alternating manner. For example, capacitor component 914 may be located on the first substrate component 902, capacitor component 916 may be located on the second substrate component 904 between inductor component 908 and inductor component 910, and capacitor component 918 may be located on the first substrate component 902. If additional LC filter stages are desired, the additional LC filter stages may be formed by having capacitor components distributed across the first substrate component 902 and the second substrate component 904 in such an alternating manner (e.g., alternating between different substrate layers).

[0072] Further with respect to the set of inductor components, inductor component 906 may be formed using a pad component (pad) 920 and a coil component 922, which may be formed or located on the second substrate component 904. Inductor component 908 may be formed using a pad component 924 and a coil component 926, which may be formed or located on the second substrate component 904. Inductor component 910 may be formed using a pad component 928 and a coil component 930, which may be formed or located on the second substrate component 904. Inductor component 912 may be formed using a pad component 932 and a coil component 934, which may be formed or located on the second substrate component 904. Each inductor component 906, 908, 910, and 912 may have a respective number of windings and a respective inductance level. Typically, inductor component 906 may have a smaller number of windings (e.g., one winding or other desired small number of windings) and a smaller inductance level than inductor component 908, which may have a smaller number of windings and a smaller inductance level than inductor component 910, which may have a smaller number of windings and a smaller inductance level than inductor component 912. Inductor components 906, 908, 910, and 912 may be spiral inductors (as shown) or may be meander wire inductors.

[0073] Further with respect to the set of capacitor components, each capacitor component 914, 916, and 918 can have a respective capacitance level and / or a respective size (e.g., area). For example, typically, capacitor component 914 can have a smaller capacitance and / or a smaller size than capacitor component 916, which can have a smaller capacitance and / or a smaller size than capacitor component 918. Capacitor components 914, 916, and 918 can be planar capacitors (as shown) or parallel plate capacitors. In some embodiments, capacitor components 914, 916, and 918 can be interdigital finger capacitors.

[0074] The filter component 900 may include bump bond components (B) that may connect inductor components 906, 908, 910, and 912 on the second substrate component 904 to the first substrate component 902 (e.g., pad components on the first substrate component 902), facilitating connecting each inductor component 906, 908, 910, and 912 to each capacitor component 914 and 918 on the first substrate component 902 and forming a ladder network including multiple LC filter stages. The first substrate component 902 may include pad components (P) 936, 938, 940, and 942 that may be distributed on the first substrate component 902, where capacitor component 914 may be located between pad component 936 and pad component 938 and may be connected thereto via connector components 937 and 939, respectively, and capacitor component 918 may be located between pad component 940 and pad component 942 and may be connected thereto via connector components 941 and 943, respectively.

[0075] A bump bond component 944 may be formed to connect the pad component 936 on the first substrate component 902 to the internal coil lead of the coil component 922 of the inductor component 906 on the second substrate component 904, facilitating associating (e.g., connecting) the inductor component 906 with (or to) the capacitor component 914. A bump bond component 946 may be formed to connect the pad component 938 on the first substrate component 902 to the internal coil lead of the coil component 926 of the inductor component 908 on the second substrate component 904, facilitating associating (e.g., connecting) the inductor component 908 with (or to) the capacitor component 914. A bump bond component 948 may be formed to connect the pad component 940 on the first substrate component 902 to the internal coil lead of the coil component 930 of the inductor component 910 on the second substrate component 904, facilitating associating (e.g., connecting) the inductor component 910 with (or to) the capacitor component 918. A bump bonding component 950 may be formed to connect the pad component 942 on the first substrate component 902 to the internal coil lead of the coil component 934 of the inductor component 912 on the second substrate component 904, and may facilitate associating (e.g., connecting) the inductor component 912 with (or to) the capacitor component 918.

[0076] Capacitor component 916 may be located between inductor component 908 and inductor component 910 on second substrate component 904. Capacitor component 916 may be associated (e.g., connected) to an outer coil lead of coil component 926 of inductor component 908 via connector component 925, and may be associated to an outer coil lead of coil component 930 of inductor component 910 via connector component 929.

[0077] In particular embodiments, input line component 952 may be formed or located on second substrate component 904 and may be associated with (e.g., connected to) filter component 900 by connecting input line component 952 to the outer coil lead of coil component 922 of inductor component 906. Filter component 900 (e.g., the output of filter component 900) may also be associated with (e.g., connected to) flux line component 954 (a flux line portion of flux line component 954 may extend to a flux coupler component of the flux line component as illustrated in FIG. 9 and described herein), which may also be formed or located on second substrate component 904. For example, flux line component 954 may be connected to the outer coil lead of coil component 934 of inductor component 912. In some embodiments, the last component of filter component 900 may be inductor component 912, which may be a series inductor to an inductive load at the output of filter component 900 so as to avoid having a capacitor in parallel with the inductive load. 9 , for purposes of illustration, circuit 956 may represent in schematic form the multi-stage LC filter circuit of filter component 900. Filter component 900 may advantageously filter an input signal applied to input line component 952 to produce a desired filtered signal (e.g., a low-pass filtered signal) that may be output to flux line component 954, which may facilitate tuning the frequency of a qubit device, as described more fully herein.

[0078] 10 illustrates a diagram of an exemplary filter component 1000 (e.g., a low-pass filter component) that may include high-order filtering by cascading multiple filter stages, advantageously filtering (e.g., low-pass filtering) an input signal to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal, reduce parcel losses in couplers and qubit devices, and enable desired routing or placement of access lines and / or peripheral devices, in accordance with various aspects and embodiments of the disclosed subject matter. Filter component 1000 may include substantially the same component and circuit arrangement as filter component 900 of FIG. 9, and filter component 1000 may further enable desired routing of access lines and / or peripheral devices with respect to various components of filter component 1000 and qubit devices with which filter component 1000 may be associated (e.g., part of or connected to). The diagram of the exemplary filter component 1000 includes a side view 1002 of the filter component 1000, as well as a first top view 1004 of a first portion of the filter component 1000, a second top view 1006 of a second portion of the filter component 1000, and a third top view 1008 of a third portion of the filter component 1000 to facilitate illustrating certain aspects and embodiments of the disclosed subject matter.

[0079] The filter component 1000 may include a first substrate component 1012, which may be on a first chip (e.g., a qubit chip), and a second substrate component 1010, which may be on a second chip (e.g., an interposer chip) of a device (e.g., a qubit device). In some embodiments, the first and second chips may be arranged with respect to one another to form a flip-chip package, as described herein. The first substrate component 1010 and the second substrate component 1012 may be formed from any desired material, such as a silicon-based material. As described more fully herein, the filter component 1000 may be an LC filter, such as a low-pass LC filter, which may include a ladder network including a set of inductor components and a set of capacitor components, with higher-order filters realized by cascading multiple stages (e.g., multiple LC stages) of inductor and capacitor components.

[0080] As will be described more fully herein, the filter component 1000 may include a set of inductor components (e.g., 906, 908, 910, and 912), a set of capacitor components (C) (e.g., 914, 916, and 918), pad components (pads or P) (e.g., 920, 924, 928, 932, 936, 940, and 942), connector components (e.g., 925, 929, 937, 939, 941, and 943), and bump bond components (B) (e.g., 944, 946, 948, and 950), which may be located or formed on a first substrate component 1010 and a second substrate component 1012, respectively. As will be described more fully herein, an input of the filter component 1000 may be formed on the second substrate component 1012 and associated (e.g., connected) to an input line component 952, which may be formed on the second substrate component 1012. As described more fully herein, the output of the filter component 1000 may be formed on a second substrate component 1012 and may be associated (e.g., connected) to a flux line component 954, which may be formed on the second substrate component 1004.

[0081] Due in part to the multi-level flip-chip filter structure of filter component 1000, including the distribution of each component of filter component 1000 across first substrate component 1010 and second substrate component 1012, there may be space or distinct areas that may be available on first substrate component 1010 and second substrate component 1012 for desired routing of access lines and / or components (e.g., resonators or other peripheral devices). For example, as illustrated in first top view 1004 of a first portion (e.g., portion of the first chip) of filter component 1000, access line 1014 and access line 1016 may be formed or located across first substrate component 1010 between pad component 938 and pad component 940. This is partly due to the capacitor component 916 being located on the second substrate component 1012 rather than the first substrate component 1010 (above the area of ​​the first substrate component 1010 where the access lines 1014 and 1016 are formed), and partly due to the absence of other circuitry or components in that area.

[0082] As another example, as illustrated in second top view 1006 of a second portion (e.g., portion of a second chip) of filter component 1000, access line 1018 may be formed or located on second substrate component 1012, with a first portion of access line 1018 located along a first side of inductor component 906 and a second portion of access line 1018 located between inductor component 906 and inductor component 908 along an adjacent side of inductor component 906. This is due in part to the fact that capacitor component 914 is located on first substrate component 1010 rather than second substrate component 1012 (below the region of second substrate component 1012 where the second (e.g., adjacent) portion of access line 1018 is formed), and in part to the absence of other circuitry or components in those regions of second substrate component 1012. As yet another example, as illustrated in third top view 1008 of a third portion of filter component 1000 (e.g., another portion of the second chip), access line 1020 may be formed or located on second substrate component 1012, with a first portion of access line 1020 located along a first side of inductor component 912, a second portion of access line 1020 located along an adjacent side of inductor component 912 between inductor component 910 and inductor component 912, and a third portion of access line 1020 located along a third side of inductor component 912 opposite the first side of inductor component 912. This is due in part to the fact that capacitor component 918 is located on first substrate component 1010 rather than second substrate component 1012 (below an area of ​​second substrate component 1012 where a second (e.g., adjacent) portion of access line 1020 is formed), and in part to the absence of other circuitry or components in those areas of second substrate component 1012.It will be appreciated and understood that the access lines (e.g., 1014, 1016, 1018, and 1020) illustrated in FIG. 10 are merely exemplary, and that in accordance with the disclosed subject matter, more, fewer, or different (e.g., differently configured or sized) access lines and / or peripheral devices may be formed or located on the first substrate component 1010 and / or the second substrate component 1012, or in proximity to the filter component 1000 or associated quantum bit devices, as desired, to facilitate the desired (e.g., efficient, suitable, or optimal) design, structuring, and formation of quantum bit devices.

[0083] 11 illustrates a diagram of an example distributed spiral inductor component 1100 that may be utilized in a filter component (e.g., a low-pass filter component) that may have respective winding portions facing in the same direction, in accordance with various aspects and embodiments of the disclosed subject matter. As described more fully herein, the distributed spiral inductor component 1100 may include a first inductor portion 1102 that may be formed on a first substrate component 1104 of a first chip (e.g., a qubit chip) and a second inductor portion 1106 that may be formed on a second substrate component 1108 of a second chip (e.g., an interposer chip), where the first chip and second chip may be arranged to form a flip-chip package.

[0084] The first inductor portion 1102 may include a first coil portion 1110 (which may function as a first conductor portion of the first inductor portion 1102) and a first pad component 1112. The first coil portion 1110 may include one or more windings that may face in a first direction (e.g., a clockwise direction or, alternatively, a counterclockwise direction). The second inductor portion 1106 may include a second coil portion 1114 (which may function as a second conductor portion of the second inductor portion 1106) and a second pad component 1116. The second coil portion 1114 may include one or more windings that may face in a first direction (e.g., the same direction as the windings of the first coil portion 1110).

[0085] To facilitate formation of the distributed spiral inductor component 1100, the first coil portion 1110 located on the first substrate component 1104 may be associated with (e.g., connected to) the second coil portion 1114 located on the second substrate component 1108 via a bump bond component 1118 that may extend from (e.g., span) the first substrate component 1104 to the second substrate component 1108. For example, one end of the bump bond component 1118 may be connected to the internal coil lead of the first coil portion 1110 of the first inductor portion 1102, and the other end of the bump bond component 1118 may be connected to the internal coil lead of the second coil portion 1114 of the second inductor portion 1106.

[0086] The amount of inductance that may be generated (e.g., produced) by the distributed spiral inductor component 1100 may be based, at least in part, on the number of windings in the first coil portion 1110 and the number of windings in the second coil portion 1114, and the fact that the windings in the first coil portion 1110 and the second coil portion 1114 are in the same first direction. By having the windings in the first coil portion 1110 and the windings in the second coil portion 1114 proceed in the same first direction, current may flow in the same direction through the first coil portion 1110 and the second coil portion 1114, which may enhance or increase the magnetic field and therefore increase (or at least not decrease) the amount of inductance of the distributed spiral inductor component 1100. The amount of inductance of the distributed spiral inductor component 1100 can be in the range of about 6.5 nH to about 8.0 nH (e.g., about 7.17 nH), although, for example, the amount of inductance can be less than 6.5 nH or greater than 8.0 nH by adjusting (e.g., decreasing or increasing) the number of windings in the first coil portion 1110 or the second coil portion 1114 as appropriate, if desired.

[0087] By distributing the first inductor portion 1102 and the second inductor portion 1106 of the distributed spiral inductor component 1100, the disclosed subject matter (e.g., a filter component including the distributed spiral inductor component 1100) may enable the filter component to be more efficient. As described more fully herein, a metallization layer of a desired conductive material (e.g., a superconducting material) may be deposited on the first and second substrate components 1104 and 1108 and selectively removed to facilitate the formation of the distributed spiral inductor component 1100. The metallization utilized to facilitate the formation of the distributed spiral inductor component 1100 may be distributed on the first and second substrate components 1104 and 1108, and the distributed spiral inductor component 1100 may be formed to reduce the filter component's filter footprint (e.g., the amount of space utilized by the filter component on the first and second chips) and / or parasitic effects of the filter component compared to other types of inductors. For example, there may be a space (e.g., area) savings on the first substrate component 1104 because the first inductor portion 1102 may utilize less space on the first substrate component 1104 than would be utilized by another inductor component if that other inductor were formed entirely on the first substrate component 1104 and had the same amount of inductance and the same total number of windings as the distributed spiral inductor component 1100. Similarly, there may be a space savings on the second substrate component 1108 because the second inductor portion 1106 may utilize less space on the second substrate component 1108 than would be utilized by another inductor component if that other inductor were formed entirely on the second substrate component 1108 and had the same amount of inductance and the same total number of windings as the distributed spiral inductor component 1100.

[0088] 12 shows a diagram of an example distributed spiral inductor component 1200 that may have respective winding portions facing in opposite directions and that may be utilized in a filter component (e.g., a low-pass filter component) in accordance with various aspects and embodiments of the disclosed subject matter. As described more fully herein, the distributed spiral inductor component 1200 may include a first inductor portion 1202 that may be formed or located on a first substrate component 1204 of a first chip (e.g., a qubit chip) and a second inductor portion 1206 that may be formed or located on a second substrate component 1208 of a second chip (e.g., an interposer chip). Here, the first chip and the second chip may be arranged to form a flip-chip package.

[0089] First inductor portion 1202 may include a first coil portion 1210 (which may function as a first conductor portion of first inductor portion 1202) and a first pad component 1212. First coil portion 1210 may include one or more windings that may face in a first direction (e.g., a clockwise direction or, alternatively, a counterclockwise direction). Second inductor portion 1206 may include a second coil portion 1214 (which may function as a second conductor portion of second inductor portion 1206) and a second pad component 1216. Second coil portion 1214 may include one or more windings that may face in a second direction (e.g., a counterclockwise direction or, alternatively, a clockwise direction) that may be opposite to the windings of first coil portion 1210.

[0090] To facilitate formation of the distributed spiral inductor component 1200, a first coil portion 1210 located on the first substrate component 1204 may be associated with (e.g., connected to) a second coil portion 1214 located on the second substrate component 1208 via a bump bond component 1218, which may extend from the first substrate component 1204 to the second substrate component 1208. For example, one end of the bump bond component 1218 may be connected to an internal coil lead of the first coil portion 1210 of the first inductor portion 1202, and the other end of the bump bond component 1218 may be connected to an internal coil lead of the second coil portion 1214 of the second inductor portion 1206.

[0091] The amount of inductance that may be generated (e.g., produced) by the distributed spiral inductor component 1200 may be based, at least in part, on the number of windings in the first coil portion 1210 and the number of windings in the second coil portion 1214, and the fact that the windings in the first coil portion 1210 and the second coil portion 1214 are in opposite directions. By having the windings in the first coil portion 1210 and the windings in the second coil portion 1214 proceed in opposite directions, current may flow in a direction through the first coil portion 1210 and the second coil portion 1214, which may reduce (e.g., decrease) the magnetic field of the distributed spiral inductor component 1200 and therefore the amount of inductance. The amount of inductance of the distributed spiral inductor component 1200 may range from about 4.5 nH to about 6.0 nH (e.g., about 5.12 nH), although the amount of inductance may be less than 4.5 nH or greater than 6.0 nH, for example, by adjusting (e.g., decreasing or increasing) the number of windings in the first coil portion 1210 or the second coil portion 1214 as appropriate, if desired. There may be many reasons why it may be desirable to reduce or control the amount of inductance of an inductor (e.g., the distributed spiral inductor component 1200) by having the respective windings of the respective inductor portions proceed in opposite directions. For example, if there is a concern about magnetic fields emanating from the inductor component and it is desired to reduce or minimize the amount of magnetic field emanating from the inductor component, then having the respective windings of the respective inductor portions of the distributed spiral inductor component 1200 proceed in opposite directions may reduce or minimize the amount of magnetic field emanating from the inductor component.

[0092] Similar to the distributed spiral inductor component 1100 of FIG. 11, the distributed spiral inductor component 1200 illustrated in FIG. 12 may provide similar enhancements to the efficiency of the filter component and / or space savings on the first substrate component 1204 and / or the second substrate component 1208.

[0093] 13 illustrates a block diagram of an example system 1300 that may be utilized to create, form, or design a qubit device and / or associated filter component (e.g., a low-pass filter component) in accordance with various aspects and embodiments of the disclosed subject matter. System 1300 may include a device formation component 1302, a processor component 1304, and a data store 1306. As described more fully herein, device formation component 1302 may be utilized to create, form, or design various components of qubit device 1308, or may be associated therewith. For example, device formation component 1302 may be utilized to create, form, or design various components that may be formed or located on a first chip 1310 (e.g., a qubit chip) and various components that may be formed or located on a second chip 1312 (e.g., an interposer chip). The various components may include, for example, a qubit component 1314, a coupler component 1316 which may include a SQUID loop 1318, a capacitor component 1320, a filter component 1322, an input line component 1324, a flux line component 1326 which includes a flux coupler component (flux coupler) 1328, and associated circuitry 1330.

[0094] As part of and to facilitate creating, forming, or designing various components of or associated with qubit device 1308, device formation component 1302 may form or process substrate components, such as a first substrate component that may be part of first chip 1310 and a second substrate component that may be part of second chip 1312. As part of and to facilitate creating, forming, or designing various components of or associated with qubit device 1308, device formation component 1302 may also form, deposit, or process one or more metallization layers on the first and second substrate components, where the metallization layers may be formed from one or more desired metals or conductive materials that may be or include one or more desired superconducting materials (e.g., niobium-based superconducting materials), and the metallization layers may have a desired thickness or height. In some embodiments, device formation component 1302 may remove (e.g., selectively remove) respective portions of the metallization layer to facilitate creating or forming respective components or circuits of qubit device 1308. For example, device formation component 1302 may utilize and / or control various processes, including microfabrication processes, nanofabrication processes, masking or photoresist processes, photolithography processes, chemical etching processes, other etching or removal processes, or other desired processes, to advantageously treat the metallization layer to remove respective portions of the metallization layer to facilitate creating or forming respective components or circuits of qubit device 1308.

[0095] Processor component 1304 may work in conjunction with other components (e.g., device formation component 1302, data store 1306, or another component) to facilitate the performance of various functions of system 1300. Processor component 1304 may utilize one or more processors, microprocessors, or controllers that may process data, such as information regarding qubit devices, qubit components, coupler components, SQUID loops, capacitor components, inductor components, bump bond components, filter components, input line components, flux line components, flux coupler components, circuit design criteria, circuit design algorithms, traffic flow, policies, protocols, interfaces, tools, and / or other information, to facilitate operation of system 1300 and control data flow between system 1300 and other components associated with (e.g., connected to) system 1300 (e.g., computer components, computers, laptop computers, other computing or communication devices, or network devices), as more fully disclosed herein.

[0096] The data store 1306 may store information regarding data structures (e.g., user data, metadata), code structures (e.g., modules, objects, hashes, classes, procedures), or instructions, qubit devices, qubit components, coupler components, SQUID loops, capacitor components, inductor components, bump bond components, filter components, input line components, flux line components, flux coupler components, circuit design criteria, circuit design algorithms, traffic flows, policies, protocols, interfaces, tools, and / or other information to facilitate control of operations associated with the system 1300. In an aspect, the processor component 1304 may be operatively coupled to the data store 1306 (e.g., via a memory bus) to store and retrieve information it desires to operate on and / or to provide functionality, at least in part, to the device formation component 1302, the data store 1306, or other components, and / or virtually any other operating aspect of the system 1300.

[0097] It should be appreciated that the data store 1306 as described herein may include volatile and / or non-volatile memory. By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which may act as external cache memory. By way of example, and not limitation, RAM may come in many forms, including synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), SyncLink DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The memory of the disclosed aspects is intended to include, but is not limited to, these and other suitable types of memory.

[0098] Systems and / or devices have been described (or will be described) herein with respect to interactions between multiple components. It should be recognized that such systems and components may include those components or subcomponents designated therein, some of the designated components or subcomponents, and / or additional components. Subcomponents may also be implemented as components communicatively coupled to other components rather than being included in a parent component. Still further, one or more components and / or subcomponents may be combined into a single component that provides aggregate functionality. Components may also interact with one or more other components not specifically described herein for brevity, but known to those skilled in the art.

[0099] 14 shows a flow diagram of an exemplary, non-limiting method 1400 for forming a filter component (e.g., a low-pass filter component) that can be utilized to provide a desired (e.g., enhanced, suitable, acceptable, or optimal) filtered signal to a flux line component and reduce Purcell losses in coupler and qubit devices, according to various aspects and embodiments of the disclosed subject matter. Method 1400 can be performed, for example, by a system (e.g., a computer system) that includes or is operatively coupled to device forming components, a processor component, and memory. Repeated descriptions of similar elements utilized in other embodiments described herein are or may be omitted for the sake of brevity.

[0100] At 1402, a capacitor component of a filter component (e.g., a low-pass filter component) may be formed on a first substrate component. A device forming component may position or form the capacitor component on the first substrate component (e.g., of a qubit chip).

[0101] At 1404, an inductor component of the filter component may be formed on the second substrate component, where the capacitor component may be associated with the inductor component via a bump bond that may extend from the first substrate component to the second substrate component, facilitating the formation of the filter component. The device-forming component may position or form the inductor component on the second substrate component (e.g., of an interposer chip). The device-forming component may associate (e.g., electrically connect) the capacitor component on the first substrate component to the inductor component on the second substrate component via a bump bond that may extend (e.g., extend) from the first substrate component (e.g., from a first pad component on the first substrate component) to the second substrate component (e.g., to an internal coil lead of the inductor component on the second substrate component).

[0102] 15 illustrates a flow diagram of another exemplary, non-limiting method 1500 for forming a filter component (e.g., a low-pass filter component) that may be utilized to provide a desirable (e.g., enhanced, suitable, acceptable, or optimal) filtered signal to a flux line component and reduce Purcell losses in coupler and qubit devices, in accordance with various aspects and embodiments of the disclosed subject matter. Method 1500 may be performed, for example, by a system (e.g., a computer system) that includes or is operatively coupled to device forming components, a processor component, and memory. Repeated descriptions of similar elements utilized in other embodiments described herein are or may be omitted for the sake of brevity.

[0103] In 1502, an inductor component of a filter component (e.g., a low-pass filter component) may be formed on a first substrate component. A device forming component may position or form the inductor component on the first substrate component.

[0104] At 1504, a capacitor component of the filter component may be formed on the first substrate component and associated with the inductor component. Here, the inductor component may be associated with the second substrate component via a bump bond that may extend from the first substrate component to the second substrate component, facilitating associating the inductor component with a flux line component that may be formed on the second substrate component. The device-forming component may position or form the capacitor component on the first substrate component and associate (e.g., electrically connect) the capacitor component with the inductor component. The device-forming component may associate (e.g., electrically connect) the inductor component with the second substrate component (e.g., a pad component of the second substrate component) via a bump bond that may extend from the first substrate component (e.g., from the inductor component of the first substrate component) to the second substrate component (e.g., to a pad component of the second substrate component), facilitating associating the inductor component with a flux line component that may be formed on the second substrate component.

[0105] 16 shows a flow diagram of an exemplary, non-limiting method 1600 for forming a qubit device including a filter component (e.g., a low-pass filter component) that can be utilized to provide a desirable (e.g., enhanced, suitable, acceptable, or optimal) filtered signal to a flux line component and reduce parcel losses in the coupler and qubit device, in accordance with various aspects and embodiments of the disclosed subject matter. Method 1600 can be performed, for example, by a system (e.g., a computer system) that includes or is operatively coupled to device formation components, a processor component, and memory. Repeated descriptions of similar elements utilized in other embodiments described herein are or may be omitted for the sake of brevity.

[0106] In 1602, a filter component (e.g., a low-pass filter component) may be formed on the first substrate component and / or the second substrate component. Here, the filter component may include at least one inductor component, at least one capacitor component, and at least one bump bond component. Here, the at least one bump bond component may extend from the first substrate component to the second substrate component. The device formation component may form a filter component on the first substrate component and / or the second substrate component. Here, the filter component may have a desired filter structure, as described more fully herein. The first substrate component may be part of a qubit chip, and the second substrate component may be part of an interposer chip. The qubit device may include a qubit chip and an interposer chip in a flip-chip package. Here, the interposer chip may be inverted (e.g., flipped over) so that its top surface (e.g., the surface including components) faces the top surface of the qubit chip.

[0107] At 1604, an input line component may be associated with an input of the filter component. The device forming component may form the input line component on the first substrate component or the second substrate component depending on the desired filter structure utilized. The device forming component may associate (e.g., connect) the input line component with an input (e.g., input port) of the filter component.

[0108] At 1606, a flux line component may be associated with an output of the filter component. A device formation component may form the flux line component on a second substrate component. The device formation component may associate (e.g., connect) the flux line component with an output (e.g., output port) of the filter component. When an input signal (e.g., an electrical signal) is applied to the input line component, the filter component may advantageously filter the input signal to produce a filtered signal as an output. The filtered signal may be output from the filter component to the flux line component.

[0109] At 1608, a set of qubit components including one or more qubit components may be formed on the first substrate component proximate to the flux line component. A device formation component may form the set of qubit components (e.g., on a qubit chip) on the first substrate component proximate to the flux line component.

[0110] At 1610, one or more coupler components each including a SQUID loop may be formed on a first substrate component, where each coupler component may be located adjacent to a qubit component or between two qubit components. The device formation component may form one or more coupler components each including a SQUID loop on the first substrate component, where each coupler component may be located adjacent to a qubit component or between two qubit components of a set of qubit components.

[0111] At 1612, one or more capacitor components may be formed on the first substrate component, where each capacitor component may be located between and associated with a qubit component and a coupler component. The device formation component may form one or more capacitor components on the first substrate component, where each capacitor component may be located between a qubit component and a coupler component and may facilitate electrically connecting the qubit component and the coupler component to one another. The filtered signal output from the filter component to the flux line component may cause the flux line component to generate a desired magnetic field that may be associated with (e.g., applied to) the SQUID loop and facilitate tuning (e.g., adjusting or modifying) the frequency of the qubit device.

[0112] For simplicity of explanation, methods and / or computer-implemented methods are depicted and described as a series of actions. It is understood and appreciated that the disclosed subject matter is not limited by the depicted actions and / or the order of actions; for example, actions may occur in various orders and / or simultaneously, along with other actions not shown and described herein. Moreover, not all depicted actions may be required to implement a computer-implemented method in accordance with the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that a computer-implemented method could alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it should be further appreciated that the computer-implemented methods disclosed below and throughout this specification can be stored on an article of manufacture to facilitate transferring and migrating such computer-implemented methods to a computer. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage medium.

[0113] To provide context for various aspects of the disclosed subject matter, FIG. 17 and the following discussion are intended to provide a general description of a suitable environment in which various aspects of the disclosed subject matter may be implemented. FIG. 17 illustrates a block diagram of a non-limiting example operating environment capable of facilitating one or more embodiments described herein. Repeated descriptions of similar elements utilized in other embodiments described herein may be omitted or omitted for the sake of brevity. Referring to FIG. 17, a suitable operating environment 1700 for implementing various aspects of the present disclosure may also include a computer 1712. The computer 1712 may also include a processing unit 1714, a system memory 1716, and a system bus 1718. The system bus 1718 couples system components, including, but not limited to, the system memory 1716, to the processing unit 1714. The processing unit 1714 may be any of a variety of available processors. Dual microprocessors and other multi-processor architectures may also be utilized as the processing unit 1714. The system bus 1718 may be any of several types of bus structures, including a memory bus or memory controller, a peripheral bus or external bus, and / or a local bus using any of a variety of available bus architectures, including, but not limited to, Industry Standard Architecture (ISA), MicroChannel Architecture (MSA), Enhanced ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire® (IEEE 1394), and Small Computer System Interface (SCSI). The system memory 1716 may also include volatile memory 1720 and nonvolatile memory 1722. The basic input / output system (BIOS), containing the basic routines for transferring information between elements within the computer 1712, such as during start-up, is stored in the nonvolatile memory 1722.By way of example, and not limitation, non-volatile memory 1722 may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) such as ferroelectric RAM (FeRAM). Volatile memory 1720 may also include random access memory (RAM) that acts as external cache memory. By way of example, and not limitation, RAM is available in many forms, including static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), SyncLink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM).

[0114] The computer 1712 may also include removable / non-removable, volatile / non-volatile computer storage media. FIG. 17 shows, for example, disk storage 1724. Disk storage 1724 may also include devices such as, but not limited to, a magnetic disk drive, a floppy disk drive, a tape drive, a Jaz drive, a Zip drive, an LS-100 drive, a flash memory card, or a memory stick. Disk storage 1724 may also include storage media, separately or in combination with other storage media, including, but not limited to, an optical disk drive, such as a compact disc read-only memory (CD-ROM), a CD-recordable drive (CD-R drive), a CD-rewriteable drive (CD-RW drive), or a digital versatile disc read-only memory (DVD-ROM). A removable or non-removable interface, such as interface 1726, is typically used to facilitate connection of the disk storage 1724 to the system bus 1718. FIG. 17 also illustrates software that acts as an intermediary between users and the basic computer resources described in the preferred operating environment 1700. Such software may also include, for example, operating system 1728. Operating system 1728, which may be stored on disk storage 1724, acts to control and allocate resources of the computer 1712. System applications 1730 take advantage of the management of resources by operating system 1728 through program modules 1732 and program data 1734, which are stored, for example, either in system memory 1716 or on disk storage 1724. It should be appreciated that the present disclosure may be implemented with various operating systems or combinations of operating systems. A user enters commands or information into computer 1712 through input devices 1736.Input devices 1736 include, but are not limited to, pointing devices such as a mouse, trackball, stylus, touchpad, keyboard, microphone, joystick, gamepad, satellite dish, scanner, television tuner card, digital camera, digital video camera, webcam, etc. These and other input devices connect to the processing unit 1714 through the system bus 1718 via interface ports 1738. Interface ports 1738 include, for example, serial ports, parallel ports, game ports, and universal serial buses (USB). Output devices 1740 use several of the same types of ports as input devices 1736. Thus, for example, a USB port may be used to provide input to computer 1712 and to output information from computer 1712 to output device 1740. Output adapter 1742 is provided to illustrate that there are some output devices 1740, such as monitors, speakers, and printers, among other output devices 1740, that require special adapters. Output adapters 1742 include, by way of example and not limitation, video and sound cards that provide a method of connection between output device(s) 1740 and the system bus 1718. It should be noted that other devices and / or systems of devices, such as remote computer(s) 1744, provide both input and output capabilities.

[0115] The computer 1712 may operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 1744. The remote computer 1744 may be a computer, a server, a router, a network PC, a workstation, a microprocessor-based device, a peer device, or other common network node, and may typically include many or all of the elements described relative to the computer 1712. For purposes of simplicity, only a memory storage device 1746 is shown with the remote computer 1744. The remote computer 1744 is logically connected to the computer 1712 through a network interface 1748 and is then physically connected via communication connection 1750. The network interface 1748 encompasses wired and / or wireless communication networks such as a local area network (LAN), a wide area network (WAN), a cellular network, and the like. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet, Token Ring, and the like. WAN technologies include, but are not limited to, point-to-point links, circuit-switched networks such as Integrated Services Digital Networks (ISDN) and its variations, packet-switched networks, and Digital Subscriber Lines (DSL). Communications connection(s) 1750 refers to the hardware / software utilized to connect network interface 1748 to system bus 1718. For clarity of illustration, communications connection(s) 1750 is shown internal to computer 1712, but could also be external to computer 1712. The hardware / software for connecting to network interface 1748 could also include, by way of example only, internal and external technologies such as ordinary telephone-grade modems, cable modems, modems including DSL modems, ISDN adapters, Ethernet cards, etc.

[0116] One or more embodiments may be a system, method, apparatus, and / or computer program product at any possible level of technical detail of integration. A computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to execute aspects of one or more embodiments. A computer-readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media may include portable computer diskettes, hard disks, RAM, ROM, erasable programmable read-only memory (EPROM or flash memory), SRAM, portable CD-ROMs, digital versatile disks (DVDs), memory sticks, floppy disks, machine-encoded devices such as punch cards or raised structures in grooves with instructions recorded thereon, and any suitable combination of the above. As used herein, a computer-readable storage medium should not itself be construed as a transitory signal such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse passing through a fiber optic cable), or an electrical signal transmitted over a wire.

[0117] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium within the respective computing / processing device. The computer-readable program instructions for carrying out operations of the disclosed subject matter may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk®, C++, or the like, or conventional procedural programming languages ​​such as the “C” programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider).In some embodiments, to carry out aspects of the disclosed subject matter, an electronic circuit including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuit.

[0118] Aspects of the disclosed subject matter are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to create a machine. The instructions, which execute on the processor of the computer or other programmable data processing apparatus, thereby create a method for implementing the function(s) / act(s) specified in the block(s) of the flowchart illustrations and / or block diagrams. These computer-readable program instructions can also be stored on a computer-readable storage medium that can instruct a computer, programmable data processing apparatus, and / or other device to function in a particular manner. A computer-readable storage medium having instructions stored thereon thereby comprises a product including instructions that implement aspects of the function(s) / act(s) specified in the block(s) of the flowchart illustrations and / or block diagrams. Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational acts to be performed on the computer, other programmable apparatus, or other device to create a computer-implemented process, whereby the instructions executing on the computer, other programmable apparatus, or other device implement the function / acts specified in a block or blocks of the flowcharts and / or block diagrams.

[0119] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the disclosed subject matter. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions, comprising one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions described in the blocks may occur out of the order depicted in the figures. For example, two blocks shown in succession may be executed substantially simultaneously, depending on the functionality involved, or the blocks may be executed in the reverse order in some cases. It will also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a special-purpose hardware-based system that performs the specified functions or operations or a combination of special-purpose hardware and computer instructions.

[0120] Although the subject matter has been described above in the general context of computer-executable instructions for a computer program product executing on a computer and / or multiple computers, those skilled in the art will recognize that the present disclosure can also be implemented in combination with other program modules. Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks and / or implement particular abstract data types. Furthermore, those skilled in the art will recognize that the computer-implemented methods disclosed herein can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputing devices, mainframe computers, computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronics, etc. The illustrated aspects can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, some, if not all, aspects of the present disclosure can be practiced on stand-alone computers. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0121] As used herein, terms such as “component,” “system,” “platform,” and “interface” may refer to and / or include computer-related entities or entities related to an operating machine having one or more specific functionalities. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. By way of example, both an application running on a server and the server may be a component. One or more components may reside within a process and / or thread of execution, and a component may be localized on one computer and / or distributed between two or more computers. In another example, each component may execute from various computer-readable media having various data structures stored thereon. Components may communicate via local and / or remote processes, such as according to signals comprising one or more data packets (e.g., data from one component interacting with another component in a network, such as a local system, a distributed system, and / or the Internet, with other systems via signals). As another example, a component may be a device having inherent functionality provided by mechanical parts operated by electrical or electronic circuitry operated by software or firmware applications executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware application. As yet another example, a component may be a device that provides inherent functionality without mechanical parts through electronic components, which may include a processor or other means for executing software or firmware that provides at least a portion of the functionality of the electronic component.In some aspects, the component may emulate an electronic component via a virtual machine, for example, in a cloud computing system.

[0122] Additionally, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise specified or clear from the context, "X utilizes A or B" is intended to mean any of the natural inclusive permutations. That is, if X utilizes A, X utilizes B, or X utilizes both A and B, then "X utilizes A or B" is satisfied under any of the aforementioned plural cases. Furthermore, the articles "a" and "an" as used in this specification and the accompanying drawings should generally be construed to mean "one or more" unless otherwise specified or clear from the context that the singular is intended. As used herein, the terms "example" and / or "exemplary" are utilized to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. Additionally, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or superior over other aspects or designs, and is not intended to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0123] The term "processor" as used herein may refer to virtually any computing processing unit or device, including, but not limited to, a single-core processor, a single processor with software multithreading execution capabilities, a multi-core processor, a multi-core processor with software multithreading execution capabilities, a multi-core processor with hardware multithreading technology, a parallel platform, and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Furthermore, a processor may utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space utilization or enhance user equipment performance. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as “store,” “storage,” “data store,” “data storage,” “database,” and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a “memory” or a “memory component” entity embodied in a component that includes memory. It should be appreciated that memory and / or memory components described herein may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. By way of example and not limitation, nonvolatile memory may include ROM, PROM, EPROM, EEPROM, flash memory, or nonvolatile RAM (e.g., FeRAM). Volatile memory may include RAM, which may act as external cache memory, for example.By way of example, and not limitation, RAM is available in many forms, such as SRAM, DRAM, SDRAM, DDR SDRAM, ESDRAM, SLDRAM, DRRAM, DRDRAM, and RDRAM. Additionally, the disclosed memory components of systems or computer-implemented methods herein are intended to include, but are not limited to, these and any other suitable types of memory.

[0124] The foregoing includes only exemplary systems and computer-implemented methods. Naturally, it is not possible for purposes of describing this disclosure to describe every conceivable combination of components or computer-implemented methods; however, those skilled in the art will recognize that many additional combinations and permutations of the present disclosure are possible. Furthermore, when terms such as "comprises," "having," and "comprises" are used in the detailed description, claims, appendices, and drawings, such terms are intended to be inclusive in the same manner as the term "comprises" is interpreted when used as a transitional phrase in the claims. The description of various embodiments has been presented for illustrative purposes and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been selected to best explain the principles of the embodiments, practical applications of, or technical improvements thereto, found in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. a capacitor component located on the first substrate component; and an inductor component located on a second substrate component, wherein the capacitor component is associated with the inductor component via a bump bond extending from the first substrate component to the second substrate component; a filter component including a qubit component; and a coupler component associated with the qubit component; and an input line providing an input signal to the filter component, wherein the filter component filters the input signal and generates a filtered signal based on the filtering of the input signal; a flux line component associated with the output of the filter component; the flux line component receives the filtered signal and is coupled to the qubit component through the coupler component through mutual inductance based on the filtered signal transmitted through the flux line component. system.

2. 2. The system of claim 1, wherein the filter component is a low-pass filter component having a defined cutoff frequency, the cutoff frequency indicating a range of frequencies below the cutoff frequency that are allowed to pass through the low-pass filter component.

3. The system of claim 1 or 2, wherein the inductor component is a spiral inductor component or a meander line inductor component.

4. 4. The system of claim 1, wherein the capacitor component is a planar capacitor component or a parallel plate capacitor component, a first terminal of the capacitor component is connected to the inductor component, and a second terminal of the capacitor component is connected to a ground component.

5. the inductor component is a first inductor component, the capacitor component is a first capacitor component, the bump bond is a first bump bond, and the filter components are arranged in the form of a ladder network, the ladder network comprising: a set of inductor components including at least the first inductor component and a second conductor component located on the second substrate component; and a set of capacitor components including the first capacitor component located on the first substrate component, a second capacitor component located on the second substrate component, and a third capacitor component located on the first substrate component, wherein the second conductor component is associated with the second capacitor component, and the second conductor component is associated with the third capacitor component via a second bump bond extending from the first substrate component to the second substrate component; The system of claim 1 , comprising:

6. 6. The system of claim 5, wherein the filter component is a low pass filter component having a cutoff frequency ranging from about 100 megahertz to about 10 gigahertz, the low pass filter component is terminated by an inductive load ranging from about 10 picohenries to about 500 picohenries, and one of the inductor components of the set of inductor components is the last component of the ladder network and is a series inductor to the inductive load, facilitating not having any capacitor components of the set of capacitor components in parallel with the inductive load.

7. The coupler component includes a superconducting quantum interference device loop; the flux line component receives the filtered signal and is coupled to the qubit component through the superconducting quantum interference device loop of the coupler component through mutual inductance based on the filtered signal transmitted through the flux line component. A system according to any one of claims 1 to 6.

8. 8. The system of claim 7, wherein the qubit component is a flux-tunable qubit component.

9. 9. The system of claim 7 or 8, wherein the filter component filters the input signal to reduce an amount of electrical noise in the electrical signal, and the filtered signal provided to the flux line component and associated with the qubit component has a lesser amount of electrical noise than the input signal.

10. 10. The system of claim 7, wherein the filter component is located between the input line and the flux line component, the filter component reducing an amount of first Purcell attenuation associated with the qubit component, and the filter component inhibiting second Purcell attenuation from capacitive coupling that can be generated through the input line being a dissipative line with a defined impedance.

11. 11. The system of claim 1, wherein the filter components include a set of inductor components and a set of capacitor components, the set of inductor components including the inductor component, and the set of capacitor components including the capacitor component, and the set of inductor components and the set of capacitor components are arranged to form a Gaussian filter structure or a Bessel-Thompson filter structure.

12. 12. The system of claim 1, wherein metallization is utilized to facilitate forming ground planes associated with the inductor component, the capacitor component, the bump bond, and the filter component, and the metallization is superconducting.

13. 13. The system of claim 1, wherein the inductor component is a first inductor component, the filter component includes a set of inductor components including the first inductor component and a second inductor component, metallization utilized to facilitate forming the second inductor component is distributed over the first substrate component and the second substrate component to reduce size or parasitic effects of the filter component, and a first winding of a first portion of the second inductor component is in the same direction as a second winding of a second portion of the second inductor component, thereby enhancing a magnetic field generated by a current applied to the filter component and not reducing the amount of inductance of the second inductor component.

14. forming a capacitor on a first substrate; forming an inductor on a second substrate, wherein the capacitor is associated with the inductor via a bump bond extending from the first substrate to the second substrate to facilitate forming a filter; forming qubit components on the first substrate; forming a coupler device associated with the qubit component; forming an input line providing an input signal to the filter, wherein the filter filters the input signal to generate a filtered signal based on the filtering of the input signal; and forming a flux line associated with an output of the filter, the flux line receiving the filtered signal and coupled to the qubit component through the coupler device through mutual inductance based on the filtered signal transmitted through the flux line; A method for providing

15. 15. The method of claim 14, wherein the filter is a low-pass filter having a defined cut-off frequency, the cut-off frequency indicating a range of frequencies below the cut-off frequency that are allowed to pass through the low-pass filter.

16. The coupler device includes a superconducting quantum interference device loop; the flux line receives the filtered signal and is coupled to the qubit component through the superconducting quantum interference device loop of the coupler device through mutual inductance based on the filtered signal transmitted through the flux line.

16. The method of claim 14 or 15.

17. 17. The method of claim 14, wherein the inductor is a spiral inductor or a meander line inductor, and the capacitor is a planar capacitor or a parallel plate capacitor, a first terminal of the capacitor is connected to the inductor, and a second terminal of the capacitor is connected to ground.

18. an inductor component formed on the first substrate component; and a capacitor component formed on the first substrate component and associated with the inductor component, wherein the inductor component is associated with the second substrate component via a bump bond extending from the first substrate component to the second substrate component, facilitating association of the inductor component with a flux line component formed on the second substrate component; a filter component including a qubit component; and a coupler component associated with the qubit component; and an input line providing an input signal to said filter component; the filter component filters the input signal and generates a filtered signal based on the filtering of the input signal; the flux line component is associated with an output of the filter component, the flux line component receives the filtered signal and is coupled to the qubit component via the coupler component through mutual inductance based on the filtered signal transmitted through the flux line component. system.

19. 20. The system of claim 18, wherein the filter component is a low-pass filter component having a defined cutoff frequency, the cutoff frequency indicating a range of frequencies below the cutoff frequency that are allowed to pass through the low-pass filter component; the inductor component is a spiral inductor component or a meandering line inductor component; and the capacitor component is a planar capacitor component or a parallel plate capacitor component, and a terminal of the capacitor component is connected to a ground component.

20. The coupler component includes a superconducting quantum interference device loop; the flux line component receives the filtered signal and is coupled to the qubit component through the superconducting quantum interference device loop of the coupler component through mutual inductance based on the filtered signal transmitted through the flux line component.

20. A system according to claim 18 or 19.

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