Fully randomized benchmarking method and system for quantum circuits

The fully randomized benchmarking method addresses the limitations of existing techniques by evaluating quantum gate fidelity across various gate types, distinguishing decoherence and measurement errors, enhancing the performance of quantum computing systems.

JP7813805B2Active Publication Date: 2026-02-13ALIBABA INNOVATION PRIVATE LIMITED
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Patent Information

Application Number
JP2023551718
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-03-22
Filing Date
2022-03-11
Publication Date
2026-02-13
Estimated Expiration
2042-03-11

AI Technical Summary

Technical Problem

Existing benchmarking techniques for quantum circuits are limited in their applicability and cannot accurately distinguish between infidelity caused by qubit decoherence and state preparation and measurement errors, which affects the fidelity of quantum gates.

Method used

A fully randomized benchmarking method that generates random unitary quantum gates and their corresponding restoration gates to create sequences equivalent to identity operators, allowing for the evaluation of quantum gate fidelity independent of gate type, including non-Clifford gates.

Benefits of technology

Enables accurate assessment of quantum gate fidelity by separating infidelity contributions from qubit decoherence and state preparation and measurement errors, improving the performance and reliability of quantum computing systems.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The method, apparatus and system includes generating representations of m1 random unitary quantum gates based on parameters of the quantum gates; determining a representation of a first quantum gate sequence equivalent to an identity operator; determining a representation of a second quantum gate sequence equivalent to the identity operator; sending hardware instructions to a quantum computing device corresponding to the representations of the first quantum gate sequence and the second quantum gate sequence; receiving measurements of a first number of qubits after applying the first quantum gate sequence to the qubits a first number of times by the quantum computing device and measurements of a second number of qubits after applying the second quantum gate sequence to the qubits a second number of times by the quantum computing device; and determining a fidelity value of the quantum gate based on the first probability and the second probability.
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Description

[Technical Field]

[0001]

[0001] The present disclosure relates generally to quantum computing, and more particularly to a method, system and non-transitory computer-readable medium for fully randomized benchmarking for quantum circuits. [Background technology]

[0002] Quantum computers offer the ability to perform certain tasks that are impossible to perform with classical computers. These tasks will bring about significant advances in many engineering fields, enabling worthy goals such as the discovery of new materials, the synthesis of better drugs, and the creation of more energy-dense batteries. The performance of quantum computers can be evaluated based on various indicators, a process that can be called "benchmarking." However, existing benchmarking techniques for quantum computers have limitations and cannot be universally applied to arbitrary quantum circuits. Summary of the Invention

[0003]

[0003] The present disclosure relates to a method, system, and non-transitory computer-readable medium for benchmarking quantum circuits. In one exemplary embodiment, a non-transitory computer-readable medium storing a set of instructions executable by at least one processor of an apparatus to cause the apparatus to perform a method is provided. The method includes generating representations of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer; inserting a quantum gate between each neighboring unitary quantum gate of the m1 random unitary quantum gates such that a first quantum gate sequence is equivalent to an identity operator; and generating a representation of the quantum gate and a first recovery quantum gate based on parameters of the quantum gates, where m1 is an integer; determining a representation of a first quantum gate sequence by appending a second restoration quantum gate to the m1 random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; determining a representation of a second quantum gate sequence by concatenating the m1 random unitary quantum gates and appending a second restoration quantum gate to the m1 random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence; from the quantum computing device, receiving a first number of measurements of the qubit after applying a first quantum gate sequence to the qubit a first number of times and a second number of measurements of the qubit after applying a second quantum gate sequence to the qubit a second number of times; and determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit will not change over the first number of measurements of the qubit and a second probability that the quantum state of the qubit will not change over the second number of measurements of the qubit.

[0004] In another aspect, an apparatus for video processing is provided, the apparatus comprising: a memory configured to store a set of instructions; a processor communicatively coupled to the memory and configured to execute the set of instructions to cause the apparatus to: generate a representation of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer; determine a representation of the first quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and a first restoration quantum gate to the m1 random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator; determine a representation of a second quantum gate sequence by concatenating the m1 random unitary quantum gates and appending a second restoration quantum gate to the m1 random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; transmitting, to the quantum computing device, hardware instructions corresponding to a representation of a first quantum gate sequence and hardware instructions corresponding to a representation of a second quantum gate sequence; receiving from the quantum computing device a first number of measurements of the qubits after applying the first quantum gate sequence to the qubits a first number of times by the quantum computing device and a second number of measurements of the qubits after applying the second quantum gate sequence to the qubits a second number of times by the quantum computing device; and determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubits will not change over the first number of measurements of the qubits and a second probability that the quantum state of the qubits will not change over the second number of measurements of the qubits.

[0005] In another exemplary embodiment, a method is provided that includes generating a representation of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer, determining a representation of the first quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m1 random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator and appending the quantum gate and a first restoration quantum gate to the m1 random unitary quantum gates, determining a representation of a second quantum gate sequence by concatenating the m1 random unitary quantum gates and appending a second restoration quantum gate to the m1 random unitary quantum gates such that the second quantum gate sequence is equivalent to the identity operator, and transmitting, to a quantum computing device, the representation of the first quantum gates. transmitting hardware instructions corresponding to the representation of the sequence and hardware instructions corresponding to the representation of the second quantum gate sequence; receiving from the quantum computing device a first number of measurements of the qubit after applying the first quantum gate sequence to the qubit a first number of times by the quantum computing device and a second number of measurements of the qubit after applying the second quantum gate sequence to the qubit a second number of times by the quantum computing device; and determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit will not change over the first number of measurements of the qubit and a second probability that the quantum state of the qubit will not change over the second number of measurements of the qubit.

[0006]

[0006] Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying drawings, in which the various features shown are not drawn to scale. [Brief explanation of the drawings]

[0007] [Figure 1]

[0007] FIG. 1 illustrates a qubit represented on a Bloch sphere, according to some embodiments of the present disclosure. [Figure 2]

[0008] FIG. 1 illustrates an exemplary quantum gate sequence, according to some embodiments of the present disclosure. [Figure 3]

[0009] FIG. 10 illustrates another exemplary quantum gate sequence, according to some embodiments of the present disclosure. [Figure 4]

[0010] FIG. 10 illustrates yet another exemplary quantum gate sequence, according to some embodiments of the present disclosure. [Figure 5]

[0011] FIG. 10 illustrates yet another exemplary reference quantum gate sequence, according to some embodiments of the present disclosure. [Figure 6]

[0012] FIG. 1 is a block diagram of an exemplary system for operating a quantum circuit, according to some embodiments of the present disclosure. [Figure 7]

[0013] FIG. 1 is a schematic diagram illustrating an example quantum controller for operating a quantum circuit, according to some embodiments of the present disclosure. [Figure 8]

[0014] 1 is a flowchart of an exemplary method for operating a quantum circuit according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008]

[0015] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which like reference numerals in different drawings represent the same or similar elements unless otherwise indicated. The implementations set forth in the following description of exemplary embodiments do not represent all implementations in accordance with the present invention. Rather, they are merely examples of apparatus and methods in accordance with aspects related to the present invention as recited in the appended claims. Certain aspects of the present disclosure are described in more detail below. In the event of a conflict with terms and / or definitions incorporated by reference, the terms and definitions provided herein shall control.

[0009]

[0016] As used herein, a "computer" refers to a machine capable of executing instructions, calculations, operations, or algorithms to perform a series of ordered procedures or actions aimed at solving a task. Computers are ubiquitous in modern society, both directly (e.g., smartphones and laptops) and indirectly (e.g., microcontrollers in automobiles or control systems in water purification plants). Computers must be implemented on some type of hardware (e.g., the physical structure of an object) that is subject to various limitations imposed by physics, which place upper limits on the computer's performance characteristics (e.g., the amount of memory available or the number of operations per second possible). Also, to solve a task, a computer must be provided with a set of instructions that enable it to accomplish the task.

[0010]

[0017] As used herein, a quantum computer refers to a computer capable of performing quantum computation. In this disclosure, quantum computing refers to computation using quantum phenomena (e.g., superposition or entanglement) in the hardware of a quantum computer. In contrast, in this disclosure, a conventional computer refers to a computer, such as an electronic computer, that cannot perform quantum computation. Quantum computers can perform certain tasks that are considered difficult to solve by conventional computers, providing the ability to bring unique advantages. For example, quantum computers can be used to simulate molecular dynamics (which are inherently governed by quantum physics), factor integers (which form the basis of much cryptography), search unstructured data, optimize quantum annealing and adiabatic processes, accelerate machine learning algorithms, or perform many computational tasks that are considered difficult for conventional computers. Such technological advantages can benefit many industries and research fields, such as the creation of new materials, the synthesis of new pharmaceuticals, or the development of high-energy-density batteries.

[0011]

[0018] Conventional computers operate on digital logic. As used herein, digital logic refers to a logic system that operates on units of information (called "bits"). A bit, as the smallest unit of information, can have one of two values, usually represented by "0" and "1." Digital logic can create, remove, or modify bits using digital logic gates. Digital logic gates can be constructed using transistors, where bits can be represented as voltage levels on wires connecting the transistors. Digital logic gates can take one or more bits as inputs and provide one or more bits as outputs. For example, a logical AND gate takes two bits as inputs and provides one bit as output. If the value of both inputs is "1," the output of the AND gate can be "1," and otherwise it can be "0." By connecting the inputs and outputs of various digital logic gates in special ways, conventional computers can implement arbitrarily complex algorithms to accomplish various computational tasks.

[0012]

[0019] At a surface level, quantum computers operate in a manner similar to classical computers. Quantum computers operate with quantum logic. As used herein, quantum logic refers to a logic system that operates on units of information called "quantum bits" or simply "qubits." A qubit is the smallest unit of information in a quantum computer and can have any linear combination of two values, typically denoted |0> and |1>. The value of a qubit can be represented by |ψ>. Unlike a digital bit, which can have a value of either "0" or "1," |ψ> can have a value of α|0>+β|1>, where α and β are determined by |α| 2 +|β| 2A qubit is a complex number (called an "amplitude") that is not limited by any constraint other than ∑ = 1. Qubits can be constructed in various forms and can be represented as quantum states in quantum computers. For example, qubits can be physically implemented using photons with polarization (e.g., in a laser) as their quantum state, electrons or ions with spin (e.g., trapped in an electromagnetic field) as their quantum state, Josephson junctions with charge, current flux, or phase (e.g., in superconducting quantum systems), quantum dots with dot spin (e.g., in semiconductor structures) as their quantum state, topological quantum systems, or any other system capable of providing two or more quantum states. Quantum logic can create, remove, or modify qubits using quantum logic gates (or simply "quantum gates").

[0013]

[0020] Mathematically, a quantum gate is a propagator that operates on a quantum state. Physically, a quantum gate can be implemented as a laser pulse, an electromagnetic wave (e.g., a microwave pulse), a hardware device capable of generating an electromagnetic field, or any means for altering, maintaining, or controlling the quantum state of qubits. A quantum gate can take one or more qubits as input and provide one or more qubits as output, and thus can be represented as a matrix. Unlike conventional logic gates (e.g., an AND gate), a quantum gate has the property that its inputs can be determined based on its output and knowledge of the transformation it applies; this is called "reversibility." Such a reversibility property requires that the number of outputs of a quantum gate equal or exceed the number of its inputs, ensuring that inputs to a known quantum gate can always be constructed given its output.

[0014]

[0021] The advantages of quantum computers arise from their ability to reduce the computational complexity for some tasks that are considered difficult (e.g., mathematically possible but physically infeasible) for classical computers. Typically, a computational task can be conceptualized as determining a specific property of some mathematical object instance (e.g., a graph, a number, or a string) that represents the computational task, and the mathematical object instance can typically be conceptualized as a sequence of bits (e.g., 1s and 0s). Typically, larger instances require more time or space to solve. The time or space required to solve a computational task depends on the size of the instance, which is typically taken to be the size of the instance's input in bits. For example, the input to an instance can have a length of n. In such a context, the computational complexity of a computational task can be defined as the resources required by the best algorithm to determine a specific property of an instance of a mathematical object.

[0015]

[0022] Typically, such computational complexity varies as a function of n. For example, an algorithm may have a computational complexity of 5n for an input of size n. 3 +12n 2 +2n+log n+113 steps are possible. However, typically, only the asymptotic complexity of an algorithm is evaluated using bigO notation. BigO notation focuses on the growth rate of computational complexity as n goes to infinity. Under it, only the highest growth factor of n is considered. For example, in bigO notation, the number of steps used by the above algorithm (i.e., 5n 3 +12n 2 +2n+log n+113) is O(n 3 ) algorithms are usually of asymptotic complexity O(n k ) (k is a finite number), it is considered realistic and generally has asymptotic complexity of O(k n ) (e.g., with more than polynomial growth) is considered impractical. nA computational task is considered hard if it has the best possible algorithm with an asymptotic complexity greater than or equal to .

[0016]

[0023] For various conventional computers, the computational complexity for solving the same computational task differs by a constant factor. In contrast, by taking advantage of certain aspects of quantum mechanics, quantum computers can solve certain computational tasks in polynomial steps that conventional computers can solve only in exponential steps. For these computational tasks, the computational complexity of a quantum computer can be polynomial with respect to the size of its input, whereas the computational complexity of a conventional computer can be exponential.

[0017]

[0024] Such a feature of quantum computers arises from the fact that qubits can be in a superposition of quantum states, which can represent a finite number of values. For example, a qubit |ψ> can be in a superposition of quantum states |0> and |1>, represented as α|0> + β|1>, where α and β are any complex numbers and |α| 2 +|β| 2 = 1, so that the value of |ψ> is not limited to either "0" or "1" like a digital bit. Furthermore, a group of qubits can expand the dimension of values ​​that can be represented by the qubit. For example, a two-state qubit system can include a first qubit |ψ1>=α|0>+β|1> and a second qubit |ψ2>=γ|0>+δ|1>. A qubit in such a two-state qubit system can represent a combination of two quantum states (e.g., |0> and |1>). When the first and second qubits are entangled, they form a four-state qubit system. Here, a qubit |ψ> in such a four-state qubit system can be expressed as |ψ>=αγ|00>+αδ|01>+βγ|10>+βδ|11> (where |αγ| 2 +|αδ| 2 +|βγ| 2 +|βδ| 2= 1). A qubit in such a four-state qubit system can represent a combination of four quantum states (e.g., |00>, |01>, |10>, and |11>, called "product states"). Typically, a system of n entangled two-state qubits (e.g., with binary bases such as |0> and |1>) can be expressed as 2 n can represent quantum states, which are called qubits

[0018]

number

[0019]

[0025] One way to visualize the value of a qubit is to represent it as a point on the surface of a Bloch sphere. By way of example, FIG. 1 illustrates a qubit represented in a Bloch sphere 100, according to some embodiments of the present disclosure. The Bloch sphere 100 can be conceptualized as existing in a three-dimensional (3D) space, with coordinate axes x, y, and z, respectively. It takes two values ​​(e.g., latitude and longitude, or angles φ and θ in FIG. 1) to represent a point on the surface of the Bloch sphere 100. In FIG. 1, the positive and negative poles of the z-axis correspond to |0> and |1>, respectively. For a qubit |ψ>=α|0>+β|1>, α and β correspond to |α| 2 +|β| 2Since |ψ> is a complex number constrained by =1, |ψ> can be expressed as the complex number a+b i. The values ​​of a and b can be mapped to azimuthal and equatorial angles φ and θ on the Bloch sphere 100, and can in turn be represented as points on the surface of the Bloch sphere 100 in FIG.

[0020]

[0026] Quantum algorithms can typically be expressed in terms of underlying quantum circuits. A quantum circuit contains one or more quantum gates. Quantum gates can transform qubits in a finite number of ways (e.g., by changing the values ​​of α and β in the qubit α|0>+β|1>), so there are an infinite number of types of quantum gates. For example, there are an infinite number of ways to perform unitary transformations, so there are an infinite number of quantum gates for performing unitary transformations on qubits. One type of quantum gate, known as a "Pauli operator" or "Pauli gate," can be used to perform a unitary transformation on a qubit. There are four Pauli operators, called I, X, Y, and Z, respectively, where I is the identity operator and X, Y, and Z represent 180° rotations around the x-, y-, and z-axes in 3D space, respectively. For example, in a system of two-state qubits, a Pauli gate is a function of the matrix

[0021]

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[0022]

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[0023]

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[0024]

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[0025]

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[0026]

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[0027]

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[0028]

[0027] A Pauli gate can be understood as a rotation about the three principal axes of the Bloch sphere. By way of example, and referring to Figure 1, the Pauli X-gate, Pauli Y-gate, and Pauli Z-gate can be understood as a 180° rotation about the x-axis, y-axis, and z-axis, respectively, of the Bloch sphere 100 to a point representing |ψ>.

[0029] Some quantum gates can be used to implement other quantum gates. In some cases, such quantum gates can form a group, where a quantum gate in the group can be used to implement any other quantum gate in the group to any precision (provided a sufficient number of quantum gates are provided). One example of such a set of quantum gates is the Clifford group, which contains a set of Pauli gates. A quantum gate in a Clifford group can be called a "Clifford gate." When a Pauli gate in a Clifford group is multiplied on the left by a Clifford gate (called "left multiplication") and on the right by the Hermitian adjoint of the Clifford gate (called "right multiplication"), the resulting quantum gate is still a Pauli gate that is still in the Clifford group. A Clifford group (C) operating on n qubits n (represented as) is the Clifford Gate

[0030]

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[0031] In some embodiments, the Clifford group operating on one qubit (eg, C1) is a Hadamard gate.

[0032]

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[0033]

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[0034]

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[0035]

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[0036]

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[0037]

[0030] One challenge for quantum computers is the difficulty of creating and maintaining qubits in an operable state (e.g., entangled with other qubits). The accuracy of a quantum circuit relies on the accuracy of the qubits and the SPAM errors of the quantum circuit. However, qubits are essentially analog devices and are susceptible to noise from either the surrounding environment or the operation of quantum gates. When a qubit becomes decoherent due to noise disturbances, the computation of the qubit is lost and cannot be recovered. Existing quantum computing systems can only prepare and entangle a limited number of qubits and perform a limited number of operations on these qubits before the entanglement is destroyed by noise.

[0038]

[0031] Due to the sensitivity characteristics of qubits, the total fidelity of a quantum gate is an important performance indicator of a quantum circuit. As used herein, the total fidelity or total infidelity of a quantum gate refers to the ratio of correct results or incorrect results to the total number of results of the quantum gate, respectively. The total fidelity of a quantum gate can have two contributing sources: qubit decoherence caused by the application of the quantum gate, and the operation of the quantum gate (e.g., preparation, calibration, or measurement) (referred to as "state preparation and measurement error" or "SPAM error"). For example, qubit decoherence can be an unexpected and undesired result of applying a quantum gate to a qubit, whereas SPAM errors can contribute to the total infidelity without causing qubit decoherence. Although these two contributing sources may have overlapping causes, the development of quantum computers has focused more on the contribution from qubit decoherence because qubit decoherence reflects the hardware performance of a quantum circuit.

[0039] As used herein, benchmarking refers to a procedure or process for evaluating the fidelity of a quantum computing system including one or more quantum gates. Based on the benchmark results, quantum error correction can be applied to the quantum computing system to increase the fidelity. For example, for a quantum circuit built on a superconducting qubit (e.g., a trasmonic qubit using Josephson junctions), the quantum properties of the quantum circuit result from the properties of Cooper pairs of electrons (e.g., bound electron pairs in a superconducting metal). Cooper pairs are Bose pairs whose quantum states follow a Bose-Einstein distribution to represent macroscopic electrical properties. On a macroscopic scale, the quantum state of a superconducting qubit device can be represented by the electrical properties (e.g., charge, phase, or current flux) of the superconducting qubit device and can be altered or controlled by an electromagnetic signal (e.g., a microwave pulse generated by an oscillator circuit) applied to the superconducting qubit device. An electromagnetic signal with a specific frequency can cause the superconducting qubit to jump between different energy levels (e.g., between the ground state and the excited state). Quantum error correction can be performed on quantum circuits by tuning the electromagnetic signal (e.g., changing the frequency, amplitude, or waveform of the electromagnetic signal) and tuning the parameters of the superconducting qubit (e.g., the capacitance of a trasmonic qubit).

[0040] One way to check the fidelity of a quantum circuit is to apply unitary operations to qubits implemented on hardware components of the quantum circuit and measure the qubits after applying the unitary operations to determine whether the qubits are still in the same quantum state. If the quantum state of the qubits changes, this indicates that a non-fidelity error has occurred in the quantum circuit due to decoherence of the qubits or due to SPAM errors in quantum gates operating on the qubits. In some embodiments, the above unitary operations can be implemented by Pauli gates or Clifford gates, as these are reversible. For example, unitary gates can be implemented by Pauli gates (e.g., X) and Hermitian adjoints of serially connected Pauli gates (e.g., X † ) can be implemented as

[0041] Existing benchmarking techniques for quantum circuits are either applicable only to certain types of quantum gates or are unable to identify infidelity contributed from qubit decoherence (e.g., not caused by SPAM errors). For example, Clifford gates can be benchmarked using a Clifford group-based randomized benchmarking technique. The randomized benchmarking technique selects m (m is an integer) Clifford gates U1, U2, ..., U m randomly select m Clifford gates and concatenate m Clifford gates to obtain the gate U=U1·U2·...·U when using the Clifford group. m and forms an inverting gate

[0042]

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[0043]

[0035] As another example, quantum process tomography (QPT) techniques can be used to benchmark non-Clifford quantum gates. For a particular quantum computing system, its qubits can form a Hilbert space. The QPT technique can prepare a set of input states across the Hilbert space and apply a unitary gate to each of the input states. Based on the output of the unitary gate, an output density matrix corresponding to each input state can be reconstructed. Next, based on the input states and the output density matrix, a process matrix representing the mapping between the input states and the output can be determined (e.g., by maximum likelihood estimation). The difference between the process matrix and the matrix representing the unitary gate can be used to represent the fidelity of the non-Clifford quantum gate. However, the QPT technique cannot distinguish between infidelity contributed by qubit decoherence and infidelity contributed by SPAM errors of the non-Clifford quantum gate.

[0044]

[0036] In yet another example, the cross-entropy benchmarking (XEB) technique can be used to benchmark fermion simulation ("fSim") quantum gates. The XEB technique randomly generates a series of quantum gates including fSim quantum gates and a specific type of quantum gate operating on a single qubit (called a "single-qubit gate"), and the fSim quantum gates and the single-qubit gates can be interleaved cycle by cycle. By comparison with simulation, the cross-entropy of the series of quantum gates can be calculated, and the fidelity can be determined based on this. However, the XEB technique is only applicable to fSim-type quantum gates and can only determine the average fidelity of all fSim quantum gates in the generated series of quantum gates. That is, the XEB technique cannot determine the fidelity of a single fSim quantum gate.

[0045]

[0037] The present disclosure provides a technical solution for benchmarking quantum circuits using a technique called "fully randomized benchmarking." The fully randomized benchmarking technique can be used to benchmark any type of quantum gate (e.g., including, but not limited to, Clifford gates) and identify quantum gate infidelity contributed by qubit decoherence, separate from contributions from the operation of the quantum gate (e.g., preparation, calibration, or measurement). Based on the results of the fully randomized benchmarking, the hardware corresponding to the quantum circuit can be corrected (e.g., by adjusting physical parameters) to achieve better performance. The provided methods, apparatus, and systems are applicable to any type of quantum computing system for benchmarking, thus improving generality and advantages in compilation.

[0046] Aspects of the present disclosure may relate to fully randomized benchmarking of quantum circuits, including systems, devices, methods, and non-transitory computer-readable media. For ease of explanation, methods are described below with the understanding that aspects of the methods apply equally to systems, devices, and non-transitory computer-readable media. For example, some aspects of such methods may be implemented by program code or computer instructions stored in a system, device, or non-transitory computer-readable medium. In the broadest sense, the methods are not limited to any particular physical or electronic device and may be achieved using many different devices.

[0047] According to some embodiments of the present invention, a method for operating a quantum circuit (e.g., for benchmarking, controlling qubits for computation, controlling qubits for compilation, or performing any manipulation of qubits) can include having a computer (e.g., a conventional computer) generate representations (e.g., matrices or tensors) of m1 random unitary quantum gates (m1 is an integer) based on parameters of the quantum gates. The unitary quantum gates can perform unitary transformations on qubits. Qubits can be physically implemented using photons (e.g., in a laser) with polarization as their quantum state, electrons or ions (e.g., trapped in an electromagnetic field) with spin as their quantum state, Josephson junctions (e.g., in a superconducting quantum system) with charge, current flux, or phase as their quantum state, quantum dots (e.g., in a semiconductor structure) with dot spin as their quantum state, topological quantum systems, or any other system capable of providing two or more quantum states. A quantum gate may be implemented as a laser pulse, an electromagnetic wave (e.g., a microwave pulse), a hardware device capable of generating an electromagnetic field, or any means for altering, maintaining, or controlling the quantum state of a qubit. In some embodiments, the qubit may be implemented as a superconducting qubit, and the quantum gate may be implemented as an electromagnetic signal (e.g., a microwave pulse signal generated by an external oscillator). In such cases, the parameters of the quantum gate may include at least one of the length, amplitude, or shape of the electromagnetic signal.

[0048] In some embodiments, to generate representations of m1 random unitary quantum gates, the method can include having a computer generate representations of m1 random unitary quantum gates according to a Haar measure. In this disclosure, a Haar measure refers to a uniform probability distribution across all quantum states or across all unitary operators. For example, the computer can randomly sample a unitary matrix m1 times from a group of unitary matrices that obey the Haar measure to generate the m1 random unitary quantum gates. In some embodiments, to generate representations of m1 random unitary quantum gates, the method can include having a computer generate representations of m1 random unitary quantum gates by pseudo-randomly sampling a space of unitary operators according to a uniform probability distribution. Note that the generated m1 random unitary quantum gates are not limited to Clifford gates or any other types of quantum gates.

[0049] In some embodiments of the present disclosure, a method for operating a quantum circuit may also include having a computer determine a representation (e.g., a matrix or tensor) of the first quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of m1 random unitary quantum gates, and appending (e.g., concatenating) the quantum gate and the first restoration quantum gate to (e.g., at the end of) the m1 random unitary quantum gates, such that the first quantum gate sequence is equivalent to an identity operator. A quantum gate sequence in this disclosure refers to a set of quantum gates arranged in consecutive order. The first quantum gate sequence includes m1 random unitary quantum gates and m1 inserted quantum gates arranged after each of the m1 random unitary quantum gates to form an alternating or interleaved scheme, where the first quantum gate sequence includes a total of 2m1+1 quantum gates (including the appended first restoration quantum gate).

[0050]

[0042] As used herein, a restoration quantum gate corresponding to a quantum gate can perform a transformation on a qubit to reverse the transformation performed on the qubit by the quantum gate. The net effect of applying a quantum gate followed by that restoration quantum gate to a qubit is equivalent to applying an identity operator (e.g., the identity Pauli gate I) to the qubit. Unlike conventional logic gates, quantum gates always have a restoration quantum gate due to their reversible property. For example, if a quantum gate can change a qubit from 0.6|0>+0.8|1> to 0.8|0>+0.6|1>, then the restoration quantum gate of the quantum gate can change the qubit from 0.8|0>+0.6|1> back to 0.6|0>+0.8|1>. In some embodiments, the first (2m1-1) quantum gates in the first quantum gate sequence can be viewed as combined quantum gates (e.g., as a product matrix of (2m1-1) matrices), and the restoration quantum gate can be the restoration quantum gate corresponding to the combined quantum gate.

[0051] By way of example, FIG. 2 illustrates an exemplary quantum gate sequence 200 according to some embodiments of the present disclosure. Quantum gate sequence 200 may be the first quantum gate sequence as described above. As shown in FIG. 2, quantum gate sequence 200 is generated based on parameters of a quantum gate G by generating m random unitary quantum gates U1, U2, ..., U m1 The quantum gate sequence 200 also includes a unitary quantum gate U i and U i+1 (where i=1, 2, ..., m1), a quantum gate G is inserted between the m1 random unitary quantum gates, and a quantum gate G and a first restoration quantum gate R1 are added to the m1 random unitary quantum gates (for example, U m1 R1 is generated by combining quantum gates U1 G U2 ... G U m1. G. Effectively, the quantum gate sequence 200 is equivalent to the identity operator, i.e., U1·G·U2·...·G·U m1 2, the quantum gate sequence 200 is a sequence of qubits Q, Q, and R, where R can be the first restoration quantum gate described above. i (e.g., |0>) and the output qubit Q O The quantum gates in quantum gate sequence 200 output an input qubit Q i , and the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no infidelity in the process, after applying all the quantum gates in quantum gate sequence 200, Q i The quantum state of O can be the same as

[0052] According to some embodiments of the present disclosure, a method for operating a quantum circuit may also include having a computer determine a representation (e.g., a matrix or tensor) of the second quantum gate sequence by concatenating m random unitary quantum gates and appending a second restoration quantum gate to the m random unitary quantum gates (e.g., by concatenating it at an end) such that the second quantum gate sequence is equivalent to an identity operator. The second restoration quantum gate may perform a transformation on the qubit that inverts the transformation performed by the second quantum gate sequence on the qubit. The net effect of applying the second quantum gate sequence, followed by the second restoration quantum gate, to the qubit is equivalent to applying an identity operator (e.g., the identity Pauli gate I) to the qubit.

[0053]

[0045] By way of example, Figure 3 illustrates an exemplary quantum gate sequence 300 according to some embodiments of the present disclosure. The quantum gate sequence 300 may be the second quantum gate sequence as described above. As shown in Figure 3, the quantum gate sequence 300 includes n random unitary quantum gates U1', U2', ..., U n1 ', where n1 is an integer. For example, n1 may be the same integer as m1 or a different integer. In some embodiments, U i '(i=1,2,...n1) are the unitary quantum gates U1,U2,...,U m1 The quantum gate sequence 300 also concatenates n random unitary quantum gates and appends a second restoration quantum gate R1′ to the n random unitary quantum gates (e.g., U n1 R1' is generated by combining quantum gates U1'·U2'·...·U n1 '. R1' can be the first restoration quantum gate as described above. Effectively, the quantum gate sequence 300 is equivalent to the identity operator, i.e., U1'·U2'·...·U n1 '·R1'=I. In FIG. 3, quantum gate sequence 300 is i (e.g., |0>) and outputs the qubit Q' O The quantum gates in quantum gate sequence 300 output an input qubit Q i , and the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no infidelity in the process, after applying all the quantum gates in quantum gate sequence 300, Q i The quantum state of O can be the same as

[0054] According to some embodiments of the present disclosure, a method for operating a quantum circuit may further include causing a computer to transmit, to a quantum computing device, hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence. In some embodiments, the computer may transmit the hardware instructions (e.g., represented as electronic signals encoded to carry information) to the quantum computing device via a wired or wireless connection. In some embodiments, the quantum computing device may be a physical device configured to store qubits, apply quantum gates to operate on the qubits' quantum states, and measure the qubits after applying the quantum gates, according to the provided hardware instructions. In some embodiments, the computer may encode or compile the representations (e.g., matrices or tensors) into hardware instructions.

[0055] For example, the quantum computing device may be a superconducting quantum computing device that stores one or more superconducting qubits (e.g., trasmon qubits) and is coupled to an external electromagnetic signal oscillator to receive a microwave pulse signal to change the quantum state of the superconducting qubits. By way of example, with reference to FIG. 1 , the superconducting qubit in such a quantum computing device may be represented as a qubit |ψ〉 represented in a Bloch sphere 100. When a computer (e.g., a conventional computer) sends a hardware instruction corresponding to a Pauli X-gate to the quantum computing device, the quantum computing device may cause the electromagnetic signal oscillator to generate a microwave pulse signal according to the hardware instruction, and the microwave pulse signal may cause the qubit |ψ〉 to flip 180° around the x-axis of the Bloch sphere 100.

[0056] In some embodiments, the quantum computing device can be independent of the computer (e.g., a conventional computer) that sends the hardware instructions. In some embodiments, the quantum computing device can be an integral part of the computer (e.g., a computer system that integrates a conventional computing device and a quantum computing device).

[0057] According to some embodiments of the present disclosure, a method for operating a quantum circuit can further include having a computer receive, from a quantum computing device, a first number of measurements of a qubit (e.g., a superconducting qubit) after applying a first quantum gate sequence to the qubit a first number of times by the quantum computing device, and a second number of measurements of the qubit after applying a second quantum gate sequence to the qubit a second number of times by the quantum computing device. For example, the first number and the second number can be the same or different numbers. In some embodiments, the computer can receive the first number of measurements and the second number of measurements (e.g., represented as electronic signals both encoded to carry information) from the quantum computing device via a wired or wireless connection.

[0058]

[0050] By way of example, and with reference to Figure 2, a quantum computing device may have an input qubit Q i Each quantum gate of the first quantum gate sequence (e.g., quantum gate sequence 200) may be applied N times (N is an integer) according to the hardware instructions for the first quantum gate sequence. Each application of the first quantum gate sequence generates an output qubit (e.g., U1, G, U2, G, ..., G, U m1 , G) become the input qubits of the subsequent quantum gate. After applying the first quantum gate sequence, the quantum computing device outputs the output qubit Q O Measure the measured value (e.g., Q OAfter the measurement, the quantum computing device can obtain the input qubit Q i and apply quantum gate sequence 200 to it, producing an output qubit Q O The quantum computing device can repeat such a process N times, eventually obtaining a new measurement, Q O If no non-fidelity occurs in an iteration, the Q O The measurement of the input qubit Q i If an error occurs in an iteration, the Q of that iteration O The measurement of the input qubit Q i It should have a quantum state different from that of

[0059]

[0051] By way of example, and with reference to Figure 3, a quantum computing device may have an input qubit Q i Each quantum gate of the second quantum gate sequence (e.g., quantum gate sequence 300) may be applied M times (M may be an integer equal to or different from N) according to the hardware instructions for m1 ) becomes the input qubit for the subsequent quantum gate. After applying the second quantum gate sequence, the quantum computing device outputs the output qubit Q' O Measure the measured value (e.g., Q' O After the measurement, the quantum computing device can obtain the input qubit Q i and apply quantum gate sequence 300 to it to produce output qubit Q' O The quantum computing device can then repeat such a process N times, eventually obtaining a new measurement Q' O If no infidelity occurs in an iteration, then the Q' O The measurement of the input qubit Q iIf an error occurs in an iteration, the Q' of that iteration O The measurement of the input qubit Q i It should have a quantum state different from that of

[0060] According to some embodiments of the present disclosure, the method for operating a quantum circuit further includes causing the computer to determine a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit and a second probability that the quantum state of the qubit remains unchanged over the first number of measurements of the qubit. The fidelity value in the present disclosure may include a value representing the fidelity of the quantum gate. For example, the fidelity value may be a percentage value (e.g., the probability itself). In some embodiments, the computer may determine the fidelity value of the quantum gate as a ratio of the first probability to the second probability.

[0061]

[0053] As an example, a computer may receive 100 first measurements of a qubit, 96 of which indicate that the quantum state of the qubit has changed by passing a first quantum gate sequence (e.g., quantum gate sequence 200 in Figure 2) to the qubit (e.g., Q i ) 100 times, the first probability can be determined to be 96%. If the computer receives 200 second measurements of the qubit, and 196 of them indicate that the quantum state of the qubit has not changed after applying the second quantum gate sequence (e.g., quantum gate sequence 300 in FIG. 2) to the qubit (e.g., Q in FIG. 3), the first probability can be determined to be 96%. i ) 200 times, the second probability can be determined to be 98%. Based on the first probability of 96% and the second probability of 98%, the fidelity value of the quantum gate (e.g., G in FIG. 2) can be 97.96% = 96% / 98%.

[0062] According to some embodiments of the present disclosure, after determining the fidelity value, the method for operating a quantum circuit may further include having the computer update parameters of the quantum gate based on the fidelity value of the quantum gate. In some embodiments, based on determining that the qubit is a superconducting qubit, that the quantum gate is an electromagnetic signal (e.g., a microwave pulse signal), and that the parameter of the quantum gate is at least one of the length, amplitude, or shape of the electromagnetic signal, the computer may update the parameters by changing at least one of the length, amplitude, or shape of the electromagnetic signal. In some embodiments, the computer may update the parameters to optimize the quantum gate such that the fidelity value can be increased when the quantum gate is actually applied with the new parameters.

[0063] According to some embodiments of the present disclosure, a method for operating a quantum circuit may further include an operation for determining a fidelity value using different quantum gate sequences having generated random unitary quantum gates of different lengths. In some embodiments, the method may cause a computer to generate representations (e.g., matrices or tensors) of m random unitary quantum gates (m is an integer different from m) based on parameters of the quantum gates. The method may further cause the computer to determine a representation (e.g., a matrix or tensor) of a third quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m random unitary quantum gates, and appending a quantum gate and a third restoration quantum gate to the m random unitary quantum gates, such that the third quantum gate sequence is equivalent to an identity operator.

[0064] In some embodiments, to generate representations of m random unitary quantum gates, the method can include having a computer generate representations of m random unitary quantum gates according to a Haar measure. For example, the computer can randomly sample a unitary matrix m times from a group of unitary matrices that follow the Haar measure to generate the m random unitary quantum gates. In some embodiments, to generate representations of m random unitary quantum gates, the method can include having a computer generate representations of m random unitary quantum gates by pseudo-randomly sampling a space of unitary operators according to a uniform probability distribution. It should be noted that the generated m random unitary quantum gates are not limited to Clifford gates or any other types of quantum gates.

[0065] By way of example, FIG. 4 illustrates an exemplary quantum gate sequence 400 according to some embodiments of the present disclosure. Quantum gate sequence 400 may be the third quantum gate sequence as described above. As shown in FIG. 4, quantum gate sequence 400 is generated based on parameters of a quantum gate G, and includes m random unitary quantum gates V, V, ..., V. m2 The quantum gate sequence 400 also includes a unitary quantum gate V i and V i+1 (where i = 1, 2, ..., m2), a quantum gate G is inserted between the m2 random unitary quantum gates, and a quantum gate G and a third restoration quantum gate R2 are added to the m2 random unitary quantum gates (for example, V m2 R2 is generated by combining quantum gates V1 G V2 ... G V m2 ⋅G. Effectively, the quantum gate sequence 400 is equivalent to the identity operator, i.e., V1·G·V2·...·G·V m2 4, quantum gate sequence 400 is performed on input qubit Q iand applied to the output qubit S O The quantum gates in quantum gate sequence 400 output an input qubit Q i , and the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no infidelity in the process, after applying all the quantum gates in quantum gate sequence 400, Q i The quantum state of O can be the same as

[0066]

[0058] In some embodiments, the method further includes causing the computer to determine a representation (e.g., a matrix or tensor) of the fourth quantum gate sequence by concatenating m2 random unitary quantum gates and appending a fourth restoration quantum gate to the m2 random unitary quantum gates such that the fourth quantum gate sequence is equivalent to the identity operator.

[0067]

[0059] By way of example, Figure 5 illustrates an exemplary quantum gate sequence 500 according to some embodiments of the present disclosure. The quantum gate sequence 500 may be the fourth quantum gate sequence as described above. As shown in Figure 5, the quantum gate sequence 500 includes n random unitary quantum gates V1', V2', ..., V n2 ', where n2 is an integer. In some embodiments, n2 may be the same integer as m2 or a different integer. In some embodiments, V i '(i=1,2,...n2) are the unitary quantum gates V1, V, ..., V shown and described in relation to Figure 4. m2 , V , and V . The quantum gate sequence 500 may be the same as or different from V . n2 By concatenating n′ and adding a fourth restoration quantum gate R′ to n random unitary quantum gates (e.g., V n2 R2' is generated by combining quantum gates V1'·V1'·...·V n2Effectively, the quantum gate sequence 500 is equivalent to the identity operator, i.e., V1'·V2'·...·V n2 '·R2=I. In FIG. 5, quantum gate sequence 500 is i and applied to the output qubit S' O The quantum gates in quantum gate sequence 500 output an input qubit Q i , and the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no infidelity in the process, after applying all the quantum gates in quantum gate sequence 500, Q i The quantum state of is S' O can be the same as

[0068] In some embodiments, the method further includes having the computer send, to the quantum computing device, hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence. Thereafter, the method further includes having the computer receive, from the quantum computing device, a third number of measurements of the qubits after the quantum computing device has applied the third quantum gate sequence to the qubits a third number of times, and a fourth number of measurements of the qubits after the quantum computing device has applied the fourth quantum gate sequence to the qubits a fourth number of times. For example, the first number and the third number may be the same or different numbers. In another example, the third number and the fourth number may be the same or different numbers. In some embodiments, the computer may receive the third number of measurements (e.g., represented as an electronic signal encoded to convey information) from the quantum computing device via a wired or wireless connection. In some embodiments, the quantum computing device can determine a third number measurement and a fourth number measurement in operations similar to determining the first number measurement and the second number measurement, respectively, which operations have already been described and will not be repeated hereafter.

[0069] After receiving the third number of measurements and the fourth number of measurements of the qubit, the method may further include having the computer determine a third probability that the quantum state of the qubit remains unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit remains unchanged over the fourth number of measurements of the qubit. In some embodiments, the computer may determine the third probability and the fourth probability by operations similar to determining the first probability and the second probability, respectively, which operations have been described above and will not be repeated below.

[0070] After determining the third probability and the fourth probability, the method may further include having the computer determine an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability. In some embodiments, to determine the average fidelity value, the computer may determine a first average probability as the average of the first probability and the third probability and a second average probability as the average of the second probability and the fourth probability, and determine the average fidelity value as a ratio of the first average probability to the second average probability.

[0071]

[0063] As an example, a computer may receive 100 first measurements of a qubit, 96 of which indicate that the quantum state of the qubit has changed by passing a first quantum gate sequence (e.g., quantum gate sequence 200 in Figure 2) to the qubit (e.g., Q i ) 100 times, the first probability can be determined to be 96%. If the computer receives 200 second measurements of the qubit, and 196 of them indicate that the quantum state of the qubit has not changed after applying the second quantum gate sequence (e.g., quantum gate sequence 300 in FIG. 2) to the qubit (e.g., Q in FIG. 3), the first probability can be determined to be 96%. i ) 200 times, the second probability can be determined to be 98%. If the computer receives 300 third measurements of the qubit, and 285 of them indicate that the quantum state of the qubit has not changed after applying the third quantum gate sequence (e.g., quantum gate sequence 400 in FIG. 4) to the qubit (e.g., Q in FIG. 4), the second probability can be determined to be 98%. i ) 300 times, the third probability can be determined to be 95%. If the computer receives 400 fourth measurements of the qubit, and 388 of them indicate that the quantum state of the qubit has not changed after applying a fourth quantum gate sequence (e.g., quantum gate sequence 500 in FIG. 5) to the qubit (e.g., Q in FIG. 5), the third probability can be determined to be 95%. i) 388 times indicates no change, the fourth probability may be determined to be 97%. Based on the first probability 96%, the second probability 98%, the third probability 95%, and the fourth probability 97%, the computer may determine the first average probability to be 95.5% = (96% + 95%) / 2 and the second average probability to be 97.5% = (98% + 97%) / 2. The computer may then determine the fidelity value of the quantum gate (e.g., G in FIGS. 2 and 4) to be 97.95% = 95.5% / 97.5%.

[0072] In some embodiments, the computer can determine an average fidelity value of the quantum gate using exponential decay regression. The computer can determine the first fidelity value by performing a first exponential decay regression using m1 and m2 as independent variables and the first probability and the third probability as response variables. The computer can then determine a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and the second probability and the fourth probability as response variables. The computer can further determine the average fidelity value as a ratio of the first fidelity value to the second fidelity value.

[0073]

[0065] As an example, the computer can perform a first exponential decay regression by fitting equation (1). p(m)=Au m +B formula (1)

[0074] In equation (1), m represents the number of random quantum gates in the quantum gate sequence (e.g., m1+1 for the first quantum gate sequence, m2+1 for the third quantum gate sequence), and p(m) represents the quantum state of a qubit (e.g., Q i ) does not change (first probability or third probability). The quantity u represents the fidelity value of the quantum gate sequence as a whole. Parameters A and B can capture information about SPAM errors. After fitting equation (1) with multiple values ​​of m and p(m), the computer can determine the value of the quantity u.

[0075]

[0067] As an example, the computer can perform a first exponential decay regression by fitting equation (2). p'(m)=A'v m +B' formula (2)

[0076] In equation (2), m has the same meaning as m in equation (1). p'(m) is the quantum state of a qubit (e.g., Q in FIG. 3 or FIG. 5) under multiple measurements (e.g., the second number of measurements or the fourth number of measurements) by a quantum gate sequence (e.g., quantum gate sequence 300 in FIG. 3 or quantum gate sequence 500 in FIG. 5) having m (e.g., m1+1 or m2+1) random quantum gates. i ) does not change (the second probability or the fourth probability). The quantity v represents the fidelity value of the quantum gate sequence as a whole. The parameters A' and B' can capture information about SPAM errors. After fitting equation (2) with multiple values ​​of M and p'(m), the computer can determine the value of the quantity v. After determining the quantities u and v, the computer calculates the average fidelity value as

number

[0077]

[0069] In some embodiments, after determining the average fidelity value of the quantum gate, the method for operating a quantum circuit may further cause the computer to update the parameters of the quantum gate based on the average fidelity value of the quantum gate.

[0078]

[0070] According to some embodiments of the present disclosure, Figure 6 is a block diagram of an exemplary system 600 for operating a quantum circuit, according to embodiments of the present disclosure. In some embodiments, system 600 may include a computer (e.g., a conventional computer) configured to perform the operations for operating a quantum circuit described in connection with Figures 1-5. As shown in Figure 6, system 600 includes a processor 602 that may be operatively connected to a memory 604, an input / output (I / O) module 606, and a network interface controller (NIC) 610.

[0079] When processor 602 executes the instructions described herein, system 600 can be a dedicated machine for benchmarking quantum circuits. Processor 602 can be any type of circuit capable of manipulating or processing information. For example, processor 602 can include any combination of any number of central processing units (i.e., "CPUs"), graphics processing units (i.e., "GPUs"), neural processing units ("NPUs"), microcontroller units ("MCUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general-purpose array logic (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), systems-on-chips (SoCs), application-specific integrated circuits (ASICs), and the like. In some embodiments, processor 602 can also be a set of processors (not shown in FIG. 6 ) grouped as a single logical component.

[0080] The memory 604 may include a single memory or multiple memories that can be configured to store data 606 (e.g., a set of instructions, computer code, intermediate data, or data for output). The memory 604 may include a high-speed random access storage device or a non-volatile storage device. In some embodiments, the memory 604 may include any combination of any number of random access memories (RAMs), read-only memories (ROMs), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, etc. The memory 604 may also be a group of memories (not shown in FIG. 6) grouped as a single logical entity. The processor 602 may access program instructions and data 606 and execute the program instructions to perform operations or manipulations on the data 606. As shown in FIG. 6, the memory 604 may store an operating system 612 and a benchmark executor 614. For example, the benchmark executor 614 may include instructions for implementing the methods described in connection with FIGS. 1-5 for benchmarking quantum circuits.

[0081] For ease of explanation and to avoid ambiguity, this disclosure will collectively refer to the processor 602 and other data processing circuitry as the "data processing circuitry." The data processing circuitry can be implemented entirely as hardware or as a combination of software, hardware, or firmware. In addition, the data processing circuitry can be a single, independent module or can be fully or partially combined within any other component of the system 600.

[0082] The input / output module (I / O) 608 can store data and retrieve data from a database 616. For example, the database 616 can include data structures describing quantum circuits and data structures describing quantum gates. The NIC 610 can provide wired or wireless communication between the system 600 and a network (e.g., the Internet 618, an intranet, a local area network, a mobile communication network, etc.). The system 600 can receive data and instructions over the network using the NIC 610 and can transmit data and instructions over the network using the NIC 610. In some embodiments, the NIC 610 can include any combination of a radio frequency (RF) module, a transponder, a transceiver, a modem, a router, a gateway, a wired network adapter, a wireless network adapter, a Bluetooth® adapter, an infrared adapter, a near field communication (“NFC”) adapter, or a cellular network chip.

[0083] 6 , system 600 can also be communicatively coupled to quantum computing device 620 (e.g., via I / O 608 or NIC 610). In some embodiments, system 600 can be a conventional computer (e.g., a desktop computer, a laptop computer, or a tablet computer) that is separate from quantum computing device 620. In some embodiments, system 600 can include a conventional computing device (e.g., processor 602, memory 604, I / O 608, NIC 610, or database 616) and a quantum computing device (e.g., including quantum computing device 620). Quantum computing device 620 can include any number of any type of quantum circuits (including quantum gates) for operating on qubits and peripheral devices (e.g., cryostats, laser generators, electrical oscillators) for maintaining and supporting the quantum circuits. In some embodiments, quantum computing device 620 may include hardware components that function as a quantum data plane for preparing and storing qubits, a control and measurement plane for performing operations on qubits and measuring the resulting qubits, and a control processor plane for determining the sequence of operations and measurements based on algorithms or measurement results. When system 600 is a conventional computer, system 600 may assist quantum computing device 620 with network access (e.g., via NIC 610), large-scale storage (e.g., using database 610), and user interaction (e.g., via I / O 608).

[0084] According to some embodiments of the present disclosure, FIG. 7 is a schematic diagram illustrating an exemplary quantum controller 722 for operating (e.g., benchmarking, controlling qubits for computation, controlling qubits for compilation, or performing any manipulation of qubits) a quantum circuit (e.g., quantum circuit 702 as shown). Quantum circuit 702 can include one or more qubits. In the non-limiting example shown in FIG. 7, quantum circuit 702 can include qubits 704 and 706. For example, qubits 704 and 706 can be fluxonium qubits. Continuing with this example, each of qubits 704 and 706 can be implemented using a Josephson junction (e.g., Josephson junction 708 or 710) shunted by a capacitor (e.g., capacitor 712 or 714) and an inductor (e.g., inductor 716 or 718). Each of inductors 716 and 718 can be realized by an array of Josephson junctions (not shown in FIG. 7). Each of qubits 706 and 706 can be constructed to operate at a local minimum in frequency with respect to the bias magnetic flux. In this non-limiting example, qubits 704 and 706 can be coupled using capacitor 720, which implements transverse resonant coupling (e.g., charge coupling, etc.) between qubits 706 and 706. Such coupling may require qubit frequency alignment. When quantum circuit 702 is not operating, qubits 704 and 706 can be maintained at different frequencies.

[0085] In some embodiments, quantum circuit 702 may be realized using a chip that includes qubits 704 and 706 and the coupling between them. In some embodiments, quantum circuit 702 may be implemented as a chip in quantum computing device 620 in FIG.

[0086] In some embodiments, the chip may include one or more couplings to a quantum controller 722. The quantum controller 722 may be a digital computing device (e.g., a computing device including a central processing unit, a graphical processing unit, an application specific integrated circuit, a field programmable gate array, or other suitable processor). The quantum controller 722 may configure the quantum circuit 702 for computation (e.g., by manipulating qubits 704 and 706), provide computational gates, or read state information from the quantum circuit 702.

[0087] According to some embodiments of the present disclosure, quantum controller 722 can configure quantum circuit 702 by allowing a gate operation to be performed on one or more qubits of quantum circuit 702 (e.g., including qubits 704 and 706). In some embodiments, quantum circuit 702 can be configured by providing one or more bias drives to move two qubits into resonance. Quantum controller 722 can provide one or more bias drives directly to circuit 702 or can provide instructions to a bias drive source (e.g., a waveform generator, etc.) to cause the bias drive source to provide bias drive to circuit 702. In some embodiments, providing bias drive can include passing current through a coil external to circuit 702. In various embodiments, providing bias drive can include passing current through an on-chip coil. The disclosed embodiments are not limited to a particular method of providing bias drive or a particular method of biasing a qubit.

[0088] According to some embodiments of the present disclosure, quantum controller 722 can implement computational gates on circuit 702. Quantum controller 722 can implement such gates by providing one or more computational drives to corresponding qubits in circuit 702, or by providing instructions to a computational drive source (e.g., a waveform generator, etc.) causing the computational drive source to provide one or more computational drives to circuit 702. Such computational drives can include microwave drives. The computational drives can include sine waves, square waves, pulse trains, or other quantum gate drives with parameters selected by quantum controller 722 to implement quantum gates on the qubits. One or more computational drives can be provided to the corresponding qubits using one or more coils coupled to the corresponding qubits. The coils can be external to circuit 702 or on the chip including circuit 702.

[0089] According to some embodiments of the present disclosure, quantum controller 722 can be configured to determine state information for quantum circuit 702. In some embodiments, quantum controller 722 can measure the state of one or more qubits of circuit 702. The state can be measured upon completion of a sequence of one or more quantum operations. In some embodiments, quantum controller 722 can provide a probe signal (e.g., a microwave probe tone) to a coupled resonator of circuit 702 or provide instructions to a readout device (e.g., an arbitrary waveform generator) that provides the probe signal. In various embodiments, quantum controller 722 can include, or be configured to receive information from, a detector configured to determine the amplitude and phase of an output signal received from the coupled resonator in response to providing the microwave probe tone. The amplitude and phase of the output signal can be used to determine the state of the probed qubit. The disclosed embodiments are not limited to any particular method of measuring the state of a qubit.

[0090] The disclosed embodiments are not limited to embodiments in which quantum controller 722 controls only a single quantum circuit. In some embodiments, quantum controller 722 can control multiple quantum circuits (which may be identical in implementation or may be different in implementation). For example, quantum controller 722 can control a first trasmon qubit-based quantum circuit and a second fluxonium qubit-based quantum circuit. In some embodiments, quantum controller 722 may be capable of independently controlling multiple quantum circuits. In some cases, for example, each of the multiple quantum circuits may perform a different simultaneous computation. In various cases, multiple quantum circuits may be involved in the same computation (e.g., parallel computation, etc.).

[0091] According to some embodiments of the present disclosure, quantum controller 722 can configure quantum circuit 702 and provide computational gates to circuit 702 based at least in part on the obtained state information. In some embodiments, quantum controller 722 can be included as part of computing device 620 in FIG.

[0092]

[0084] By way of example, Figure 8 shows a flowchart of an exemplary method 800 for operating a quantum circuit according to some embodiments of the present disclosure. Method 800 may be performed by at least one data processing circuit (e.g., processor 602 in Figure 6). In some embodiments, method 800 may be implemented as a computer program product (e.g., embodied in a computer-readable medium) including computer-executable instructions (e.g., program code) executed by a computer (e.g., system 600 in Figure 6). In some embodiments, method 800 may be implemented as a hardware product (e.g., benchmark executor 614 in Figure 6) that stores computer-executable instructions (e.g., program code), which may be standalone or an integrated part of any of system 600.

[0093]

[0085] Referring to Figure 8, in step 802, a data processing circuit (e.g., a data processing circuit of a conventional computer) generates m1 (m1 is an integer) random unitary quantum gates (e.g., unitary quantum gates U1, U2, ..., U in Figure 2) based on parameters of the quantum gate (e.g., quantum gate G in Figure 2). m1 ) can be generated. In some embodiments, the quantum gate can be implemented as an electromagnetic signal (e.g., a microwave pulse signal generated by an external oscillator). In such cases, the parameters of the quantum gate can include at least one of the length, amplitude, or shape of the electromagnetic signal.

[0094] In some embodiments, to generate representations of m1 random unitary quantum gates, the data processing circuit may generate representations of m1 random unitary quantum gates according to a Haar measure. In some embodiments, the data processing circuit may generate representations of m1 random unitary quantum gates by pseudo-randomly sampling the space of unitary operators according to a uniform probability distribution. It should be noted that the generated m1 random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0095] In step 804, the data processing circuit calculates a unitary quantum gate (e.g., unitary quantum gate U in FIG. 2 ) adjacent to each of the m random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator (e.g., the identity Pauli gate I). i and U i+1 , m1) by inserting a quantum gate (e.g., quantum gate G in FIG. 2) between m1 random unitary quantum gates (i=1, 2, ..., m1), and by adding a quantum gate and a first restoration quantum gate (e.g., first restoration quantum gate R1 in FIG. 2) to m1 random unitary quantum gates (e.g., U m1 , and then R1 can be used to determine a representation (e.g., a matrix or tensor) of a first quantum gate sequence (e.g., quantum gate sequence 200 in FIG. 2) by concatenating R1 with the combined quantum gates U1 G U2 ... G U m1 Effectively, the quantum gate sequence 200 in FIG. 2 is equivalent to the identity operator, i.e., U1·G·U2·...·G·U m1 ·G·R1=I.

[0096] In step 806, the data processing circuit adds a second restoration quantum gate (e.g., the second restoration quantum gate R1′ in FIG. 3) to the m1 random unitary quantum gates by concatenating the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to an identity operator (e.g., the identity Pauli gate I) (e.g., the second restoration quantum gate R1′ in FIG. 3). m1 ') to determine a representation (e.g., a matrix or tensor) of a second quantum gate sequence (e.g., quantum gate sequence 300 in FIG. 3). By way of example, as shown in FIG. 3, R1' can be expressed as a representation of the combined quantum gates U1'·U2'·...·U n1 Effectively, the quantum gate sequence 300 in FIG. 3 is equivalent to the identity operator, i.e., U1'·U2'·...·U n1 '·R1'=I.

[0097] In step 808, the data processing circuit may send (e.g., via NIC 610 in FIG. 6 ) to a quantum computing device (e.g., quantum computing device 620 in FIG. 6 ) hardware instructions corresponding to a representation of the first quantum gate sequence. In some embodiments, the quantum computing device may include a quantum circuit (e.g., quantum circuit 702 in FIG. 7 ) and a quantum controller (e.g., quantum controller 722 in FIG. 7 ) configured to operate the quantum circuit. The quantum circuit may include a qubit (e.g., qubit 704 or 706 in FIG. 7 ).

[0098] In step 810, the data processing circuit (e.g., via NIC 610 in FIG. 6 ) receives from the quantum computing device a first quantum gate sequence (e.g., quantum gate sequence 200) for a first number of times by the quantum computing device to a qubit (e.g., input qubit Q in FIG. 2 ). i) to the qubit (e.g., the output qubit Q in FIG. 2) O ) may receive a first number of measurements. In some embodiments, the qubit may be implemented as a superconducting qubit.

[0099]

[0091] In step 812, the data processing circuit may determine a fidelity value of the quantum gate based on the probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit.

[0100] According to some embodiments of the present disclosure, after determining the fidelity value, the data processing circuit can further update parameters of the quantum gate based on the fidelity value of the quantum gate. In some embodiments, the computer can update the parameters to optimize the quantum gate such that the fidelity value can be increased when the quantum gate is actually applied with the new parameters.

[0101] According to some embodiments of the present disclosure, after determining the fidelity data, the data processing circuitry selects m (m is an integer different from m) random unitary quantum gates (e.g., unitary quantum gates V, V, ..., V in FIG. 4) based on parameters of the quantum gate (e.g., quantum gate G in FIG. 4). m2 ) in the second quantum gate sequence. The data processing circuitry can then generate a representation (e.g., a matrix or tensor) of m random unitary quantum gates, each of which is a neighboring unitary quantum gate (e.g., unitary quantum gate V in FIG. 4 ) such that the second quantum gate sequence is equivalent to the identity operator (e.g., the Pauli gate I). i and V i+1 , m2) and by adding a quantum gate and a second restoration quantum gate (e.g., the second restoration quantum gate R2 in FIG. 4) to the m2 random unitary quantum gates (e.g., V m2, R can be used to determine a representation (e.g., a matrix or tensor) of a second quantum gate sequence (e.g., quantum gate sequence 400 in FIG. 4) by concatenating R with the combined quantum gates V G V ... G V m2 Effectively, the quantum gate sequence 400 in FIG. 4 is equivalent to the identity operator, i.e., V1·G·V2·...·G·V m2 ·G·R2=I.

[0102] In some embodiments, to generate representations of m random unitary quantum gates, the method can include having a computer generate representations of m random unitary quantum gates according to a Haar measure. In some embodiments, to generate representations of m random unitary quantum gates, the method can include having a computer generate representations of m random unitary quantum gates by pseudo-randomly sampling a space of unitary operators according to a uniform probability distribution. It should be noted that the generated m random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0103] After determining the representation of the second quantum gate sequence, the data processing circuit (e.g., via NIC 610 in FIG. 6 ) may further transmit hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device (e.g., quantum computing device 620 in FIG. 6 ). The data processing circuit then (e.g., via NIC 610 in FIG. 6 ) may transmit from the quantum computing device hardware instructions corresponding to the representation of the second quantum gate sequence to a qubit (e.g., input qubit Q in FIG. 4 ) for a second number of times by the quantum computing device. i ) after applying OAfter receiving the second number of measurements of the qubit, the data processing circuit can determine a second fidelity value of the quantum gate based on the probability that the quantum state of the qubit remains unchanged over the second number of measurements of the qubit.

[0104] After determining the second fidelity value, the data processing circuit can determine an average fidelity value of the quantum gate based on the fidelity value and the second fidelity value. In some embodiments, the computer can determine the average fidelity value as the average of the fidelity value and the second fidelity value. In some embodiments, the data processing circuit can determine the average fidelity value of the quantum gate by performing an exponential decay regression, where m1 and m2 are independent variables and the fidelity value and the second fidelity value are response variables. The computer can further determine the average fidelity value as a decay rate of the exponential decay regression.

[0105]

[0097] In some embodiments, after determining the average fidelity value of the quantum gate, the data processing circuit may further update the parameters of the quantum gate based on the average fidelity value of the quantum gate.

[0106] In some embodiments, a non-transitory computer-readable storage medium containing instructions is also provided, which can be executed by a device (such as the disclosed encoder and decoder) to perform the methods described above. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, a hard disk, a solid-state drive, a magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with a hole pattern, RAM, PROM and EPROM, FLASH-EPROM or any other flash memory, NVRAM, cache, registers, any other memory chip or cartridge, and networked versions thereof. A device can include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memory.

[0107]

[0099] The embodiments can be further described using the following sections. 1. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of an apparatus to cause the apparatus to perform a method, the method comprising: generating representations of m random unitary quantum gates based on the parameters of the quantum gates, where m is an integer; determining a representation of the first quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m random unitary quantum gates and appending the quantum gate and a first restoration quantum gate to the m random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator; determining a representation of the second quantum gate sequence by concatenating m random unitary quantum gates and appending second restoration quantum gates to the m random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving, from the quantum computing device, a first number of measurements of the qubits after applying a first quantum gate sequence to the qubits a first number of times by the quantum computing device and a second number of measurements of the qubits after applying a second quantum gate sequence to the qubits a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit and a second probability that the quantum state of the qubit remains unchanged over a second number of measurements of the qubit; 1. A non-transitory computer-readable medium comprising: 2. A set of instructions executable by at least one processor of the device, the set of instructions causing the device to: 10. The non-transitory computer-readable medium of claim 1, further configured to update a parameter of the quantum gate based on the fidelity value of the quantum gate. 3. A set of instructions executable by at least one processor of the device, the set of instructions causing the device to: generating representations of m random unitary quantum gates based on the parameters of the quantum gates, where m is an integer other than m; determining a representation of the third quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m random unitary quantum gates and appending the quantum gate and a third restoration quantum gate to the m random unitary quantum gates such that the third quantum gate sequence is equivalent to an identity operator; determining a representation of the fourth quantum gate sequence by concatenating m random unitary quantum gates and appending a fourth restoration quantum gate to the m random unitary quantum gates such that the fourth quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving, from the quantum computing device, a third number of measurements of the qubit after applying a third quantum gate sequence to the qubit a third number of times by the quantum computing device, and a fourth number of measurements of the qubit after applying a fourth quantum gate sequence to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit remains unchanged over a third number of measurements of the qubit and a fourth probability that the quantum state of the qubit remains unchanged over a fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; 2. The non-transitory computer-readable medium of claim 1, further comprising: 4. Determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability determining a first average probability as an average of the first probability and the third probability, and a second average probability as an average of the second probability and the fourth probability; determining an average fidelity value as a ratio of the first average probability to the second average probability; 3. The non-transitory computer-readable medium of claim 3, 5. Determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability determining a first fidelity value by performing a first exponential decay regression using m1 and m2 as independent variables and the first probability and the third probability as response variables; determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and the second probability and the fourth probability as response variables; determining an average fidelity value as a ratio of the first fidelity value to the second fidelity value; 3. The non-transitory computer-readable medium of claim 3, 6. A set of instructions executable by at least one processor of the device, the set of instructions causing the device to: 4. The non-transitory computer-readable medium of clause 3, further configured to update a parameter of the quantum gate based on an average fidelity value of the quantum gate. 7. The non-transitory computer-readable medium of any of clauses 1-6, wherein the representation of the m1 random unitary quantum gates includes a matrix. 8. Generating representations of m1 random unitary quantum gates is 8. The non-transitory computer-readable medium of any of clauses 1-7, comprising generating representations of m random unitary quantum gates according to a Haar measure. 9. Generating representations of m1 random unitary quantum gates is 8. The non-transitory computer-readable medium of any of clauses 1-7, comprising generating representations of m random unitary quantum gates by pseudo-randomly sampling a space of unitary operators according to a uniform probability distribution. 10. The non-transitory computer-readable medium of any of clauses 1-9, wherein the qubits include superconducting qubits. 11. The non-transitory computer-readable medium of clause 10, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of a length, an amplitude, or a shape of the electromagnetic signal. 12. Determining the fidelity value of a quantum gate is 12. The non-transitory computer-readable medium of any of clauses 1-11, comprising determining a fidelity value of the quantum gate as a ratio of the first probability to the second probability. 13. The non-transitory computer-readable medium of any of clauses 1-12, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, the quantum circuit including qubits. 14. An apparatus comprising: a memory configured to store a set of instructions; a processor communicatively coupled to the memory and configured to execute a set of instructions to cause the device to: generating representations of m random unitary quantum gates based on the parameters of the quantum gates, where m is an integer; determining a representation of the first quantum gate sequence by inserting a quantum gate between each neighboring unitary quantum gate of the m random unitary quantum gates and appending the quantum gate and a first restoration quantum gate to the m random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator; determining a representation of the second quantum gate sequence by concatenating m random unitary quantum gates and appending second restoration quantum gates to the m random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving, from the quantum computing device, a first number of measurements of the qubits after applying a first quantum gate sequence to the qubits a first number of times by the quantum computing device and a second number of measurements of the qubits after applying a second quantum gate sequence to the qubits a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit and a second probability that the quantum state of the qubit remains unchanged over a second number of measurements of the qubit; one or more processors configured to execute An apparatus comprising: 15. One or more processors execute a set of instructions to cause a device to: 15. The apparatus of clause 14, further configured to: update a parameter of the quantum gate based on the fidelity value of the quantum gate. 16. One or more processors execute a set of instructions to cause a device to: generating representations of m random unitary quantum gates based on the parameters of the quantum gates, where m is an integer other than m; determining a representation of the third quantum gate sequence by inserting a quantum gate after each neighboring unitary quantum gate of the m random unitary quantum gates and appending a third restoration quantum gate to the m random unitary quantum gates such that the third quantum gate sequence is equivalent to an identity operator; determining a representation of the fourth quantum gate sequence by concatenating m random unitary quantum gates and appending a fourth restoration quantum gate to the m random unitary quantum gates such that the fourth quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving, from the quantum computing device, a third number of measurements of the qubit after applying a third quantum gate sequence to the qubit a third number of times by the quantum computing device, and a fourth number of measurements of the qubit after applying a fourth quantum gate sequence to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit remains unchanged over a third number of measurements of the qubit and a fourth probability that the quantum state of the qubit remains unchanged over a fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; 15. The apparatus of clause 14, further configured to: 17. Determining an average fidelity value of a quantum gate based on a first probability, a second probability, a third probability, and a fourth probability. determining a first average probability as an average of the first probability and the third probability, and a second average probability as an average of the second probability and the fourth probability; determining an average fidelity value as a ratio of the first average probability and the second average probability; 16. The apparatus of clause 16, including: 18. Determining an average fidelity value of a quantum gate based on a first probability, a second probability, a third probability, and a fourth probability. determining a first fidelity value by performing a first exponential decay regression using m1 and m2 as independent variables and the first probability and the third probability as response variables; determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and the second probability and the fourth probability as response variables; determining an average fidelity value as a ratio of the first fidelity value to the second fidelity value; 16. The apparatus of clause 16, including: 19. One or more processors execute a set of instructions to cause a device to: 17. The apparatus of clause 16, further configured to: update a parameter of the quantum gate based on an average fidelity value of the quantum gate. 20.The representation of m1 random unitary quantum gates includes matrices, the apparatus of any of clauses 14-19. 21. Generating representations of m1 random unitary quantum gates is The apparatus of any of clauses 14-20, comprising generating representations of m random unitary quantum gates according to a Haar measure. 22. Generating representations of m1 random unitary quantum gates is The apparatus of any of clauses 14-20, comprising generating representations of m random unitary quantum gates by pseudorandomly sampling the space of unitary operators according to a uniform probability distribution. 23. The device of any of clauses 14-22, wherein the qubit includes a superconducting qubit. 24. The apparatus of clause 23, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of the length, amplitude, or shape of the electromagnetic signal. 25. Determining the fidelity value of a quantum gate is 25. The apparatus of any of clauses 14-24, including determining a fidelity value of the quantum gate as a ratio of the first probability to the second probability. 26. The apparatus of any of clauses 14-25, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, the quantum circuit including qubits. 27. A computer-implemented method comprising: generating representations of m random unitary quantum gates based on the parameters of the quantum gates, where m is an integer; determining a representation of the first quantum gate sequence by inserting a quantum gate after each neighboring unitary quantum gate of the m random unitary quantum gates and appending a first restoration quantum gate to the m random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator; determining a representation of the second quantum gate sequence by concatenating m random unitary quantum gates and appending second restoration quantum gates to the m random unitary quantum gates such that the second quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving, from the quantum computing device, a first number of measurements of the qubits after applying a first quantum gate sequence to the qubits a first number of times by the quantum computing device and a second number of measurements of the qubits after applying a second quantum gate sequence to the qubits a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit and a second probability that the quantum state of the qubit remains unchanged over a second number of measurements of the qubit; 20. A computer-implemented method comprising: 28. The computer-implemented method of clause 27, further comprising updating a parameter of the quantum gate based on the fidelity value of the quantum gate. 29. Generating representations of m2 random unitary quantum gates based on the parameters of the quantum gates, where m2 is an integer other than m1; determining a representation of the third quantum gate sequence by inserting a quantum gate after each neighboring unitary quantum gate of the m random unitary quantum gates and appending a third restoration quantum gate to the m random unitary quantum gates such that the third quantum gate sequence is equivalent to an identity operator; determining a representation of the fourth quantum gate sequence by concatenating m random unitary quantum gates and appending a fourth restoration quantum gate to the m random unitary quantum gates such that the fourth quantum gate sequence is equivalent to an identity operator; transmitting to a quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving, from the quantum computing device, a third number of measurements of the qubit after applying a third quantum gate sequence to the qubit a third number of times by the quantum computing device, and a fourth number of measurements of the qubit after applying a fourth quantum gate sequence to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit remains unchanged over a third number of measurements of the qubit and a fourth probability that the quantum state of the qubit remains unchanged over a fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; 28. The computer-implemented method of clause 27, further comprising: 30. Determining an average fidelity value of a quantum gate based on a first probability, a second probability, a third probability, and a fourth probability includes: determining a first average probability as an average of the first probability and the third probability, and a second average probability as an average of the second probability and the fourth probability; determining an average fidelity value as a ratio of the first average probability and the second average probability; 29. The computer-implemented method of claim 29, 31. Determining an average fidelity value of a quantum gate based on a first probability, a second probability, a third probability, and a fourth probability includes: determining a first fidelity value by performing a first exponential decay regression using m1 and m2 as independent variables and the first probability and the third probability as response variables; determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and the second probability and the fourth probability as response variables; determining an average fidelity value as a ratio of the first fidelity value to the second fidelity value; 29. The computer-implemented method of claim 29, 32. The computer-implemented method of clause 29, further comprising updating a parameter of the quantum gate based on an average fidelity value of the quantum gate. 33. The computer-implemented method of any of clauses 27-32, wherein the representation of the m1 random unitary quantum gates includes a matrix. 34. Generating representations of m1 random unitary quantum gates is 34. The computer-implemented method of any of clauses 27-33, comprising generating representations of m random unitary quantum gates according to a Haar measure. 35. Generating representations of m1 random unitary quantum gates is 34. The computer-implemented method of any of clauses 27-33, comprising generating representations of m random unitary quantum gates by pseudo-randomly sampling the space of unitary operators according to a uniform probability distribution. 36. The computer-implemented method of any of clauses 27-35, wherein the qubits include superconducting qubits. 37. The computer-implemented method of clause 36, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of a length, an amplitude, or a shape of the electromagnetic signal. 38. Determining the fidelity value of a quantum gate is 38. The computer-implemented method of any of clauses 27-37, comprising determining a fidelity value of the quantum gate as a ratio of the first probability to the second probability. 39. The computer-implemented method of any of clauses 27-38, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, the quantum circuit including qubits.

[0108] It should be noted that relative terms such as "first" and "second" used herein are merely used to distinguish one entity or operation from another and do not require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "have," "contain," and "include," as well as other similar forms, are intended to be equivalent in meaning and are open-ended in that the items following any of these terms are not intended to be an exhaustive list of such items or to be limited only to the listed items. As used herein, the indefinite articles "a" and "an" mean "one or more." Similarly, the use of plurals does not necessarily imply a plural meaning unless it is clear in a given context.

[0109]

[0101] As used herein, unless otherwise specified, the word "or" includes all possible combinations except where impracticable. For example, if it is stated that a component may include A or B, the component may include A, B, or A and B, unless otherwise specified or impracticable. As a second example, if it is stated that a component may include A, B, or C, the component may include A, B, C, A and B, A and C, B and C, or A, B, and C, unless otherwise specified or impracticable.

[0110]

[0102] It is understood that the above-described embodiments can be implemented by hardware, software (program code), or a combination of hardware and software. If implemented by software, the software can be stored in the above-described computer-readable medium. When executed by a processor, the software can perform the disclosed methods. The computational units and other functional units described in this disclosure can be implemented by hardware, software, or a combination of hardware and software. Those skilled in the art will also understand that multiple of the above-described modules / units can be combined into one module / unit, and that each of the above-described modules / units can be further divided into multiple sub-modules / sub-units.

[0111]

[0103] In the above specification, embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. Certain adaptations and modifications to the described embodiments may be made. Other embodiments may become apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the invention being indicated by the appended claims. Additionally, the order of steps depicted in the figures is for illustrative purposes only and is not intended to be limited to the particular order of steps. Thus, one skilled in the art will recognize that steps may be performed in different orders while implementing the same method.

[0112]

[0104] Other embodiments will be apparent to those skilled in the art from consideration of the specification and practice of the embodiments disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosed embodiments being indicated by the appended claims.

Claims

1. 1. A non-transitory computer-readable medium storing a set of instructions executable by at least one processor of an apparatus to cause the apparatus to perform a method, the method comprising: Based on the parameters of the quantum gate, m 1 generating representations of m random unitary quantum gates, 1 is an integer, and The m quantum gates are then arranged such that the first quantum gate sequence is equivalent to the identity operator. 1 The quantum gate is inserted between each of the neighboring unitary quantum gates of the random unitary quantum gates, and the quantum gate and the first restoration quantum gate are connected to the m 1 determining a representation of the first quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then calculated so that the second quantum gate sequence is equivalent to the identity operator. 1 random unitary quantum gates are connected, and a second restoration quantum gate is connected to the m 1 determining a representation of the second quantum gate sequence by adding random unitary quantum gates; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving from the quantum computing device the first number of measurements of the qubit after the first quantum gate sequence has been applied to the qubit a first number of times by the quantum computing device and the second number of measurements of the qubit after the second quantum gate sequence has been applied to the qubit a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit will not change over the first number of measurements of the qubit and a second probability that the quantum state of the qubit will not change over the second number of measurements of the qubit; 1. A non-transitory computer-readable medium comprising:

2. The set of instructions executable by the at least one processor of the device may cause the device to:

10. The non-transitory computer-readable medium of claim 1, further configured to update the parameters of the quantum gate based on the fidelity value of the quantum gate.

3. The set of instructions executable by the at least one processor of the device may cause the device to: Based on the parameters of the quantum gate, m 2 generating representations of m random unitary quantum gates, 2 is m 1 generating an integer other than The m quantum gate sequence is then equivalent to the identity operator. 2 A quantum gate is inserted between each of the neighboring unitary quantum gates of the random unitary quantum gates, and the quantum gate and the third restoration quantum gate are connected to the m 2 determining a representation of the third quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then equivalent to the identity operator. 2 random unitary quantum gates are connected, and a fourth restoration quantum gate is connected to the m 2 determining a representation of the fourth quantum gate sequence by adding to the random unitary quantum gates; transmitting to the quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving from the quantum computing device the third number of measurements of the qubit after the third quantum gate sequence has been applied to the qubit a third number of times by the quantum computing device and the fourth number of measurements of the qubit after the fourth quantum gate sequence has been applied to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit will remain unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit will remain unchanged over the fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; The non-transitory computer-readable medium of claim 1 , further comprising:

4. determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability, determining a first average probability as the average of the first probability and the third probability, and a second average probability as the average of the second probability and the fourth probability; determining the average fidelity value as a ratio of the first average probability to the second average probability; 4. The non-transitory computer-readable medium of claim 3, comprising:

5. determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability, m 1 and m 2 determining a first fidelity value by performing a first exponential decay regression using as an independent variable, and the first probability and the third probability as response variables; m 1 and m 2 determining a second fidelity value by performing a second exponential decay regression using as an independent variable and the second probability and the fourth probability as response variables; determining the average fidelity value as a ratio of the first fidelity value to the second fidelity value; 4. The non-transitory computer-readable medium of claim 3, comprising:

6. The set of instructions executable by the at least one processor of the device may cause the device to:

4. The non-transitory computer-readable medium of claim 3, further comprising: updating the parameters of the quantum gate based on the average fidelity value of the quantum gate.

7. Said m 1 10. The non-transitory computer-readable medium of claim 1, wherein the representation of the random unitary quantum gates comprises a matrix.

8. Said m 1 Generating representations of random unitary quantum gates is According to the Haar measure, 1 10. The non-transitory computer-readable medium of claim 1, comprising generating representations of random unitary quantum gates.

9. Said m 1 Generating representations of random unitary quantum gates is By pseudorandomly sampling the space of unitary operators according to a uniform probability distribution, 1 10. The non-transitory computer-readable medium of claim 1, comprising generating representations of random unitary quantum gates.

10. The non-transitory computer-readable medium of claim 1 , wherein the qubit comprises a superconducting qubit.

11. 11. The non-transitory computer-readable medium of claim 10, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of a length, an amplitude, or a shape of the electromagnetic signal.

12. Determining the fidelity value of the quantum gate comprises:

10. The non-transitory computer-readable medium of claim 1, comprising determining the fidelity value of the quantum gate as a ratio of the first probability to the second probability.

13. 1. An apparatus comprising: a memory configured to store a set of instructions; communicatively coupled to the memory and executing the set of instructions to cause the device to: Based on the parameters of the quantum gate, m 1 generating representations of m random unitary quantum gates, 1 is an integer, and The m quantum gates are then arranged such that the first quantum gate sequence is equivalent to the identity operator. 1 The quantum gate is inserted between each of the neighboring unitary quantum gates of the random unitary quantum gates, and the quantum gate and the first restoration quantum gate are connected to the m 1 determining a representation of the first quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then calculated so that the second quantum gate sequence is equivalent to the identity operator. 1 random unitary quantum gates are connected, and a second restoration quantum gate is connected to the m 1 determining a representation of the second quantum gate sequence by adding random unitary quantum gates; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving from the quantum computing device the first number of measurements of the qubit after the first quantum gate sequence has been applied to the qubit a first number of times by the quantum computing device and the second number of measurements of the qubit after the second quantum gate sequence has been applied to the qubit a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit will not change over the first number of measurements of the qubit and a second probability that the quantum state of the qubit will not change over the second number of measurements of the qubit; one or more processors configured to execute An apparatus comprising:

14. The one or more processors execute the set of instructions to cause the device to:

14. The apparatus of claim 13, further configured to: update the parameters of the quantum gate based on the fidelity value of the quantum gate.

15. The one or more processors execute the set of instructions to cause the device to: Based on the parameters of the quantum gate, m 2 generating representations of m random unitary quantum gates, 2 is m 1 generating an integer other than The m quantum gate sequence is then equivalent to the identity operator. 2 A quantum gate is inserted after each neighboring unitary quantum gate of the random unitary quantum gates, and a third restoration quantum gate is inserted after the m neighboring unitary quantum gates. 2 determining a representation of the third quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then equivalent to the identity operator. 2 random unitary quantum gates are connected, and a fourth restoration quantum gate is connected to the m 2 determining a representation of the fourth quantum gate sequence by adding to the random unitary quantum gates; transmitting to the quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving from the quantum computing device the third number of measurements of the qubit after the third quantum gate sequence has been applied to the qubit a third number of times by the quantum computing device and the fourth number of measurements of the qubit after the fourth quantum gate sequence has been applied to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit will remain unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit will remain unchanged over the fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; The apparatus of claim 13 , further configured to:

16. determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability, determining a first average probability as the average of the first probability and the third probability, and a second average probability as the average of the second probability and the fourth probability; determining the average fidelity value as a ratio of the first average probability and the second average probability; 16. The apparatus of claim 15, comprising:

17. determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability, m 1 and m 2 determining a first fidelity value by performing a first exponential decay regression using as an independent variable, and the first probability and the third probability as response variables; m 1 and m 2 determining a second fidelity value by performing a second exponential decay regression using as an independent variable and the second probability and the fourth probability as response variables; determining the average fidelity value as a ratio of the first fidelity value to the second fidelity value; 16. The apparatus of claim 15, comprising:

18. The one or more processors execute the set of instructions to cause the device to:

16. The apparatus of claim 15, further configured to: update the parameters of the quantum gate based on the average fidelity value of the quantum gate.

19. 1. A computer-implemented method comprising: Based on the parameters of the quantum gate, m 1 generating representations of m random unitary quantum gates, 1 is an integer, and The m quantum gates are then arranged such that the first quantum gate sequence is equivalent to the identity operator. 1 A quantum gate is inserted after each neighboring unitary quantum gate of the random unitary quantum gates, and a first restoration quantum gate is inserted after the m neighboring unitary quantum gates. 1 determining a representation of the first quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then calculated so that the second quantum gate sequence is equivalent to the identity operator. 1 random unitary quantum gates are connected, and a second restoration quantum gate is connected to the m 1 determining a representation of the second quantum gate sequence by adding random unitary quantum gates; transmitting to a quantum computing device hardware instructions corresponding to a representation of the first quantum gate sequence and hardware instructions corresponding to a representation of the second quantum gate sequence; receiving from the quantum computing device the first number of measurements of the qubit after the first quantum gate sequence has been applied to the qubit a first number of times by the quantum computing device and the second number of measurements of the qubit after the second quantum gate sequence has been applied to the qubit a second number of times by the quantum computing device; determining a fidelity value of the quantum gate based on a first probability that the quantum state of the qubit will not change over the first number of measurements of the qubit and a second probability that the quantum state of the qubit will not change over the second number of measurements of the qubit; 20. A computer-implemented method comprising:

20. Based on the parameters of the quantum gate, m 2 generating representations of m random unitary quantum gates, 2 is m 1 generating an integer other than The m quantum gate sequence is then equivalent to the identity operator. 2 A quantum gate is inserted after each neighboring unitary quantum gate of the random unitary quantum gates, and a third restoration quantum gate is inserted after the m neighboring unitary quantum gates. 2 determining a representation of the third quantum gate sequence by adding random unitary quantum gates; The m quantum gate sequence is then equivalent to the identity operator. 2 random unitary quantum gates are connected, and a fourth restoration quantum gate is connected to the m 2 determining a representation of the fourth quantum gate sequence by adding to the random unitary quantum gates; transmitting to the quantum computing device hardware instructions corresponding to a representation of the third quantum gate sequence and hardware instructions corresponding to a representation of the fourth quantum gate sequence; receiving from the quantum computing device the third number of measurements of the qubit after the third quantum gate sequence has been applied to the qubit a third number of times by the quantum computing device and the fourth number of measurements of the qubit after the fourth quantum gate sequence has been applied to the qubit a fourth number of times by the quantum computing device; determining a third probability that the quantum state of the qubit will remain unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit will remain unchanged over the fourth number of measurements of the qubit; determining an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability; 20. The computer-implemented method of claim 19, further comprising:

Citation Information

Patent Citations

  • Fidelity estimation for quantum computing systems

    JP2020080173A