System and method for communication using a hierarchy of arbitrary unitary matrices

Abstract

To provide, generally, data communication, and more specifically, techniques for increasing the wireless transmission efficiency using a layered construction of arbitrary unitary matrices.SOLUTION: A method includes: generating, via a first processor of a first compute device, symbols based on incoming data; and decomposing a unitary matrix of size NN by 1) applying a permutation to each symbol using a permutation matrix, to produce permuted symbols, and 2) transforming each symbol using at least one primitive transformation matrix of size MM, M being less than or equal to N, to produce transformed symbols. The method also includes sending a signal representing the transformed symbols to a plurality of transmitters for transmission of a signal representing the transformed symbols to a plurality of receivers. A signal representing the unitary matrix is sent to a second compute device for transmission of the unitary matrix to the receivers for recovery of the plurality of symbols at the plurality of receivers.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to and is a continuation of U.S. utility patent application Ser. No. 16 / 459,262, entitled "COMMUNICATION SYSTEM AND METHOD USING LAYERED CONSTRUCTION OF ARBITRARY UNITARY MATRICES," filed July 1, 2019, the entire contents of which are incorporated herein by reference in their entirety for all purposes.

[0002]

[0002] This application is related to U.S. utility patent application Ser. No. 16 / 416,144, filed May 17, 2019, entitled "COMMUNICATION SYSTEM AND METHODS USING MULTIPLE-IN-MULTIPLE-OUT (MIMO) ANTENNAS WITHIN UNITARY BRAID DIVISIONAL MULTIPLEXING (UBDM)," and U.S. utility patent application Ser. No. 16 / 459,245, filed July 1, 2019, entitled "SYSTEMS, METHODS AND APPARATUS FOR SECURE AND EFFICIENT WIRELESS COMMUNICATION OF SIGNALS USING A GENERALIZED APPROACH WITHIN UNITARY BRAID DIVISION MULTIPLEXING," the disclosures of each of which are incorporated herein by reference in their entirety for all purposes.

[0003] Federal Ownership Statement

[0003] The United States Government holds a non-exclusive, firm, royalty-free license in this invention, with the authority to grant licenses for any purpose by the United States Government.

[0004] Technical Field The present invention relates generally to data communications, and more particularly to techniques for improving the efficiency of wireless transmissions using a hierarchical structure of arbitrary unitary matrices. [Background technology]

[0005] background

[0005] Wireless communication systems are widely deployed to provide various types of communication services such as voice, packet data, etc. Such systems may utilize modulation techniques that can achieve high performance in some wireless environments, for example, by dividing the system bandwidth into a number of subbands, also commonly referred to as subcarriers, tones, bins, and frequency subchannels.

[0006]

[0006] In multiple access communications, multiple user devices transmit signals over a given communications channel to a receiver. These signals are superimposed to form a composite signal that propagates over the channel. The receiver then performs a separation operation on the composite signal to recover one or more individual signals from the composite signal. For example, each user device may be a mobile phone owned by a different user, and the receiver may be a mobile phone base station. By separating the signals transmitted from the various user devices, the various user devices can share the same communications channel without interference.

[0007]

[0007] A transmitter can transmit various symbols by varying the state of a carrier or subcarrier, such as by varying the carrier's amplitude, phase, and / or frequency. Each symbol can represent one or more bits. These symbols can be mapped to discrete values ​​in the complex plane, thus generating quadrature amplitude modulation, or each symbol can be assigned a distinct frequency to generate frequency shift keying. The symbols are then sampled at a Nyquist rate, which is at least twice the symbol transmission rate. The resulting signal is converted to analog by a digital-to-analog converter and then up-converted to the carrier frequency for transmission. When various user devices simultaneously send symbols over a communication channel, the sine waves represented by those symbols are superimposed to form a composite signal received at a receiver. Summary of the Invention [Means for solving the problem]

[0008] overview In some embodiments, a system includes a plurality of signal receivers, a plurality of signal transmitters, and at least one processor operatively coupled to the plurality of signal transmitters. The processor is configured to generate a plurality of symbols based on input data and to decompose a unitary transformation matrix of size N×N, where N is a positive integer, into a set of layers. Each layer includes a permutation and at least one primitive transformation matrix of size M×M, where M is a positive integer having a value less than or equal to N. The processor is also configured to encode each symbol from the plurality of symbols using at least one layer from the set of layers to generate a plurality of transformed symbols. The processor is further configured to send signals representing the transformed plurality of symbols to the plurality of transmitters and transmit signals representing the transformed plurality of symbols from the plurality of transmitters to the plurality of signal receivers.

[0009] In some embodiments, a method includes generating, by a first processor of a first computing device, a plurality of symbols. The method also includes applying an arbitrary transform of size N×N, where N is a positive integer, to each symbol from the plurality of symbols to generate a transformed plurality of symbols. The arbitrary transform includes an iterative process, each iteration of the process including 1) a permutation followed by 2) application of at least one primitive transform matrix of size M×M, where M is a positive integer having a value less than or equal to N. The method also includes sending signals representing the transformed plurality of symbols to a plurality of transmitters and transmitting signals representing the transformed plurality of symbols from the plurality of transmitters to a plurality of receivers. The method further includes sending the signals representing the arbitrary transform to a plurality of signal receivers and recovering the plurality of symbols at the plurality of signal receivers before sending the signals representing the arbitrary transform to a second computing device to transmit the transformed plurality of symbols.

[0010]

[0010] The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features will be apparent from the description and drawings, and from the claims. [Brief explanation of the drawings]

[0011] BRIEF DESCRIPTION OF THE DRAWINGS [Figure 1] FIG. 1 is a block diagram illustrating an exemplary electronic communication system in an electronic environment in which the improved techniques described herein may be implemented. [Figure 2]

[0012] 1 is a flow diagram illustrating a communication method using a layered approach to constructing unitary matrices, according to one embodiment. [Figure 3]

[0013] 1 is a flow diagram illustrating a communication method using an arbitrary matrix hierarchy according to one embodiment. [Figure 4]

[0014] Vector

number

[0015] 1 is a schematic diagram of a system for communication using a hierarchy of unitary matrices according to one embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0012] Detailed Description

[0016] Techniques are presented herein for improving transmission efficiency in communication systems utilizing any of a wide variety of modulation schemes, including, but not limited to, orthogonal frequency division multiplexing (OFDM), frequency shift keying (FSK), phase shift keying (PSK), amplitude shift keying (ASK), quadrature phase shift keying (QPSK), asymmetric phase shift keying (APSK), quadrature amplitude modulation (QAM), pulse amplitude modulation (PAM), direct sequence spread spectrum / code division multiple access (DSSS / CDMA), frequency hopping spread spectrum (FHSS), and / or digital multi-carrier modulation methods such as digital video broadcasting (DVB). For example, in some embodiments, OFDM symbols of various sizes may be used to achieve even greater efficiency in OFDM systems. The techniques described herein can address both the objectives of minimizing cyclic prefix overhead and maximizing packing efficiency. Continuing with the OFDM example, the OFDM symbol size may be selected based on the expected size of various types of payloads to be transmitted in the OFDM system. Traffic in the system may be organized into various categories. For each category, one or more OFDM symbols of an appropriate size may be selected for use based on the expected payload size of the traffic within that category.

[0013]

[0017] For example, system traffic may be organized into control data, user data, and pilot data. The control data may be transmitted using OFDM symbols of a first size, the user data may be transmitted using OFDM symbols of a second size and OFDM symbols of a first size, and the pilot data may be transmitted using OFDM symbols of a third size (or the first size). User data may be further organized into subcategories, such as voice data, packet data, and messaging data. A specific OFDM symbol size may then be selected for each subcategory of user data. Alternatively, or in addition, each user's data may be transmitted using OFDM symbols of a specific size selected for that user. To improve packing efficiency, OFDM symbols of various sizes may be used for a given user data packet to better match the capacity of the OFDM symbol to the packet payload.

[0014]

[0018] In general, an OFDM system may use any number of OFDM symbol sizes, and any specific OFDM symbol size may be selected for use. In one exemplary design, a combination of two OFDM symbol sizes is used to maximize packing efficiency. In this exemplary design, a small or short OFDM symbol size (e.g., having 64 subbands) is used for pilot and control data. Depending on the payload size, user data may be sent in zero or more OFDM symbols with a large or long OFDM symbol size (e.g., having 256 subbands) or in zero or more OFDM symbols with a small OFDM symbol size.

[0015]

[0019] As described below, the processing at the transmitter and receiver (e.g., encoding, interleaving, symbol mapping, and spatial processing) may be performed in a manner that takes into account the use of OFDM symbols of various sizes. Various aspects and embodiments of the present invention are also described in further detail below.

[0016]

[0020] One improved technique includes constructing an arbitrary unitary matrix using a layered approach to obtain a set of orthogonal bases. In some embodiments, the method includes generating, by a first processor of a first computing device, a plurality of symbols based on input data. The method also includes decomposing the unitary matrix of size N×N, where N is a positive integer, by 1) applying a permutation to each symbol from the plurality of symbols using a permutation matrix to generate a permuted plurality of symbols, and 2) transforming each symbol from the permuted plurality of symbols using at least one primitive transformation matrix of size M×M, where M is a positive integer having a value less than or equal to N, to generate a transformed plurality of symbols. The method further includes sending signals representing the transformed plurality of symbols to a plurality of transmitters and transmitting signals representing the transformed plurality of symbols from the plurality of transmitters to a plurality of receivers. The signal representing the unitary matrix is ​​sent to a second computing device to transmit the unitary matrix to a plurality of receivers to recover the plurality of symbols at the plurality of receivers before transmitting signals representing the transformed plurality of symbols from the plurality of transmitters to a plurality of receivers. As used herein, a "transmitter" (or "signal transmitter") refers to any group of components used in transmitting a signal, including, but not limited to, any combination of one or more of an antenna, an amplifier, a cable, a digital-to-analog converter, a filter, an up-converter, a processor (e.g., for reading bits and / or mapping bits to baseband), etc. Similarly, as used herein, a "receiver" (or "signal receiver") refers to any group of components used in receiving a signal, including, but not limited to, any combination of one or more of an antenna, an amplifier, a cable, a digital-to-analog converter, a filter, a down-converter, a processor, etc.

[0017]

[0021] As used herein, a receiver can be configured to receive transmissions from one transmit antenna, a subset of transmit antennas, or all (i.e., every) transmit antenna. In embodiments where the receiver can receive transmissions from all transmit antennas (i.e., signals transmitted from this antenna), processing circuitry within the receiver can be configured to obtain one or various linear combinations of the received signals to extract the associated original data stream from each of the transmit antennas. In some embodiments, each individual receive antenna receives transmissions from all transmit antennas and uses processing circuitry to separate the received transmissions into individual transmissions.

[0018]

[0022] 1 illustrates an exemplary system 100 in which improved techniques for transmitting wireless communications may be implemented. The system 100 includes a signal transmitter 120 and a signal receiver 150. However, it should be understood that other signal transmitters not shown may be present in the environment.

[0019]

[0023] The signal transmitter 120 is configured to prepare a signal for transmission to the signal receiver 150 and transmit the prepared signal to the signal receiver 150. The signal transmitter 120 includes a processing circuit unit 124, a memory 126, and a transmit circuit unit 128. The processing unit set 124 includes one or more processing chips and / or processing assemblies. The memory 126 includes both volatile memory (e.g., RAM) and non-volatile memory, such as one or more ROMs, disk drives, solid-state drives, etc. The processing unit set 124 and the memory 126 together form control circuitry, which is configured and arranged to perform various methods and functions as described herein. The transmit circuitry 128 is configured to transmit a signal in the form of radio frequency energy to the receiver.

[0020]

[0024] In some embodiments, one or more of the components of signal transmitter 120 may be or comprise a processor (e.g., processing unit 124) configured to process instructions stored in memory 126. Examples of such instructions shown in Figure 1 include an initial vector generation manager 130 and a synchronization signal generation manager 146. Additionally, as shown in Figure 1, memory 126 is configured to store various data, including an initial vector 132, a channel index 136, a signal 140, and a synchronization signal 148.

[0021]

[0025] Initialization vector generation manager 130 is configured to generate a set of initialization vectors 132. As an example, in some implementations, the initialization vectors 132 are the rows of a K×N matrix. In this case, initialization vector generation manager 130 is configured to generate such a matrix based on a specification of an integer N representing the number of available distinct frequencies on which a signal can be modulated. These may be determined by the coherence bandwidth of the channel, which represents the expected multipath delay profile.

[0022]

[0026] It should be understood that although the initial vector 132 provides a set of nearly orthogonal or orthogonal codes, the initial vector 132 is not used directly to modulate such signals. Thus, despite the time delay between each signal transmission, the composite signals generated from the initial vector 132 may not preserve orthogonality at the signal receiver 150. To identify channel distortions and thereby enable recovery of the original signal at the signal receiver 150, the synchronization signal generation manager 146 is configured to generate and send the synchronization signal 148 to the signal receiver 150.

[0023]

[0027] Synchronization signal 148 is a training symbol used to estimate channel distortion coefficients. Signal receiver 150 may estimate these coefficients by comparing the distortion experienced by synchronization signal 148 received over the transmission channel with the original synchronization signal 148. In either case, signal receiver 150 has a locally stored copy of synchronization signal 148. In some configurations, synchronization signal generation manager 146 prepends synchronization signal 148 to signal 140 to, for example, compensate for channel distortion.

[0024]

[0028] The signal receiver 150 is configured to receive a signal from the signal transmitter 120 and perform operations on the received signal to recover the original signal 140. The signal receiver 150 includes processing circuitry 154, memory 156, and receiver circuitry 158. The processing unit set 154 includes one or more processing chips and / or processing assemblies. The memory 156 includes both volatile memory (e.g., RAM) and non-volatile memory, such as one or more ROMs, disk drives, solid-state drives, etc. Together, the processing unit set 154 and memory 156 form control circuitry, which is configured and arranged to perform various methods and functions as described herein. The receiver circuitry 158 is configured to receive a modulated signal in the form of radio frequency energy from the signal transmitter 120.

[0025]

[0029] In some embodiments, one or more of the components of signal receiver 150 may be or comprise a processor (e.g., processing unit 154) configured to process instructions stored in memory 156. Examples of such instructions shown in Figure 1 include synchronization signal identification manager 168 and distortion unwrapping manager 172. Additionally, as shown in Figure 1, memory 156 is configured to store various data, such as signal 140, synchronization signal 170, distortion coefficients 174, initialization vector 132, channel index 136, etc.

[0026]

[0030] Depending on the implementation, the effects of channel distortion due to multipath interference can be counteracted. n This can be achieved by designing the spacing to be narrower than the coherence bandwidth of the channel, which is typically the inverse of the root-mean-square (RMS) delay spread of the channel, which is the time distribution of multipath delays.

[0027]

[0031] The above-mentioned methods and systems typically involve matrix operations on vectors. If the length of the vector is N and the size of the matrix is ​​N×N (e.g., when the matrix is ​​unitary), then the matrix operation on the vector takes O(N 2 ) multiplications. Therefore, as N increases, the computational load on the communication system can become prohibitive.

[0028]

[0032] In some embodiments, certain fast unitary transforms can be used to reduce computational complexity. For example, matrix operations on vectors can be accomplished using Fourier matrices, Walsh-Hadamard matrices, Haar matrices, gradient matrices, certain types of Toeplitz matrices, and certain types of circulant matrices that allow fast, complex class operations on vectors. However, these types of matrices only form a limited class of transformations, and therefore the resulting security level may not be satisfactory.

[0029]

[0033] To address the complexity issue while maintaining communication security, the systems and methods described herein utilize a technique for constructing an arbitrary unitary matrix from relatively small matrices. In this technique, a unitary matrix is ​​constructed in each layer. Each layer includes two operations: the first is a permutation, and the second is a direct sum of U(2) matrices. A permutation matrix is ​​a unitary matrix that does not require any floating-point operations and is therefore computationally free, i.e., has a complexity of O(1). A U(2) matrix is ​​a matrix whose values ​​are mostly zero except for a 2x2 block along the diagonal (also called a block U(2) matrix). Such a block U(2) matrix requires only 4xN / 2 = 2xN multiplications. As a result, a layer containing a block U(2) requires 2xN multiplications to the block U(2) and no multiplications to the permutation. That is, one layer in the construction of a unitary matrix has a complexity of O(N).

[0030]

[0034] The total complexity of constructing a unitary matrix is ​​the product of the number of layers and the complexity of each layer, O(N). In some embodiments, the total number of layers can be log(N), so the total complexity of all the layers is O(N × log(N)), which is comparable to the complexity of standard OFDM. Furthermore, log(N) layers of blocks U(2) and permutation matrices can generate dense unitaries. Although the space of fast unitary matrices is not as large as the entire space of unitary matrices, it can still be large enough to prohibit attacks by eavesdroppers (see Figure 9 for further details below).

[0031]

[0035] In some embodiments, the techniques described herein can utilize block U(m) matrices to construct unitary matrices, where m is a positive integer (e.g., m=3, 4, 5, etc.). In some embodiments, matrices of various sizes can be used within a single layer when constructing the unitary matrices. In some embodiments, different layers can use matrices of different sizes, e.g., a first layer can use block U(m) matrices and a second layer can use block U(l) matrices, where m is different from l. For example, if N=8, a set of four 2x2 block U(2) matrices can be used in the first layer, followed by a permutation. Then, two U(3) matrices and a single U(2) matrix can be used in the second layer, followed by another permutation. A third layer can include a block U(2) matrix, a block U(4) matrix, then another block U(2) matrix, followed by a third permutation.

[0032]

[0036] In some embodiments, certain types of fast unitary matrices can be described in terms of layers that each contain permutations and direct sums of blocks of smaller matrices. These types of matrices include, for example, Fourier matrices, Walsh-Hadamard matrices, Haar matrices, gradient matrices, and Toeplitz matrices. In some embodiments, unitary matrices that can be constructed using layering techniques include any matrix that is not a direct sum of discrete Fourier matrices.

[0033]

[0037] The layering technique described herein can be used in any situation requiring the construction of a unitary matrix, for example, by the initial vector generation manager 130 in the system 100 shown in FIG.

[0034]

[0038] 2 is a flow diagram illustrating a communication method 200 including a layered approach for constructing a unitary matrix, according to one embodiment. The method 200 includes, at 210, generating, by a first processor of a first computing device, a plurality of symbols based on input data. At 220, a unitary matrix of size N×N is decomposed, where N is a positive integer. The decomposition includes: 1) applying a permutation to each symbol from the plurality of symbols using a permutation matrix to generate a plurality of permuted symbols; and 2) transforming each symbol from the permuted plurality of symbols using at least one primitive transformation matrix of size M×M, where M is a positive integer having a value less than or equal to N. The result of step 2) is generating a plurality of transformed symbols. In some embodiments, each primitive transformation matrix may include a block U(M) matrix, as previously described.

[0035]

[0039] The method 200 also includes, at 230, sending signals representing the transformed symbols to a plurality of transmitters. The transmitters then transmit the signals representing the transformed symbols from the plurality of transmitters to a plurality of receivers. At 240, the signals representing the unitary matrix are sent to a second computing device, which transmits the unitary matrix to a plurality of receivers. In some embodiments, the unitary matrix can be sent to the receiver before transmitting the signals representing the transformed symbols. The receiver can use the received unitary matrix to recover the symbols (i.e., the symbols generated at 210).

[0036]

[0040] In some embodiments, the decomposition of the unitary matrix at 220 can be achieved by multiple layers, each layer containing a permutation and a primitive transformation. For example, a first layer uses a first permutation matrix and a first primitive transformation matrix, a second layer uses a second permutation matrix and a second primitive transformation matrix, etc. In some embodiments, the total number of layers can correspond to log(N), where N is the number of symbols generated at 210.

[0037]

[0041] In some embodiments, the unitary matrix decomposed at 220 comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix. In some embodiments, during the decomposition of the unitary matrix at 220, a permutation is applied that is not immediately followed by another permutation.

[0038]

[0042] In some embodiments, the primitive transformation matrix has a dimension (e.g., length) of magnitude 2, and constructing the unitary matrix involves an iterative process that occurs log2N times. In some embodiments, other lengths can be used for the primitive transformation matrix. For example, the length of the primitive transformation matrix can be longer than 2 (e.g., 3, 4, 5, etc.). In some embodiments, the primitive transformation matrix includes multiple relatively small matrices with varying dimensions. For example, the primitive transformation matrix can include a block U(m) matrix, where m can vary within a single layer or between different layers.

[0039]

[0043] In some embodiments, the receiver used in method 200 comprises multiple antenna arrays (see, e.g., FIG. 10 and the description below). The multiple receivers and multiple transmitters are configured to perform multiple-input multiple-output (MIMO) operation.

[0040]

[0044] 3 is a flow diagram illustrating a communication method 300 using an arbitrary matrix hierarchy, according to one embodiment. The method 300 includes, at 310, generating, by a first processor of a first computing device, a plurality of symbols. The method 300 also includes, at 320, applying an arbitrary transform of size N×N, where N is a positive integer, to each symbol from the plurality of symbols to generate a plurality of transformed symbols. The arbitrary transform includes an iterative process (e.g., including multiple layers), with each iteration including 1) a permutation followed by 2) application of at least one primitive transform matrix of size M×M, where M is a positive integer having a value less than or equal to N.

[0041]

[0045] At 330, signals representing the transformed symbols are sent to a plurality of transmitters, which transmit the signals representing the transformed symbols to a plurality of receivers. The method 300 also includes, at 340, sending the signals representing the arbitrary transformation to a second computing device to transmit the arbitrary transformation to a plurality of signal receivers and recovering the symbols at the plurality of signal receivers before transmitting the transformed symbols.

[0042]

[0046] In some embodiments, the multiple signal receivers comprise multiple antenna arrays, and the multiple signal receivers and multiple signal transmitters are configured to perform multiple-input multiple-output (MIMO) operations. In some embodiments, the optional transform comprises a unitary transform. In some embodiments, the optional transform comprises one of a Fourier transform, a Walsh transform, a Haar transform, a gradient transform, or a Toeplitz transform.

[0043]

[0047] In some embodiments, each primitive transformation matrix from the at least one primitive transformation matrix has a dimension (e.g., length) of magnitude 2, and the number of iterations of the iterative process is log2N. In some embodiments, any other suitable length may be used for the primitive transformation matrix. For example, the length of the primitive transformation matrix may be longer than 2 (e.g., 3, 4, 5, etc.). In some embodiments, the primitive transformation matrix includes multiple relatively small matrices with various dimensions. For example, the primitive transformation matrix may include a block U(m) matrix, where m may vary within a single layer or between different layers.

[0044]

[0048] The fast matrix operations in methods 200 and 300 (e.g., 220 and 320) can be considered in more detail with reference to the Discrete Fourier Transform (DFT). Without being bound to any particular theory or mode of operation,

number

number

number

number

[0045]

[0049] In general, when performed using raw matrix multiplication, the DFT has N 2 However, the identity element ω N The roots of have a set of symmetries that can reduce the number of multiplications. To this end, (assuming for the moment that N is a multiple of 2), we can separate the sum in equation (18) into even and odd terms.

number

[0046]

[0050] moreover,

number

number

number

[0047]

[0051] In DFT, B kThe original sum to get N requires N multiplications. In the above analysis, we split the original sum into two sets of sums, each of which requires N / 2 multiplications. Here, the sums over n do not span even or odd numbers, but rather 0 to N / 2 - 1. This allows us to again split them into even and odd terms in exactly the same way as we did earlier (assuming N / 2 is also a multiple of 2). This results in four sums, each with N / 4 terms.

[0048]

[0052] If N is a power of 2, the decomposition process can continue all the way up to two-point DFT multiplications.

number

[0049]

[0053] The above analysis can be extended beyond the DFT context as follows: First, a permutation is performed on the input values ​​in a vector to produce a permuted vector. The permutation is typically an O(1) operation. Then, a series of U(2) matrix multiplications are performed on each pair of elements in the permuted vector. The U(2) values ​​in the first column of the above DFT example are all as follows:

number

[0050]

[0054] U(2) matrix multiplication can be performed similarly using other matrices (other than those shown in (23)). For example, any matrix

number

[0051]

[0055] As described herein, the combination of a permutation and a series of U(2) matrix multiplications can be considered a layer. This process can continue by adding additional layers, each of which includes a permutation and a number of multiplications by additional matrices. In some embodiments, the number of layers can be any other value (e.g., within the available computing power).

[0052]

[0056] The result of the above stratification calculation comprises a matrix of the following form:

number

[0053]

[0057] Since the permutation and A matrix are all unitary, their inverse matrices can be easily calculated. In the above layered calculation, no calculation is required for the permutation, and the calculation cost is A i This comes from matrix multiplication. More specifically, this calculation is i A total of 2N multiplications are involved in i There are log(N) matrices, so this calculation involves a total of 2N*log(N), or O(N*log(N)) operations, which corresponds to the complexity of OFDM.

[0054]

[0058] The layered calculation can be applied to any other block U(m) matrix. For example, A i The queue is

number

number

[0055]

[0059] In some embodiments, permutations and block U(m) transformations within a layer can be performed in a non-sequential manner. For example, after a permutation, any other operation can then be performed before the block U(m) transformation. In some embodiments, permutations are closed subgroups of the unitary group, so one permutation is not followed by another permutation. In some embodiments, block U(m) transformations also form closed subgroups of the unitary group, so one block U(m) transformation is not followed by another block U(m) transformation. That is, if B n and P as a substitution. In this case,

number

number

number

number

[0056]

[0060] The layered approach to constructing unitary matrices can also ensure the security of the resulting communication system, which may depend on the size of the matrix space of fast unitary matrices compared to the total group U(N).

[0057]

[0061] 5 is a schematic diagram of a system 500 for communications using a hierarchy of unitary matrices, according to one embodiment. System 500 comprises a plurality of signal transmitters 510(1) through 510(i) (collectively referred to as transmitters 510) and a plurality of signal receivers 520(1) through 520(j) (collectively referred to as receivers 520), where i and j are both positive integers. In some embodiments, i and j may be equal. In other embodiments, i may be different from j. In some embodiments, transmitters 510 and receivers 520 are configured to perform multiple-input multiple-output (MIMO) operations.

[0058]

[0062] In some embodiments, transmitter 510 may be substantially identical to signal transmitter 120 shown in Figure 1 and described above. In some embodiments, receiver 520 may be substantially identical to signal receiver 130 shown in Figure 1 and described above. In some embodiments, each transmitter 510 includes an antenna, and the transmitters 510 may form an antenna array. In some embodiments, each receiver includes an antenna, and the receivers 520 may also form an antenna array.

[0059]

[0063] The system 500 also includes a processor 530 operatively coupled to the signal transmitter 510. In some embodiments, the processor 530 includes a single processor. In some embodiments, the processor 530 includes a group of processors. In some embodiments, the processor 530 may be included in one or more of the transmitters 510. In some embodiments, the processor 520 may be separate from the transmitters 510. For example, the processor 530 may include a computing device configured to process the input data 501 and then instruct the transmitter 510 to transmit a signal representative of the input data 501.

[0060]

[0064] The processor 530 generates a plurality of symbols based on the input data 501 and is configured to decompose a unitary transform matrix of size N×N, where N is a positive integer, into a set of layers, each layer including a permutation and at least one primitive transform matrix of size M×M, where M is a positive integer less than or equal to N.

[0061]

[0065] The processor 530 is also configured to encode each symbol from the plurality of symbols using at least one layer from the set of layers to generate a plurality of transformed symbols. Signals representing the transformed symbols are then sent to a plurality of transmitters 510 for transmission to a plurality of signal receivers 520. In some embodiments, each transmitter in the transmitters 510 can communicate with any receiver in the receivers 520.

[0062]

[0066] In some embodiments, processor 530 is further configured to send a signal representing one of (1) a unitary transform matrix or (2) an inverse of the unitary transform matrix to receiver 520 before transmitting a signal representing the transformed symbols to signal receiver 520. This signal can be used by signal receiver 520 to recover symbols generated from input data 501. In some embodiments, a unitary transform matrix can be used for symbol recovery. In some embodiments, this recovery can be achieved by using the inverse of the unitary transform matrix.

[0063]

[0067] In some embodiments, the fast unitary transform matrix comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix. In some embodiments, the primitive transform matrix has a dimension (e.g., length) of size 2, and the set of layers comprises log2N layers. In some embodiments, any other length may be used, as previously mentioned. In some embodiments, the signal receiver 120 is configured to transmit a signal representing the transformed plurality of symbols to the target device.

[0064]

[0068] Implementations of the various techniques described herein may be implemented in digital electronic circuitry, or in computer hardware (executed or stored in hardware), firmware, software, or combinations of them. Each implementation may be implemented as a computer program product, i.e., a computer program tangibly embodied in, for example, a machine-readable storage device (computer-readable medium, non-transitory computer-readable storage medium, tangible computer-readable storage medium, e.g., medium 112 and 114 in FIG. 1 ), for processing by or controlling the operation of a data processing device, such as a programmable processor, a computer, or multiple computers. A computer program, such as the computer program(s) described above, may be written in any form of programming language, including compiled or interpreted languages, and may be implemented in any form, such as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program can be implemented and processed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communications network.

[0065]

[0069] Each method step may be performed by one or more programmable processors that execute a computer program to perform the function by performing operations on input data and generating output. Each method step may also be performed by, or an apparatus may be implemented as, special purpose logic circuitry, such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0066]

[0070] Processors suitable for processing a computer program include, by way of example, both general-purpose and special-purpose microprocessors, and any one or more processors of any kind of digital computer. Typically, a processor will receive instructions and data from a read-only memory or a random-access memory, or both. Each element of a computer may include at least one processor for executing instructions and one or more storage devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices, such as magnetic, magneto-optical, or optical disks, for storing data, or be operatively coupled to receive data from or transfer data to such storage devices, or both. Information carriers suitable for carrying computer program instructions and data include, by way of example, all forms of non-volatile memory, including semiconductor storage devices, such as EPROM, EEPROM, and flash memory devices, magnetic disks, such as internal hard disks or removable disks, magneto-optical disks, and CD-ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0067]

[0071] To facilitate interaction with a user, implementations may be implemented in a computer that has a display device, such as a liquid crystal display (LCD or LED) monitor or a touchscreen display, for displaying information to the user, and a keyboard and pointing device, such as a mouse or trackball, that allows the user to provide input to the computer. Other types of devices may also be used to facilitate interaction with the user; for example, feedback presented to the user may be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback, and input from the user may be received in any form, including acoustic, speech, or tactile input.

[0068]

[0072] Each implementation may be implemented in a computing system that includes back-end components, such as data servers, or middleware components, such as application servers, or front-end components, such as client computers having a graphical user interface or web browser through which a user can interact with an implementation, or any combination of such back-end, middleware, or front-end components. Components may be interconnected by any form or medium of digital data communication, such as a communications network. Examples of communications networks include local area networks (LANs) and wide area networks (WANs), such as the Internet.

[0069]

[0073] While certain features of the described implementations have been illustrated as set forth herein, many modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. It is therefore to be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of each implementation. It should be understood that these have been presented by way of example only, and not by way of limitation, and that various changes in form and detail may be made. Any portion of the apparatus and / or methods described herein may be combined in any combination, except in mutually exclusive combinations. Each implementation described herein may include various combinations and / or subcombinations of the functions, components, and / or features of the various implementations described.

Claims

1. generating, by a first processor of a first computing device, a plurality of symbols based on input data; applying a permutation to each symbol from the plurality of symbols using a permutation matrix to generate a plurality of permuted symbols, wherein a unitary matrix of size N×N, where N is a positive integer, includes the permutation matrix and a block U(M) matrix, where M is a positive integer having a value less than N; transforming each symbol from the permuted symbols using the block U(M) matrix to generate transformed symbols; sending signals representing the transformed symbols to a plurality of transmitters to transmit the signals representing the transformed symbols from the plurality of transmitters to a plurality of receivers; sending a signal representing the unitary matrix to a second computing device for transmitting the unitary matrix to the plurality of receivers before transmitting the signals representing the transformed symbols from the plurality of transmitters to the plurality of receivers to recover the plurality of symbols at the plurality of receivers; A method comprising:

2. 2. The method of claim 1 , wherein the permutation matrix is ​​a first permutation matrix, applying the permutation is further based on at least a second permutation matrix, and transforming each symbol from the permuted plurality of symbols is further based on a block U(L) matrix, where L is a positive integer having a value less than or equal to N.

3. The method of claim 1 , wherein the unitary matrix comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix.

4. The method of claim 1 , wherein said application of said substitution is not immediately followed by another substitution.

5. The block U(M) matrix is ​​a block U(2) matrix, and constructing the unitary matrix is ２ The method of claim 1 , comprising an iterative process occurring N times.

6. The method of claim 1 , wherein the block U(M) matrix comprises a plurality of relatively small matrices of various dimensions.

7. 10. The method of claim 1, wherein the plurality of receivers comprises a plurality of antenna arrays, and the plurality of receivers and the plurality of transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

8. a plurality of signal receivers; a plurality of signal transmitters; at least one processor operably coupled to the plurality of signal transmitters; Equipped with the at least one processor: generating a plurality of symbols based on input data; Decomposing a matrix operation of a unitary transformation matrix of size NxN, where N is a positive integer, into a set of layers, each layer including a permutation operation and a block U(M) matrix operation, where M is a positive integer having a value less than N; encoding each symbol from the plurality of symbols using at least one layer from the set of layers to generate a transformed plurality of symbols; sending signals representing the transformed symbols to a plurality of signal transmitters to transmit the signals representing the transformed symbols from the plurality of signal transmitters to the plurality of signal receivers; sending at least one signal representing each layer from the set of layers to the plurality of signal receivers before transmitting the signals representing the transformed plurality of symbols to the plurality of signal receivers, so that the plurality of signal receivers recover the plurality of symbols from the transformed plurality of symbols based on the set of layers; A system that is configured to:

9. 9. The system of claim 8, wherein the plurality of signal receivers comprises a plurality of antenna arrays, and the plurality of signal receivers and the plurality of signal transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

10. The system of claim 8 , wherein the unitary transformation matrix comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix.

11. The block U(M) matrix is ​​a block U(2) matrix, and the set of layers is log ２ The system of claim 8 comprising N layers.

12. The system of claim 8 , wherein the plurality of signal receivers are configured to transmit signals representing the transformed plurality of symbols to a target device.

13. generating, by a first processor of a first computing device, a plurality of symbols; repeatedly applying a matrix transformation of size N×N, where N is a positive integer, to each symbol from the plurality of symbols to generate a transformed plurality of symbols, the matrix transformation comprising: 1) a permutation followed by 2) application of at least one block U(M) matrix, where M is a positive integer having a value less than N; sending signals representing the transformed symbols to a plurality of signal transmitters to transmit the signals representing the transformed symbols from the plurality of signal transmitters to a plurality of signal receivers; sending a signal representing the matrix transformation to a second computing device for transmitting the matrix transformation to the plurality of signal receivers prior to transmitting the transformed symbols to recover the plurality of symbols at the plurality of signal receivers; A method comprising:

14. 14. The method of claim 13, wherein the plurality of signal receivers comprises a plurality of antenna arrays, and the plurality of signal receivers and the plurality of signal transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

15. The method of claim 13 , wherein the matrix-based transformation comprises a unitary transformation.

16. The method of claim 13 , wherein the matrix-based transform comprises one of a Fourier transform, a Walsh transform, a Haar transform, a gradient transform, or a Toeplitz transform.

17. Each block U(M) matrix from the at least one block U(M) matrix is ​​a block U(2) matrix, and repeatedly applying a transformation using the matrix is ​​performed using a log ２ The method of claim 13 , wherein the method is performed N times.

18. applying a permutation to each symbol from a plurality of symbols using a permutation matrix to generate a plurality of permuted symbols, wherein a unitary matrix of size N×N, where N is a positive integer, comprises the permutation matrix and a block U(M) matrix, where M is a positive integer having a value less than N; transforming each symbol from the permuted symbols using the block U(M) matrix to generate transformed symbols; sending signals representing the transformed symbols to a plurality of transmitters to transmit the signals representing the transformed symbols from the plurality of transmitters to a plurality of receivers; sending a signal representing the unitary matrix to a computing device to cause transmission of the unitary matrix to the plurality of receivers and enable recovery of the plurality of symbols at the plurality of receivers; A method comprising:

19. 19. The method of claim 18, wherein the permutation matrix is ​​a first permutation matrix, the block U(M) matrix is ​​a first block U(M) matrix, applying the permutation is further based on at least a second permutation matrix, and transforming each symbol from the permuted plurality of symbols is further based on a second block U(M) matrix.

20. 20. The method of claim 18, wherein the unitary matrix comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix.

21. 20. The method of claim 18, wherein said application of said substitution is not immediately followed by another substitution.

22. The block U(M) matrix is ​​a block U(2) matrix, and constructing the unitary matrix is ２ 20. The method of claim 18, comprising an iterative process occurring N times.

23. 20. The method of claim 18, wherein the block U(M) matrix comprises a plurality of relatively small matrices of various dimensions.

24. 20. The method of claim 18, wherein the plurality of receivers comprises a plurality of antenna arrays, and the plurality of receivers and the plurality of transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

25. a plurality of signal receivers; a plurality of signal transmitters; at least one processor operably coupled to the plurality of signal transmitters; Equipped with the at least one processor: Decomposing a matrix operation of a unitary transformation matrix, which is an NxN matrix, where N is a positive integer, into a set of layers, each layer including a permutation operation and at least one block U(M) matrix operation, where M is a positive integer having a value less than N; encoding each symbol from the plurality of symbols using at least one layer from the set of layers to generate a transformed plurality of symbols; sending signals representing the transformed symbols to a plurality of signal transmitters to cause transmission of the signals representing the transformed symbols from the plurality of signal transmitters to the plurality of signal receivers; sending at least one signal representing each layer from the set of layers to the plurality of signal receivers before transmitting the signals representing the transformed plurality of symbols to the plurality of signal receivers, such that the plurality of signal receivers recover the plurality of symbols from the transformed plurality of symbols based on the set of layers; A system that is configured to:

26. 26. The system of claim 25, wherein the plurality of signal receivers comprises a plurality of antenna arrays, and the plurality of signal receivers and the plurality of signal transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

27. 26. The system of claim 25, wherein the unitary transformation matrix comprises one of a Fourier matrix, a Walsh matrix, a Haar matrix, a gradient matrix, or a Toeplitz matrix.

28. The block U(M) matrix is ​​a block U(2) matrix, and the set of layers is log ２ 26. The system of claim 25, comprising N layers.

29. 26. The system of claim 25, wherein the plurality of signal receivers are configured to transmit signals representing the transformed plurality of symbols to a target device.

30. repeatedly applying, by a processor, to each symbol from the plurality of symbols a transform with a matrix of size N×N, where N is a positive integer, to generate a transformed plurality of symbols, the transform comprising: 1) a permutation followed by 2) application of at least one block U(M) matrix, where M is a positive integer; sending signals representing the transformed symbols to a plurality of signal transmitters to cause transmission of the signals representing the transformed symbols from the plurality of signal transmitters to a plurality of signal receivers; sending a signal representing the matrix transformation to a computing device to cause transmission of the matrix transformation to the plurality of signal receivers and enable recovery of the plurality of symbols at the plurality of signal receivers; A method comprising:

31. 31. The method of claim 30, wherein the plurality of signal receivers comprises a plurality of antenna arrays, and the plurality of signal receivers and the plurality of signal transmitters are configured to perform multiple-input multiple-output (MIMO) operations.

32. 31. The method of claim 30, wherein the matrix-based transformation comprises a unitary transformation.

33. 31. The method of claim 30, wherein the matrix-based transform comprises one of a Fourier transform, a Walsh transform, a Haar transform, a gradient transform, or a Toeplitz transform.

34. Each block U(M) matrix from the at least one block U(M) matrix is ​​a block U(2) matrix, and repeatedly applying a transformation using the matrix is ​​performed using a log ２ 33. The method of claim 32, wherein the method is performed N times.

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