Plasma treatment method

Abstract

In order to provide a plasma processing method capable of achieving both suppression of pattern collapse and vertical processed shape, the present invention provides a plasma processing method for plasma-etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, the plasma processing method comprising a first step for plasma-etching the film to be etched using the mask of the carbon-containing film and the mask of the inorganic film, a second step for trimming the mask of the carbon-containing film after the first step, and a third step for overetching the film to be etched after the second step.

Description

[Technical Field]

[0001] The present invention relates to a plasma processing method for processing semiconductor devices using plasma. [Background technology]

[0002] As semiconductor device processing speeds increase, pattern miniaturization is progressing year by year, and as pitch sizes become smaller, high-precision miniaturization processing technologies are required. In the field of so-called dry etching, which uses plasma to etch a film to be processed, a method for miniaturizing patterns has generally been used in which a carbon-based mask is trimmed by dry etching before processing the material to be etched, thereby reducing the processing dimensions of the material to be etched (see, for example, Patent Document 1). In addition, pattern collapse has been suppressed by reducing the processing dimensions during processing of the material to be etched (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-89827 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-234870 DISCLOSURE OF THE INVENTION [Problem to be solved by the invention]

[0004] In recent years, patterns have become higher in aspect ratio due to the progress of pitch size reduction, and when a carbon-based mask is trimmed using the technology described in Patent Document 1, the carbon-based mask pattern becomes thinner, significantly reducing its plasma resistance, and the semiconductor material to be etched is etched, increasing the probability of the semiconductor wiring collapsing sideways, which is known as pattern collapse. This places a limit on the amount of reduction in processing dimensions.

[0005] Furthermore, the technology described in Patent Document 2 is insufficient in suppressing pattern collapse for recent high aspect structures. Furthermore, when the above technology is used, etching does not progress easily in the lower part of the film to be etched, and the lower part of the pattern spreads in the width direction, which is called a skirt shape, and there is a concern that perpendicular processing cannot be achieved.

[0006] An object of the present invention is to provide a plasma processing method that can simultaneously suppress pattern collapse and produce a vertical processed shape. [Means for solving the problem]

[0007] The present invention has the following configuration to achieve the above object.

[0008] A plasma processing method for plasma etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, the method comprising: a first step of plasma etching the film to be etched using the mask of the carbon-containing film and the mask of the inorganic film; a second step of trimming the mask of the carbon-containing film after the first step; and a third step of over-etching the film to be etched after the second step. In the third step, the high frequency power supplied to the sample stage on which the sample having the film to be etched is placed is greater than the high frequency power in the first step, or the duty ratio of the pulse-modulated high frequency power supplied to the sample stage in the third step is greater than the duty ratio in the first step. Plasma treatment method. [Effects of the Invention]

[0009] The present invention can provide a plasma processing method that can suppress pattern collapse and simultaneously produce a vertical processed shape. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a schematic cross-sectional view of a plasma etching apparatus according to the present invention. [Figure 2] FIG. 2 is a schematic diagram showing the structure of a sample used in an example of the present invention. [Figure 3] 3A to 3C are diagrams showing the progress of etching of a semiconductor substrate according to an embodiment of the present invention; [Figure 4] 1A and 1B are diagrams showing the progress of etching of a semiconductor substrate when a conventional technique is used; [Figure 5]FIG. 10 is a diagram showing a comparison of etching results between the conventional technique and the technique of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0011] A plasma processing apparatus used in an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a schematic vertical cross-sectional view of an ECR (Electron Cyclotron Resonance) microwave plasma etching apparatus used in this embodiment. A shower plate 105 (e.g., made of quartz) for introducing processing gas into the vacuum vessel 101 and a dielectric window 106 (e.g., made of quartz) are installed on top of a vacuum vessel 101 with an open top, and the vessel is then sealed to form a processing chamber 107.

[0012] The shower plate 105 has a plurality of holes for allowing the flow of processing gas, and gas supplied from a gas supply unit 108 passes through the plurality of holes and is introduced into the processing chamber 107. A vacuum exhaust unit (not shown) is connected to the vacuum vessel 101 via a vacuum exhaust port 109. A waveguide 110 for transmitting electromagnetic waves is provided above the dielectric window 106 to transmit power for generating plasma to the processing chamber 107.

[0013] The high frequency wave (plasma generating high frequency wave) transmitted to the waveguide 110 is generated from an oscillator 103 under the control of a first high frequency power supply 104. In addition, the first high frequency power supply 104 includes a pulse oscillator, and therefore can generate a time-modulated intermittent high frequency wave or a continuous high frequency wave.

[0014] Although the frequency of the radio frequency is not particularly limited, a 2.45 GHz microwave (plasma generating radio frequency) is used in this embodiment. A magnetic field generating coil 111 that forms a magnetic field is provided on the outer periphery of the processing chamber 107. The power oscillated by the oscillator 103 interacts with the formed magnetic field to generate high density plasma within the processing chamber 107.

[0015] The magnetic field generating coil 111 is covered with a coil case 112. A sample stage 102 is provided below the vacuum chamber 101, facing the shower plate 105. The electrode surface of the sample stage 102 is covered with a sprayed film (not shown), and a DC power supply 117 is connected to the sample stage 102 via a high-frequency filter 116. A second high-frequency power supply 115, which is a bias high-frequency power supply, is connected to the sample stage 102 via a matching circuit (matching box) 114.

[0016] A temperature regulator (not shown) is also connected to the sample stage 102. A wafer 113 is transported to the processing chamber 107 of the vacuum vessel 101 by a transport means (not shown) and placed on the sample stage 102. The wafer 113, which is the sample transported into the processing chamber 107, is attracted to the sample stage 102 by the electrostatic force of a DC voltage applied from a DC power supply 117, and the temperature is adjusted.

[0017] After a desired processing gas is supplied to the processing chamber 107 by the gas supply device 108, the pressure inside the vacuum vessel 101 is controlled to a predetermined level via the vacuum exhaust device, and high frequency power is supplied from the oscillator 103 into the processing chamber 107 to generate plasma inside the processing chamber 107. By applying high frequency power from the second high frequency power supply 115 connected to the sample stage 102, ions are attracted from the plasma to the wafer, and the wafer 113 is subjected to plasma processing (etching).

[0018] Furthermore, the second high frequency power supply 115 is equipped with a pulse oscillator, and therefore can apply time-modulated intermittent high frequency power or continuous high frequency power to the sample stage 102 . [Example]

[0019] An example of the present invention using the above-described plasma processing apparatus will now be described. Figure 2 is a schematic diagram showing the structure of the sample used in the example of the present invention. Figure 2(a) is a three-dimensional view of the test sample, which has a line pattern structure. Figure 2(b) is a cross-sectional view of the test sample.

[0020] From the top, an ACL (Atomic Carbon Layer, 100 nm thick) 201, SiN (40 nm thick) 202, Poly Si (90 nm thick) 203, and SiO (300 nm thick) 204 are placed on a silicon substrate with a diameter of 12 inches, and the ACL is a mask with a line pattern with a line width of 25 nm.

[0021] The etching process performed in one embodiment of the present invention is shown in Figure 3(a) and subsequent figures. Figure 3(b) shows the process of etching the SiN inorganic film mask using the ACL carbon-containing film as a mask (pretreatment for plasma treatment; hereinafter, this may be referred to as "pretreatment"). Figure 3(c) shows the first step of the present invention, in which the PolySi film to be etched is etched vertically (in the depth direction) and laterally (in the width direction) using the ACL and SiN as masks. Figure 3(d) shows the second step of the present invention, in which the ACL carbon-containing film mask is trimmed to the width of the PolySi. Figure 3(e) shows the third step of the present invention, in which the PolySi film to be etched is overetched.

[0022] Table 1 shows examples of processing conditions for the pretreatment step and the first to third steps of the present invention.

[0023] [Table 1] The pretreatment step uses a mixture of CHF3, Ar, and O2 as the etching gas, and etches the SiN inorganic film mask using the ACL as a mask. The CHF3 content (volume %) in the mixed gas is preferably 20 to 50% (under the conditions listed in Table 1, the CHF3 content is (70 / (170 + 70 + 5)) * 100 ≒ 28.6%). A content greater than 50% is undesirable because the etching rate becomes too high. A content less than 20% results in a too slow etching rate, resulting in a long process time. The mixed gas pressure in Table 1 is 0.8 Pa, but this can be achieved under conditions of 0.1 to 3.0 Pa, which is the pressure range for typical etching gases.

[0024] From the viewpoint of shape control, the effective power of the RF bias (the product of power and duty; for example, if the power is 800 W in Table 1 and the duty is 25%, the effective power is 200 W) is preferably in the range of 100 W to 300 W. If the effective power is less than 100 W, it is difficult to ensure vertical etching, and if it is more than 300 W, it is difficult to ensure mask selectivity.

[0025] Specific processing conditions for the steps of the present invention are described below. The first step of the present invention uses a mixed gas of CF4, N2, and O2 as the etching gas. While vertically etching the polysilicon material (the etched material) using ACL and SiN as a mask, horizontally etching the SiN inorganic film mask and the polysilicon material (the etched material) is performed, thereby reducing the pattern size. The horizontal to vertical etching ratio can be adjusted by adjusting the mixture ratio of N2 and O2. It is preferable to use 10% to 30% (volume %) of N2 and 5% to 15% (volume %) of O2 (under the conditions listed in Table 1, N2: approximately 27% and O2: approximately 8%). From the perspective of in-plane uniformity, a processing pressure of 0.4 to 0.8 Pa is preferred. From the perspective of shape control, it is preferable to use the lower limit of microwave power, 400 W to 600 W. Microwave powers above 600 W result in significant deviation, making vertical shape control difficult. It is preferable to adjust the power and duty of the RF bias so that the effective power is 80 W to 120 W. If it is less than 80 W, the lateral etching will be slower than the vertical etching, and if it is more than 120 W, the lateral etching will be faster than the vertical etching, making it impossible to obtain a vertical shape.

[0026] The second step of the present invention uses O2, N2, and Ar as etching gases, and applies a small RF bias (10 W in Table 1) to trim the ACL mask, which is a carbon film mask, to a line width of 15 nm. The O2 mixture ratio is preferably 20 to 40% (volume %) from the perspective of etching rate control. From the perspective of uniformity of the trimming width, it is preferable to use an effective power of 5 W to 20 W for the RF bias. If it is less than 5 W, deposits will adhere and there will be areas where trimming is slow, and if it is more than 20 W, the height of the ACL mask will be excessively reduced.

[0027] The third step of the present invention uses CF4, SF6, N2, and He as etching gases. Using a carbon film ACL as a mask, the polysilicon is overetched to remove the skirting at the bottom of the polysilicon that occurs during the first step. The etching gas mixture is preferably 15-30% (volume %) CF4 and 30-60% (volume %) He to ensure vertical etching, with 2-7% (volume %) SF6 added to ensure the etching rate and remove the skirting. A duty of 25% or more is preferably used for the RF bias to ensure vertical etching and the etching rate to remove the skirting. Duty less than 25% makes it difficult to remove the skirting and ensure verticality. Under the etching conditions used here, lateral etching of the polysilicon does not occur, allowing the etching to maintain the feature dimensions formed in the upper layer.

[0028] <Comparative Example> Figure 4 shows the shape of the result of etching using conventional technology. With conventional technology, when reducing the line width of the PolySi to 15 nm, the ACL mask is trimmed (second step) to thin it before etching the SiN and PolySi (first step). This increases the aspect ratio of the ACL mask, significantly reducing its plasma resistance, and this can cause the ACL mask to collapse during PolySi etching (first step). Furthermore, during PolySi etching (first step), a step occurs due to the difference in reduction ratio between the carbon-based mask (ACL) and the inorganic film (SiN and PolySi). This step acts as a mask, preventing the lower part of the PolySi from being etched, resulting in a skirt shape.

[0029] The feature of this invention is that by inserting the second step of trimming during the first step of etching the Poly Si, the pattern size can be reduced after the ACL mask height is reduced, so that pattern collapse does not occur.Furthermore, by inserting the third step of over-etching after the ACL mask size is reduced, the skirt shape is removed and a vertical shape is obtained.

[0030] As a result, in this test, using a mask pattern showing an initial dimension of 25 nm, it was possible to achieve Poly Si wiring processing with a line width of 15 nm and a film thickness of 90 nm without any breaks or bends.

[0031] Similarly, when attempting to achieve Polysilicon wiring processing with a line width of 15 nm and a film thickness of 90 nm by simply trimming the initial ACL mask under the conditions of Figure 4, which is the conventional technology, the photoresist pattern of the ACL mask collapsed during Polysilicon etching, causing problems such as breaks and bends in the polysilicon wiring.

[0032] Figure 5 shows a comparison of etching results using the conventional technology and the technology of the present invention. In Figure 5(a), the horizontal axis shows inline CD, which indicates the pattern dimension, and the vertical axis shows LER (line edge roughness), which is an index of the extent of pattern collapse. With the conventional technology, the LER deteriorates significantly as the inline CD decreases, whereas with the technology of the present invention, the deterioration of LER is suppressed.

[0033] Figure 5(b) shows a comparison of the LER and skirt shape results for the conventional technology and the technology of the present invention when the inline CD was 15 nm in this test. By using the technology of the present invention, the LER improved from 3.6 nm to 1.4 nm, and the skirt shape also improved from 2.6 nm with the conventional technology to 0.6 nm. Therefore, the technology of the present invention suppressed pattern collapse and skirt shape.

[0034] The present embodiment is a process condition optimized for a test sample of a semiconductor device, and the processing method for Poly Si, SiN, and ACL is not limited to the present working conditions.

[0035] Although the present invention has been described with reference to a polysilicon wiring process, it is not limited thereto, and the method of the present invention can also be applied to wiring processes of materials other than polysilicon in semiconductor device manufacturing processes, such as Si, SiN, SiO, SiON, TiN, WSi, etc. Furthermore, the processing of inorganic mask films is not limited to SiN, and can also be applied to processing Si, SiO, SiON, TiN, WSi, etc. It is preferable to determine the optimum values ​​for the gases to be used and the processing conditions depending on the material to be processed.

[0036] Although the present invention uses a plasma etching apparatus using microwaves and a magnetic field, it is applicable regardless of the plasma generation method. For example, the same effect can be obtained when using a helicon wave etching apparatus, an inductively coupled etching apparatus, a capacitively coupled etching apparatus, etc. [Explanation of symbols]

[0037] 101 vacuum vessel, 102 wafer mounting electrode, 103 electromagnetic wave generating power supply, 104 first high frequency power supply, 105 shower plate, 106 dielectric window, 107 processing chamber, 108 gas supply device, 109 vacuum exhaust port, 110 waveguide, 111 magnetic field generating coil, 112 coil case, 113 wafer, 114 matching circuit, 115 second high frequency power supply, 116 high frequency filter, 117 DC power supply, 201 carbon-based film, 202 inorganic film, 203 film to be etched, 204 base film.

Claims

1. 1. A plasma processing method for plasma etching a film to be etched using a carbon-containing film mask and an inorganic film mask, comprising: a first step of plasma etching the film to be etched using a mask of the carbon-containing film and a mask of the inorganic film; a second step of trimming the mask of the carbon-containing film after the first step; a third step of over-etching the film to be etched after the second step, A plasma processing method characterized in that in the third step, the high-frequency power supplied to the sample stage on which the sample having the etching target film is placed is greater than the high-frequency power in the first step, or the duty ratio of the pulse-modulated high-frequency power supplied to the sample stage in the third step is greater than the duty ratio in the first step.

2. 2. The plasma processing method according to claim 1, a second step for reducing the size of the inorganic film mask;

3. 2. The plasma processing method according to claim 1, The plasma processing method is characterized in that the inorganic film is a silicon nitride film (SiN), a silicon film (Si), or a silicon oxide film (SiO).

4. 2. The plasma processing method according to claim 1, The plasma processing method is characterized in that the film to be etched is a polysilicon film (Poly-Si).

5. 2. The plasma processing method according to claim 1, the inorganic film is a silicon nitride (SiN) film, The plasma processing method is characterized in that the film to be etched is a polysilicon film (Poly-Si).

6. 2. The plasma processing method according to claim 1, The plasma in the first step is a mixture of a fluorine-containing gas and N ２ Gas and O ２ 1. A method for treating plasma, characterized in that the plasma is generated from a mixture of gases.

7. 6. The plasma processing method according to claim 5, The plasma in the first step is a mixture of a fluorine-containing gas and N ２ Gas and O ２ 1. A method for treating plasma, characterized in that the plasma is generated from a mixture of gases.

8. 7. The plasma processing method according to claim 6, The fluorine-containing gas is CF ４ A plasma processing method characterized in that the gas is a plasma.

9. 8. The plasma processing method according to claim 7, The fluorine-containing gas is CF ４ A plasma processing method characterized in that the gas is a plasma.

10. The plasma processing method according to claim 4, The over-etching is performed using CF ４ Gas, He gas, and SF ６ Gas and N ２ A plasma processing method characterized by using plasma generated by a mixture of gases.

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