Display device, display device speed control method, and computer-readable medium
The speed control method for OLED displays optimizes compression by adjusting quantization precision based on pixel and memory availability, addressing inefficiencies in existing rate control methods and enhancing image quality by efficiently fitting compressed data into the buffer.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-09
- Publication Date
- 2026-03-11
AI Technical Summary
Existing rate control methods for OLED displays require a large number of iterations to determine the appropriate amount of compression, leading to inefficiencies in fitting compressed data into the display device's buffer.
A speed control method that adjusts quantization precision based on the number of pixels and available memory, using a novel compression algorithm to determine the appropriate amount of compression with fewer iterations, incorporating stress data accumulation and dithering to optimize data fitting into the buffer.
The method allows for efficient compression of stress data into the display device's buffer with reduced computational burden, improving image uniformity and reducing image degradation issues in OLED displays.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a display device, a method for controlling the speed of a display device, and a computer-readable medium.
[0002] This application claims priority to U.S. Patent Application No. 63 / 162,439, filed with the United States Patent and Trademark Office on March 17, 2021, the entire contents of which are incorporated herein by reference. [Background technology]
[0003] Light-emitting elements, such as the organic light-emitting diodes (OLEDs) in OLED displays, can degrade over time with use, resulting in a loss of output. OLED degradation is the gradual decrease in brightness that an OLED display experiences over time, and the amount of degradation depends on the content of the image displayed on the display (e.g., the higher the pixel value, the more current is drawn and the greater the degradation).
[0004] One type of OLED degradation is called differential degradation, where brightness loss varies from pixel to pixel, which can cause "image sticking" or "ghosting." Display aging can be compensated for by maintaining image quality using a compensation method that compensates for the decrease in display output even after the display has been used for a long time.
[0005] Speed control is a compensation method that continuously adjusts the amount of quantization depending on the number of pixels remaining in the image to be compressed, based on the amount of memory available in the display device's buffer. Speed control adjusts the quantization (e.g., by adjusting the accuracy) to compress the stress profile to an appropriate size.
[0006] However, some rate control methods (e.g., log-search rate control) may require six or more iterations to determine the amount of compression sufficient to fit the compressed data into the buffer.
[0007] Therefore, it is necessary to determine a rate control method that can determine the appropriate amount of compression with fewer iterations.
[0008] The information described in the Background Art is intended to deepen understanding of the present invention and may include technical information obtained in the process of arriving at the concept of the invention, and therefore may include information that does not constitute prior art. Summary of the Invention [Problem to be solved by the invention]
[0009] The problem to be solved by the present invention is to provide a rate control method that can determine an appropriate amount of compression with fewer iterations. [Means for solving the problem]
[0010] According to an embodiment of the present invention, a speed control method for a display device includes receiving compressed stress data for a slice of the display device, expanding the compressed stress data to obtain reconstructed stress data for the slice, adding additional stress data to the reconstructed stress data to obtain updated stress data for the slice, and adjusting the updated stress data to a first precision level (p). c ) to generate first updated compressed stress data for the slice, and c ) is the size of the buffer (b t) in response to the first accuracy level (p), determining a second accuracy level (p), and encoding the updated stress data at the second accuracy level (p) to generate second compressed updated stress data, wherein determining the second accuracy level (p) c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b ) based on
[0011] The step of determining the second accuracy level (p) may be performed by determining the second accuracy level (p) as [(p c -p m )b t / b c ]+p m [p m is the third accuracy level (p s ) and the fourth accuracy level (p b ) the smaller of the two.
[0012] The speed control method includes: adjusting the third accuracy level (p) of the additional stress data based on a most significant bit (MSB) of the additional stress data; s ) of the buffer based on the most significant bits of the data in the buffer, and b )
[0013] The step of determining the second accuracy level (p) comprises determining the second accuracy level (p) as p c b t / b c The step of setting the same as
[0014] The first accuracy level (p c ) may be the level of accuracy used to generate the compressive stress data.
[0015] The speed control method may further include adding dither to the restored stress data in addition to the additional stress data to determine the updated stress data for the slice.
[0016] The rate control method may further include determining whether the second compressed updated stress data fits within the buffer, and storing the second compressed updated stress data in the buffer.
[0017] A display device according to an embodiment of the present invention includes a buffer for storing compressed stress data, a decoding circuit for receiving the compressed stress data for a slice of the display device and decompressing the compressed stress data to obtain reconstructed stress data for the slice, an adder circuit for adding additional stress data to the reconstructed stress data to obtain updated stress data for the slice, and an adder circuit for adding the updated stress data to a first precision level (p c a coding circuit for coding the first updated compressed stress data for the slice by a size (b c ) is the size of the buffer (b t a processor for determining a second accuracy level (p) in response to the first accuracy level (p) being greater than the first accuracy level (p) c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b ), and the encoding circuit encodes the updated stress data with the second accuracy level (p) to generate second compressed updated stress data.
[0018] The processor sets the second accuracy level (p) as [(pc -p m )b t / b c ]+p m [p m is the third accuracy level (p s ) and the fourth accuracy level (p b ) (the smaller of the two).
[0019] The processor determines the third accuracy level (p) of the additional stress data based on a most significant bit (MSB) of the additional stress data. s ) of the buffer based on the most significant bits of the data in the buffer, and b ) can be determined.
[0020] The processor sets the second accuracy level (p) to p c b t / b c The second accuracy level (p) can be determined by setting it equal to:
[0021] The first accuracy level (p c ) may be the accuracy level used to generate the compressive stress data stored in the buffer.
[0022] The display device may further include a dithering circuit for applying a dither to the restored stress data in addition to the additional stress data to determine the updated stress data for the slice.
[0023] The apparatus may further include a memory controller that stores the second compressed updated stress data in the buffer.
[0024] According to one embodiment of the present invention, a medium is provided as a non-transitory computer readable medium provided together with a display device, and includes computer code that, when executed by a processor, performs control in a speed control method for the display device, the speed control method including the steps of receiving compressed stress data for a slice of the display device, decompressing the compressed stress data to obtain reconstructed stress data for the slice, adding additional stress data to the reconstructed stress data to obtain updated stress data for the slice, and adjusting the updated stress data to a first precision level (p). c ) to generate first updated compressed stress data for the slice, and c ) is the size of the buffer (b t ) in response to the first accuracy level (p), determining a second accuracy level (p), and encoding the updated stress data at the second accuracy level (p) to generate second compressed updated stress data, wherein determining the second accuracy level (p) c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b ) based on
[0025] The computer code, when executed by the processor, adjusts the second accuracy level (p) to [(p c -p m )b t / b c ]+p m [p m is the third accuracy level (p s ) and the fourth accuracy level (p b) (the smaller of the two).
[0026] The computer code, when executed by the processor, determines the third accuracy level (p) of the additional stress data based on a most significant bit (MSB) of the additional stress data. s ) of the buffer based on the most significant bits of the data in the buffer, and b The rate control method can be performed by determining
[0027] The first accuracy level (p c ) may be the level of accuracy used to generate the compressive stress data.
[0028] The computer code, when executed by the processor, can perform the rate control method by adding the additional stress data and adding dither to the restored stress data to determine the updated stress data for the slice.
[0029] The computer code, when executed by the processor, may perform the rate control method by determining that the second compressed updated stress data will fit within the buffer and storing the second compressed updated stress data in the buffer. [Effects of the Invention]
[0030] In this way, a speed control method can be obtained that can determine the appropriate amount of compression with fewer iterations. [Brief explanation of the drawings]
[0031] [Figure 1] 1 is a block diagram of a display device according to an embodiment of the present invention; [Figure 2] 1 shows a block diagram of a display system with stress compensation using velocity control according to one embodiment of the present invention; [Figure 3] FIG. 10 is a conceptual diagram illustrating a method for performing stress correction using speed control according to an embodiment of the present invention. [Figure 4] 1 illustrates the worst case relationship between accuracy and buffer size (eg, entropy corresponding to complete randomness or maximum entropy) according to one embodiment of the present invention. [Figure 5] 1 shows a flow diagram of a method for determining accuracy according to one embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION
[0032] The concept of the present invention and the gist of the method for achieving the same can be easily understood from the detailed description and the accompanying drawings. An embodiment of the present invention will be described in detail with reference to the accompanying drawings. The present invention may be realized in various different forms and is not limited to the embodiments described herein. By providing such embodiments, the detailed description of the invention will be complete and comprehensive, and will fully convey various aspects and features of the invention to those skilled in the art. Therefore, descriptions of processes, devices, techniques, etc. that are not necessary for those skilled in the art to fully understand various aspects of the present invention will be omitted. Unless otherwise specified, the same reference numerals throughout the drawings and specification indicate the same elements, and therefore descriptions will not be repeated. Furthermore, portions unrelated to the description of the embodiments may be omitted for clarity.
[0033] The regions illustrated in the figures are schematic in nature, and their shapes are not intended to illustrate or limit the actual shapes of the regions. Additionally, those skilled in the art will recognize that the embodiments described herein may be modified in various other ways without departing from the spirit and scope of the present invention.
[0034] In the detailed description of the invention, various conditions are specified to provide a thorough description of various embodiments. However, it will be apparent that embodiments may be practiced without these specific conditions or their equivalents. Furthermore, one skilled in the art may suitably combine various features of two or more embodiments described herein without departing from the spirit and scope of the present invention. Instead, well-known structures and devices are shown in block diagram form to avoid unnecessarily obscuring the various embodiments.
[0035] Terms such as "first," "second," and "third" are used to refer to various elements, components, regions, layers, portions, and the like, but are not limited by such modifiers. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Thus, a first element, component, region, layer, or portion may also be referred to as a second element, component, region, layer, or portion without departing from the spirit and scope of the present invention. Describing an element as a "first" element does not imply or require the presence of a second element or other elements. Terms such as "first," "second," and the like can also be used to distinguish between different categories or sets of elements. For brevity, terms such as "first," "second," and the like can refer to a "first category (or first set)," a "second category (or second set)," and the like, respectively.
[0036] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present invention. Unless a number is specifically recited herein, the singular and plural are all inclusive. The expression "comprising" a feature, integer, step, operation, portion, component, etc., means that in addition to the relevant portion, a different feature, integer, step, operation, portion, component, etc. may also be included.
[0037] Herein, the terms "substantially," "about," "approximately," and similar terms are used to indicate approximations, not to indicate "degrees," and to describe the inherent error of measurements or calculations that would be apparent to one skilled in the art. The terms "about" and "approximately" include the stated value and the average within an acceptable error range for that value, which can be determined by one skilled in the art taking into account the measurement in question and the error associated with measuring a particular quantity (e.g., limitations of the measurement system). For example, "about" means one or more standard deviations or within ±30%, 20%, 10%, or 5% of the value in question. When describing embodiments of the present invention, the term "may" means that the term can be applied to "one or more embodiments of the present invention."
[0038] When particular embodiments are implemented differently, the order of certain processes may be performed in a different order than that described. For example, two processes described as being performed sequentially may be performed simultaneously or in the reverse order from that described.
[0039] The electronic, electrical devices and / or other related devices or components described in accordance with embodiments of the present invention may be implemented using appropriate hardware, firmware (e.g., application-specific integrated circuits (ASICs)), software, or a combination thereof. For example, various components of these devices may be formed on a single integrated circuit chip, or may be implemented on different integrated circuit chips. Furthermore, various components of these devices may be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board, or the like, or may be formed on a single substrate. Circuit hardware may include, for example, an application-specific integrated circuit (ASIC), a general-purpose or special-purpose central processing unit (CPU), a digital signal processor (DSP), a graphics processing unit (GPU), a field programmable gate array (FPGA), or other programmable logic device that executes instructions stored on a non-transitory storage medium.
[0040] Additionally, the various components of these systems may be processes or threads running on one or more processors within one or more computing devices that execute computer program instructions and interact with other system elements to perform the various functions described herein. The computer program instructions may be stored in memory implemented within the computing devices using standard memory devices such as random access memory (RAM). Moreover, one skilled in the art may combine or integrate the functionality of various computing devices into a single computing device, or distribute the functionality of a particular computing device across one or more other computing devices, without departing from the spirit and scope of embodiments of the present invention.
[0041] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which this invention belongs. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the relevant art and / or this specification, and should not be interpreted in an ideal or overly strict sense unless otherwise specified herein.
[0042] FIG. 1 is a block diagram of a display device according to an embodiment of the present invention.
[0043] Referring to FIG. 1, some image display devices may have characteristics that change with use. For example, an organic light-emitting diode (OLED) display device 100 may include a display panel 110 having a plurality of pixels, each of which may include a plurality of subpixels (e.g., red, green, and blue subpixels). Each subpixel may include an organic light-emitting diode (OLED) that emits light of a corresponding hue. The optical efficiency of an OLED typically decreases with use. Thus, continued operation of the OLED will result in a decrease in the OLED's optical output for a given current over time.
[0044] A decrease in the optical efficiency of the OLEDs causes a portion of the display panel 110 to appear darker than other portions. For example, if one region of the display panel 110 displays a brighter portion of an image on average than other regions, the OLED in that region is likely to be significantly deteriorated compared to the OLED in other regions. This decrease in the optical efficiency of some OLEDs may reduce the accuracy of image reproduction by the display device 100.
[0045] To reduce this non-uniformity in the light efficiency of the display device 100, the display device 100 may be equipped with a feature for compensating for the decrease in light efficiency of some OLEDs due to use of the display device 100. An example of such a feature is a method of using a memory to store the accumulated stress of each pixel and adjusting the operation of the display device accordingly using stress data corresponding to the accumulated stress. For example, degradation can represent reduced and modified gray scales with conditions that can be determined by a degradation profile or stress profile, and the stress profile can specify the acceleration of luminance loss experienced by the OLED device under known driving conditions. This stress profile can be stored in memory. However, since providing a memory that stores all of the stress data is expensive in terms of gate count and power, the memory size can be reduced using an image compression method.
[0046] As mentioned above, rate control allows the precision (degree of precision) to be continually adjusted based on the available memory in the buffer and the number of pixels remaining in the frame to be compressed. However, some rate control methods perform a relatively large number of iterations before determining a low enough precision so that the compressed data fits into the buffer [e.g., memory 120]. Here, precision refers to a quantization parameter similar to the quantization factor.
[0047] One embodiment of the present invention relates to compression rate control in an additive iterative compression system, which runs a stress profile on the data and determines a suitable degree of precision for the image data (e.g., determines a suitable quantization of the image data) in a relatively small number of iterations, allowing the compressed data to fit properly into a buffer. For example, one embodiment of the present invention may provide an efficient rate control method for an additive iterative compression system that uses not only a single compression but also information in the current stress data of a stress profile along with previously decompressed image data to predict an acceptable quantization in a few iterations. It should be noted that while the display device 100 has been described above as an OLED display device, the embodiments described herein may also be applied to other types of display devices.
[0048] According to one embodiment of the present invention, the display device 100 including the display panel 110 may further include a processor / processing circuit (115) and memory 120. The memory 120 may include a buffer and may internally store a stress profile (e.g., stress table data, stress data, or stress values) for the display panel 110. The stress data may be used to determine the amount of stress each subpixel will experience over the lifetime of the display device 100. The light efficiency of the subpixel may be estimated based on the stress. That is, an OLED may monotonically degrade depending on the amount of current flowing through it. The amount of stress of a subpixel corresponds to the total amount of current flowing through the subpixel over the lifetime of the display device 100 (e.g., how heavily stressed the subpixel is over time). Therefore, the stress data may be used to determine a correction level for each subpixel.
[0049] Thus, the loss of optical efficiency can be corrected by adjusting the drive current of each subpixel by an amount corresponding to the amount of stress indicated by the stress data. That is, the drive current of one or more subpixels is increased according to or proportional to the estimated loss of optical efficiency for each subpixel estimated by the stress data. Thus, the estimated loss of optical efficiency can be accumulated in a stress profile stored in memory 120. Increasing the drive current brings the light output closer to that of a subpixel that does not exhibit a loss of optical efficiency due to stress, thereby improving the uniformity of the image displayed on display panel 110. In one example of such a system, the drive current can be increased by increasing a digital value transmitted to one or more display digital-to-analog converters used to drive the pixels. Here, the digital value represents the drive current value. Thus, the drive current value can be increased as the corresponding stress accumulates (as opposed to, for example, directly adjusting the analog drive current).
[0050] FIG. 2 shows a block diagram of a display system that performs stress compensation using speed control according to one embodiment of the present invention.
[0051] Referring to Figure 2, a system 200 for performing stress compensation using speed control may be embodied in whole or in part by the processing circuitry 115 of the display device 100 shown in Figure 1. It should be noted that the terms "encoding" and "compressing," "encoded" and "compressed," "decoding" and "decompressing," and "decoded" and "decompressed" are used interchangeably herein.
[0052] To reduce non-uniformity in the light efficiency of a display device, different correction methods can be used to capture the amount of stress experienced by each subpixel of the display device over the lifetime of the display device, where stress can be defined as the total (e.g., time-integrated) drive current flowing through each subpixel over the lifetime of the display device. A stress profiler system can capture a stress profile of the display device by using a memory to accumulate stress levels each time a new image is displayed on the OLED display device.
[0053] In system 200, correction circuit 210 may receive input image data 250 corresponding to images to be displayed (e.g., on display panel 110 of display device 100 shown in FIG. 1). As will be described below, as a continuous stream of images is displayed on the display device, the drive current for each pixel in each image may be measured, and a number representing the current or brightness of each pixel may be added to the stress for that pixel stored in memory 205.
[0054] The compensation circuit 210 may calculate an adjusted drive current value using previously stored stress data (255, e.g., 16-bit stress values) received in the memory 205 (e.g., the buffer or memory 120 of the display device 100 shown in FIG. 1 ) to generate the output image data 260. That is, the compensation circuit 210 accesses the memory 205 to calculate an adjustment value for each pixel of the image displayed on the display panel 110. The compensation factor for each pixel is based on the cumulative stress value stored in the memory 205 for that pixel. According to an embodiment of the present invention, the input image data 250 and the output image data 260 may correspond to, but are not limited to, 10-bit pixel values.
[0055] The correction circuit 210 can calculate drive current adjustment values for the output image data 260 based on the raw drive current values indicated in the input image data 250. The output image data 260 can be used to generate a desired optical output for each subpixel based on the cumulative stress indicated by each stress value indicated in the previously stored stress data 255. The desired optical output can be generated using a mathematical model that predicts degradation using the time a pixel emits light based on experimentally obtained parameters, such as the initial output luminance, the time it takes for the pixel to decay to 50%, and an alpha exponent parameter that forms the curve. By inverting the equation corresponding to the mathematical model and varying the drive current value depending on the stress, the output image can be equalized (e.g., "flattened").
[0056] A stress conversion circuit 245 may receive drive current adjustment values in the output image data 260 that represent the current rate of accumulation of stress for a subpixel. The stress conversion circuit 245 then converts the drive current adjustment values to generate converted adjusted drive current values, known as stresses, 265. The drive current adjustment conversion values 265 may be generated by noting the magnitude of the drive current adjustment values and normalizing the drive current adjustment values based on the system frame rate, the number of pixels sampled per frame, and the maximum expected turn-on time of a pixel within the lifetime of the product, essentially providing a counter proportional to the amount of time the pixel is on.
[0057] Sub-pixel stress sampling circuit 215 may then receive drive current adjustment transform values 265. According to one embodiment of the present invention, sampling circuit 215 may sample only a subset of drive current adjustment transform values 265 in each video frame.
[0058] Next, previously stored stress data (e.g., reconstructed stress data 240 corresponding to one or more previously stored stress values of previously stored compressed stress data 295 stored in memory 205) may be incremented or amplified by the current stress accumulation rate in adder circuit 220 to generate adjusted stress data 280. For example, each stress value may be incremented by an amount proportional to the corresponding drive current adjustment value to generate adjusted stress data 280. That is, stress conversion circuit 245 and subpixel stress sampling circuit 215 may sample adjusted pixel values to be displayed on display panel 110, add the adjusted pixel values to the previously stored accumulated stress for each pixel, and then store the results back in memory 205.
[0059] The data may be processed according to memory requirements and then stored again in memory 205. For example, previously stored stress data may be received indirectly from memory 205 (e.g., via a memory controller (225), a decoding circuit (235), and a fetching circuit (275), as described below). Thus, the total amount of stress experienced by each pixel is accumulated over time and updated in memory 205.
[0060] Next, a dithering circuit 285 may apply dither to the adjusted stress data 280 to allow quantization to occur. However, it should be noted that, according to other embodiments of the present invention, the dithering circuit 285 may be omitted.
[0061] The adjusted stress data 280 and the applied dither may then be sent to an encoding circuit (230, e.g., a compression circuit). The encoding circuit 230 may compress the adjusted stress data 280 and the applied dither to generate compressed data (290). The memory controller 225 may then receive the compressed data 290.
[0062] The memory controller 225 controls read and write operations to the memory 205. Thus, the memory controller 225 can store compressed data 290 (e.g., a stress value increased by adding the current stress accumulation rate) in the memory 205. The memory controller 225 also receives the previously stored compressed stress data 295 from the memory 205. The memory controller 225 can provide the stress value of the previously stored compressed stress data 295 from the memory 205 to the decoding circuit 235.
[0063] The decoding circuit 235, which receives the previously stored compressed stress data 295 from the memory controller 225, may decompress the compressed stress data 295 to generate the reconstructed stress data 240. The extraction circuit 275 may receive the reconstructed stress data 240 and send it to the summing circuit 220 as the previously stored stress data so that the process may be repeated.
[0064] That is, the adder circuit 220 may add the additional stress data received from the sampling circuit 215 in the form of the drive current adjustment conversion value 265 described above to the reconstructed stress data 240 to generate updated stress data as the adjusted stress data 280. Thereafter, the encoding circuit 230 may encode the updated stress data (e.g., the reconstructed stress data 240 having the additional stress data and dither) at a first precision level (e.g., the current precision, p c)] to generate first updated compressed stress data / compressed data 290, which may be used to update or replace the previously stored compressed stress data 295 in memory 205.
[0065] For example, at the start, compressive stress data 295 is transferred from flash memory (J block 205 in FIG. 2) to SRAM "A" (K block 205 in FIG. 2). Next, the decode circuit 235 decodes the data from SRAM "A" and places the MSB of this data into SRAM "B" (L block 205 in FIG. 2). Note that the exact number of MSBs varies depending on the correction algorithm. The SRAM "B" data is used for correction circuit 210 data and remains essentially unchanged until the next update from SRAM "A", although accumulation continues in SRAM "A". The update interval for SRAM "B" varies depending on the correction algorithm. Another correction method is to decode the compressive stress data 295 directly from SRAM "A", and the decoded stress data is used by the correction circuit 210. Therefore, the stress profile can be communicated to the correction circuit 210 by allowing interaction between SRAM "A" and SRAM "B" and filling SRAM "A" from flash memory at the start and filling SRAM "B" with decoded SRAM "A".
[0066] Also, according to one embodiment of the present invention, if the compression ratio achieved during operation is not high enough (e.g., the precision p is not low enough) so that a compressed slice can fit within the portion of memory 205 allocated for storing the compressed representation of that slice, a truncation circuit (270) can truncate the original data (e.g., remove the least-significant bits (LSBs) of each data word) before correction circuit 210 performs the compression, thereby reducing the size of the compressed representation of the slice sufficiently to fit in memory. However, updating each stress value for each pixel for each video frame (e.g., each displayed image) can be computationally intensive.
[0067] FIG. 3 is a conceptual diagram showing a method for performing stress correction using speed control according to an embodiment of the present invention.
[0068] Referring to Figure 3, a compression method called stress profile compression reduces accuracy iteratively if the compressed stress data does not fit into a memory buffer (e.g., in memory 205 of Figure 2 or memory 120 of Figure 1). Stress profile compression is an incremental, iterative compression method and can also be considered memory compression, which is distinct from streaming compression. Unlike streaming compression, memory compression does not have an additional buffer to store the compressed data and instead compresses the data to fit within the available memory.
[0069] In stress profile compression, stress table data may be compressed and decompressed in blocks or slices. According to one embodiment of the present invention, each slice may correspond to four consecutive pixel rows. That is, stress profile compression is based on four-row slices. The four pixel rows of display panel 110 may be referred to as a slice of display device 100, and the corresponding slice of stress table data may be referred to as the stress profile of that slice. It should be noted that according to other embodiments of the present invention, n×m pixel blocks may be used instead of four-pixel row slices, where n and m are integers.
[0070] Stress profile compression involves taking one slice 310 (e.g., a 4-pixel row slice such as Slice 1) in compression memory 305 [e.g., a buffer in memory 205 in FIG. 2 or memory 120 in FIG. 1] and decompressing 315 the stress data in slice 310 [e.g., using decoding circuitry 235 in FIG. 2] to obtain reconstructed stress data [e.g., reconstructed stress data 240 in FIG. 2].
[0071] Stress data 320 [e.g., corresponding to drive current adjustment conversion value 265 received from stress conversion circuit 245 and sampling circuit 215 of FIG. 2 ] and optionally dither [e.g., by summing circuit 220 and / or dithering circuit 285 of FIG. 2 ] can then be added to the restored stress data to provide updated stress data (e.g., to continuously accumulate stress values).
[0072] [For example, the encoding circuit 230 of FIG. 2] can compress the updated stress data using a predicted precision (p) [e.g., the precision level (p) used to compress a previous slice, e.g., Slice 0, that was appropriately sized and successfully stored in the compression memory 305] to provide updated compressed stress data 325 [e.g., the first compressed updated stress data / compressed data 290 of FIG. 2] to the four-row slice.
[0073] Next, it is determined (330) whether the compressed four-line slice (e.g., first compressed update stress data) will fit into the portion of compressed memory 305 allocated for the four-line slice. However, the added stress data (320) added to the decompressed slice 310 may later cause the compressed update data to become too large, preventing the compressed update data from fitting into the allocated portion of compressed memory 305. If it is determined that the compressed update memory data is too large to fit entirely within compressed memory 305, the precision p may be reduced (335) by 1, and [e.g., encoder circuitry 230 of FIG. 2] slice 310 may be recompressed (325) to provide second compressed update memory data (e.g., a recompressed version of compressed data 290 of FIG. 2). The second compressed update memory data may then be measured again to determine (330) whether the compressed memory data will fit into compressed memory 305.
[0074] Under normal operating conditions, decreasing the precision p by 1 (335, e.g., by increasing the quantization step size by 1) reduces the entropy sufficiently so that the compressed update data can fit into the corresponding slice of compression memory 305. Once the compressed data can fit into compression memory 305, [e.g., memory controller 225 of FIG. 2] may store (340) the compressed data in compression memory 305. The process may then be repeated for the next slice 310 (e.g., Slice 2).
[0075] However, under unusual operating conditions, such as when dealing with relatively high stress values [e.g., when the additional stress data 320 is large] or in high stress situations (e.g., greater than 8 bits), the additional compression process (325) may be performed many more times until the accuracy p is low enough so that the compressed data fits into memory 305. Therefore, it may be necessary to repeat the compression process (325) multiple times to reduce the accuracy p so that the size of the compressed data is reduced sufficiently to fit into memory 305. For example, the stress data per pixel per color may be 32 bits (e.g., each subpixel stress value may be stored as a 32-bit number). Therefore, the log-search rate control may repeat the compression process (325) six or more times until the compressed memory data can fit into the buffer of memory 305. The computational burden of updating each stress value for each image frame (e.g., each displayed video image) associated with a relatively large number of compression processes (325) is significant.
[0076] To ensure acceptable performance (e.g., acceptable latency of the display device 100 system), the appropriate number of iterations (e.g., of the compression process (325)) may be limited. For example, in a hardware implementation according to an embodiment of the present invention, the number may be limited to four. It may also be useful to estimate accuracy with relatively low complexity.
[0077] FIG. 4 illustrates the worst case relationship between accuracy and buffer size (eg, entropy corresponding to complete randomness or maximum entropy) according to one embodiment of the present invention.
[0078] With reference to FIG. 4, it should be noted that random noise (e.g., worst-case scenario) has the lowest slope shown in a graph of accuracy (e.g., the inverse of quantization) versus buffer size (e.g., the size of compressed data placed in a buffer in memory). The slope corresponding to random noise may be essentially linear (e.g., where each bitplane has the same entropy). However, other patterns may have a steeper slope that is not linear, but may instead decrease monotonically. Reducing accuracy (e.g., increasing quantization) reduces buffer size (e.g., reducing the size of compressed data placed in compressed memory 305 of FIG. 3, memory 205 of FIG. 2, or memory 120 of FIG. 1). In one embodiment of the present invention, buffer size can be plotted for all possible accuracy levels using encoding circuit 230 of FIG. 2.
[0079] According to one embodiment of the present invention, the system's time constraints may determine the number of allowable compression iterations (e.g., four) until it determines that the compressed data fits into the buffer at an accuracy p. However, according to one embodiment of the present invention, the rate control may converge to an acceptable accuracy within three compression iterations [e.g., three compression steps (325) in FIG. 3] or fewer. Conversely, the log search rate control may iterate an average of six or more times.
[0080] Instead of dividing the remaining buffer by the number of pixels, as is done in typical rate control methods, embodiments of the present invention use a ratio of a target buffer size (e.g., the maximum size of compressed data that can fit into the compressed memory) to a current buffer size (e.g., the size of past compressed data based on the current accuracy level), which is close enough to the amount of reduction for acceptable accuracy. In some cases, the amount of reduction for acceptable accuracy can be changed to take into account the size of the stress and the current size of the data in the buffer.
[0081] Unlike conventional rate control methods, embodiments of the present invention provide a rate control algorithm that can better improve accuracy degradation estimation using stress data and buffer data size. For example, according to one embodiment of the present invention, (e.g., after an initial compression operation of an initial slice) prediction accuracy p can be predicted using the following Equation 1:
[0082]
number
[0083] where p c corresponds to the current accuracy (e.g., the accuracy previously used), and p m corresponds to the minimum effective precision, and b t corresponds to the target buffer size (e.g., the available memory size for storing the compressive stress data), and b c corresponds to the current buffer size (e.g., the size of the first compressed updated stress data for one slice). According to one embodiment of the present invention, the prediction accuracy p can be calculated by a processor of the display device (e.g., the processing circuit 115 of the display device 100 shown in FIG. 1 or the system 200 of FIG. 2) according to Equation 1. For example, the encoding circuit 230 can calculate the prediction accuracy p, but in other examples, the memory controller 225 can also calculate the encoding circuit 230.
[0084] In some cases, the algorithm for predicting the accuracy p can be modified to take into account the size of the stress and the current size of the data in the buffer. After the initial compression operation, the stress MSB (most significant bit) and memory MSB are known. The MSB of the input stress data (e.g., stress MSB) is the minimum accuracy p that the stress data can affect the size of the compressed update data. s The MAB (e.g., memory MSB) of the compressed data stored in memory 305 is known based on the size of the decompressed data, and the MAB of the compressed data is set to the minimum buffer accuracy p bBy using stressed MSB, the minimum accuracy p s (e.g., for a 32-bit signal, p s = 32-stress MSB), using memory MSB, the minimum buffer accuracy p b (e.g., for a 32-bit signal, p b = 32-Memory MSB).
[0085] Therefore, the minimum effective accuracy p m is the minimum accuracy p based on Equation 1. s and the minimum buffer accuracy p b The effect of adding stress data to the video data is determined by the stress MSB, memory MSB, and current accuracy p c The prediction accuracy p also depends on the target buffer size b t and the current buffer size b c It varies greatly depending on the ratio of
[0086] On the other hand, the target buffer size b t and the current buffer size b c If the ratio is close to 1, it is appropriate to set the minimum accuracy degradation to 1, as in the conventional rate control method. However, if the ratio is much smaller than 1 [for example, the current buffer size b c is the target buffer size b t [much larger than p], one can assume that a lot of entropy has been "injected" or introduced into the stress data in the form of noise and / or high stress values. As a result, using Equation 1 to predict precision p can potentially overestimate the accuracy degradation (e.g., quantizing the data more than necessary to fit the compressed memory data in memory can unnecessarily reduce precision p). However, it does not underestimate the level to which the adjusted precision (p) will degrade from the previous estimated precision, so that so many iterative compressions are required. Also, if one determines that further accuracy degradation is not beneficial as a result of Equation 1, one can set a minimum precision p s and the minimum buffer accuracy pb may be used to increase the slope of accuracy versus buffer size (eg, to decrease the accuracy reduction estimate shown in FIG. 4).
[0087] By using Equation 1, a system according to an embodiment of the present invention can set a lower bound on the accuracy p using a unique compression algorithm when the MSB of the stress data is known. The compression algorithm according to an embodiment of the present invention is unique among compression algorithms in that the MSB of the memory is continuously increasing (e.g., cumulative stress is generally not negative). Also, unlike other rate control algorithms, an embodiment of the present invention can set a lower bound on the accuracy p using a unique compression algorithm. c , additional stress p s The size of the buffer p b Therefore, the system can operate under different types of stress data, find the accuracy p efficiently and quickly, reduce the average number of iterations, and has low complexity.
[0088] In another embodiment of the present invention, the minimum effective accuracy p m It should be noted that by setting ∑ = 0, a simplified version with less accuracy but very good convergence can be presented. Also, while one embodiment of the present invention can use log-search or Newton-Raphson interpolation, it should be noted that log-search for accuracy has a maximum number of iterations of 6, and Newton-Raphson interpolation is more complex and has more divisions than the algorithm corresponding to Equation 1.
[0089] FIG. 5 shows a flow diagram of a method for determining accuracy according to one embodiment of the present invention.
[0090] Referring to FIG. 5, such operations are performed by processing circuitry 115 of display device 100 shown in FIG. 1 or system 200 of FIG.
[0091] At step (S510), the MSB of the stress data (e.g., from an initial compression on a past slice) is determined and used to calculate the minimum accuracy ps can be determined.
[0092] In step S520, the stress data is expanded to a target buffer size b t and current accuracy p c and these may be used to determine the MSB of the memory (e.g., memory MSB).
[0093] In step S530, the minimum accuracy p s and the minimum buffer accuracy p b The smaller of these two values is the minimum effective accuracy p m According to another embodiment of the present invention, a minimum effective accuracy p m Note that you can set to 0 to provide a simplified version that is less accurate but has better convergence.
[0094] In step S540, the stress and dither are stored in the current memory buffer [e.g., current buffer size b c ] and the predicted accuracy p can be added to the current accuracy p c can be set to
[0095] In step S550, the stress data is compressed using the prediction accuracy p to reduce the current buffer size b c Find.
[0096] In step S560, the current buffer size b c is the target buffer size b t Determine whether the current buffer size is b c is the target buffer size b t If so, it may be determined in step S590 that the accuracy p is acceptable so that the compressed data will fit into memory.
[0097] Current buffer size b c is the target buffer size b t If it is greater than the current accuracy p c can be set equal to the prediction accuracy p.
[0098] Next, in step (S580), the equation 1(p=[(p c -p m )b t / b c ]+p m ) to determine the prediction accuracy p, and the process returns to step S550 to again use the prediction accuracy p to determine the current buffer size b c Compress and find.
[0099] Thus, as previously described, instead of dividing the remaining buffer by the number of pixels (e.g., as is done in conventional rate control methods), embodiments of the present invention can use a ratio of the target buffer size to the current buffer size that is close enough to the appropriate amount of reduction for an acceptable accuracy so that the compressed data fits into the buffer.
[0100] Thus, an advantage offered by embodiments of the present invention is the ability to converge rate control to adequate accuracy within three or fewer (e.g., two) iterations without significantly sacrificing compression quality (e.g., without making the target buffer size larger than the required reduction in accuracy).
[0101] That is, embodiments of the present invention can improve rate control by providing a low-complexity rate control algorithm that efficiently uses information available after a single compression, converges quickly, has low complexity (e.g., a single division), performs well in worst-case scenarios (e.g., due to noise), and slightly overestimates all possible cases. Embodiments of the present invention also provide a simpler method that performs well in high levels of noise.
[0102] Although the embodiments of the present invention have been described above, it will be understood by those skilled in the art that various modifications and changes can be made to the present invention within the scope of the present invention without departing from the concept and technical scope of the present invention as set forth in the claims below.
[0103] Therefore, the technical scope of the present invention should not be limited to the content described in the detailed description of the specification, but should be determined by the claims and their equivalents. [Explanation of symbols]
[0104] 100 display device 110 Display panel 115 Processing Circuit 120,205,305 memory 200 systems 210 Correction circuit 215 Sampling Circuit 220 Addition Circuit 225 Memory Controller 230 Encoding circuit 235 Decoding Circuit 240 Restored Stress Data 245 Stress Conversion Circuit 250 input video data 255 previously saved stress data 260 output video data 265 Drive current adjustment conversion value 275 Extraction circuit 280 Adjusted Stress Data 285 Dithering Circuit 290 Compressed Data 295 Previously saved compression stress data 310 slices 320 additional stress data
Claims
1. receiving compressed stress data for a slice of a display device; decompressing the compressed stress data to obtain reconstructed stress data for the slice; adding additional stress data to the restored stress data to obtain updated stress data for the slice; The updated stress data is then calculated based on a first precision level (p c ) to generate first updated compressed stress data for the slice; The size (b c ) is the size of the buffer (b t determining a second accuracy level (p) in response to the accuracy being greater than p; encoding the updated stress data at the second accuracy level (p) to generate second compressed updated stress data; Including, The step of determining the second accuracy level (p) comprises determining the first accuracy level (p c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b ) based on A method for controlling a display device.
2. The step of determining the second accuracy level (p) may be performed by: c -p m ) b t / b c ]+p m and setting the same to p m is the third accuracy level (p s ) and the fourth accuracy level (p b 2. The method of claim 1, wherein the smaller of the two is:
3. The third accuracy level (p) of the additional stress data is determined based on the most significant bit (MSB) of the additional stress data. s ) determining the The fourth accuracy level (p b ) determining the The method for controlling a display device according to claim 2 , further comprising:
4. The step of determining the second accuracy level (p) comprises determining the second accuracy level (p) by p c b t / b c 2. The method of claim 1, further comprising the step of setting the display device to be equal to
5. The first accuracy level (p c 2. The method of claim 1, wherein the accuracy level used to generate the compressive stress data is:
6. 2. The method of claim 1, further comprising the step of adding dither to the restored stress data in addition to the additional stress data to obtain the updated stress data for the slice.
7. determining that the second compressed updated stress data fits within the buffer; and storing the second compressed updated stress data in the buffer; The method of claim 1 , further comprising:
8. a buffer for storing compressed stress data; a decoding circuit for receiving the compressed stress data for a slice of a display device and decompressing the compressed stress data to obtain reconstructed stress data for the slice; an adder circuit for adding additional stress data to the reconstructed stress data to obtain updated stress data for the slice; The updated stress data is then calculated based on a first precision level (p c a coding circuit for coding the first compressed stress data for the slice with the first compressed stress data; The size (b c ) is the size of the buffer (b t a processor for determining a second accuracy level (p) in response to the second accuracy level (p) being greater than Including, The processor determines the first accuracy level (p c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b determining the second accuracy level (p) based on the encoding circuitry encodes the updated stress data at the second accuracy level (p) to generate second compressed updated stress data. Display device.
9. The processor sets the second accuracy level (p) as [(p c -p m ) b t / b c ]+p m determining the second accuracy level (p) by setting p equal to p m is the third accuracy level (p s ) and the fourth accuracy level (p b 9. The display device according to claim 8, wherein the smaller of
10. The processor: The third accuracy level (p) of the additional stress data is determined based on the most significant bit (MSB) of the additional stress data. s ) is determined, The fourth accuracy level (p b 10. The display device of claim 9, wherein the display device determines a value of the first pixel.
11. The processor sets the second accuracy level (p) to p c b t / b c 9. The display device of claim 8, wherein the second accuracy level (p) is determined by setting the second accuracy level (p) equal to:
12. The first accuracy level (p c 9. The display device of claim 8, wherein: ##EQU1## is the level of accuracy used to generate the compressive stress data stored in the buffer.
13. 9. The display device of claim 8, further comprising a dithering circuit for applying a dither to the restored stress data in addition to the additional stress data to determine the updated stress data for the slice.
14. The display device of claim 8 , further comprising a memory controller configured to store the second compressed updated stress data in the buffer.
15. A non-transitory computer readable medium provided with a display device, comprising: computer code that, when executed by a processor, performs control in a control method for the display device; The control method includes: receiving compressed stress data for a slice of a display device; decompressing the compressed stress data to obtain reconstructed stress data for the slice; adding additional stress data to the restored stress data to obtain updated stress data for the slice; The updated stress data is then calculated based on a first precision level (p c ) to generate first updated compressed stress data for the slice; The size (b c ) is the size of the buffer (b t determining a second accuracy level (p) in response to the accuracy being greater than p; encoding the updated stress data at the second accuracy level (p) to generate second compressed updated stress data; Including, The step of determining the second accuracy level (p) comprises determining the first accuracy level (p c ), the third accuracy level of the additional stress data (p s ) and the fourth accuracy level of the buffer (p b ) based on Non-transitory computer-readable medium.
16. The computer code, when executed by the processor, calculates the second accuracy level (p) by [(p c -p m ) b t / b c ]+p m determining the second accuracy level (p) by setting p equal to p m is the third accuracy level (p s ) and the fourth accuracy level (p b 16. The non-transitory computer-readable medium of claim 15, wherein the minimum of
17. The computer code, when executed by the processor, The third accuracy level (p) of the additional stress data is determined based on the most significant bit (MSB) of the additional stress data. s ) is determined, The fourth accuracy level (p b ) by determining The non-transitory computer-readable medium of claim 16 for performing the control method.
18. The first accuracy level (p c 16. The non-transitory computer-readable medium of claim 15, wherein: ##EQU1## is a level of accuracy used to generate the compressive stress data.
19. 16. The non-transitory computer-readable medium of claim 15, wherein the computer code, when executed by the processor, performs the control method by adding the additional stress data and adding dither to the restored stress data to determine the updated stress data for the slice.
20. The computer code, when executed by the processor, determining that the second compressed updated stress data fits within the buffer; storing the second compressed updated stress data in the buffer; The non-transitory computer-readable medium of claim 15 for performing the control method.
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