Data copying methods, apparatus, computer-readable storage media, and electronic devices.

Abstract

Embodiments of the present disclosure disclose a data copying method, apparatus, computer-readable storage medium, and electronic device. Here, the method includes generating an address conversion request including an intermediate physical address through a target virtual machine, converting the intermediate physical address into a physical address through a memory management unit, arranging the physical address to a direct memory access controller through the target virtual machine, and controlling, through the direct memory access controller, a target module including a memory module and / or a peripheral device module to perform data copying according to the physical address. Embodiments of the present disclosure can reduce the manufacturing cost of a chip.

Description

Technical Field

[0001] This disclosure claims the priority of a Chinese patent application filed with the Chinese Patent Office on July 22, 2022, with an application number of CN202210868561.8 and an invention title of "Data Copying Method, Apparatus, Computer-Readable Storage Medium, and Electronic Device", and all of its content is incorporated herein by reference.

[0002] This disclosure relates to chip technology, and particularly to a data copying method, apparatus, computer-readable storage medium, and electronic device.

Background Art

[0003] Using a virtualization manager, multiple virtual machines can be realized to operate simultaneously on one chip. Here, the chip may include a Direct Memory Access (DMA) controller, and a System Memory Management Unit (SMMU) may be further arranged on the chip.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of this disclosure provide a data copying method, apparatus, computer-readable storage medium, and electronic device.

Means for Solving the Problems

[0005] A data copying method according to an aspect of the embodiments of this disclosure includes: generating an address conversion request including an intermediate physical address through a target virtual machine; converting the intermediate physical address to a physical address through a memory management unit; arranging the physical address to a direct memory access controller through the target virtual machine. The process includes controlling a target module, including a memory module and / or a peripheral module, via the direct memory access controller to perform data copying according to the physical address.

[0006] A data copying device according to another embodiment of the embodiments of this disclosure is: A generation module used to generate an address translation request including an intermediate physical address through the target virtual machine, A translation module used to translate the intermediate physical address included in the address translation request generated by the generation module into a physical address via a memory management unit, A placement module used to place the physical address converted by the conversion module onto the direct memory access controller via the target virtual machine, The system includes a control module used to control a target module, including a memory module and / or peripheral module, via the direct memory access controller, to perform data copying according to the physical address translated by the translation module.

[0007] A computer-readable storage medium according to yet another embodiment of the embodiments of this disclosure stores a computer program for performing the data copying method described above.

[0008] Another embodiment of the embodiments of the present disclosure is an electronic device, Processor and The processor includes a memory for storing executable instructions, The processor is used to read and execute the executable instructions from the memory to realize the data copying method.

[0009] According to another embodiment of the present disclosure, a computer program product is provided, and when instructions in the computer program product are executed by a processor, the above data copying method is realized. [Effects of the Invention]

[0010] According to the data copy method, apparatus, computer-readable storage medium, electronic device, and product provided in the above embodiments of this disclosure, an address translation request can be generated through a target virtual machine, an intermediate physical address in the address translation request can be translated to a physical address through a memory management unit, and the physical address can be placed on a direct memory access controller through the target virtual machine. In the embodiments of this disclosure, it is the physical address, not the intermediate physical address, that is placed on the direct memory access controller. Therefore, the direct memory access controller can control the target module to perform data copying based on the physical address, eliminating the need to use a system memory management unit for address translation. Consequently, it is not necessary to place a system memory management unit on the chip, thereby reducing the manufacturing cost of the chip.

[0011] The technical solutions of this disclosure will be described in more detail below with reference to the drawings and embodiments. [Brief explanation of the drawing]

[0012] [Figure 1] This is a schematic diagram of the chip structure in related technologies. [Figure 2] This is a schematic diagram illustrating the operating principle of the chip in related technologies. [Figure 3] This is a schematic diagram illustrating another operating principle of the chip in related technologies. [Figure 4] This is a schematic diagram of the chip structure in an embodiment of the present disclosure. [Figure 5] This is a diagram illustrating the operating principle of the chip in an embodiment of the present disclosure. [Figure 6] This is another diagram illustrating the operating principle of the chip in the embodiment of this disclosure. [Figure 7] This is a schematic flowchart of a data copying method provided in one exemplary embodiment of the present disclosure. [Figure 8]A schematic flowchart of a data copying method provided in another exemplary embodiment of the present disclosure. [Figure 9] A schematic flowchart of a data copying method provided in another exemplary embodiment of the present disclosure. [Figure 10] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 11] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 12] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 13-1] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 13-2] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 14-1] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 14-2] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 15-1] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 15-2] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 16] A schematic flowchart of a data copying method provided in yet another exemplary embodiment of the present disclosure. [Figure 17] A schematic structural diagram of a data copying apparatus provided in one exemplary embodiment of the present disclosure. [Figure 18] A schematic structural diagram of a data copying apparatus provided in another exemplary embodiment of the present disclosure. [Figure 19]This is a structural diagram of an electronic device provided in one exemplary embodiment of the present disclosure. [Modes for carrying out the invention]

[0013] To interpret this disclosure, exemplary embodiments of this disclosure will be described in detail below with reference to the drawings. It should be understood that the embodiments described are only a selection of embodiments of this disclosure, not all embodiments, and that this disclosure is not limited to exemplary embodiments.

[0014] Unless otherwise specified, the relative arrangements of components and steps, formulas, and numerical values ​​described in these embodiments do not limit the scope of this disclosure. Application Summary

[0015] The chip may be a System on Chip (SOC), and as shown in Figures 1, 2, and 3, in the related technology, the chip may include a Memory Management Unit (MMU), memory modules, peripheral modules, a direct memory access controller, a system memory management unit, and a chip bus module.

[0016] One of the basic functions of a memory management unit is the management of virtual memory, which includes, but is not limited to, translating virtual addresses to physical addresses (PA), translating virtual addresses to intermediate physical addresses (IPA), and translating intermediate physical addresses to physical addresses.

[0017] Direct memory access controllers are used to perform data copying, that is, the replication of data from one address space to another.

[0018] The system memory management unit can be responsible for managing chip peripherals.

[0019] Furthermore, by using a virtualization manager (or virtualization manager module), it is possible to run multiple virtual machines (Guest OSs) simultaneously on a single chip. Here, both the virtualization manager and the multiple virtual machines may be software modules running on the chip.

[0020] When actually running, a virtual machine can indirectly manipulate hardware through the virtualization manager. When a virtual machine uses a direct memory access controller, it can usually place the source and destination addresses of data in IPA format on the direct memory access controller. For example, as shown in Figure 2, if a virtual machine called Guest OS A exclusively occupies the direct memory access controller, Guest OS A can directly place the source and destination addresses in IPA format on the direct memory access controller. Alternatively, as shown in Figure 3, if a virtual machine called Guest OS A does not exclusively occupy the direct memory access controller but shares it with other virtual machines (in this case, the virtualization manager is responsible for ensuring mutual exclusivity when each virtual machine accesses the direct memory access controller), Guest OS A can place the source and destination addresses in IPA format on the direct memory access controller through the virtualization manager.

[0021] After IPA-format source and destination addresses are placed in the direct memory access controller, they can be converted to PA-format source and destination addresses. Based on the PA-format source and destination addresses, the direct memory access controller can control the associated modules to perform data copying, that is, to copy data from the address space corresponding to the PA-format source address to the address space corresponding to the PA-format destination address.

[0022] Exemplary System In the embodiments of this disclosure, a virtual machine can convert IPA-format addresses to PA-format addresses through a memory management unit, and the virtual machine can also place PA-format addresses on a direct memory access controller. Thus, the conversion from IPA-format addresses to PA-format addresses does not need to depend on any other module or unit other than the memory management unit, for example, it does not need to depend on a system memory management unit. For this reason, as shown in Figures 4 to 6, it is not necessary to place a system memory management unit on the chip and use it for address translation, thereby reducing the manufacturing cost of the chip.

[0023] Exemplary Method Figure 7 is a schematic flowchart of a data copying method provided in one exemplary embodiment of the present disclosure. The method shown in Figure 7 may include steps 710, 720, 730, and 740, each of which will be described below.

[0024] In step 710, an address translation request including the intermediate physical address is generated through the target virtual machine.

[0025] In one possible example, step 710 may be performed by the processor calling a corresponding instruction stored in memory, or it may be performed by a generating module executed by the processor.

[0026] The target virtual machine may be any of the multiple virtual machines running on the chip, for example, Guest OS A in Figures 5 and 6, and the term "target" in the target virtual machine does not constitute a limitation on the target virtual machine.

[0027] Before generating an address translation request, the target virtual machine can obtain a virtual address and call the memory management unit to translate the virtual address to an intermediate physical address. The target virtual machine can then generate an address translation request that includes the intermediate physical address, which is used to request that the intermediate physical address be translated to a physical address.

[0028] In step 720, the intermediate physical address is translated to a physical address through the memory management unit.

[0029] In one possible example, step 720 may be performed by the processor calling a corresponding instruction stored in memory, or it may be performed by a translation module executed by the processor.

[0030] Selectively, the target virtual machine may forward the address translation request to a memory management unit, which in turn may translate the intermediate physical addresses included in the address translation request to physical addresses; or the target virtual machine may forward the address translation request to a virtualization manager, which in turn may call the memory management unit to translate the intermediate physical addresses included in the address translation request to physical addresses.

[0031] In step 730, the physical address is assigned to the direct memory access controller through the target virtual machine.

[0032] In one possible example, step 730 may be performed by the processor calling a corresponding instruction stored in memory, or it may be performed by a placement module executed by the processor.

[0033] Selectively, the target virtual machine can place its physical addresses on the direct memory access controller according to a pre-configured copy scheme, or the target virtual machine can determine a copy scheme that suits its physical addresses and place its physical addresses on the direct memory access controller according to the determined copy scheme.

[0034] In step 740, the target module, including the memory module and / or peripheral module, is controlled via the direct memory access controller to perform data copying according to its physical address.

[0035] In one possible example, step 740 may be performed by the processor calling a corresponding instruction stored in memory, or it may be performed by a control module that is executed by the processor.

[0036] As shown in Figures 5 and 6, the memory module, peripheral module, and direct memory access controller can each exchange data with the chip bus module. In this way, the direct memory access controller can control the memory module and / or peripheral module based on the relay transmission of information exchanged by the chip bus module. Through the control of the direct memory access controller, the memory module and / or peripheral module can perform data copying according to their physical addresses.

[0037] In the embodiments of this disclosure, an address translation request can be generated through the target virtual machine, the intermediate physical address in the address translation request can be translated to a physical address through the memory management unit, and the physical address can be placed on the direct memory access controller through the target virtual machine. In the embodiments of this disclosure, since it is the physical address and not the intermediate physical address that is placed on the direct memory access controller, the direct memory access controller can be controlled to perform data copying on the target module based on the physical address, and there is no need to perform address translation using the system memory management unit. Therefore, there is no need to place the system memory management unit on the chip, thereby reducing the manufacturing cost of the chip.

[0038] Based on the embodiment shown in Figure 7, and as shown in Figure 8, before step 720, this method further includes step 715.

[0039] In step 715, the intermediate physical address is sent to the memory management unit via the virtualization manager.

[0040] In one possible example, step 715 may be performed by the processor calling a corresponding instruction stored in memory, or by a send module that is executed by the processor.

[0041] After the target virtual machine generates an address translation request, it can forward the address translation request to the virtualization manager. Upon receiving the address translation request from the target virtual machine, the virtualization manager can send the intermediate physical address included in the address translation request to the memory management unit. Upon receiving the intermediate physical address from the virtualization manager, the memory management unit can translate the intermediate physical address to a physical address and return the physical address to the virtualization manager. Upon receiving the physical address from the memory management unit, the virtualization manager can provide the physical address to the target virtual machine so that the target virtual machine places the physical address on the direct memory access controller.

[0042] In the embodiments of this disclosure, the virtualization manager can efficiently and reliably provide the intermediate physical address included in the address translation request to the memory management unit, thereby facilitating the memory management unit to perform the corresponding address translation process.

[0043] In one selectable example, the intermediate physical address includes the source intermediate physical address and the destination intermediate physical address, and the physical address includes the source physical address translated from the source intermediate physical address and the destination physical address translated from the destination intermediate physical address.

[0044] Based on the embodiment shown in Figure 7, as shown in Figure 9, step 740 includes steps 7402, 7404, and 7406.

[0045] In step 7402, the data characteristic information of the stored data corresponding to the source physical address is determined.

[0046] In one selectable example, step 7402 may be performed by the processor calling a corresponding instruction stored in memory, or by a first decision submodule in a control module executed by the processor.

[0047] Selectively, the stored data corresponding to the source physical address may mean data stored in the address space corresponding to the source physical address, and the data characteristic information includes, but is not limited to, the data format, the size of the data, and the data update cycle.

[0048] In step 7404, a copy method is determined that matches the data feature information of the stored data corresponding to the source physical address.

[0049] In one possible example, step 7404 may be performed by the processor calling a corresponding instruction stored in memory, or by a second decision submodule in the control module executed by the processor.

[0050] Furthermore, a correspondence between data feature information and the copy method can be set in advance. The copy method includes, but is not limited to, single transfer, cyclic transfer, circular transmission, and double buffer mode. In step 7404, based on the pre-set correspondence, a copy method corresponding to the data feature information determined in step 7402 can be determined, and the determined copy method can be a copy method that matches this data feature information.

[0051] In step 7406, the target module is controlled via the direct memory access controller to copy the stored data from the source physical address to the destination physical address according to the determined copy scheme.

[0052] In one possible example, step 7406 may be performed by the processor calling a corresponding instruction stored in memory, or by a control submodule in a control module executed by the processor.

[0053] If the source intermediate physical address included in the intermediate physical address is IPA1, the destination intermediate physical address included in the intermediate physical address is IPA2, the source physical address converted from IPA1 is PA1, and the destination physical address converted from IPA2 is PA2, then the physical address can include PA1 and PA2.

[0054] After obtaining the physical addresses including PA1 and PA2, the data feature information T1 of the stored data Data1 corresponding to PA1 can be determined. Based on a pre-configured correspondence between the data feature information and the copy method, the copy method C1 corresponding to T1 is determined, and the target module is controlled via the direct memory access controller to copy Data1 from PA1 to PA2 according to the copy method C1 (i.e., to perform a copy from the address space corresponding to PA1 to the address space corresponding to PA2).

[0055] Selectively, PA1 may be an address in memory or an address of a peripheral device on the bus. PA2 may be an address in memory or an address of a peripheral device on the bus. Thus, when copying Data1 from PA1 to PA2, there are four possible copy paths for Data1: address in memory → address in memory, address in memory → address of a peripheral device, address of a peripheral device → address of a peripheral device, and address of a peripheral device → address in memory.

[0056] In the embodiments of this disclosure, the physical address translated from the intermediate physical address included in the address translation request may include both the source physical address and the destination physical address. By referring to the data feature information of the stored data corresponding to the source physical address, a copy of the stored data can be made in a manner that conforms to this data feature information. For example, if the amount of stored data is very small, a single transfer method can be adopted to efficiently copy the stored data. Also, for example, if the stored data is peripheral device data that needs to be read periodically, a cyclic transfer method can be adopted to copy the stored data. In this way, it is advantageous to guarantee the efficiency of data copying and to meet the data demands.

[0057] Based on the embodiment shown in Figure 7, as shown in Figure 10, after step 740, the method further includes steps 750 and 760.

[0058] In step 750, in response to detecting a data copy failure, it is determined whether the number of data copy failures has reached a predetermined number. If it has, step 760 is executed; otherwise, the process returns to step 730.

[0059] In step 760, error notification information is output to the direct memory access controller.

[0060] In one selectable example, in response to detecting a data copy failure in step 750, the operation to determine whether the number of data copy failures has reached a predetermined number may be performed by the processor calling a corresponding instruction stored in memory, or by a trigger module or output module executed by the processor. The operation to be performed if the number of data copy failures has not reached a predetermined number may be performed by the processor calling a corresponding instruction stored in memory, or by a trigger module executed by the processor (the trigger module is used to trigger the execution of step 730). The operation to be performed if the number of data copy failures has reached a predetermined number may be performed by the processor calling a corresponding instruction stored in memory, or by an output module executed by the processor.

[0061] The number of times selected and predetermined may be 2, 3, 4, 5, or any other number, and these will not be listed here.

[0062] Selectively, the output format of the anomaly information may include, but is not limited to, audio, text, and lights.

[0063] After executing step 740, which controls the target module to perform a data copy according to its physical address, it is possible to detect whether the data copy was successful or failed.

[0064] If a data copy failure is detected, the number of data copy failures can be determined and compared to a preset number.

[0065] If the number of data copy failures is less than a predetermined number, the process can return to step 730, that is, to relocate the physical address to the direct memory access controller through the target virtual machine, and then the steps after step 730 are also executed again.

[0066] If the number of data copy failures exceeds a preset number, the system can output an error notification for the direct memory access controller. For example, it may announce "DMA controller error" by voice or display "DMA controller error" in a pop-up window on the screen, prompting the user to manually check the cause of the direct memory access controller error. Generally, the causes of direct memory access controller errors include, but are not limited to, clock errors, power supply errors, memory module errors, peripheral module errors, direct memory access controller errors, and electromagnetic compatibility (EMC) interference errors.

[0067] Furthermore, if the number of data copy failures exceeds a preset number, in addition to outputting error notification information, the system can also manually check the cause of the error in the direct memory access controller and prohibit the execution of steps 710 to 740 until the error in the direct memory access controller is resolved.

[0068] In one selectable example, the preset number of times is 2, and the physical address translated from the intermediate physical address in the address translation request includes both the source physical address PA1 and the destination physical address PA2. If a data copy failure is detected after the first attempt to place PA1 and PA2 on the direct memory access controller via the target virtual machine and to copy Data1 from PA1 to PA2, then the number of data copy failures is 1, which is less than the preset number. Therefore, the target module can be controlled a second time to place PA1 and PA2 on the direct memory access controller via the target virtual machine and to copy Data1 from PA1 to PA2. If a data copy failure is detected a second time after the target module is controlled to copy Data1 from PA1 to PA2, then the number of data copy failures is 2, which is equal to the preset number. Therefore, abnormality notification information can be output to the direct memory access controller via voice, text, etc.

[0069] In the embodiments of this disclosure, after controlling the target module to perform a data copy according to its physical address, if the data copy fails and the number of data copy failures does not reach a preset number, the system can return to the step of arranging the physical address to attempt the data copy again. If the data copy fails and the number of data copy failures reaches a preset number, the system will not attempt the data copy again, but will output error notification information to prompt the user to manually check the cause of the error in the direct memory access controller, thereby quickly resolving the error and enabling the system to perform the data copy normally thereafter.

[0070] Based on the embodiment shown in Figure 7, and as shown in Figure 11, the method further includes steps 722 and 724 prior to step 730.

[0071] In step 722, the exclusive mode for the target virtual machine's direct memory access controller is obtained.

[0072] In one selectable example, step 722 may be performed by the processor calling a corresponding instruction stored in memory, or by a first acquisition module executed by the processor.

[0073] There are two possible states for exclusive mode: exclusive mode and non-exclusive mode. In exclusive mode, the target virtual machine can communicate directly with the direct memory access controller, while in non-exclusive mode, the target virtual machine can communicate with the direct memory access controller through the virtualization manager. For the exclusive mode, please refer to Figure 5, and for the non-exclusive mode, please refer to Figure 6.

[0074] In step 724, control information for the direct memory access controller is obtained.

[0075] In one possible example, step 724 may be performed by the processor calling a corresponding instruction stored in memory, or by a second acquisition module executed by the processor.

[0076] Selectively, the control information obtained in step 724 may be called DMA control information, and the DMA control information may include at least one of copy speed information, copy mode information, and data check method.

[0077] Step 730 includes steps 7302 and 7304.

[0078] In step 7302, the arrangement method that matches the occupied mode is determined.

[0079] In one possible example, step 7302 may be performed by the processor calling a corresponding instruction stored in memory, or by a third decision submodule in the placement module executed by the processor.

[0080] If the exclusive mode is mutually exclusive, the deployment method that matches the exclusive mode may be direct deployment. If the exclusive mode is non-exclusive, the deployment method that matches the exclusive mode may be deployment through a virtualization manager.

[0081] In step 7304, the physical address and control information are placed on the direct memory access controller via the target virtual machine according to the placement scheme.

[0082] In one selectable example, step 7304 may be performed by the processor calling a corresponding instruction stored in memory, or by a placement submodule in a placement module executed by the processor.

[0083] If the exclusive mode is set to exclusive mode, the target virtual machine can directly place its physical address and control information on the direct memory access controller. If the exclusive mode is set to non-exclusive mode, the target virtual machine can place its physical address and control information on the direct memory access controller through the virtualization manager.

[0084] In the embodiments of this disclosure, by referring to the occupancy mode of the target virtual machine with respect to the direct memory access controller and adopting an arrangement method that conforms to this occupancy mode, the physical address and control information can be efficiently and reliably placed on the direct memory access controller, thereby facilitating the direct memory access controller to refer to the physical address and control information and perform data copy processing.

[0085] Based on the embodiment shown in Figure 7, step 730 includes steps 7306 and 7308, as shown in Figure 12.

[0086] In step 7306, access permission information for the physical address of the target virtual machine is determined through the virtualization manager.

[0087] In one selectable example, step 7306 may be performed by the processor calling a corresponding instruction stored in memory, or by a fourth decision submodule in the placement module executed by the processor.

[0088] Selectively, the virtualization manager can determine access rights information for the target virtual machine's physical address according to a pre-configured access rights restriction policy, and this access rights information is used to characterize whether or not the target virtual machine has access rights to the physical address.

[0089] In one specific embodiment, the physical address has a corresponding access whitelist, the access whitelist includes multiple virtual machine identifier information, and based on the embodiment shown in Figure 12, step 7306 includes step 73062 in Figure 13-1 or step 73064 in Figure 13-2.

[0090] In step 73062, in response to the fact that the target virtual machine's identifier information is in the access whitelist, the virtualization manager determines that the access rights information characterizes the target virtual machine as having access rights to the physical address.

[0091] In step 73064, in response to the fact that the target virtual machine's identifier information is not in the access whitelist, the virtualization manager determines that the access rights information characterizes the target virtual machine as not having access rights to the physical address.

[0092] Furthermore, the correspondence between physical addresses and access whitelists can be stored in advance. After the intermediate physical address included in the address translation request is translated to a physical address via the memory management unit, the virtualization manager can determine the access whitelist corresponding to the physical address based on the pre-stored correspondence, and then traverse the access whitelist corresponding to the physical address to determine whether or not the identifier information of the target virtual machine is in the access whitelist corresponding to the physical address.

[0093] If the identifier information of the target virtual machine is in the access whitelist corresponding to the physical address, the access rights information determined by the virtualization manager will be represented as "1," characterizing that the target virtual machine has access rights to the physical address. If the identifier information of the target virtual machine is not in the access whitelist corresponding to the physical address, the access rights information determined by the virtualization manager will be represented as "0," characterizing that the target virtual machine does not have access rights to the physical address.

[0094] By adopting such an embodiment, and determining whether the target virtual machine has access rights to a physical address, it is possible to efficiently and reliably determine whether the target virtual machine has access rights to that physical address by checking whether the target virtual machine's identifier information is in the access whitelist corresponding to the physical address, in order to set up the access whitelist.

[0095] In concrete implementation, a corresponding access blacklist may be established for the physical address. If the target virtual machine's identifier information is in the access blacklist, the access rights information can be characterized as indicating that the target virtual machine does not have access rights to the physical address. If the target virtual machine's identifier information is not in the access blacklist, the access rights information can be characterized as indicating that the target virtual machine has access rights to the physical address.

[0096] In step 7308, in response to the access rights information characterizing that the target virtual machine has access rights to the physical address, the physical address is placed on the direct memory access controller through the target virtual machine.

[0097] In one selectable example, step 7308 may be performed by the processor calling a corresponding instruction stored in memory, or by a placement submodule in a placement module executed by the processor.

[0098] If the access rights information characterizes the target virtual machine as having access rights to a physical address, the virtualization manager can send the physical address to the target virtual machine, and the target virtual machine can place the physical address in the direct memory access controller, so that the direct memory access controller can perform data copy operations based on the physical address.

[0099] If the access rights information indicates that the target virtual machine does not have access rights to the physical address, the virtualization manager will not send the physical address to the target virtual machine, and the target virtual machine will not place the physical address.

[0100] In embodiments of the present disclosure, access rights information for the physical address of a target virtual machine can be determined through a virtualization manager, and if the access rights information characterizes that the target virtual machine has access rights to the physical address, the physical address is placed on a direct memory access controller through the target virtual machine. Thus, embodiments of the present disclosure are advantageous in that they make access rights-related decisions using the virtualization manager before placing the physical address on the direct memory access controller, thereby limiting the area that the target virtual machine can access through the direct memory access controller and ensuring security when the target virtual machine accesses memory through the direct memory access controller.

[0101] Based on the embodiment shown in Figure 13-1 or Figure 13-2, step 720 includes step 7202, as shown in Figure 14-1 or Figure 14-2.

[0102] In step 7202, in response to the absence of an intermediate physical address in the recorded address, the intermediate physical address is translated to a physical address through the memory management unit.

[0103] This method further includes step 770.

[0104] In step 770, in response to access rights information characterizing that the target virtual machine does not have access rights to the physical address, an intermediate physical address is added to the recorded address.

[0105] In one possible example, step 770 may be performed by the processor calling a corresponding instruction stored in memory, or by an additional module executed by the processor.

[0106] Selectively, recorded addresses can be represented in the format of an address table.

[0107] In one possible example, assuming that the target virtual machine is Guest OS A, and Guest OS A generates an address translation request in which the intermediate physical address to be included is IPA0, and then sends the address translation request to the virtualization manager, the virtualization manager can traversal the recorded addresses to determine whether IPA0 exists at the recorded addresses.

[0108] If IPA0 exists among the recorded addresses, the virtualization manager may reject the address translation request from Guest OS A.

[0109] If IPA0 does not exist at the recorded addresses, the virtualization manager can call the memory management unit to translate IPA0 to a physical address, which may be PA0, and the virtualization manager can further determine the access rights information for Guest OS A to PA0. If the access rights information characterizes that Guest OS A does not have access rights to PA0, the virtualization manager can add IPA0 to the recorded addresses. If the access rights information characterizes that Guest OS A has access rights to PA0, the virtualization manager does not have to add IPA0 to the recorded addresses and can send PA0 to Guest OS A so that Guest OS A places PA0 on the direct memory access controller.

[0110] In the case described in the previous paragraph, where the access rights information characterizes that Guest OS A does not have access rights to PA0, if the virtualization manager adds IPA0 to the recorded addresses, Guest OS A generates an address translation request again in which the included intermediate physical address is IPA0. After sending the address translation request to the virtualization manager, the virtualization manager can determine that IPA0 exists at the recorded addresses by traversing the recorded addresses. At this point, the virtualization manager can reject Guest OS A's address translation request without needing to call the memory management unit to translate IPA0 to a physical address, and without needing to perform the access rights information determination step and the physical address placement step based on the physical address. Thus, it is advantageous in saving computational resources.

[0111] In the embodiments of this disclosure, updating and using recorded addresses eliminates the need to translate intermediate physical addresses in all address translation requests through the memory management unit. It is only necessary to translate intermediate physical addresses that do not exist in the recorded addresses, which is advantageous in saving computational resources.

[0112] Based on the embodiment shown in Figure 13-1 or Figure 13-2, the method further includes steps 780 and 790, as shown in Figure 15-1 or Figure 15-2.

[0113] In step 780, if the target virtual machine generates more address translation requests than a predetermined number within a predetermined time, and the access rights information corresponding to each address translation request characterizes that the target virtual machine does not have access rights to the physical address, then permission confirmation information is output, where the permission confirmation information includes the identifier information and physical address of the target virtual machine.

[0114] In one possible example, step 780 may be performed by the processor calling a corresponding instruction stored in memory, or by an output module executed by the processor.

[0115] Selectively, the pre-set time can be 30 seconds, 1 minute, 2 minutes, etc., and the pre-set number can be 30, 40, 50, 60, 100, etc., and we will not list them all here.

[0116] Assuming that the target virtual machine generates 105 address translation requests containing physical addresses within one minute, and the virtualization manager determines, based on the access whitelist corresponding to the physical addresses, that all of the access permission information corresponding to each address translation request characterizes the target virtual machine as not having access rights to the physical addresses, permission confirmation prompt information including the target virtual machine's identifier and physical address can be output via voice, text, etc. For example, it can announce via voice, "Please confirm whether Guest OS A has access rights to PA0," or, for example, display "Please confirm whether Guest OS A has access rights to PA0" in a pop-up window on the screen, prompting a human to confirm whether Guest OS A has access rights to PA0.

[0117] In step 790, in response to a trigger operation for permission confirmation information, the identifier information of the target virtual machine is added to the access whitelist.

[0118] In one possible example, step 790 may be performed by the processor calling a corresponding instruction stored in memory, or it may be performed by an additional module executed by the processor.

[0119] Selectively, in response to the authorization confirmation prompt displayed in step 780, a person can verbally say "yes" or "no." If the person verbally says "yes," it is considered that a trigger operation for the authorization confirmation prompt has been received, and the name Guest OS A can then be added to the access whitelist. Alternatively, two selection buttons, "yes" and "no," can be displayed at the bottom of a pop-up window on the screen. In response to the authorization confirmation prompt displayed in step 780, a person can manually select either the "yes" or "no" button. If the person manually selects the "yes" button, it is considered that a trigger operation for the authorization confirmation prompt has been received, and the name Guest OS A can then be added to the access whitelist.

[0120] In an embodiment of this disclosure, if a target virtual machine generates a large number of address translation requests containing the same intermediate physical address within a short period of time, and the access rights information corresponding to these address translation requests all characterizes the fact that the target virtual machine does not have access rights to the physical address, the output of access confirmation information can prompt a person to confirm whether or not the target virtual machine has access rights to the physical address. If the person confirms that the target virtual machine has access rights to the physical address, the identifier information of the target virtual machine can be added to the access whitelist, thereby ensuring the accuracy of the information recorded in the access whitelist.

[0121] Selectively, as shown in Figure 16, the data copying method provided in the embodiments of this disclosure may include the following steps:

[0122] In step 1602, Guest OS A uses the MMU to translate the source virtual address VA1 and destination virtual address VA2 to the source intermediate physical address IPA1 and destination intermediate physical address IPA2.

[0123] In step 1604, Guest OS A requests the virtualization manager to use the MMU to translate the source intermediate physical address IPA1 and the destination intermediate physical address IPA2 to the source physical address PA1 and the destination physical address PA2.

[0124] In step 1606, Guest OS A places the source physical address PA1, destination physical address PA2, and control information on the DMA controller (suitable if Guest OS A has exclusive use of the DMA controller), or Guest OS A places the source physical address PA1, destination physical address PA2, and control information on the DMA controller through the virtualization manager (suitable if Guest OS A and other virtual machines share the DMA controller).

[0125] In step 1608, the DMA controller controls the memory module or peripheral module to copy data from source physical address PA1 to destination physical address PA2.

[0126] As described above, the embodiments of this disclosure enable virtualization of the DMA controller on a chip without an SMMU, thereby allowing multiple virtual machines operating on the chip to accurately and quickly copy data using the DMA controller, which is advantageous in reducing chip costs.

[0127] Any data copying method provided in the embodiments of this disclosure can be performed by any suitable device having data processing capabilities, including, but not limited to, terminal devices and servers. Alternatively, any copying method provided in the embodiments of this disclosure can be performed by a processor, for example, by calling a corresponding instruction stored in memory, thereby performing any copying method referred to in the embodiments of this disclosure. Further explanation is omitted.

[0128] As a person skilled in the art can understand, all or some of the steps to implement an embodiment of the above method can be completed by a program instructing the relevant hardware, the aforementioned program can be stored in a computer-readable storage medium, and when this program is executed, it performs the steps including an embodiment of the above method, the aforementioned storage medium includes various media capable of storing program code, such as read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks.

[0129] Exemplary device Figure 17 is a schematic diagram of the structure of a data copy device provided in one exemplary embodiment of the present disclosure. The device shown in Figure 17 is used to implement an embodiment of any of the methods described above in the present disclosure. The device shown in Figure 17 includes a generation module 1710, a conversion module 1720, a placement module 1730, and a control module 1740.

[0130] The generation module 1710 is used to generate an address translation request that includes an intermediate physical address through the target virtual machine.

[0131] The translation module 1720 is used to translate the intermediate physical address included in the address translation request generated by the generation module 1710 into a physical address via the memory management unit.

[0132] The placement module 1730 is used to place the physical addresses translated by the translation module 1720 onto the direct memory access controller through the target virtual machine.

[0133] The control module 1740 is used to control target modules, including memory modules and / or peripheral modules, to perform data copying according to the physical addresses translated by the translation module 1720, via a direct memory access controller.

[0134] In one selectable example, as shown in Figure 18, this device is The system further includes a transmit module 1715 for sending the intermediate physical address, which is included in the address translation request generated by the generate module 1710, to the memory management unit via the virtualization manager before translating the intermediate physical address to a physical address via the memory management unit.

[0135] In one selectable example, the intermediate physical address includes the source intermediate physical address and the destination intermediate physical address, and the physical address includes the source physical address translated from the source intermediate physical address and the destination physical address translated from the destination intermediate physical address.

[0136] As shown in Figure 18, the control module 1740 is A first determination submodule 17402 for determining data characteristic information of stored data corresponding to the source physical address, A second decision submodule 17404 for determining a copy method that matches the data feature information determined by the first decision submodule 17402, The system includes a control submodule 17406 for controlling the target module via a direct memory access controller to copy stored data from a source physical address to a destination physical address according to a copy scheme determined by a second determination submodule 17404.

[0137] In one selectable example, as shown in Figure 18, this device is After the control module 1740 controls the target module to perform data copying according to its physical address via the direct memory access controller, the trigger module 1750 is used to trigger the placement module 1730 in response to detecting a data copy failure and confirming that the number of data copy failures has not reached a preset number. The system further includes an output module 1760 for detecting a data copy failure after the control module 1740 controls the target module via the direct memory access controller to perform a data copy according to its physical address, and for outputting an error notification information to the direct memory access controller in response to the number of data copy failures reaching a preset number.

[0138] In one selectable example, as shown in Figure 18, this device is Before assigning the physical address to the direct memory access controller through the target virtual machine, a first acquisition module 1722 is used to acquire the target virtual machine's exclusive mode with respect to the direct memory access controller, It further includes a second acquisition module 1724 for acquiring control information for a direct memory access controller, The placement module 1730 is, A third determination submodule 17302 for determining an arrangement method that matches the occupation mode acquired by the first acquisition module 1722, It includes a placement submodule 17304 for placing the physical address and control information acquired by the second acquisition module 1724 through the target virtual machine onto the direct memory access controller according to the placement scheme determined by the third determination submodule 17302.

[0139] In the apparatus of this disclosure, the various selectable embodiments, selectable forms, and selectable examples disclosed above can all be flexibly selected and combined as needed to achieve the corresponding functions and effects, and this disclosure does not list them one by one.

[0140] Exemplary electronic device Figure 19 shows a block diagram of an electronic device according to an embodiment of the present disclosure. The electronic device 1900 includes one or more processors 1910 and memory 1920.

[0141] The processor 1910 may be a central processing unit (CPU) or another type of processing unit having data processing capability and / or instruction execution capability, and can control other components in the electronic device 1900 to perform a desired function.

[0142] Memory 1920 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored in the computer-readable storage media, and the processor 1910 can execute one or more computer program instructions to implement a data copying method and / or other desired function of any embodiment of the method of the present disclosure described above.

[0143] In one selectable example, the electronic device 1900 may further include an input device 1930 and an output device 1940, which are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0144] This input device 1930 may further include, for example, a keyboard, a mouse, and the like.

[0145] This output device 1940 can output various types of information to the outside. This output device 1940 may include, for example, a display, a speaker, a printer, a communication network, and remote output devices connected thereto.

[0146] For simplicity, Figure 19 shows only some of the components relating to this disclosure within the electronic device 1900, omitting components such as buses and input / output interfaces. In addition, depending on the specific application, the electronic device 1900 may further include any other suitable components.

[0147] Exemplary computer program products and computer-readable storage media In addition to the methods and apparatus described above, embodiments of the present disclosure may also be computer program products including computer program instructions, which, when executed by a processor, cause the processor to perform steps in a data copying method based on an embodiment of any of the methods of the present disclosure described in the “Exemplary Methods” portion of this specification.

[0148] Computer program products can be created using any combination of one or more programming languages ​​to produce program code for performing the operations of the embodiments of this disclosure, and the programming languages ​​include object-oriented programming languages ​​such as Java® and C++, and conventional procedural programming languages ​​such as the C language or similar programming languages. The program code may run entirely on the user's computing device, partially on the user's device, as separate software packages, partly on the user's computing device and partly on a remote computing device, or entirely on a remote computing device or server.

[0149] Furthermore, embodiments of the present disclosure may be computer-readable storage media storing computer program instructions that, when executed by a processor, cause the processor to perform steps in a data copying method based on an embodiment of any of the methods of the present disclosure described in the “Exemplary Methods” portion of this specification.

[0150] The computer-readable storage medium may use any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any combination thereof. More specific examples (non-exclusive list) of readable storage media include electrical connections with one or more wires, mobile hard drives, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above.

[0151] While the basic principles of this disclosure have been explained above with reference to specific examples, the advantages, advantages, and effects mentioned herein are not limited to those mentioned above, but are merely illustrative, and these advantages, advantages, and effects are not necessarily present in every example of this disclosure. Furthermore, the specific details disclosed above are not limited to those mentioned above, but are merely illustrative and intended to facilitate understanding, and these details do not necessarily limit this disclosure to being realized by those specific details.

[0152] Those skilled in the art can make various modifications and alterations to this disclosure without departing from the spirit and scope of this disclosure. Thus, if such modifications and alterations of this disclosure fall within the scope of the claims of this disclosure and the equivalent art, this disclosure is intended to include such modifications and alterations.

Claims

1. A step of generating an address translation request that includes an intermediate physical address through the target virtual machine, The steps include: converting the intermediate physical address to a physical address through a memory management unit; The steps include: placing the physical address on the direct memory access controller through the target virtual machine; The steps include controlling a target module, including a memory module and / or peripheral module, via the direct memory access controller to perform data copying according to the physical address, The step of sending the intermediate physical address to the memory management unit via a virtualization manager, prior to the step of translating the intermediate physical address to a physical address via a memory management unit, Data copying method.

2. The intermediate physical address includes a source intermediate physical address and a destination intermediate physical address, and the physical address includes a source physical address converted from the source intermediate physical address and a destination physical address converted from the destination intermediate physical address. The step of controlling the target module to perform a data copy according to the physical address via the direct memory access controller is: The steps include determining data characteristic information of the stored data corresponding to the source physical address, The steps include determining a copy method that matches the aforementioned data feature information, The step of controlling the target module, via the direct memory access controller, to copy the stored data from the source physical address to the destination physical address according to the copy scheme, includes the following steps: The data copying method according to claim 1.

3. After the step of controlling the target module to perform a data copy according to the physical address via the direct memory access controller, the method The steps include detecting a failure in the data copy and, in response that the number of data copy failures does not reach a predetermined number, returning to the step of placing the physical address through the target virtual machine to the direct memory access controller, The further step includes detecting a failure in the data copy and outputting abnormality notification information to the direct memory access controller in response to the number of data copy failures reaching the preset number, The data copying method according to claim 1.

4. Prior to the step of placing the physical address on the direct memory access controller through the target virtual machine, the method: The steps include: obtaining the occupancy mode of the target virtual machine with respect to the direct memory access controller; The step further includes obtaining control information for the direct memory access controller, The step of placing the physical address on the direct memory access controller through the target virtual machine is: The steps include determining an arrangement that matches the aforementioned occupancy mode, The step of placing the physical address and the control information through the target virtual machine onto the direct memory access controller according to the placement scheme, The data copying method according to claim 1.

5. A generation module used to generate an address translation request that includes an intermediate physical address through the target virtual machine, A translation module used to translate the intermediate physical address included in the address translation request generated by the generation module into a physical address via a memory management unit, A placement module used to place the physical address converted by the conversion module onto the direct memory access controller via the target virtual machine, A control module used to control a target module, including a memory module and / or a peripheral module, via the direct memory access controller to perform data copying according to the physical address converted by the conversion module, Before the intermediate physical address included in the address translation request generated by the generation module is translated to a physical address via the memory management unit, a transmission module is used to send the intermediate physical address included in the address translation request generated by the generation module to the memory management unit via the virtualization manager, including: Data copying device.

6. The intermediate physical address includes a source intermediate physical address and a destination intermediate physical address, and the physical address includes a source physical address converted from the source intermediate physical address and a destination physical address converted from the destination intermediate physical address. The control module is A first determination submodule used to determine data characteristic information of stored data corresponding to the source physical address, A second decision submodule used to determine a copy method that matches the data feature information determined by the first decision submodule, Includes a control submodule used to control a target module via the direct memory access controller to copy the stored data from the source physical address to the destination physical address in accordance with the copy scheme determined by the second determination submodule, The data copying device according to claim 5.

7. A computer-readable storage medium storing a computer program used to perform the data copying method described in any one of claims 1 to 4.

8. Processor and The processor includes a memory for storing executable instructions, The processor reads and executes the executable instructions from the memory and is used to realize the data copy method described in any one of claims 1 to 4. electronic equipment.

9. A computer program that, when instructions in the computer program are executed by a processor, implements the data copying method described in any one of Claims 1 to 4.

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