Indication device
The substrate design with insulating layers and trenches separates the organic layer into distinct portions for each pixel, addressing performance deterioration and crosstalk issues in OLED display devices, enhancing brightness and reducing manufacturing costs.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-01-04
- Publication Date
- 2026-03-24
AI Technical Summary
Display devices using organic light-emitting diodes (OLEDs) face performance deterioration due to exposure of functional layers at the peripheral portion of the organic layer and contact with the common electrode, and crosstalk between adjacent pixels during layer formation without a mask.
A substrate with insulating layers and trenches is designed to separate the organic layer into distinct portions for each pixel, with inclined trench sides and varying trench depths to prevent contact between layers and adjacent pixels, using vacuum deposition to form the organic layer without a mask.
This design suppresses current leakage and performance degradation, reduces manufacturing costs, and prevents crosstalk between sub-pixels, ensuring consistent brightness and chromaticity.
Smart Images

Figure 0007834359000001 
Figure 0007834359000002 
Figure 0007834359000003
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a display device.
Background Art
[0002] In recent years, display devices applying organic light-emitting diodes (OLEDs) as display elements have been put into practical use. The display element includes an organic layer between a pixel electrode and a common electrode. The organic layer includes functional layers such as a hole transport layer and an electron transport layer in addition to a light-emitting layer. Such an organic layer is formed, for example, by a vacuum evaporation method. For example, when forming an organic layer in which a plurality of functional layers are stacked, there is a risk that the performance of the display element deteriorates due to the exposure of other functional layers or the light-emitting layer from the uppermost functional layer at the peripheral portion of the organic layer and contact with the common electrode. In addition, the organic layer is preferably arranged in a divided manner for each pixel in order to suppress crosstalk between adjacent pixels. For example, a method of forming the organic layer by dividing it for each pixel by an evaporation method without using a mask has been studied.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Patent Document 2
Patent Document 3
Summary of the Invention
Problems to be Solved by the Invention
[0004] An object of the present embodiment is to provide a display device capable of suppressing deterioration in the performance of a display element.
Means for Solving the Problems
[0005] According to this embodiment, a substrate, a first insulating layer disposed on the substrate, a first lower electrode and a second lower electrode disposed on the first insulating layer, a second insulating layer disposed on the first insulating layer and having a first opening superimposed on the first lower electrode, a second opening superimposed on the second lower electrode, and a first trench located between the first and second openings, covers the second insulating layer, the first lower electrode located at the first opening, and the second lower electrode located at the second opening, and generates The first trench comprises an organic layer including a light layer and an upper electrode covering the organic layer, and the first trench has a first trench portion having a bottom surface and first and second sides rising from the bottom surface, a first bottom portion extending outward from the first side portion of the first trench, a second bottom portion extending outward from the second side portion of the first trench, a third side portion rising from the first bottom portion, and a fourth side portion rising from the second bottom portion, and is located above the first trench portion, and extending forward from the third side portion The first trench comprises a third trench portion located above the second trench portion, having a third bottom portion extending outward from the first trench, a fourth bottom portion extending outward from the fourth side portion, a fifth side portion rising from the third bottom portion, and a sixth side portion rising from the fourth bottom portion, wherein the first spacing between the first and second sides at the lower part of the first trench portion is greater than the second spacing between the first and second sides at the upper part of the first trench portion, the third spacing between the third and fourth sides at the lower part of the second trench portion is greater than the fourth spacing between the third and fourth sides at the upper part of the second trench portion, the fifth spacing between the fifth and sixth sides at the lower part of the third trench portion is greater than the sixth spacing between the fifth and sixth sides at the upper part of the third trench portion, the third spacing is greater than the first spacing and smaller than the fifth spacing, and the fourth spacing is greater than the second spacing and smaller than the sixth spacing. Ku , The organic layer comprises a stacked lower layer, middle layer, and upper layer, the lower layer comprising a first lower layer portion covering the first surface of the second insulating layer located between the first trench and the first opening, a second lower layer portion located at the third bottom, a third lower layer portion located at the first bottom, and a fourth lower layer portion located at the bottom surface, the middle layer comprising a first middle layer portion continuously covering the first lower layer portion and the second lower layer portion, a second middle layer portion overlapping the third lower layer portion, and the The upper layer comprises a third middle layer overlapping with a fourth lower layer, and the upper layer comprises a first upper layer that continuously covers the first and second middle layer, and a second upper layer that overlaps with the third middle layer, and the first lower layer, the second lower layer, the third lower layer, and the fourth lower layer are spaced apart from each other, the first middle layer, the second middle layer, and the third middle layer are spaced apart from each other, and the first upper layer and the second upper layer are spaced apart from each other. A display device is provided. [Brief explanation of the drawing]
[0006] [Figure 1] Figure 1 is a plan view showing one example configuration of the display device according to this embodiment. [Figure 2] Figure 2 is a plan view showing pixels. [Figure 3] Figure 3 is a cross-sectional view of the display device along the line A-A' shown in Figure 2. [Figure 4] Figure 4 is a cross-sectional view showing the detailed structure of the organic layer. [Figure 5] Figure 5 is a plan view showing the farm layer. [Figure 6] Figure 6 is a cross-sectional view of the display device along the line B-B' shown in Figure 1. [Figure 7] Figure 7 is a cross-sectional view showing a first modified example of this embodiment. [Figure 8] Figure 8 is a plan view showing a second modified example of this embodiment. [Figure 9] Figure 9 is a plan view showing a third modified example of this embodiment. [Modes for carrying out the invention]
[0007] Hereinafter, this embodiment will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and any modifications that a person skilled in the art could easily conceive while maintaining the spirit of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment in order to clarify the explanation; however, these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and in each drawing, components that perform the same or similar functions as those described above in previously shown drawings are denoted by the same reference numerals, and redundant detailed explanations may be omitted as appropriate.
[0008] The display device DSP according to this embodiment is an organic electroluminescent display device equipped with an organic light-emitting diode (OLED) as a display element, and is mounted in televisions, personal computers, mobile terminals, mobile phones, etc.
[0009] Figure 1 is a plan view showing one example configuration of the DSP display device according to this embodiment. The first direction X, the second direction Y, and the third direction Z shown in the figure are orthogonal to each other. Note that the first direction X, the second direction Y, and the third direction Z may intersect at angles other than 90 degrees. In this specification, the direction toward the tip of the arrow indicating the third direction Z is referred to as "up," and the direction opposite to the tip of the arrow is referred to as "down." Furthermore, it is assumed that there is an observation position for observing the display device DSP on the side of the arrow indicating the third direction Z, and viewing from this observation position toward the XY plane defined by the first direction X and the second direction Y is referred to as a plan view.
[0010] The display device DSP comprises an insulating substrate 10. The substrate 10 may be glass or a flexible resin film. The display device DSP also has a display area DA for displaying an image, and a non-display area NDA surrounding the display area DA.
[0011] The display device DSP has multiple pixels PX arranged in a matrix in the display area DA in the first direction X and the second direction Y. Each pixel PX has multiple subpixels SP1, SP2, and SP3. In one example, a pixel PX has a red subpixel SP1, a green subpixel SP2, and a blue subpixel SP3. In addition to the three subpixels of the above colors, a pixel PX may have four or more subpixels, including subpixels of other colors such as white.
[0012] A brief explanation of one example configuration of a sub-pixel SP included in a pixel PX is provided. In other words, the sub-pixel SP comprises a pixel circuit 1 and a display element 20 driven and controlled by the pixel circuit 1. The pixel circuit 1 comprises a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switch elements composed of, for example, thin-film transistors.
[0013] For the pixel switch 2, the gate electrode is connected to the scanning line GL, the source electrode is connected to the signal line SL, and the drain electrode is connected to one electrode constituting the capacitor 4 and the gate electrode of the driving transistor 3. For the driving transistor 3, the source electrode is connected to the other electrode constituting the capacitor 4 and the power supply line PL, and the drain electrode is connected to the anode of the display element 20. The cathode of the display element 20 is connected to the power supply line FL. Note that the configuration of the pixel circuit 1 is not limited to the illustrated example.
[0014] The display element 20 is an organic light emitting diode (OLED) which is a light emitting element. For example, the sub-pixel SP1 includes a display element that emits light corresponding to a red wavelength, the sub-pixel SP2 includes a display element that emits light corresponding to a green wavelength, and the sub-pixel SP3 includes a display element that emits light corresponding to a blue wavelength. The configuration of the display element 20 will be described later.
[0015] The display device DSP includes power supply lines 51 and 52 located in the non-display area NDA, a plurality of peripheral electrodes 6, and pads PD1 and PD2. The non-display area NDA has a first area N1 and a second area N2 extending in the second direction Y, and a third area N3 extending in the first direction X. The first area N1, the display area DA, and the second area N2 are arranged in the first direction X in this order. A flexible wiring board (not shown) is mounted on the third area N3. The power supply line 51 is located in the first area N1, and the power supply line 52 is located in the second area N2. The plurality of peripheral electrodes 6 are arranged in the second direction Y in each of the first area N1 and the second area N2. The pads PD1 and PD2 are located in the third area N3. The power supply line 51 is electrically connected to the plurality of peripheral electrodes 6 located in the first area N1. Also, the power supply line 51 is electrically connected to the pad PD1. The power supply line 52 is electrically connected to the plurality of peripheral electrodes 6 located in the second area N2. Also, the power supply line 52 is electrically connected to the pad PD2.
[0016] Figure 2 is a plan view showing the pixel PX. Figure 2 illustrates the lower electrodes E11, E12, and E13 of the display device DSP, and the insulating layer 12.
[0017] The lower electrode (first lower electrode) E11 is located on sub-pixel SP1. The lower electrode (second lower electrode) E12 is located on sub-pixel SP2. The lower electrode E13 is located on sub-pixel SP3. The lower electrodes E11 to E13 are aligned in the first direction X. The lower electrodes, including the lower electrodes E11 to E13, are electrodes located for each sub-pixel or display element, and are sometimes referred to as pixel electrodes or anodes.
[0018] The insulating layer 12 is formed in a grid pattern when viewed from above. The insulating layer 12 is formed to partition display elements or sub-pixels and may be referred to as ribs, partitions, etc. The insulating layer 12 has a first opening OP1 superimposed on the lower electrode E11, a second opening OP2 superimposed on the lower electrode E12, and a third opening OP3 superimposed on the lower electrode E13. The insulating layer 12 covers the peripheral edges of each of the lower electrodes E11 to E13, and the central parts of each of the lower electrodes E11 to E13 are exposed from the insulating layer 12 at the first opening OP1, the second opening OP2, and the third opening OP3.
[0019] Furthermore, the insulating layer 12 has trenches T11, T12, T13, and T14 extending in the second direction Y and aligned in the first direction X, and trenches T21 and T22 extending in the first direction X and aligned in the second direction Y. Trench (first trench) T12 is located between the first opening OP1 and the second opening OP2. Trench T13 is located between the second opening OP2 and the third opening OP3. Trench (second trench) T11 is located on the opposite side of trench T12, with the first opening OP1 in between. Trench T14 is located on the opposite side of trench T13, with the third opening OP3 in between. Trench (third trench) T21 is connected to trenches T11 to T14. Also, trench (fourth trench) T22 is connected to trenches T11 to T14. Trench T21 is located on the opposite side of trench T22, with the first opening OP1, the second opening OP2, and the third opening OP3 in between.
[0020] Each trench does not overlap with an adjacent lower electrode in a plan view. Lower electrode E11 is located between trenches T11 and T12, lower electrode E12 is located between trenches T12 and T13, and lower electrode E13 is located between trenches T13 and T14. Furthermore, lower electrodes E11 to E13 are located between trenches T21 and T22.
[0021] Here, the shape of the sub-pixel corresponds, for example, to the shape of the lower electrode. That is, the sub-pixels SP1, SP2, and SP3 that constitute one pixel PX are each formed in a roughly rectangular shape extending in the second direction Y, and are arranged in the first direction X. The emission colors of adjacent sub-pixels arranged in the first direction X are different from each other. The areas of sub-pixels SP1, SP2, and SP3 may be the same, or they may be different from each other, as will be described later. Furthermore, the shape of the sub-pixel may be defined by the shape of the light-emitting region of the display element.
[0022] Figure 3 is a cross-sectional view of the display device DSP along the line A-A' shown in Figure 2. The display device DSP comprises a substrate 10, switching elements SW1 and SW2, an insulating layer 11, lower electrodes E11 and E12, an insulating layer 12, an organic layer OR, and an upper electrode E2. The display element 20A is composed of the lower electrode E11, a first portion OR1 of the organic layer OR, and an upper electrode E2. The display element 20B is composed of the lower electrode E12, a second portion OR2 of the organic layer OR, and an upper electrode E2.
[0023] The switching elements SW1 and SW2 are arranged on the substrate 10. The switching elements SW1 and SW2 correspond to, for example, the drive transistor 3 shown in Figure 1. The insulating layer (first insulating layer) 11 is arranged on the substrate 10 and covers the switching elements SW1 and SW2. The insulating layer 11 corresponds to the underlayer of the display elements 20A and 20B and is, for example, an organic insulating layer. Note that the pixel switch 2 of the pixel circuit 1 shown in Figure 1 is arranged on the substrate 10 and covered by the insulating layer 11, but it is not shown here.
[0024] The lower electrodes E11 and E12 are positioned on the insulating layer 11. The lower electrode E11 is electrically connected to the switching element SW1 via a contact hole CH1 formed in the insulating layer 11. The lower electrode E12 is electrically connected to the switching element SW2 via a contact hole CH2 formed in the insulating layer 11.
[0025] The lower electrodes E11 and E12 are transparent electrodes formed from a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the lower electrodes E11 and E12 may be metal electrodes formed from a metallic material such as silver or aluminum. Furthermore, the lower electrodes E11 and E12 may be a laminate of transparent electrodes and metal electrodes. For example, the lower electrodes E11 and E12 may be configured as a laminate with transparent electrodes, metal electrodes, and transparent electrodes stacked in that order, or as a laminate of three or more layers.
[0026] The insulating layer (second insulating layer) 12 is positioned on top of the insulating layer 11 and covers the periphery of the lower electrodes E11 and E12. The insulating layer 12 is, for example, an organic insulating layer. The insulating layer 12 has the first opening OP1, the second opening OP2, and the trench T12, as well as a first surface SF1 and a second surface SF2. The first opening OP1 penetrates the insulating layer 12 to the lower electrode E11. The second opening OP2 penetrates the insulating layer 12 to the lower electrode E12. The first surface SF1 is located between the trench T12 and the first opening OP1. The second surface SF2 is located between the trench T12 and the second opening OP2. The insulating layer 12 also has a thickness TH. In the illustrated example, the thickness TH corresponds to the distance between the highest point of the insulating layer 12 and the insulating layer 11, and is, for example, 1.5 to 2.0 μm.
[0027] Trench T12 includes a first trench portion TP1, a second trench portion TP2 located above the first trench portion TP1, and a third trench portion TP3 located above the second trench portion TP2. The first trench portion TP1 has a bottom surface BS and a first side surface S1 and a second side surface S2 rising from the bottom surface BS. The bottom surface BS is, for example, a surface substantially parallel to the XY plane. The first side surface S1 and the second side surface S2 are spaced apart and face each other in the first direction X.
[0028] The second trench portion TP2 has a first bottom B1 extending outward from the first side surface S1 to the trench T12, a second bottom B2 extending outward from the second side surface S2 to the trench T12, a third side surface S3 rising from the first bottom B1, and a fourth side surface S4 rising from the second bottom B2. The first bottom B1 and the second bottom B2 are, for example, surfaces substantially parallel to the bottom surface BS. The third side surface S3 and the fourth side surface S4 are spaced apart and face each other in the first direction X.
[0029] The third trench portion TP3 has a third bottom B3 extending outward from the trench T12 from the third side surface S3, a fourth bottom B4 extending outward from the trench T12 from the fourth side surface S4, a fifth side surface S5 rising from the third bottom B3, and a sixth side surface S6 rising from the fourth bottom B4. The third bottom B3 and the fourth bottom B4 are, for example, surfaces substantially parallel to the bottom surface BS. The fifth side surface S5 and the sixth side surface S6 are spaced apart and face each other in the first direction X.
[0030] The fifth side S5 is connected to the first side SF1. The sixth side S6 is connected to the second side SF2. Trench T12 corresponds to the space enclosed by the first side S1, the second side S2, the third side S3, the fourth side S4, the fifth side S5, the sixth side S6, the bottom BS, the first bottom B1, the second bottom B2, the third bottom B3, and the fourth bottom B4.
[0031] The first trench portion TP1 has a first gap GP1 between the first side surface S1 and the second side surface S2 at its lower end, and a second gap GP2 between the first side surface S1 and the second side surface S2 at its upper end. The first gap GP1 is larger than the second gap GP2. In other words, the first trench portion TP1 is formed such that its width along the first direction X decreases from the lower end to the upper end. To put it another way, the first side surface S1 is inclined with respect to the direction normal to the bottom surface BS so as to overlap with the bottom surface BS. Similarly, the second side surface S2 is inclined with respect to the direction normal to the bottom surface BS so as to overlap with the bottom surface BS.
[0032] The second trench portion TP2 has a third gap GP3 between the third side surface S3 and the fourth side surface S4 at its lower end, and a fourth gap GP4 between the third side surface S3 and the fourth side surface S4 at its upper end. The third gap GP3 is larger than the fourth gap GP4. In other words, the second trench portion TP2 is formed such that its width along the first direction X decreases from the lower end to the upper end. To put it another way, the third side surface S3 is inclined with respect to the normal direction of the first bottom B1 so as to overlap with the first bottom B1. Similarly, the fourth side surface S4 is inclined with respect to the normal direction of the second bottom B2 so as to overlap with the second bottom B2.
[0033] The third trench portion TP3 has a fifth gap GP5 between the fifth side surface S5 and the sixth side surface S6 at its lower end, and a sixth gap GP6 between the fifth side surface S5 and the sixth side surface S6 at its upper end. The fifth gap GP5 is larger than the sixth gap GP6. In other words, the third trench portion TP3 is formed such that its width along the first direction X decreases from the bottom to the top. In other words, the fifth side surface S5 is inclined with respect to the normal direction of the third bottom B3 so as to overlap with the third bottom B3. Similarly, the sixth side surface S6 is inclined with respect to the normal direction of the fourth bottom B4 so as to overlap with the fourth bottom B4. The third interval GP3 is larger than the first interval GP1 and smaller than the fifth interval GP5. The fourth interval GP4 is larger than the second interval GP2 and smaller than the sixth interval GP6.
[0034] The organic layer OR covers the insulating layer 12, the lower electrode E11 located at the first opening OP1, and the lower electrode E12 located at the second opening OP2. The organic layer OR has a first portion OR1, a second portion OR2, and a third portion OR3. The first portion OR1 covers the lower electrode E11 located at the first opening OP1 and the first surface SF1. The second portion OR2 covers the lower electrode E12 located at the second opening OP2 and the second surface SF2. Parts of the first portion OR1 and part of the second portion OR2 are also located inside the trench T12. The third portion OR3 is located on the bottom surface BS of the trench T12. The third portion OR3 is spaced apart from the first portion OR1 and the second portion OR2. The organic layer OR includes an emissive layer EL, as will be described later, and these first portion OR1, second portion OR2, and third portion OR3 each contain an emissive layer EL of the same color. Furthermore, the organic layer OR includes, in addition to the light-emitting layer EL, at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.
[0035] The upper electrode E2 covers the organic layer OR. That is, the upper electrode E2 covers the first portion OR1, the second portion OR2, and the third portion OR3, respectively. Inside the trench T12, the upper electrode E2 covers the third portion OR3 and is in contact with the bottom surface BS. The upper electrode E2 is also in contact with the first side surface S1 and the second side surface S2 inside the trench T12. The upper electrode E2 is a transparent electrode formed from a transparent conductive material such as ITO or IZO. The upper electrode E2 is electrically connected to the power supply line FL located in the display area DA shown in Figure 1. The upper electrode E2 is an electrode commonly arranged for multiple sub-pixels or multiple display elements, and may be referred to as a common electrode, counter electrode, cathode, etc. The upper electrode E2 may be covered by a transparent protective layer (including at least one of an inorganic insulating layer and an organic insulating layer).
[0036] In the display element 20A, the first portion OR1 is located between the lower electrode E11 and the upper electrode E2, and can therefore form a light-emitting region. In the display element 20B, the second portion OR2 is located between the lower electrode E12 and the upper electrode E2, and can therefore form a light-emitting region. The third portion OR3 is located between the insulating layer 12 and the upper electrode E2, and is completely separated from the first portion OR1 and the second portion OR2, and therefore does not emit light. Furthermore, the portion of the first portion OR1 that covers the first surface SF1 and the portion located within the trench T12 are located between the insulating layer 12 and the upper electrode E2, and therefore emit almost no light. Similarly, the portion of the second portion OR2 that covers the second surface SF2 and the portion located within the trench T12 are located between the insulating layer 12 and the upper electrode E2, and therefore emit almost no light.
[0037] Figure 4 is a cross-sectional view showing the detailed structure of the organic layer OR. The organic layer OR comprises a stacked lower layer L1, a middle layer L2, and an upper layer L3. The lower layer L1 includes a first lower layer portion L11 covering the first surface SF1, a second lower layer portion L12 located at the third bottom B3, a third lower layer portion L13 located at the first bottom B1, a fourth lower layer portion L14 located at the bottom surface BS, a fifth lower layer portion L15 located at the second bottom B2, a sixth lower layer portion L16 located at the fourth bottom B4, and a seventh lower layer portion L17 covering the second surface SF2. The first lower layer portion L11, the second lower layer portion L12, the third lower layer portion L13, the fourth lower layer portion L14, the fifth lower layer portion L15, the sixth lower layer portion L16, and the seventh lower layer portion L17 are spaced apart from each other.
[0038] The middle layer L2 comprises a first middle layer L21 that continuously covers the first lower layer L11 and the second lower layer L12, a second middle layer L22 that overlaps with the third lower layer L13, a third middle layer L23 that overlaps with the fourth lower layer L14, a fourth middle layer L24 that overlaps with the fifth lower layer L15, and a fifth middle layer L25 that continuously covers the sixth lower layer L16 and the seventh lower layer L17. The first middle layer L21, the second middle layer L22, the third middle layer L23, the fourth middle layer L24, and the fifth middle layer L25 are spaced apart from each other.
[0039] The upper layer L3 comprises a first upper layer L31 that continuously covers the first intermediate layer L21 and the second intermediate layer L22, a second upper layer L32 that overlaps with the third intermediate layer L23, and a third upper layer L33 that continuously covers the fourth intermediate layer L24 and the fifth intermediate layer L25. The first upper layer L31, the second upper layer L32, and the third upper layer L33 are spaced apart from each other.
[0040] The first lower layer L11 has a first end EG1 located on the trench T12 side. The first end EG1 is covered by the first middle layer L21. The first middle layer L21 has a second end EG2 located on the trench T12 side. The second end EG2 is covered by the first upper layer L31. The seventh lower layer L17 has a third end EG3 located on the trench T12 side. The third end EG3 is covered by the fifth middle layer L25. The fifth middle layer L25 has a fourth end EG4 located on the trench T12 side. The fourth end EG4 is covered by the third upper layer L33.
[0041] The first part OR1 described above includes the first lower part L11, the second lower part L12, the third lower part L13, the first middle part L21, the second middle part L22, and the first upper part L31. The second part OR2 described above includes the fifth lower part L15, the sixth lower part L16, the seventh lower part L17, the fourth middle part L24, the fifth middle part L25, and the third upper part L33. The third part OR3 described above includes the fourth lower part L14, the third middle part L23, and the second upper part L32.
[0042] As shown in the figure, a gap GP is formed between the fifth side surface S5 and the second lower layer L12. A gap GP is formed between the third side surface S3 and the third lower layer L13 and the second middle layer L22. A gap GP is formed between the fourth side surface S4 and the fifth lower layer L15 and the fourth middle layer L24. A gap GP is formed between the sixth side surface S6 and the sixth lower layer L16. These gaps GP do not necessarily have to be formed and may be filled with an organic layer OR.
[0043] The upper electrode E2 is in contact with the first upper layer L31, the second upper layer L32, the third upper layer L33, the second middle layer L22, the third middle layer L23, the fourth middle layer L24, the third lower layer L13, the fourth lower layer L14, and the fifth lower layer L15 inside the trench T12.
[0044] The first trench portion TP1 has a first depth D1, the second trench portion TP2 has a second depth D2, and the third trench portion TP3 has a third depth D3. The second depth D2 is smaller than the first depth D1 and larger than the third depth D3. In other words, the trench portions are formed deeper the lower they are located. Trench T12 has a fourth depth D4, which corresponds to the sum of the first depth D1, the second depth D2, and the third depth D3. The fourth depth D4 is, for example, 0.5 to 1.0 μm.
[0045] Next, we will explain the film formation process for the organic layer (OR). The organic layer OR described above is formed, for example, by vacuum deposition. The dashed line in the figure shows how the organic material for forming the organic layer OR is released from the deposition source. After forming an insulating layer 12 having a first opening OP1, a second opening OP2, and a trench T12, the organic material for forming the organic layer OR is deposited.
[0046] First, an organic material is deposited to form the lower layer L1. Because the fifth side surface S5 is inclined, almost no lower layer L1 is formed on the fifth side surface S5. As a result, the lower layer L1 is formed separately into a first lower layer portion L11 and a second lower layer portion L12. Similarly, because the third side surface S3 is inclined, almost no lower layer L1 is formed on the third side surface S3. As a result, the lower layer L1 is formed separately into a second lower layer portion L12 and a third lower layer portion L13. Similarly, because the first side surface S1 is inclined, almost no lower layer L1 is formed on the first side surface S1. As a result, the lower layer L1 is formed separately into a third lower layer portion L13 and a fourth lower layer portion L14.
[0047] Because the second side surface S2 is inclined, almost no lower layer L1 is formed on the second side surface S2. As a result, the lower layer L1 is formed separately into a fourth lower layer portion L14 and a fifth lower layer portion L15. Similarly, because the fourth side surface S4 is inclined, almost no lower layer L1 is formed on the fourth side surface S4. As a result, the lower layer L1 is formed separately into a fifth lower layer portion L15 and a sixth lower layer portion L16. Similarly, because the sixth side surface S6 is inclined, almost no lower layer L1 is formed on the sixth side surface S6. As a result, the lower layer L1 is formed separately into a sixth lower layer portion L16 and a seventh lower layer portion L17. In other words, the lower layer L1 is separated into the first lower layer portion L11, the second lower layer portion L12, the third lower layer portion L13, the fourth lower layer portion L14, the fifth lower layer portion L15, the sixth lower layer portion L16, and the seventh lower layer portion L17 by the first side surface S1, the second side surface S2, the third side surface S3, the fourth side surface S4, the fifth side surface S5, and the sixth side surface S6.
[0048] Next, an organic material is deposited to form the middle layer L2. The middle layer L2 is not separated by the fifth side surface S5 because the second lower layer portion L12 is located at the third bottom portion B3. The middle layer L2 is separated into the first middle layer portion L21 and the second middle layer portion L22 by the third side surface S3 because the second trench portion TP2 has sufficient depth. The middle layer L2 is separated into the second middle layer portion L22 and the third middle layer portion L23 by the first side surface S1 because the first trench portion TP1 has sufficient depth. The middle layer L2 is separated into the third middle layer portion L23 and the fourth middle layer portion L24 by the second side surface S2 because the first trench portion TP1 has sufficient depth. The middle layer L2 is separated into the fourth middle layer portion L24 and the fifth middle layer portion L25 by the fourth side surface S4 because the second trench portion TP2 has sufficient depth. The middle layer L2 is not separated by the sixth side S6 because the sixth lower layer L16 is located at the fourth bottom B4.
[0049] Next, an organic material is deposited to form the upper layer L3. The upper layer L3 is not separated by the fifth side surface S5 because the second lower layer portion L12 and the first middle layer portion L21 overlap the third bottom portion B3. The upper layer L3 is not separated by the third side surface S3 because the third lower layer portion L13 and the second middle layer portion L22 overlap the first bottom portion B1. The upper layer L3 is separated by the first side surface S1 into the first upper layer portion L31 and the second upper layer portion L32 because the first trench portion TP1 has sufficient depth. The upper layer L3 is separated by the second side surface S2 into the second upper layer portion L32 and the third upper layer portion L33 because the first trench portion TP1 has sufficient depth. The upper layer L3 is not separated by the fourth side surface S4 because the fifth lower layer portion L15 and the fourth middle layer portion L24 overlap the second bottom portion B2. The upper layer L3 is not separated by the sixth side surface S6 because the sixth lower layer L16 and the fifth middle layer L25 are located on top of the fourth bottom B4. Furthermore, since the upper electrode E2 is formed by sputtering, it is formed continuously on top of the organic layer OR, the bottom surface BS, the first side surface S1, and the second side surface S2.
[0050] Next, the effects that can be obtained by this embodiment will be described. It is desirable that the bottom layer L1 of the organic layer OR be in contact with the lower electrodes E11 and E12, and the top layer L3 be in contact with the upper electrode E2. However, for example, when the organic layer OR is provided separately for each sub-pixel, the bottom layer L1 and middle layer L2 at the edges of the organic layer OR may be exposed from the top layer L3 and come into contact with the upper electrode E2. This can cause current leakage from the bottom layer L1 and middle layer L2 to the upper electrode E2, making it difficult to obtain the desired brightness and chromaticity for the applied voltage.
[0051] According to this embodiment, the trench T12 has trench portions that are formed deeper towards the bottom, and the first side surface S1, second side surface S2, third side surface S3, fourth side surface S4, fifth side surface S5, and sixth side surface S6 are inclined. Therefore, of the first lower layer portion L11, first middle layer portion L21, and first upper layer portion L31 that contribute to the display of the display element 20A, the upper layers are separated from the sub-pixel SP1. Thus, the first lower layer portion L11 and the first middle layer portion L21 are covered by the first upper layer portion L31, preventing them from coming into contact with the upper electrode E2. Similarly, of the seventh lower layer portion L17, fifth middle layer portion L25, and third upper layer portion L33 that contribute to the display of the display element 20B, the upper layers are separated from the sub-pixel SP2. Therefore, the seventh lower layer L17 and the fifth middle layer L25 are covered by the third upper layer L33, preventing them from coming into contact with the upper electrode E2.
[0052] Since the third lower layer portion L13 and the second middle layer portion L22, which are in contact with the upper electrode E2, are separated from the first lower layer portion L11 and the first middle layer portion L21, which contribute to the display, no current leakage occurs from the third lower layer portion L13 and the second middle layer portion L22 to the upper electrode E2. Also, since the fifth lower layer portion L15 and the fourth middle layer portion L24, which are in contact with the upper electrode E2, are separated from the seventh lower layer portion L17 and the fifth middle layer portion L25, which contribute to the display, no current leakage occurs from the fifth lower layer portion L15 and the fourth middle layer portion L24 to the upper electrode E2. Therefore, current leakage from the lower layer L1 and middle layer L2 to the upper electrode E2 is suppressed, and performance degradation of the display element can be suppressed.
[0053] The depth of each trench is adjusted according to the film thickness of each layer constituting the organic layer OR. In the illustrated example, trench T12 had three trench sections, but it may have four or more trench sections. The number of trench sections may be greater than the number of layers constituting the organic layer OR. The organic layer OR may also be composed of, for example, four or more layers. In that case as well, the uppermost layer of the organic layer is separated from the other layers on the outside. In the example shown in Figure 4, the first side surface S1, the second side surface S2, the third side surface S3, the fourth side surface S4, the fifth side surface S5, the sixth side surface S6, and the bottom surface BS were all flat, but they may also be curved surfaces.
[0054] Furthermore, according to this embodiment, the organic layer OR can be formed in the trench T12 by separating it into a first portion OR1 located at sub-pixel SP1 and a second portion OR2 located at sub-pixel SP2. In other words, the organic layer OR can be formed separately for each sub-pixel by full-surface deposition without the use of a mask. This suppresses crosstalk between adjacent sub-pixels. In addition, since no separate material is required to separate the organic layer OR, manufacturing costs can be reduced.
[0055] Furthermore, as mentioned above, the organic layer OR includes an emissive layer EL, which is, for example, one of the lower layer L1, the middle layer L2, and the upper layer L3. For example, let's assume that the lower layer L1 and the upper layer L3 are functional layers, and the middle layer L2 is the emissive layer EL. The lower layer L1 and the upper layer L3 are, for example, hole injection layers, hole transport layers, hole block layers, electron injection layers, electron transport layers, and electron block layers, but they may also be other functional layers. In addition, each of the lower layer L1 and the upper layer L3 is not limited to a single layer, but may be a laminate in which multiple functional layers are stacked. Also, at least one of the lower layer L1 and the upper layer L3 may be omitted. For example, when the lower electrodes E11 and E12 correspond to the anode, the lower layer L1 between the light-emitting layer EL and the lower electrodes E11 and E12 includes at least one hole injection layer and a hole transport layer, and the upper layer L3 between the light-emitting layer EL and the upper electrode E2 includes at least one electron transport layer and an electron injection layer.
[0056] Furthermore, if the potentials of the lower electrodes E11 and E12 are relatively higher than the potential of the upper electrode E2, then the lower electrodes E11 and E12 correspond to the anode and the upper electrode E2 corresponds to the cathode. If the potential of the upper electrode E2 is relatively higher than the potentials of the lower electrodes E11 and E12, then the upper electrode E2 corresponds to the anode and the lower electrodes E11 and E12 correspond to the cathode.
[0057] Furthermore, for example, all sub-pixels SP in the display area DA are arranged with an organic layer OR containing an emissive layer EL of the same color. When the emissive color of each display element is white, multi-color display can be achieved by placing a color filter opposite the display element. Also, when the emissive color of each display element is ultraviolet light, multi-color display can be achieved by placing a light conversion layer opposite the display element.
[0058] Figure 5 is a plan view showing the organic layer OR. In Figure 5, the region where the organic layer OR is located is indicated by a diagonal line. The first part OR1 is located in sub-pixel SP1. The second part OR2 is located in sub-pixel SP2. The first part OR1 and the second part OR2 are aligned in the first direction X.
[0059] The third part OR3 is formed in a grid pattern in plan view. The third part OR3 has parts OR31, OR32, and OR33 extending in the second direction Y and aligned in the first direction X, and parts OR34 and OR35 extending in the first direction X and aligned in the second direction Y. Part OR32 is located between the first part OR1 and the second part OR2. Part OR31 is located on the opposite side of part OR32, with the first part OR1 in between. Part OR33 is located on the opposite side of part OR32, with the second part OR2 in between. Part OR34 is connected to parts OR31 through OR33. Part OR35 is connected to parts OR31 through OR33. Part OR34 is located on the opposite side of part OR35, with the first part OR1 and the second part OR2 in between.
[0060] Parts OR31 to OR33 are located within trenches T11 to T13, respectively. Parts OR34 and OR35 are located within trenches T21 and T22, respectively. Furthermore, the outer shape of the first part OR1 is larger than the outer shape of the lower electrode E11 when viewed from above. The outer shape of the second part OR2 is larger than the outer shape of the lower electrode E12 when viewed from above.
[0061] Figure 6 is a cross-sectional view of the display device DSP along the line B-B' shown in Figure 1. The peripheral electrode 6 and power line 52 are located on the insulating layer 11. The insulating layer 12 covers the peripheral electrode 6 and power line 52. The organic layer OR is not formed in the non-display area NDA. The upper electrode E2 covers the insulating layer 12 in the non-display area NDA and is connected to the peripheral electrode 6 via a contact hole CH3 formed in the insulating layer 12. In the illustrated example, the peripheral electrode 6 and power line 52 are located in the same layer as the lower electrode E10, but they may be located in different layers from the lower electrode E10.
[0062] Figure 7 is a cross-sectional view showing a first modified example of this embodiment. The configuration shown in Figure 7 differs from the configuration shown in Figure 3 in that the trench T12 penetrates the insulating layer 12 all the way to the insulating layer 11. In the illustrated example, the bottom surface BS corresponds to the top surface of the insulating layer 11. Therefore, the third portion OR3 and the upper electrode E2 are in contact with the insulating layer 11 within the trench T12. The same effects as described above can be obtained in this first modified example as well.
[0063] Figure 8 is a plan view showing a second modified example of this embodiment. The configuration shown in Figure 8 differs from the configuration shown in Figure 2 in the layout of sub-pixels SP1, SP2, and SP3.
[0064] Lower electrodes E11 and E12 are aligned in the second direction Y. Lower electrode E13 is aligned in the first direction X of lower electrodes E11 and E12.
[0065] The insulating layer 12 has trenches T15, T16, and T17 extending in the second direction Y and aligned in the first direction X, and trenches T23, T24, and T25 extending in the first direction X and aligned in the second direction Y. Trench T16 is located between the first opening OP1 and the second opening OP2 and the third opening OP3. Trench T15 is located on the opposite side of trench T16, with the first opening OP1 and the second opening OP2 in between. Trench T17 is located on the opposite side of trench T16, with the third opening OP3 in between. Trench T23 is connected to trenches T15 to T17. Trench T24 is connected to trenches T15 and T16. Trench T25 is connected to trenches T15 to T17. Trench T23 is located on the opposite side of trench T25, with the first opening OP1, the second opening OP2, and the third opening OP3 in between. Trench T24 is located between the first opening OP1 and the second opening OP2.
[0066] Each trench does not overlap with an adjacent lower electrode in a plan view. In the first direction X, lower electrodes E11 and E12 are located between trenches T15 and T16, and lower electrode E13 is located between trenches T16 and T17. In the second direction Y, lower electrode E11 is located between trenches T23 and T24, lower electrode E12 is located between trenches T24 and T25, and lower electrode E13 is located between trenches T23 and T25.
[0067] Sub-pixels SP1 and SP2 are aligned in the second direction Y, sub-pixels SP1 and SP3 are aligned in the first direction X, and sub-pixels SP2 and SP3 are aligned in the first direction X. Sub-pixel SP1 is formed in a roughly rectangular shape extending in the first direction X, and sub-pixels SP2 and SP3 are formed in a roughly rectangular shape extending in the second direction Y. The emitted colors of sub-pixels SP1 to SP3 are different from each other. Also, the areas of each sub-pixel SP1 to SP3 are different from each other. The area of sub-pixel SP2 is larger than the area of sub-pixel SP1, and the area of sub-pixel SP3 is larger than the area of sub-pixel SP2. Note that the area of sub-pixel SP1 may be the same as the area of sub-pixel SP2. The same effects as described above can be obtained in this second modified example as well.
[0068] Figure 9 is a plan view showing a third modified example of this embodiment. The configuration shown in Figure 9 differs from the configuration shown in Figure 2 in the layout of sub-pixels SP1, SP2, and SP3. Direction DR1 shown in Figure 9 is inclined counterclockwise at an angle θ1 with respect to the second direction Y, and direction DR2 shown in Figure 9 is inclined clockwise at an angle θ2 with respect to the second direction Y.
[0069] The insulating layer 12 has a plurality of trenches T1 extending in direction DR1 and aligned in direction DR2, and a plurality of trenches T2 extending in direction DR2 and aligned in direction DR1. A plurality of lower electrodes E11 and a plurality of first apertures OP1 are each located at a plurality of red sub-pixels SP1. A plurality of lower electrodes E12 and a plurality of second apertures OP2 are each located at a plurality of green sub-pixels SP2. A plurality of lower electrodes E13 and a plurality of third apertures OP3 are each located at a plurality of blue sub-pixels SP3.
[0070] Multiple lower electrodes E11 and E12 are arranged alternately in direction DR1 between two adjacent trenches T1. Similarly, multiple lower electrodes E12 and E13 are arranged alternately in direction DR1 between two adjacent trenches T1. Multiple lower electrodes E11 and E12 are also arranged alternately in direction DR2 between two adjacent trenches T2. Furthermore, multiple lower electrodes E12 and E13 are arranged alternately in direction DR2 between two adjacent trenches T2. Each trench T1 and T2 does not overlap with an adjacent lower electrode in a plan view.
[0071] Sub-pixels SP1 and SP3 are formed in a roughly square shape, some sub-pixels SP2 are formed in a roughly rectangular shape extending in direction DR1, and other sub-pixels SP2 are formed in a roughly rectangular shape extending in direction DR2. Furthermore, the area of each sub-pixel SP1 to SP3 is different from that of the others. The area of sub-pixel SP3 is larger than the area of sub-pixel SP1, and the area of sub-pixel SP1 is larger than the area of sub-pixel SP2. The same effects as described above can be obtained in this third modified example as well.
[0072] As described above, according to this embodiment, a display device capable of suppressing performance degradation of the display element can be obtained.
[0073] Although several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.
Claims
1. Substrate and A first insulating layer disposed on the substrate, A first lower electrode and a second lower electrode are disposed on the first insulating layer, A second insulating layer is disposed on the first insulating layer and has a first opening superimposed on the first lower electrode, a second opening superimposed on the second lower electrode, and a first trench located between the first opening and the second opening. The second insulating layer, the first lower electrode located at the first opening, and the second lower electrode located at the second opening are covered by an organic layer including a light-emitting layer, The system comprises an upper electrode covering the organic layer, The first trench is, A first trench portion having a bottom surface and a first side surface and a second side surface rising from the bottom surface, A second trench portion is located above the first trench portion, having a first bottom portion extending outward from the first side surface, a second bottom portion extending outward from the second side surface, a third side surface rising from the first bottom portion, and a fourth side surface rising from the second bottom portion. The third trench portion is located above the second trench portion and has a third bottom portion extending outward from the third side surface, a fourth bottom portion extending outward from the fourth side surface, a fifth side surface rising from the third bottom portion, and a sixth side surface rising from the fourth bottom portion. The first distance between the first side and the second side at the lower part of the first trench portion is greater than the second distance between the first side and the second side at the upper part of the first trench portion. The third distance between the third and fourth sides at the lower part of the second trench portion is greater than the fourth distance between the third and fourth sides at the upper part of the second trench portion. The fifth distance between the fifth side and the sixth side at the lower part of the third trench portion is greater than the sixth distance between the fifth side and the sixth side at the upper part of the third trench portion. The third interval is greater than the first interval and smaller than the fifth interval. The fourth interval is greater than the second interval and smaller than the sixth interval. The organic layer comprises a stacked lower layer, middle layer, and upper layer. The lower layer comprises a first lower layer portion covering the first surface of the second insulating layer located between the first trench and the first opening, a second lower layer portion located at the third bottom, a third lower layer portion located at the first bottom, and a fourth lower layer portion located at the bottom surface. The aforementioned intermediate layer comprises a first intermediate layer portion that continuously covers the first lower layer portion and the second lower layer portion, a second intermediate layer portion that overlaps with the third lower layer portion, and a third intermediate layer portion that overlaps with the fourth lower layer portion. The upper layer comprises a first upper layer portion that continuously covers the first and second intermediate layer portions, and a second upper layer portion that overlaps with the third intermediate layer portion. The first lower layer, the second lower layer, the third lower layer, and the fourth lower layer are spaced apart from each other. The first intermediate layer, the second intermediate layer, and the third intermediate layer are spaced apart from each other. A display device comprising the first upper portion and the second upper portion, which are spaced apart from each other.
2. The first lower portion has a first end located on the side of the first trench, The first end is covered by the first intermediate layer portion. The first intermediate layer portion has a second end located on the first trench side, The display device according to claim 1, wherein the second end is covered by the first upper portion.
3. The lower layer comprises a fifth lower layer portion located at the second bottom, a sixth lower layer portion located at the fourth bottom, and a seventh lower layer portion located between the first trench and the second opening, covering the second surface of the second insulating layer. The aforementioned middle layer comprises a fourth middle layer portion that overlaps with the fifth lower layer portion, and a fifth middle layer portion that continuously covers the sixth lower layer portion and the seventh lower layer portion. The aforementioned upper layer comprises a third upper layer portion that continuously covers the fourth and fifth intermediate layer portions, The fourth lower portion, the fifth lower portion, the sixth lower portion, and the seventh lower portion are spaced apart from each other. The third intermediate layer, the fourth intermediate layer, and the fifth intermediate layer are spaced apart from each other. The display device according to claim 1, wherein the second upper portion and the third upper portion are spaced apart from each other.
4. The seventh lower portion has a third end located on the first trench side, The third end is covered by the fifth intermediate portion. The fifth intermediate layer portion has a fourth end located on the first trench side, The display device according to claim 3, wherein the fourth end is covered by the third upper portion.
5. The display device according to claim 3, wherein the upper electrode is in contact with the first upper layer portion, the second upper layer portion, the third upper layer portion, the second middle layer portion, the third middle layer portion, the fourth middle layer portion, the third lower layer portion, the fourth lower layer portion, and the fifth lower layer portion within the first trench.
6. The display device according to claim 1, wherein the light-emitting layer is any of the lower layer, the middle layer, and the upper layer.
7. The first trench portion has a first depth, The second trench portion has a second depth, The third trench portion has a third depth, The display device according to claim 1, wherein the second depth is smaller than the first depth and larger than the third depth.
8. The aforementioned organic layer is A first portion that covers the first lower electrode located at the first opening and covers the first surface of the second insulating layer located between the first trench and the first opening, A second portion that covers the second lower electrode located at the second opening and covers the second surface of the second insulating layer located between the first trench and the second opening, The display device according to claim 1, comprising a third portion disposed on the bottom surface of the first trench and spaced apart from the first portion and the second portion.
9. The display device according to claim 8, wherein the first part, the second part, and the third part each include the light-emitting layer of the same color.
10. The aforementioned second insulating layer further comprises, A second trench located on the opposite side of the first trench, with the first opening in between, It has a third trench and a fourth trench, respectively, which are connected to both the first trench and the second trench, The display device according to claim 1, wherein the third trench is located on the opposite side of the fourth trench, with the first opening in between.
11. It has a display area for displaying an image, and a non-display area around the display area. The power lines located in the aforementioned non-display area, The system includes peripheral electrodes located in the non-display area and electrically connected to the power line, The second insulating layer covers the peripheral electrode, The display device according to claim 1, wherein the upper electrode is connected to the peripheral electrode via a contact hole formed in the second insulating layer in the non-display region.
12. The display device according to claim 1, wherein the organic layer further comprises at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.
13. The display device according to claim 1, wherein the first trench penetrates the second insulating layer to the first insulating layer.
Citation Information
Patent Citations
Display panel and preparation method thereof
CN112331697A
Organic el display device, and manufacturing method therefor
JP2008135325A
Display device
JP2009244527A
Organic el display device
JP2016085796A
Display and head-mounted display
JP2019215541A