Display device and light-emitting diode chip

Abstract

To improve electric connection reliability of a light-emitting diode chip and a mounting substrate.SOLUTION: An anode electrode 20EA includes: a recess 26D1 which is formed at a position overlapping a contact hole 23H1 and does not contact a bump electrode 33; and a projection 26W1 which projects in a direction away from an insulating layer 23 more than the recess 26D1 and contacts the bump electrode 33. A cathode electrode 20EK includes: a recess 26D2 which is formed at a position overlapping a contact hole 23H2 and does not contact a bump electrode 34; and a projection 26W2 which projects in a direction away from the insulating layer 23 more than the recess 26D2 and contacts the bump electrode 34. A space between the recess 26D1 and the bump electrode 33 communicates with a space surrounding a contact part between the anode electrode 20EA and the bump electrode 33. A space between the recess 26D2 and the bump electrode 34 communicates with a space surrounding a connection part between the cathode electrode 20EK and the bump electrode 34.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to a manufacturing technique for display devices.

Background Art

[0002] As a display device, there is an LED (Light Emitting Diode) display device in which inorganic light-emitting diode elements, which are self-emitting elements, are arranged in a matrix on a substrate (see, for example, Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2022-29226)). Patent Document 1 describes that there is a step portion between the positions of the anode electrode and the cathode electrode of the LED chip, and that bumps for the cathode electrode are provided so as to fill this step portion.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Each of the plurality of LED chips included in the LED display device is mounted on a substrate called a backplane via a conductive bonding material such as solder. The electrodes of the LED chips are arranged at positions facing the terminals of the backplane, and an insulating layer is provided between the electrodes and the diode elements. The electrodes and the diode elements are electrically connected via contact holes formed in the insulating layer. According to the study by the inventor of the present application, it has been found that depending on the shape of the electrodes, a region where air is trapped may occur at the joint portion between the electrodes and the conductive bonding material. When a region where air is trapped occurs at the joint portion between the electrodes and the conductive bonding material, it causes a decrease in the electrical connection reliability between the LED chip and the backplane. An object of the present invention is to provide a technique for improving the performance of a display device using a plurality of inorganic light-emitting diode elements. [Means for solving the problem]

[0005] A display device according to one aspect of the present invention includes a substrate having a first projection electrode and a second projection electrode, and a light-emitting diode chip mounted on the substrate, having a first electrode positioned opposite the first projection electrode and a second electrode positioned opposite the second projection electrode. The light-emitting diode chip includes a semiconductor layer, a first insulating layer covering a first surface of the semiconductor layer, a first electrode formed on the first insulating layer, and a second electrode formed on the first insulating layer spaced apart from the first electrode. The first electrode is electrically connected to one of the anode and cathode of a diode element via a first contact hole formed in the first insulating layer. The second electrode is electrically connected to the other of the anode and cathode of the diode element via a second contact hole formed in the first insulating layer. The first electrode includes a first recess formed in a position overlapping the first contact hole and not in contact with the first projection electrode, and a first projection formed in a position different from the first recess, projecting in a direction away from the first insulating layer than the first recess, and in contact with the first projection electrode. The second electrode includes a second recess formed in a position overlapping the second contact hole and not in contact with the second projection electrode, and a second projection formed in a position different from the second recess, projecting in a direction away from the first insulating layer than the second recess, and in contact with the second projection electrode. The space between the first recess and the first projection electrode communicates with the space around the connection portion between the first electrode and the first projection electrode. The space between the second recess and the second projection electrode communicates with the space around the connection portion between the second electrode and the second projection electrode.

[0006] Another embodiment of the present invention, a light-emitting diode chip, comprises a semiconductor layer on which a diode element is formed, a first insulating layer covering a first surface of the semiconductor layer, a first electrode formed on the first insulating layer, and a second electrode formed on the first insulating layer spaced apart from the first electrode. The first electrode is electrically connected to one of the anode and cathode of the diode element via a first contact hole formed in the first insulating layer. The second electrode is electrically connected to the other of the anode and cathode of the diode element via a second contact hole formed in the first insulating layer. The first electrode is, The first electrode includes a first recess formed in a position overlapping with the first contact hole, and a first protrusion formed in a position different from the first recess and projecting in a direction away from the first insulating layer than the first recess. The second electrode includes a second recess formed in a position overlapping with the second contact hole, and a second protrusion formed in a position different from the second recess and projecting in a direction away from the first insulating layer than the second recess. The space within the first recess is in communication with the space surrounding the first electrode. The space within the second recess is in communication with the space surrounding the second electrode. [Brief explanation of the drawing]

[0007] [Figure 1] This is a plan view showing an example configuration of a display device, which is one embodiment of the device. [Figure 2] Figure 1 is a circuit diagram showing an example of the circuit configuration around a pixel. [Figure 3] This is a transparent, enlarged plan view showing an example of the peripheral structure of an LED chip, which is placed in each of the multiple pixels of the display device shown in Figure 1. [Figure 4] This is an enlarged cross-sectional view along line AA in Figure 3. [Figure 5] Figure 4 is a magnified cross-sectional view of the area near the electrodes of the LED chip. [Figure 6] Figure 5 is a plan view of the LED chip shown, viewed from the electrode formation surface side. [Figure 7]This is a plan view of an LED chip, which is a modified version of Figure 6. [Figure 8] Figure 7 is an enlarged cross-sectional view showing the LED chip mounted on the substrate, along the BB line. [Figure 9] This is a plan view showing another variation of Figure 6. [Figure 10] Figure 9 is a perspective view of the LED chip shown. [Modes for carrying out the invention]

[0008] The embodiments of the present invention will be described below with reference to the drawings. Note that the disclosure is merely an example, and modifications that can be easily conceived by those skilled in the art while maintaining the spirit of the invention are naturally included within the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and in each drawing, elements similar to those described above in previously shown drawings are denoted by the same or related reference numerals, and detailed explanations may be omitted as appropriate.

[0009] In the following embodiment, as an example of a display device in which multiple light-emitting diode chips (hereinafter referred to as LED chips) are mounted on a substrate, a microLED display device equipped with multiple microLED chips will be described.

[0010] <Display device> First, an example of the configuration of the micro-LED display device, which is an electronic device of this embodiment, will be described. Figure 1 is a plan view showing an example of the configuration of a micro-LED display device, which is one embodiment of the electronic device. In Figure 1, the boundary between the display area DA and the peripheral area PFA, the control circuit 5, the drive circuit 6, and the multiple pixels PIX are each shown by dashed lines. Figure 2 is a circuit diagram showing an example of the configuration of the circuit around the pixels shown in Figure 1.

[0011] As shown in Figure 1, the display device DSP1 of this embodiment has a display area DA, a peripheral area PFA that surrounds the display area DA in a frame shape, and a plurality of pixels PIX arranged in a matrix within the display area DA. The display device DSP1 also has a substrate 10, a control circuit 5 formed on the substrate 10, and a drive circuit 6 formed on the substrate 10. The substrate 10 is made of glass or resin. As shown in Figure 4, which will be described later, the substrate 10 has a surface 10f and a surface 10b opposite to surface 10f.

[0012] The control circuit 5 shown in Figures 1 and 2 is a control circuit that controls the driving of the display function of the display device DSP1. For example, the control circuit 5 is a driver IC (Integrated Circuit) mounted on the substrate 10. In the example shown in Figure 1, the control circuit 5 is arranged along one of the four short sides of the substrate 10. In this embodiment, the control circuit 5 also includes a signal line driving circuit that drives the wiring (video signal wiring) VL (see Figure 2) connected to multiple pixels PIX. However, the location and configuration examples of the control circuit 5 are not limited to the example shown in Figure 1, and there are various modifications. For example, in Figure 1, a circuit board such as a flexible substrate may be connected to the location shown as the control circuit 5, and the above-mentioned driver IC may be mounted on the circuit board. Also, for example, the signal line driving circuit that drives the wiring VL may be formed separately from the control circuit 5.

[0013] The drive circuit 6 includes a circuit that drives the scan signal line GL (see Figure 2, described later) among the multiple pixels PIX. The drive circuit 6 also includes a circuit that supplies a reference potential to the LED chip mounted on each of the multiple pixels PIX. The drive circuit 6 drives the multiple scan signal lines GL based on the control signal from the control circuit 5. In the example shown in Figure 1, the drive circuit 6 is arranged along each of the two long sides of the four sides of the substrate 10. However, the position and configuration of the drive circuit 6 are not limited to the example shown in Figure 1, and various modifications are possible. For example, in Figure 1, a circuit board such as a flexible substrate may be connected to the position shown as the control circuit 5, and the above-described drive circuit 6 may be mounted on the circuit board.

[0014] Next, a circuit configuration example of pixel PIX will be described using FIG. 2. In FIG. 2, four pixels PIX are taken as representatives and illustrated, but each of the plurality of pixels PIX shown in FIG. 1 has a circuit similar to the pixel PIX shown in FIG. 2. Hereinafter, the circuit including the switch and the LED chip 20 included in the pixel PIX may be referred to as a pixel circuit. The pixel circuit is a voltage signal type circuit that controls the light emission state of the LED chip 20 according to the video signal Vsg supplied from the control circuit 5 (see FIG. 1).

[0015] As shown in FIG. 2, the pixel PIX includes an LED chip 20. The LED chip 20 is a light emitting diode chip, specifically, a micro light emitting diode chip. The LED chip 20 has an anode electrode 20EA and a cathode electrode 20EK. The cathode electrode 20EK of the LED chip 20 is connected to a wiring VSL to which a reference potential (fixed potential) PVS is supplied. The anode electrode 20EA of the LED chip 20 is electrically connected to the drain electrode ED of the switching element SW via a wiring 31.

[0016] The pixel PIX includes a switching element SW. The switching element SW is a transistor that controls the connection state (on or off state) between the pixel circuit and the wiring VL in response to a control signal Gs. The switching element SW is, for example, a thin film transistor. When the switching element SW is in the on state, the video signal Vsg is input to the pixel circuit from the wiring VL.

[0017] The drive circuit 6 includes a shift register circuit, an output buffer circuit, etc. not shown. The drive circuit 6 outputs a pulse based on a horizontal scan start pulse transmitted from the control circuit 5 (see FIG. 1) and outputs a control signal Gs.

[0018] Each of the plurality of scanning signal lines GL extends in the X direction. The scanning signal line GL is connected to the gate electrode of the switching element SW. When a control signal Gs is supplied to the scanning signal line GL, the switching element SW is turned on, and a video signal Vsg is supplied to the LED chip 20.

[0019] <Peripheral Structure of LED Chip> Next, the peripheral structure of the LED chip disposed in each of the plurality of pixels PIX shown in FIG. 1 will be described. FIG. 3 is a transparent enlarged plan view showing an example of the peripheral structure of the LED chip disposed in each of the plurality of pixels of the display device shown in FIG. 1. In FIG. 3, the illustration of the inorganic insulating layer 14 shown in FIG. 4 is omitted. In FIG. 3, the outlines of the semiconductor layer, the electrode, and the scanning signal line are shown by dotted lines. FIG. 4 is an enlarged cross-sectional view taken along the line A-A of FIG. 3. FIG. 5 is an enlarged cross-sectional view of the vicinity of the electrode of the LED chip shown in FIG. 4. FIG. 6 is a plan view of the LED chip shown in FIG. 5 viewed from the electrode formation surface side.

[0020] As shown in FIG. 3, the display device DSP1 has a plurality of pixels PIX (pixels PIX1, PIX2, and PIX3 in the example shown in FIG. 4) including the pixel PIX1. Each of the plurality of pixels PIX has a switching element SW, an LED chip (light emitting diode chip) 20, a wiring 31, and a wiring 32. In each of the pixels PIX1, PIX2, and PIX3, an LED chip 20 that emits visible light of one of, for example, red, green, and blue is mounted, and a switching element SW that drives the LED chip 20 is formed. By controlling the output and timing of the visible light emitted from the LED chips of the pixels PIX1, PIX2, and PIX3, color display is possible. When combining a plurality of pixels PIX that emit visible light of different colors from each other, the pixels PIX for each color may be called sub-pixels, and a set of a plurality of pixels PIX may be called a pixel. In the present embodiment, the portion corresponding to the sub-pixel is called a pixel PIX.

[0021] Wiring 31 is electrically connected to the drain electrode ED of the switching element SW and the anode electrode 20EA of the LED chip 20, respectively. Wiring 32 is connected to the source electrode ES of the switching element SW. In the example shown in Figure 3, wiring 32 has a bent structure, with one end connected to the source electrode ES of the switching element SW and the other end connected to wiring VL. The scan signal line GL is used as the gate electrode EG of the switching element SW.

[0022] The display device DSP1 further includes a wiring VL that extends across multiple pixels PIX (see Figure 2) along the Y direction and is electrically connected to wiring 32, and a wiring VSL that extends across multiple pixels PIX along the X direction intersecting the Y direction (orthogonal in Figure 3) and is electrically connected to the cathode electrode 20EK of the LED chip 20. Wiring VL and wiring VSL intersect at the wiring intersection LXP shown in Figure 3 via an insulating layer 41. Since the insulating layer 41 is interposed between wiring VL and wiring VSL, wiring VL and wiring VSL are electrically isolated. Note that the layout shown in Figure 3 is an example, and there are various modifications. For example, as one modification of Figure 3, the switching element SW may have a gate electrode (not shown), and the gate electrode may be connected to the scanning signal line GL. In this modification, the scanning signal line GL may be positioned so as not to overlap with the semiconductor layer 50.

[0023] As shown in Figure 4, the display device DSP1 is an electronic device comprising a substrate 10 made of glass or resin and a plurality of insulating layers laminated on the substrate 10. The plurality of insulating layers of the display device DSP1 include inorganic insulating layer 11, inorganic insulating layer 12, inorganic insulating layer 13, and inorganic insulating layer 14, which are laminated on the substrate 10. The substrate 10 has a surface 10f and a surface 10b opposite to surface 10f. Each of the inorganic insulating layers 11, 12, 13, and 14 is laminated on surface 10f of the substrate 10.

[0024] The switching element SW includes an inorganic insulating layer 12 formed on a substrate 10, a semiconductor layer 50 formed on the inorganic insulating layer 12, a drain electrode ED connected to the drain region of the semiconductor layer 50, a source electrode ES connected to the source region of the semiconductor layer 50, and an inorganic insulating layer 13 covering the semiconductor layer 50. Each of the wirings 31 and 32 is a laminated film of, for example, a first conductor layer made of titanium or a titanium alloy and a second conductor layer made of aluminum or an aluminum alloy.

[0025] The example shown in Figure 4 is a bottom-gate configuration where the gate electrode EG is located between the semiconductor layer 50 and the substrate 10. In the bottom-gate configuration, the portion of the inorganic insulating layer 12 between the gate electrode EG and the semiconductor layer 50 functions as the gate insulating layer. The inorganic insulating layer 12 also functions as a base layer for forming the semiconductor layer 50. Note that the position of the gate electrode EG is not limited to the example shown in Figure 4; for example, a top-gate configuration, which will be described later, may also be used.

[0026] The materials constituting each of the inorganic insulating layers 11, 12, 13, and 14 are not particularly limited. For example, silicon oxide (SiO2) and silicon nitride (SiN) can be used. The semiconductor layer 50 is a semiconductor film in which a silicon film made of silicon is doped with P-type or N-type conductive impurities.

[0027] The source electrode ES and the drain electrode ED are contact plugs for making electrical contact with either the source region or the drain region of the semiconductor layer 50. Examples of contact plug materials include tungsten. As a modification of Figure 4, contact holes are formed in the inorganic insulating layer 13 to expose the source region and drain region of the semiconductor layer 50, and a portion of the wiring 31 and a portion of the wiring 32 are embedded within the contact holes. In this case, the portions of the wiring 31 and 32 embedded within the contact holes contact the semiconductor layer 50, and the contact interfaces between the wiring 31 and 32 and the semiconductor layer 50 can be considered as the drain electrode ED and the source electrode ES.

[0028] Furthermore, as shown in Figure 4, the display device DSP1 is equipped with a protruding electrode 33 and a protruding electrode 34. Each of the protruding electrodes 33 and 34 is a terminal for mounting the LED chip 20 on the substrate 10. One of the two protruding electrodes (protruding electrode 33 in Figure 4) is connected to the anode electrode 20EA of the LED chip 20, and the other (protruding electrode 34 in Figure 4) is connected to the cathode electrode 20EK of the LED chip 20.

[0029] The protruding electrode 33 is connected to the wiring 31 at a position overlapping with an opening (contact hole) formed in the inorganic insulating layer 14, and protrudes from the inorganic insulating layer 14. The protruding electrode 33 also includes a conductor portion 33A formed in a columnar shape and joined to the wiring 31, and a conductor portion 33B made of solder containing tin and formed on the conductor portion 33A. Examples of the metal material constituting the conductor portion 33A include copper (or copper alloy), titanium, nickel, or a laminate of these. By using a conductor portion 33A containing copper or a copper alloy, the electrical characteristics of the protruding electrode 33 can be improved. However, as a modification of this embodiment, a protruding electrode 33 consisting only of solder material and without a copper conductor portion 33A may be used.

[0030] The protruding electrode 34 is connected to the wiring VSL at a position overlapping with an opening (contact hole) formed in the inorganic insulating layer 14, and protrudes from the inorganic insulating layer 14. The protruding electrode 34 includes a conductor portion 34A formed in a columnar shape and joined to the wiring VSL, and a conductor portion 34B made of solder containing tin and formed on the conductor portion 34A. Examples of the metallic material constituting the conductor portion 34A include copper (or copper alloy), titanium, nickel, or a laminate of these. By using a conductor portion 34A containing copper or a copper alloy, the electrical characteristics of the protruding electrode 34 can be improved. However, as a modification of this embodiment, a protruding electrode 34 consisting only of solder material and without a copper conductor portion 34A may be used.

[0031] As shown in Figure 5, the LED chip 20 includes a semiconductor layer 22 on which a diode element D1 is formed, an insulating layer 23 covering the surface 22f of the semiconductor layer 22, an anode electrode 20EA formed on the insulating layer 23, and a cathode electrode 20EK formed on the insulating layer 23 so as to be spaced apart from the anode electrode 20EA.

[0032] More specifically, the semiconductor layer 22 is, for example, an N-type semiconductor layer. The semiconductor layer 22 is formed as a common underlayment for the anode electrode 20EA and the cathode electrode 20EK, and on the anode electrode 20EA side, an active layer 24 and a P-type semiconductor layer 25 are laminated on the semiconductor layer 22. Although not shown in the diagram, a transparent electrode layer may be placed between the P-type semiconductor layer 25 and the anode electrode 20EA to reduce the resistance of the electrical connection interface between the P-type semiconductor layer 25 and the anode electrode 20EA. The semiconductor layer 22 and the P-type semiconductor layer 25 on the anode electrode 20EA side are covered with an insulating layer 23, which is an inorganic insulating film. The insulating layer 23 consists of, for example, silicon oxide, silicon nitride, or a laminate of these. The anode electrode 20EA and the cathode electrode EK are metal films formed by sputtering or plating. When the metal film is formed by plating, a seed layer for forming the metal film is formed on the underlayment. Although not shown in the diagram, the surface opposite to surface 22f of the semiconductor layer 22 is covered with a buffer layer made of gallium nitride.

[0033] A contact hole (opening) 23H1 is formed in the insulating layer 23, and the anode electrode 20EA is electrically connected to the anode of the diode element D1 via the contact hole 23H1. In addition, a contact hole (opening) 23H2 is formed in the insulating layer 23, and the cathode electrode 20EK is electrically connected to the cathode of the diode element D1 via the contact hole 23H2.

[0034] Incidentally, a portion of each of the anode electrode 20EA and cathode electrode 20EK is embedded in either the contact hole 23H1 or the contact hole 23H2. Therefore, whether the anode electrode 20EA and cathode electrode 20EK are formed by sputtering or by plating, a recess is formed at the position overlapping with the contact hole 23H1 or the contact hole 23H2. As shown in Figure 5, in this embodiment as well, the anode electrode 20EA has a recess 26D1 formed at the position overlapping with the contact hole 23H1. Similarly, the cathode electrode 20EK has a recess 26D2 formed at the position overlapping with the contact hole 23H2.

[0035] Here, as an example of consideration for this embodiment, when mounting the LED chip 20 onto the substrate 10 (see Figure 4), one can consider a method in which the conductive portion 33B of the protruding electrode 33 is embedded in the recessed portion 26D1 and the conductive portion 34B of the protruding electrode 34 is embedded in the recessed portion 26D2. However, according to the inventor's considerations, it has been found that with this method, voids (spaces isolated from the outside, in other words, areas where air is trapped) are likely to occur between the electrodes of the LED chip and the protruding electrodes of the substrate 10. When voids occur between the electrodes of the LED chip and the protruding electrodes of the substrate 10, the electrical resistance increases around the voids. Furthermore, when a temperature cycle load is applied by repeatedly using the display device DSP1 (see Figure 1) after mounting, the electrodes of the LED chip and the protruding electrodes may separate starting from the voids. Thus, voids cause a decrease in the electrical connection reliability between the LED chip and the substrate 10.

[0036] Therefore, the inventors of the present invention investigated techniques for suppressing void generation and found the structure of this embodiment. As shown in Figure 5, the anode electrode 20EA includes a recessed portion 26D1 formed in a position overlapping with the contact hole 23H1 and not in contact with the projection electrode 33, and a projection portion 26W1 formed in a position different from the recessed portion 26D1, projecting in a direction away from the insulating layer 23 than the recessed portion 26D1, and in contact with the projection electrode 33. The cathode electrode 20EK includes a recessed portion 26D2 formed in a position overlapping with the contact hole 23H2 and not in contact with the projection electrode 34, and a projection portion 26W2 formed in a position different from the recessed portion 26D2, projecting in a direction away from the insulating layer 23 than the recessed portion 26D2, and in contact with the projection electrode 34. The space between the recessed portion 26D1 and the projection electrode 33 is in communication with the space around the connection portion between the anode electrode 20EA and the projection electrode 33. The space between the recessed portion 26D2 and the protruding electrode 34 is in communication with the space surrounding the connection between the cathode electrode 20EK and the protruding electrode 34. In other words, the space within the recessed portion 26D1 is in communication with the space surrounding the anode electrode 20EA, and the space within the recessed portion 26D2 is in communication with the space surrounding the cathode electrode 20EK.

[0037] The protrusion 26W1 of the anode electrode 20EA and the protrusion 26W2 of the cathode electrode 20EK each function as spacer members that suppress the formation of voids in the recessed portion 26D1 or recessed portion 26D2. Therefore, the conductive portion 33A of the protruding electrode 33 is selectively joined to the protrusion 26W1 of the anode electrode 20EA and does not contact the recessed portion 26D1. Similarly, the conductive portion 34A of the protruding electrode 34 is selectively joined to the protrusion 26W2 of the cathode electrode 20EK and does not contact the recessed portion 26D2. As a result, the generation of the voids described above can be prevented or suppressed, thereby improving the electrical connection reliability between the LED chip 20 and the substrate 10 (see Figure 4).

[0038] As shown in Figure 6, the anode electrode 20EA is located between the recessed portion 26D1 and the protruding portion 26W1, and has a flat portion 26L1 connected to the recessed portion 26D1. The cathode electrode 20EK is located between the recessed portion 26D2 and the protruding portion 26W2, and has a flat portion 26L2 connected to the recessed portion 26D2. As shown in Figure 5, the flat portion 26L1 does not contact the protruding electrode 33, and the flat portion 26L2 does not contact the protruding electrode 34. Although not shown, as a variation of Figures 5 and 6, the flat portions 26L1 and 26L2 may not be formed, and for example, the side wall of the recessed portion 26D1 (or recessed portion 26D2) and the side wall of the protruding portion 26W1 (or recessed portion 26D2) may be continuously connected. However, from the viewpoint of preventing voids from forming near the recessed portions 26D1 and 26D2, it is preferable to provide flat portions 26L1 and 26L2. By providing flat portions 26L1 and 26L2, it is possible to prevent the conductive portions 33B and 34B, which are made of solder, from wetting and spreading to the recessed portions 26D1 and 26D2.

[0039] Furthermore, in the example shown in Figure 6, in a plan view, each of the planar portions 26L1 and 26L2 has a rectangular outer edge surrounding the recessed portion 26D1 or recessed portion 26D2. The projection 26W1 is formed along at least one of the four sides of the outer edge of the planar portion 26L1, and the projection 26W2 is formed along at least one of the four sides of the outer edge of the planar portion 26L2.

[0040] More specifically, similar to the LED chip 20B shown in Figure 9 later, the planar portion 26L1 of the anode electrode 20EA of the LED chip 20 shown in Figure 6 has edge EAS1 (see Figure 9), which is furthest from the cathode electrode 20EK; edge EAS2, which is closest to the cathode electrode 20EK; edge EAS3 (see Figure 9), which intersects with edges EAS1 and EAS2; and edge EAS4 (see Figure 9), which is on the opposite side of edge EAS3. Similarly, the planar portion 26L2 of the cathode electrode 20EK of the LED chip 20 has edge EKS1 (see Figure 9), which is furthest from the anode electrode 20EA; edge EKS2, which is closest to the anode electrode 20EA; edge EKS3 (see Figure 9), which intersects with edges EKS1 and EKS2; and edge EKS4 (see Figure 9), which is on the opposite side of edge EKS3. Note that in Figure 6, for clarity, only edges EAS2 and EKS2 are labeled.

[0041] In the example shown in Figures 5 and 6, the protrusion 26W1 is formed along only the side EAS2 closest to the planar portion 26L2 among the four sides of the outer edge of the planar portion 26L1. Similarly, the protrusion 26W2 is formed along only the side EKS2 closest to the planar portion 26L1 among the four sides of the outer edge of the planar portion 26L2. The structures shown in Figures 5 and 6 can be easily formed by increasing the thickness of the portion of the insulating layer 23 shown in Figure 5 that is located between the anode electrode 20EA and the cathode electrode 20EK. As shown in Figure 5, the thickness 23T1 of the portion of the insulating layer 23 located between the anode electrode 20EA and the cathode electrode 20EK is thicker than the thickness 23T2 of the portion of the insulating layer 23 outside the cathode electrode 20EK (in other words, the portion located between the cathode electrode 20EK and the outer edge of the LED chip 20). Each of the protrusions 26W1 and 26W2 is formed on top of the thicker portion. This makes it possible to easily form the protrusions 26W1 and 26W2 without changing the thickness of the metal film itself used as the anode electrode 20EA and cathode electrode 20EK.

[0042] An insulating layer 23 having selectively thicker portions can be formed by the following method. For example, after forming an insulating layer with a thickness of 23T2, an insulating layer with a thickness approximately the same as 23T2 is further formed between the regions where the anode electrode 20EA and the cathode electrode 20EK are formed. Then, by depositing metal films constituting the anode electrode 20EA and cathode electrode 20EK such that portions of each overlap the thicker portions of the insulating layer 23, the structures shown in Figures 5 and 6 can be obtained.

[0043] In addition to the method of forming the protrusions 26W1 and 26W2 by increasing the thickness of a portion of the insulating layer 23 as described above, it is also possible to apply a method of making the thickness of a portion of the metal film constituting the anode electrode 20EA and cathode electrode 20EK thicker than that of other portions. That is, the thickness of the metal film in the protrusions 26W1 and 26W2 is made thicker than the thickness of the metal film in other parts of the electrode. This makes it possible to form the protrusions even if the thickness of the insulating layer 23 is constant. However, the method of controlling the thickness of the insulating layer 23 is easier to control.

[0044] Furthermore, the following method is a variation of the method for forming the insulating layer 23. That is, after forming an insulating layer with a thickness of 23T2, the peripheral region of the LED chip 20 is etched. This thins the film thickness in the peripheral region to 23T2. The method for forming the anode electrode 20EA and cathode electrode 20EK is the same as described above. Thus, the structures shown in Figures 5 and 6 can be formed by a relatively simple process.

[0045] The dimensions of each component shown in Figures 5 and 6 are as follows. First, the thickness 23T1 of the insulating layer 23 shown in Figure 5 is approximately 1 μm to several μm (5 μm or less). The thickness 23T2 is thinner than the thickness 23T2, and is approximately 40-60% of the thickness 23T1. The thickness ET1 of the metal film constituting the anode electrode 20EA and cathode electrode 20EK is approximately several μm (5 μm or less). However, the thickness ET1 is at least thicker than the thickness 23T2 of the insulating layer 23, and is thicker than the difference between the values ​​of thickness 23T1 and thickness 23T2. Furthermore, it is preferable that the thickness ET1 is thicker than the thickness 23T1. This allows electrodes to be formed across the thick and thin portions of the insulating layer 23. The overall thickness of the LED chip 20 is approximately 10 μm or less.

[0046] Furthermore, in the example shown in Figure 6, the LED chip 20 is rectangular in shape (more specifically, a rectangle) when viewed from above. The length 20L1 of the LED chip 20 in the X direction is approximately a few μm to 50 μm. The length 20L2 of the LED chip 20 in the Y direction is, for example, about half the length 20L1. The sizes of the anode electrode 20EA and the cathode electrode 20EK are similar. For example, the lengths EAL1 and EKL1 of the anode electrode 20EA and cathode electrode 20EK in the X direction are less than half the length 20L1 of the LED chip 20 (for example, a few μm to 20 μm). The lengths EAL2 and EKL2 of the anode electrode 20EA and cathode electrode 20EK in the Y direction are shorter than the length 20L2 of the LED chip 20 (for example, a few μm to 20 μm). Furthermore, the diameters of contact holes 23H1 and 23H2 are, for example, approximately 1 μm to several μm (5 μm or less).

[0047] <Variation> Next, we will describe modifications of the LED chip shown in Figures 5 and 6. Figure 7 is a plan view of an LED chip that is a modification of Figure 6. Figure 8 is an enlarged cross-sectional view showing the LED chip mounted on a substrate in a cross-sectional view along line BB in Figure 7. The LED chip 20A shown in Figures 7 and 8 differs from the LED chip 20 shown in Figures 5 and 6 in the positions of the protrusions 26W1 and 26W2. Below, we will mainly explain the differences from the embodiment described using Figures 5 and 6, and will omit the explanation of common parts.

[0048] The protrusion 26W1 shown in Figure 7 is formed along only the side EAS1, which is the furthest side from the planar portion 26L2 among the four sides of the outer edge of the planar portion 26L1. The protrusion 26W2 is formed along only the side EKS1, which is the furthest side from the planar portion 26L1 among the four sides of the outer edge of the planar portion 26L2. In detail, similar to the LED chip 20B shown in Figure 9 which will be described later, the planar portion 26L1 of the anode electrode 20EA of the LED chip 20A shown in Figure 7 has side EAS1, which is the furthest side from the cathode electrode 20EK, side EAS2, which is the closest side to the cathode electrode 20EK (see Figure 9), side EAS3, which intersects with side EAS1 and side EAS2 (see Figure 9), and side EAS4, which is located on the opposite side of side EAS3 (see Figure 9). Similarly, the planar portion 26L2 of the cathode electrode 20EK of the LED chip 20A has edge EKS1 located furthest from the anode electrode 20EA, edge EKS2 located closest to the anode electrode 20EA (see Figure 9), edge EKS3 intersecting edges EKS1 and EKS2 (see Figure 9), and edge EKS4 located on the opposite side of edge EKS3 (see Figure 9). Note that in Figure 7, for clarity, only edges EAS1 and EKS1 are labeled.

[0049] In the case of LED chip 20A, as shown in Figure 8, the thickness 23T1 of the insulating layer 23 located between the anode electrode 20EA and the cathode electrode 20EK is thinner than the thickness 23T2 of the insulating layer 23 located outside the cathode electrode 20EK (in other words, the portion located between the cathode electrode 20EK and the outer edge of the LED chip 20A). Furthermore, the thickness 23T1 of the insulating layer 23 located between the anode electrode 20EA and the cathode electrode 20EK is thinner than the thickness 23T2 of the insulating layer 23 located outside the anode electrode 20EA (in other words, the portion located between the anode electrode 20EA and the outer edge of the LED chip 20A).

[0050] In the case of the modified LED chip 20A, the distance between the protrusions 26W1 and 26W2 can be increased compared to the LED chip 20 shown in Figure 6. In this case, even when the distance between the anode electrode 20EA and the cathode electrode 20EK is reduced, it is possible to prevent a short circuit between the anode electrode 20EA and the cathode electrode 20EK via the conductive portion 33B of the protruding electrode 33 and the conductive portion 34B of the protruding electrode 34. Furthermore, in the case of the LED chip 20A, as shown in Figure 8, the electrode and the protruding electrode are joined near the outer edge of the LED chip 20A. Therefore, the strength with which the LED chip 20A is fixed on the substrate 10 (see Figure 4) can be improved.

[0051] Figure 9 is a plan view showing another modification of Figure 6. Figure 10 is a perspective view of the LED chip shown in Figure 9. Note that the cross-sectional view when the LED chip shown in Figure 9 is mounted on the substrate 10 shown in Figure 4 is the same as in Figure 5, so the redundant illustration is omitted. The LED chip 20B shown in Figure 9 differs from the LED chip 20 shown in Figures 5 and 6 in the shape of the protrusions 26W1 and 26W2. The following explanation will focus on the differences from the embodiment described using Figures 5 and 6, and the explanation of common parts will be omitted.

[0052] The projection 26W1 shown in Figure 9 is formed along multiple sides of the outer edge of the planar portion 26L1. The projection 26W2 is formed along multiple sides of the outer edge of the planar portion 26L2. In the example shown in Figure 9, the projection 26W1 is formed to surround the planar portion 26L1 along three sides of the outer edge of the planar portion 26L1, excluding side EAS1. The projection 26W2 is formed to surround the planar portion 26L2 along three sides of the outer edge of the planar portion 26L2, excluding side EKS1. However, in a modified example, the projection 26W1 and projection 26W2 may be formed along any two sides of the four edges.

[0053] As shown in Figure 9, the planar portion 26L1 of the anode electrode 20EA of the LED chip 20B has edge EAS1 located furthest from the cathode electrode 20EK, edge EAS2 located closest to the cathode electrode 20EK, edge EAS3 intersecting edges EAS1 and EAS2, and edge EAS4 located opposite edge EAS3. Similarly, the planar portion 26L2 of the cathode electrode 20EK of the LED chip 20B has edge EKS1 located furthest from the anode electrode 20EA, edge EKS2 located closest to the anode electrode 20EA, edge EKS3 intersecting edges EKS1 and EKS2, and edge EKS4 located opposite edge EKS3.

[0054] The protruding portion 26W1 is positioned around the planar portion 26L1, along sides EAS2, EAS3, and EAS4 of the four sides of the planar portion 26L1. The protruding portion 26W2 is positioned around the planar portion 26L2, along sides EKS2, EKS3, and EKS4 of the four sides of the planar portion 26L2.

[0055] As shown in this modified example, when protrusions 26W1 are formed along multiple sides of the flat portion 26L1, the contact area between the conductive portion 33B (see Figure 5) of the protruding electrode 33 (see Figure 5) and the protrusions 26W1 can be increased. This improves the bonding strength compared to the example shown in Figure 6. Furthermore, since the area of ​​the path through which electricity flows can be increased, the resistance value of the current path can be reduced.

[0056] Similarly, if protrusions 26W2 are formed along multiple sides of the flat portion 26L2, the contact area between the conductive portion 34B (see Figure 5) of the protruding electrode 34 (see Figure 5) and the protrusions 26W2 can be increased. This improves the joint strength compared to the example shown in Figure 6. In addition, since the area of ​​the path through which electricity flows can be increased, the resistance value of the current path can be reduced.

[0057] Furthermore, from the viewpoint of improving the strength of the joint, it is particularly preferable that protrusions 26W1 (or protrusions 26W2) are formed along three of the four sides of the flat portion 26L1 (or flat portion 26L2), as shown in Figure 9 of the LED chip 20B. In this modified example, durability can be improved regardless of the direction from which an external force is applied, as long as it is within the X-Y plane, including the X and Y directions.

[0058] Although embodiments and representative modifications have been described above, the technology described above is applicable to various modifications other than those exemplified. For example, the modifications described above may be combined.

[0059] Within the scope of the spirit of the present invention, a person skilled in the art can conceive of various modifications and alterations, and it is understood that such modifications and alterations also fall within the scope of the present invention. For example, any addition, deletion, or design change of components, or addition, omission, or modification of processes, made by a person skilled in the art to the above-described embodiments, is also included within the scope of the present invention, as long as it retains the gist of the present invention. [Industrial applicability]

[0060] This invention can be used in display devices and electronic devices incorporating display devices. [Explanation of symbols]

[0061] 5 Control circuits 6. Drive Circuit 10 circuit boards 10b,10f,22f,51t surface 11,12,13,14 Inorganic insulating layer 20, 20A, 20B LED chips (light-emitting diode chips) 20EA Anode Electrode 20EK Cathode Electrode 20L1, 20L2, EAL1, EAL2, EKL1, EKL2 Length 22,50 Semiconductor layer 23,41 Insulating layer 23H1, 23H2 Contact Hole (Opening) 23T1, 23T2, ET1 Thickness 24 Active layer 25 P-type semiconductor layer 26D1, 26D2 recessed area 26L1,26L2 Flat part 26W1,26W2 Protrusion 31,32,VL,VSL wiring 33,34 Protruding electrode 33A, 33B, 34A, 34B Conductor section D1 Diode element DA display area DSP1 display device EAS1, EAS2, EAS3, EAS4, EKS1, EKS2, EKS3, EKS4 edges ED drain electrode EG Post Office ES source electrode GL scan signal line Gs control signal LXP Wiring Crossover PFA related areas PIX, PIX1, PIX2 pixels PVS reference potential (fixed potential) SW switching element VSG video signal

Claims

1. A substrate equipped with a first protruding electrode and a second protruding electrode, A light-emitting diode chip mounted on the substrate has a first electrode positioned opposite to the first protruding electrode, and a second electrode positioned opposite to the second protruding electrode, It has, The aforementioned light-emitting diode chip is Semiconductor layer, A first insulating layer covering the first surface of the semiconductor layer, A first electrode formed on the first insulating layer, A second electrode formed on the first insulating layer so as to be spaced apart from the first electrode, Includes, The first electrode is electrically connected to one of the anode and cathode of the diode element via a first contact hole formed in the first insulating layer. The second electrode is electrically connected to the anode and cathode of the diode element via a second contact hole formed in the first insulating layer. The first electrode is A first recess is formed in a position overlapping with the first contact hole and does not come into contact with the first projection electrode, A first protrusion is formed at a position different from the first recess, protrudes in a direction away from the first insulating layer than the first recess, and is in contact with the first protruding electrode, Includes, The second electrode is A second recess is formed in a position overlapping with the second contact hole and does not come into contact with the second projection electrode, A second protrusion is formed at a different location from the second recess, protrudes in a direction away from the first insulating layer than the second recess, and is in contact with the second protruding electrode, Includes, The space between the first recess and the first projection electrode is in communication with the space surrounding the connection portion between the first electrode and the first projection electrode. A display device in which the space between the second recess and the second protruding electrode is in communication with the space surrounding the connection portion between the second electrode and the second protruding electrode.

2. In claim 1, The first electrode is located between the first recess and the first protrusion and has a first flat portion that is connected to the first recess. A display device wherein the second electrode is located between the second recess and the second protrusion and has a second planar portion connected to the second recess.

3. In claim 2, In a plan view, Each of the first and second planar portions has a rectangular outer edge surrounding the first or second recess, The first projection is formed along at least one of the four sides of the outer edge of the first planar portion, A display device wherein the second projection is formed along at least one of the four sides of the outer edge of the second planar portion.

4. In claim 3, The first projection is formed along only the first side of the outer edge of the first planar portion that is furthest from the second planar portion. A display device wherein the second projection is formed along only the second side of the outer edge of the second planar portion that is furthest from the first planar portion.

5. In claim 3, The first projection is formed along multiple sides of the four sides of the outer edge of the first planar portion, The display device is formed such that the second projection is along multiple sides of the four sides of the outer edge of the second planar portion.

6. In claim 5, The first projection is formed to surround the first planar portion along three of the four sides of the outer edge of the first planar portion, excluding the first side. A display device wherein the second projection is formed to surround the second planar portion along three of the four sides of the outer edge of the second planar portion, excluding the second side.

7. In claim 6, The first side of the first plane is the side furthest from the second plane among the four sides of the outer edge of the first plane, A display device in which the second side of the second planar portion is the side furthest from the first planar portion among the four sides of the outer edge of the second planar portion.

8. In claim 3, The first projection is formed along only the first side of the outer edge of the first planar portion that is closest to the second planar portion. The second projection is formed along only the second side of the outer edge of the second plane that is closest to the first plane, A display device in which the thickness of the first insulating layer is such that the first thickness of the first portion between the first electrode and the second electrode is greater than the second thickness of the second portion located between the second electrode and the outer edge of the light-emitting diode chip.

9. A semiconductor layer on which a diode element is formed, A first insulating layer covering the first surface of the semiconductor layer, A first electrode formed on the first insulating layer, A second electrode formed on the first insulating layer so as to be spaced apart from the first electrode, It has, The first electrode is electrically connected to one of the anode and cathode of the diode element via a first contact hole formed in the first insulating layer. The second electrode is electrically connected to the anode and cathode of the diode element via a second contact hole formed in the first insulating layer. The first electrode is A first recess formed in a position overlapping with the first contact hole, A first protrusion is formed at a different location from the first recess and protrudes in a direction away from the first insulating layer than the first recess, Includes, The second electrode is A second recess formed in a position overlapping with the second contact hole, A second protrusion is formed at a different location from the second recess and protrudes in a direction away from the first insulating layer than the second recess, Includes, The space within the first recess is in communication with the space surrounding the first electrode. The space within the second recess communicates with the space surrounding the second electrode. The first electrode is located between the first recess and the first protrusion and has a first flat portion that is connected to the first recess. The light-emitting diode chip wherein the second electrode is located between the second recess and the second protrusion and has a second planar portion connected to the second recess.

10. In claim 9, In a plan view, Each of the first and second planar portions has a rectangular outer edge surrounding the first or second recess, The first projection is formed along at least one of the four sides of the outer edge of the first planar portion, The second protrusion is formed along at least one of the four sides of the outer edge of the second planar portion, and is a light-emitting diode chip.

11. In claim 10, The first projection is formed along only the first side of the outer edge of the first planar portion that is furthest from the second planar portion. A light-emitting diode chip in which the second protrusion is formed along only the second side of the outer edge of the second planar portion that is furthest from the first planar portion.

12. In claim 10, The first projection is formed along multiple sides of the four sides of the outer edge of the first planar portion, The second protrusion is formed along multiple sides of the four sides of the outer edge of the second planar portion, and is a light-emitting diode chip.

13. In claim 12, The first projection is formed to surround the first planar portion along three of the four sides of the outer edge of the first planar portion, excluding the first side. The light-emitting diode chip is formed such that the second protrusion surrounds the second planar portion along three of the four sides of the outer edge of the second planar portion, excluding the second side.

14. In claim 13, The first side of the first plane is the side furthest from the second plane among the four sides of the outer edge of the first plane, The second side of the second planar portion is the side furthest from the first planar portion among the four sides of the outer edge of the second planar portion, in the light-emitting diode chip.

15. In claim 10, The first projection is formed along only the first side of the outer edge of the first planar portion that is closest to the second planar portion. The second projection is formed along only the second side of the outer edge of the second plane that is closest to the first plane, The first insulating layer is such that the first thickness of the first portion between the first electrode and the second electrode is greater than the second thickness of the second portion located between the second electrode and the outer edge of the light-emitting diode chip.

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