Wafer test cassette

Abstract

To provide a test cassette with thermal isolation such that the thermal effects provided during preburning do not affect the operation of a probe and test host.SOLUTION: A wafer test cassette includes a fluid inlet and a fluid outlet. The wafer test cassette includes a first housing, a second housing, a heat source, and a barrier device. The first housing includes a probe card, and the probe card includes a probe. The second housing is coupled to the first housing to form a test space, and carries a wafer within the second housing, the wafer is positioned within the test space, and the probe is in electrical contact with the top surface of the wafer to perform a test process. The heat source heats the bottom surface of the wafer and defines a high temperature region between the bottom surface and the second housing. The barrier device surrounds the high temperature region and is used for thermal isolation between the high temperature region and the test space. The fluid inlet receives a gas, which flows through the test space to fill the space between the probe card and the top surface of the wafer, and flows out of the fluid outlet.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a wafer test cassette, and particularly to a wafer test cassette having heat conduction and heat insulation functions.

Background Art

[0002] When the design of an integrated circuit on a wafer is completed, the wafer needs to undergo a pre-burn-in test and an electrical test. Conventionally, for pre-burn-in and reliability tests, a method of individually testing each wafer with a test device and a probe card has been adopted. Each wafer is placed on a carrier stage, and the test is completed by making electrical contact with the probes of the probe card. Therefore, as the number of wafers increases, the required test devices and probe cards also increase. Consequently, the time and equipment costs required for the test process increase.

[0003] In recent years, a wafer test cassette has been developed, and a method has been introduced in which the probe card and the wafer are pre-positioned and installed in the wafer test cassette, the wafer test cassette is directly electrically connected to the test machine, and placed in the test unit for pre-burn-in tests and electrical tests. During the pre-burn-in test, the wafer test cassette is placed in a high-temperature environment, and heat may affect the operation of the probes and the test machine, potentially reducing the efficiency of the test process.

[0004] Therefore, improving the use effect of the wafer test cassette through structural design improvement and overcoming the above-mentioned drawbacks has become one of the important issues to be solved in this technical field.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present invention aims to provide a wafer test cassette that compensates for the shortcomings of existing technologies, and relates to a wafer test cassette having a thermal isolation effect so that the heat provided during preburn does not affect the operation of the probe and test host. [Means for solving the problem]

[0006] A wafer test cassette having a fluid inlet and a fluid outlet is provided. The wafer test cassette includes a first housing, a second housing, a heat source, and a barrier device. The first housing has a probe card, and the probe card has probes. The second housing is coupled with the first housing to form a test space, and a wafer is carried in the second housing, the wafer is located in the test space, and the probes make electrical contact with the upper surface of the wafer to perform the test process. The heat source heats the lower surface of the wafer, defining a high-temperature region between the lower surface and the second housing. The barrier device surrounds the high-temperature region and is used for thermal isolation between the high-temperature region and the test space. The fluid inlet receives gas, which flows through the test space, filling the space between the probe card and the upper surface of the wafer, and flows out from the fluid outlet. [Brief explanation of the drawing]

[0007] [Figure 1] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 2] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 3] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 4] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 5] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 6] This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Figure 7]This is a schematic diagram showing the usage state of the wafer test cassette in an embodiment of the present invention. [Modes for carrying out the invention]

[0008] Please refer to Figure 1. Figure 1 is a schematic diagram showing the usage state of a wafer test cassette 1A in an embodiment of the present invention. The wafer test cassette 1A has a fluid inlet 113 and a fluid outlet 114, and includes a first housing 11, a second housing 12, a heat source 14, and a barrier device 15. The first housing 11 has a probe card 111, and the probe card 111 has a plurality of probes 1111. The second housing 12 is coupled with the first housing 11 to form a test space S1. The wafer 13 is carried in the second housing 12 and located in the test space S1. The probes 1111 perform the test process by electrically contacting the upper surface of the wafer 13 (for example, electrically contacting a solder pad 131 on the wafer 13). The heat source 14 is located, for example, inside the second housing 12 where the wafer 13 is located, and heats the lower surface of the wafer 13, forming a high-temperature region S2 between the lower surface and the second housing 12. The high-temperature region S2 can be either a space or a heated "surface". The barrier device 15 surrounds the high-temperature region S2 and functions as thermal isolation between the high-temperature region S2 and the test space S1. In this embodiment, the barrier device 15 is used to block thermal energy transmitted from the heat source 14 from entering the test space S1 and to suppress the decrease in the heat dissipation efficiency of the gas CA due to the transfer of thermal energy. The gas CA flows into the test space S1 via the fluid inlet 113, fills the space between the probe card 111 and the upper surface of the wafer 13, and flows out from the fluid outlet 114. The temperature of the gas CA can be room temperature or a cold gas below room temperature.

[0009] According to some embodiments, gas CA is formed from air or an inert gas. Furthermore, according to some embodiments, the thermal conductivity of gas CA is less than 0.026 W / mK. Also according to some embodiments, the specific heat of gas CA is less than 1.015 kJ / (kga·K).

[0010] In some embodiments, the heat source 14 is a heater, but is not limited thereto. In other embodiments, the heat source 14 may be hot air or hot gas (see the description of embodiments below for details).

[0011] In this embodiment, the fluid inlet 113 and the fluid outlet 114 are provided in the first housing 11, but according to some embodiments, one of the fluid inlet 113 and the fluid outlet 114 may be provided in the first housing 11 and the other in the second housing 12, and the present invention is not limited thereto. When the probe 1111 performs the test process, the gas CA flows through the test space S1 and is then discharged, preventing the pre-burn temperature of the wafer 13 from affecting the operation of the probe 1111 and its electrical connections to the test host.

[0012] Please refer to Figure 2. Figure 2 is a schematic diagram showing the usage state of the wafer test cassette 1B in an embodiment of the present invention. According to this embodiment, the heat source 14 is provided outside the second housing 12 in which the wafer 13 is located. A barrier device 15 is also provided in the second housing 12. The barrier device 15 surrounds the wafer 13, and when projected along the projection direction D, its projected area includes the heat source 14. In this way, the heat source 14 can heat the wafer 13 through the second housing 12, and the barrier device 15 prevents thermal energy from entering the test space S1 or prevents thermal energy from being transferred to the first housing 11 via the second housing 12 and affecting the temperature in the test space S1.

[0013] Please refer to Figure 3. Figure 3 is a schematic diagram showing the usage state of the wafer test cassette 1C in an embodiment of the present invention. According to this embodiment, the heat source 14 is hot air. The second housing 12 has a heat inlet and a heat outlet in the high-temperature region S2. Hot air enters through the heat inlet and exits through the heat outlet. In other words, the barrier device 15 supports the wafer 13, and hot air flows through the high-temperature region S2, heating the wafer 13.

[0014] According to some embodiments, when the probe 1111 performs the test process, the first housing 11 and the second housing 12 are in a close coupling state, and the pressure inside the test space S1 is greater than the pressure outside the test space S1. In this way, discharge from the tip of the probe 1111 to the wafer 13 can be suppressed, and damage to the wafer 13 due to tip discharge can be avoided.

[0015] Please refer to Figure 4. Figure 4 is a schematic diagram showing the usage state of the wafer test cassette 1D in an embodiment of the present invention. The wafer test cassette 1D further includes a valve 16, a sensor 17, and a control circuit 18. The sensor 17 and the valve 16 are each connected to the control circuit 18, and the valve 16 can open and close a fluid outlet 114. The sensor 17 senses at least one of the pressure or temperature in the test space S1 and transmits the sensing information to the control circuit 18. The control circuit 18 controls the opening and closing of the valve 16 based on the sensing information. In other words, the control circuit 18 receives the sensing information and decides whether to discharge gas CA from the fluid outlet 114 depending on the pressure and / or temperature in the test space S1. This achieves the objective of controlling the pressure and / or temperature in the test space S1.

[0016] Please refer to Figure 5. Figure 5 is a schematic diagram showing the usage state of the wafer test cassette 1E in an embodiment of the present invention. According to this embodiment, the wafer test cassette 1E also includes an exhaust device 19. The exhaust device 19 is connected to a fluid outlet 114 and can reduce the flow rate of gas CA in the test space S1. According to some embodiments, the exhaust device 19 can discharge gas CA in stages from the test space S1, or discharge gas CA at different flow rates depending on the required degree of heat conduction in the test space S1. According to some embodiments, the exhaust device 19 is connected to a control circuit 18 (see Figure 4), and the control circuit 18 determines the discharge flow rate of the exhaust device 19.

[0017] Please refer to Figure 6. Figure 6 is a schematic diagram showing the usage state of the wafer test cassette 1F in an embodiment of the present invention. According to this embodiment, the wafer test cassette 1F also includes an air inlet device 20. The air inlet device 20 is connected to the fluid inlet 113 and can determine the flow rate of gas CA entering the test space S1. According to some embodiments, the air inlet device 20 can input gas CA in the test space S1 in stages, or input gas CA at different flow rates depending on the required flow rate of the test space S1. According to some embodiments, the air inlet device 20 is connected to a control circuit 18 (see Figure 4). The control circuit 18 then determines the input (increase) flow rate of gas CA by the air inlet device 20.

[0018] Please refer to Figure 7. Figure 7 is a schematic diagram showing the usage state of the wafer test cassette 1G in an embodiment of the present invention. According to this embodiment, the wafer test cassette 1G includes an exhaust device 19 and an inlet device 20. In this way, the wafer test cassette 1G can adjust the flow rate of gas CA in the test space S1 by reducing the flow rate of gas CA in the test space S1 through the exhaust device 19, increasing the flow rate of gas CA in the test space S1 through the inlet device 20, or a combination thereof.

[0019] One beneficial effect of the present invention is that the wafer test cassette provided by the present invention can fill the space between the probe card and the top surface of the wafer with gas, thereby isolating it from the high-temperature region, by employing a technical scheme in which "a barrier device surrounds the high-temperature region, providing thermal isolation between the high-temperature region and the test space" and "a fluid inlet receives gas, the gas flows through the test space, and it flows out from the fluid outlet." As a result, the probe card is not affected by the high temperature of the wafer during the test process, protecting the test results, and the test equipment (e.g., probe card) and test end (e.g., test host) of the wafer test cassette are also protected, improving the efficiency of the wafer test cassette inspection process. [Explanation of Symbols]

[0020] 1A, 1B, 1C, 1D, 1E, 1F, 1G Wafer Test Cassette 11 First housing 111 Probe card 1111 Probe 113 Fluid inlet 114 Fluid outlet 12 Second housing 13 Wafer 14 Heat source 15 Barrier device 16 Valve 17 Sensor 18 Control circuit 19 Exhaust device 20 Intake device S1 Test space S2 High-temperature region CA Gas

Claims

1. At least one fluid inlet, At least one fluid outlet, A first housing including a probe card having at least one probe, A second housing, coupled with the first housing, forms a test space, and the wafer is positioned within the test space so that at least one probe can electrically contact the upper surface of the wafer to perform a test process. Equipped with, The aforementioned second enclosure is A heat source that heats the lower surface of the wafer and forms a high-temperature region between the lower surface and the second housing, A barrier device that surrounds the high-temperature region and provides thermal isolation between the high-temperature region and the test space, Equipped with, The gas flows through the fluid inlet into the test space, fills the space between the probe card and the upper surface of the wafer, and flows out from the at least one fluid outlet. Wafer test cassette.

2. The pressure inside the test space is greater than the pressure outside the test space. The wafer test cassette according to claim 1.

3. It is further equipped with valves, sensors, and control circuits. Each of the valve and the sensor is connected to the control circuit. The valve is capable of opening and closing the at least one fluid outlet, The sensor senses at least one of the pressure or temperature in the test space and transmits the obtained sensing information to the control circuit. The control circuit controls the opening and closing of the valve based on the sensing information. The wafer test cassette according to claim 1.

4. It also includes at least one exhaust system, The at least one exhaust device is connected to the at least one fluid outlet in order to reduce the flow rate of the gas in the test space. The wafer test cassette according to claim 1.

5. Equipped with an air intake system, The air intake device is connected to the at least one fluid inlet in order to increase the flow rate of the gas in the test space. The wafer test cassette according to claim 1.

6. The aforementioned gas is formed from air or an inert gas. The wafer test cassette according to claim 1.

7. The thermal conductivity of the aforementioned gas is less than 0.026 W / m·K. The wafer test cassette according to claim 1.

8. The specific heat of the aforementioned gas is less than 1.015 kJ / (kga·K). The wafer test cassette according to claim 1.

9. The second housing has a heat inlet and a heat outlet in the high-temperature region, The heat source is hot air, which enters through the heat inlet and flows out through the heat outlet. The wafer test cassette according to claim 1.

10. The heat source is located inside or outside the second housing relative to the wafer and provides thermal energy for heating the high-temperature region or the wafer. The wafer test cassette according to claim 1.

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