Reduction of arcing in plasma processing of wafer bevel edges
By using a pulse mode RF generator with adjusted duty cycle and power settings, charge accumulation and arcing during bevel edge processing are mitigated, ensuring efficient and damage-free processing of semiconductor wafers.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-08-12
- Publication Date
- 2026-04-03
AI Technical Summary
Bevel edge processing in semiconductor wafer plasma processing leads to charge accumulation, causing electrical arcing and damage to the wafer surface, which reduces yield and processing efficiency.
Implementing a pulse mode operation for the RF generator with a duty cycle greater than 70% and less than 99% to supply power to the bevel plasma chamber, along with adjustments in power and frequency settings to offset power losses and reduce charge accumulation.
Reduces charge accumulation and arcing at the wafer edge, maintaining processing throughput while minimizing damage to the wafer surface.
Smart Images

Figure 0007840318000001 
Figure 0007840318000002 
Figure 0007840318000003
Abstract
Description
BACKGROUND ART
[0001] This embodiment relates to semiconductor wafer processing tools and processes, and particularly to a method for reducing arcing in a wafer during plasma processing of a bevel edge. Some semiconductor processing systems may use plasma when depositing a thin film on a substrate in a processing chamber. Generally, the substrate is placed on a substrate support in the processing chamber, gas is introduced, and high-frequency (RF) power is supplied to generate plasma.
[0002] In bevel edge processing, the edge of the wafer may be processed to deposit a film on the edge or to remove a film on the edge. Depending on the process performed in the main surface area of the wafer, a film may be deposited on the edge to protect the edge from erosive chemicals and processes. In the case of bevel edge etching, it is common to remove material deposits and / or films formed on the edge. Bevel edge etching is also called bevel edge cleaning because material is removed from the bevel edge to prevent peeling of bevel edge material that can redeposit on the wafer surface and cause defects.
[0003] Bevel edge processing is well known and widely used in semiconductor processing, but problems with electrical arcing are starting to occur. Bevel edge processing is used to deposit a film on the wafer edge and to clean bevel material from the wafer edge, so such processing tends to cause charge accumulation. In bevel edge processing, RF power is generally supplied by a continuous wave (CW) RF generator to increase the amount of power that enables sufficient deposition efficiency or sufficient etching rate. Specifically, since the process is focused on the edge, the CW RF generator is used for bevel edge processing, and a high power level is said to have less adverse effect on the edge compared to plasma processing of a wafer surface having a high processing feature shape and material.
[0004] Unfortunately, power supply using CW RF generators results in a large amount of charge accumulation, which tends to build up at the wafer edges. This charge accumulation then causes electrical arcing by metallic material formed on the wafer surface near the edges. Damage to the wafer surface near the edges is likely to cause defects in the device and may lead to reduced yield.
[0005] This invention arose against this backdrop. [Overview of the project]
[0006] A method and system for processing the bevel edge of a wafer in a bevel plasma chamber. The method includes receiving the pulse mode setting of a generator in the bevel plasma chamber. The method includes identifying the pulse mode duty cycle, which defines the on and off times in each cycle of power supplied by the generator. The method includes calculating or accessing a compensation factor for the generator's input power setting. The compensation factor is configured to add a power increment to the input power setting to offset power losses caused by the duty cycle operating in pulse mode. The method is configured to operate the generator in pulse mode by duty cycle. The generator is configured to generate input power, including the power increment, to achieve effective power in the bevel plasma chamber and achieve a target bevel processing throughput while reducing charge buildup that could cause arc damage.
[0007] In another embodiment, a method is provided for operating a bevel edge process in a plasma chamber. This method includes providing a wafer to the lower electrode of the plasma chamber. The plasma chamber has an insulating plate positioned on the lower electrode. The insulating plate is positioned at a distance from the top surface of the wafer to reduce plasma formation above the top surface of the wafer. The plasma chamber comprises an outer lower electrode surrounding the lower electrode and an outer upper electrode surrounding the insulating plate. The edge of the wafer is positioned between the outer upper electrode and the outer lower electrode. This method includes connecting a radio frequency (RF) generator to the lower electrode while the outer upper electrode and the outer lower electrode are connected to ground potential. This method includes configuring the RF generator to operate in pulse mode. The pulse mode is configured to provide a duty cycle greater than about 70% and less than about 99%. In some embodiments, the duty cycle can range from a 10% setting to about 99%. The power level is increased with respect to the duty cycle setting. The increase in power level is configured to offset the decrease in etching rate in pulse mode compared to continuous wave (CW) mode power supply by the CW RF generator.
[0008] In one embodiment, this method includes increasing the pulse frequency setting of the RF generator during pulse mode. The increased power level and duty cycle settings of the RF generator serve to provide active power for the bevel edge process, which approaches the power supplied for continuous wave (CW) mode power supply by the CW RF generator.
[0009] In one embodiment, increasing the pulse frequency serves to reduce the arc region around the wafer during the bevel edge process. [Brief explanation of the drawing]
[0010] [Figure 1] A plasma system 100 comprising a bevel processing chamber according to one embodiment.
[0011] [Figure 2A] Enlarged view of the bevel edge region according to one embodiment. [Figure 2B] Enlarged view of the bevel edge region according to one embodiment.
[0012] [Figure 3] A diagram illustrating the types of damage caused by excessive charge accumulation and arcing by metal components when continuous-wave mode plasma supply is used for bevel edge processing.
[0013] [Figure 4A] Several exemplary test scenarios demonstrating how closely similar the effective residual charge voltage can be in pulse mode with a 90% duty cycle to that of continuous mode.
[0014] [Figure 4B] Another embodiment, according to one embodiment of the present invention, is a setting in which the pulse mode provides a calculated power setting and a calculated frequency setting to one or more RF generators.
[0015] [Figure 5A] An example of charge change at the wafer edge during several duty cycles operating in a process, according to one embodiment of the present invention. [Figure 5B] An example of charge change at the wafer edge during several duty cycles operating in a process, according to one embodiment of the present invention.
[0016] [Figure 6] A figure showing exemplary oxide etching rates at the wafer edge during CW mode and pulse mode operation of a bevel processing chamber according to one embodiment of the present invention.
[0017] [Figure 7] A figure showing the results of the wafer edge arc region in experiments conducted in CW mode and pulse mode according to one embodiment of the present invention.
[0018] [Figure 8] Figure showing an increase in pulse frequency to reduce area damage around a wafer according to an embodiment of the present invention.
[0019] [Figure 9] Graph showing the advantages of pulse mode operation and an increase in pulse frequency compared to continuous wave mode operation according to an embodiment of the present invention.
[0020] [Figure 10A] Exemplary process operations for performing pulse mode operation in a bevel processing chamber according to an embodiment. [Figure 10B] Exemplary process operations for performing pulse mode operation in a bevel processing chamber according to an embodiment.
[0021] [Figure 11] Embodiment in which effective power is supplied from an RF generator to a bevel plasma chamber to compensate for power loss according to a duty cycle setting according to an embodiment.
[0022] [Figure 12] Control module for controlling a system according to an embodiment.
Best Mode for Carrying Out the Invention
[0023] Embodiments of the present disclosure provide systems and methods for reducing arcing during wafer bevel edge processing by reducing charge accumulation in the wafer edge region. In one configuration, the bevel edge processing operation is performed in a plasma processing chamber designed to specialize in processing the wafer edge while avoiding processing the upper surface of the wafer. In these chamber configurations, high frequency (RF) power is supplied to the electrodes of the chamber to create capacitively coupled plasma (CCP) conditions that provide deposition or etching to the wafer edge. In one configuration, RF power is supplied to electrodes with a pulse setting configured to reduce charge accumulation during processing.
[0024] It should be noted that this embodiment can be implemented in various ways, such as processes, equipment, systems, devices, or methods. Several embodiments are described below.
[0025] Figure 1 shows a plasma system 100 comprising a beveling chamber 103 according to one embodiment. The beveling chamber 103 is designed to deposit on or etch the wafer edge when the wafer is placed on the lower electrode 104. As shown in the figure, the wafer 101 is placed on the lower electrode 104, which is sometimes called a chuck or substrate support. An insulating plate 102 is positioned opposite the lower electrode 104. The insulating plate 102 is positioned close to the top surface of the wafer 101. This is to protect the top surface of the wafer 101 when its edges are being processed.
[0026] For example, the separation distance between the upper surface of the wafer 101 being processed and the surface of the insulating plate 102 facing the upper surface of the wafer is less than 5 mm, and in some embodiments, it is 0.5 mm to 2 mm. Thus, the minimized separation distance will reduce or prevent plasma ignition above the surface of the wafer that is not being processed in the bevel processing chamber 103. As shown in the figure, the bevel processing chamber 103 may include a lower plasma exclusion zone (PEZ) ring 110 surrounding the lower electrode 104. The lower PEZ ring 110 is a dielectric structure configured to set the lower surface area of the wafer 101 exposed to plasma in the bevel edge region 150.
[0027] Similarly, the upper plasma exclusion zone (PEZ) ring 112 is configured to surround the insulating plate 102. The upper PEZ ring 112 is also defined by a dielectric structure. The positioning and size of the upper PEZ ring 112 may be configured to partially expose the upper surface of the wafer 101 in the bevel edge region 150. Furthermore, an outer upper electrode 106 and an outer lower electrode 108 are shown. The outer upper electrode 106 is configured to surround the insulating plate 102 and the upper PEZ ring 112. The outer lower electrode 108 similarly surrounds the lower electrode 104 and the lower PEZ ring 110. In general, both the outer upper electrode 106 and the outer lower electrode 108 are electrically grounded.
[0028] The bevel processing chamber 103 also shows connections to the gas source 120 and the pressure control device 122. Generally, the central gas supply unit 114 is configured to supply gas to the region between the top surface of the wafer 101 and the surface of the insulating plate 102 facing the wafer. In some embodiments, the central gas supply unit 114 supplies an inert gas, and in other embodiments, it supplies a processing gas. The outer gas supply unit 116 is generally shown to supply the processing gas, and / or a mixture of the processing gas and the inert gas, to the bevel edge region 150.
[0029] The RF generator 130 is connected to a matching network 132, which is connected to the lower electrode 104. Generally, the connection between the RF generator 130 and the lower electrode 104 is part of an RF transmission system optimized to supply power to the lower electrode 104. The plasma processing chamber 103 in this configuration is called a capacitively coupled plasma (CCP) chamber. RF power is supplied to the lower electrode by the RF generator 130, and this power is capacitively coupled to the outer lower electrode 108 and the outer upper electrode 106. Since the RF power is capacitively coupled to the outer electrode of the bevel edge region 150, the plasma is ignited in the bevel edge region 150.
[0030] The ignited plasma may be configured to deposit material onto the bevel edge or to etch material from the bevel edge. When material is removed from the bevel edge of wafer 101, the process is sometimes called bevel edge cleaning. Bevel edge cleaning is performed to remove material deposited on the wafer edge to form a type of bevel. If cleaning is not performed at a specific time during processing, the material on the bevel edge may crumble or peel off and be redeposited on the upper surface of wafer 101. For this reason, bevel edge cleaning is a process that is systematically performed when specific processing operations are carried out during semiconductor processing.
[0031] In one embodiment, the RF generator 130 is controlled to generate the amount of input power necessary to achieve the active power used for the bevel edge process in the bevel processing chamber 103. The power effect generally depends on the type of operation being performed. For example, if the operation involves depositing a film on the edge of the wafer 101, the active power level is selected to ensure efficient deposition and achieve the desired throughput. Similarly, if bevel edge cleaning is performed, the active power required for efficient bevel edge cleaning aims to achieve the desired throughput.
[0032] If active power is not transmitted to the beveling chamber 103, or if there are power transmission losses due to processing parameters or system configuration, the speed at which the beveling process is performed may decrease. In other words, it will take longer to perform deposition or batch processing, which will significantly reduce the throughput when multiple wafers are processed in the beveling chamber 103.
[0033] As described above, beveling operations typically use a continuous wave (CW) mode generator setting. This is because deposition and etching at the edges of wafer 101 are not as delicate as the etching operations performed on the main surface of wafer 101. Specifically, the main surface of wafer 101 is typically processed by multiple process operations, including material deposition and etching of composite structures. Bevel edge cleaning would typically only require etching down to the silicon wafer at the wafer edge to remove material deposition.
[0034] Therefore, the CW mode is used in bevel edge deposition and etching operations, but it is accompanied by damage due to charge accumulation. As described above, charge accumulation caused arc loss in the region on the edge of wafer 101. Arc loss has the further effect of damaging devices and features formed on the surface of wafer 101.
[0035] In one embodiment, the RF generator 130 is configured by the system controller 140 to operate in pulse mode 136. In pulse mode 136, the generator is set by a duty cycle (DC) setting and a pulse frequency setting. Generally, the duty cycle setting sets the amount of on and off time during a particular power supply cycle by the RF generator 130. Since the RF generator 130 supplies a small amount of power in pulse mode 136, the system controller 140 is configured to adjust to a power setting 134. The adjustment to power setting 134 is configured to increase the amount of power supplied by the RF generator 130 so that the active power supplied to the bevel processing chamber 103 is substantially equivalent to the amount of power that would have been supplied using CW mode. Figure 1 further shows the system controller 140 providing control to the gas source 120 and the pressure control device 122. The system controller 140 can generally make further adjustments to other processing parameters of the bevel processing chamber 103, and it should be understood that the descriptions of the gas source 120 and the pressure control device 122 are merely examples.
[0036] The duty cycle setting is configured such that the duty cycle is approximately 10% to 99% in one embodiment, approximately 70% to 98% in another embodiment, approximately 80% to 97% in another embodiment, approximately 85% to 95% in another embodiment, and approximately 90% in a specific embodiment. Based on the duty cycle setting, the system controller 140 is configured to make corresponding adjustments to the power setting 134. For example, when the duty cycle is close to 99%, the amount of increase in the power setting 134 is smaller than when the duty cycle is set close to 10%. Therefore, the shorter the duty cycle (i.e., the on time), the greater the increase in power that the system controller 140 needs to set in the power setting 134.
[0037] In one embodiment, it is also possible to adjust the pulse frequency setting in pulse mode 136. The system controller 140 can adjust the pulse frequency of the RF generator 130 to control the amount of area around the edge of the wafer 101 that may be exposed to arc damage. As described below, increasing the pulse frequency of the RF generator 130 has the effect of reducing the amount of area around the edge of the wafer 101 that is exposed to arc damage.
[0038] In one embodiment, pulse frequency adjustment is an optional adjustment knob, and only the pulse mode and power setting need to be adjusted to reduce the amount of arc damage. Generally, the system controller 140 is configured to adjust the RF generator 130 to operate in pulse mode 136 and adjust the duty cycle and pulse frequency, and to perform power adjustment 134 to reduce charge accumulation on the surface of the wafer 101 in the bevel edge region 150 that causes arc damage. In one embodiment, a continuous wave (CW) setting 138 is provided. If the system needs to operate in CW mode for a certain period of time, the CW setting 138 is activated by the controller 140. In one embodiment, the controller 104 may be programmed to execute a process following a recipe for the bevel process. In other embodiments, the controller 104 can process the recipe and perform dynamic adjustments based on feedback received from one or more sensors that measure parameters to determine the supply of active power. In some cases, the sensors of the bevel plasma system may include any sensors, endpoint detection sensors, and other electrical measurement sensors.
[0039] Figure 2A shows an enlarged view of the bevel edge region 150 according to one embodiment. Specifically, the edge 101a of the wafer 101 extends into the bevel edge region 150 so that the top and bottom edges of the wafer 101 can be processed. As described above, the upper PEZ ring 112 is configured to suppress the formation of plasma on the top surface of the wafer 101 so that the top surface of the wafer 101 is protected near the insulating plate 102. Generally, the dimensions and extent to which the upper PEZ ring 112 extends above the wafer 101 will define the area to be processed. Similar optimizations will occur for the lower PEZ ring 110.
[0040] This figure shows a wafer 101 with a film 202 deposited on it. To proceed with the discussion, the film 202 may include one or more films deposited and processed on the wafer 101. In addition, the bevel edge process may also include the deposition of a protective film 204. During the deposition of the protective film 204, the plasma 210 formed in the bevel edge region 150 will inevitably generate a type of charge introduced into the chamber for deposition and formation of the protective film 204. However, during the deposition process in the bevel edge region 150, the accumulation of charge may cause arc damage 250 on the surface of the wafer 101. Specifically, if the film 202 has metallic properties or metallic components, charge damage 250 may appear in the surrounding region of the wafer 101.
[0041] Figure 2B illustrates an example of an etching operation configured to remove material from the edge 101a of wafer 101. The processing chemicals are optimized for etching, and the bevel edge of wafer 101 is etched, typically down to silicon at point 206. The bevel edge etching operation using plasma 220 will generally remove material deposited on the edge 101a of wafer 101 to prevent chipping or delamination of the bevel material. Arc damage 250 is shown to occur on the upper surface around wafer 101 adjacent to the etched area during the bevel edge cleaning operation.
[0042] Figure 3 illustrates the types of damage caused by excess charge accumulation and arcing due to metallic components when a continuous wave mode plasma supply is used for bevel edge processing. The figure in Figure 3 shows a portion of the outer periphery 207 extending to the wafer edge 101a. The wafer notch 302 is shown to refer to the wafer edge 101a and the etched region 206 during the bevel edge cleaning process. Unfortunately, damage 250 due to excessive arcing can affect the device formed near the wafer edge 101a, potentially reducing the yield of functional devices.
[0043] As recognized, arc damage 250 can be excessive depending on the type of material on the wafer surface. In one embodiment, the system controller 140 is configured to program a pulse mode 136 to set the duty cycle and pulse frequency settings of the generator. The pulse mode has been shown to allow charge dissipation during the duty cycle off state, resulting in a significant reduction in charge accumulation in the bevel edge region 150. As described above, in addition to setting the pulse mode 136, the system controller is configured to adjust the power setting 134 to compensate for the loss of power that would have been supplied if the RF generator had been operating in continuous mode. In one embodiment, the amount by which the power is adjusted in the increasing direction based on the selected duty cycle is called the compensation coefficient.
[0044] In one embodiment, once the duty cycle and process recipe parameters are identified, the compensation coefficient is set dynamically. In some embodiments, the compensation coefficient may be programmed into a table or database of specific recipes, and in other embodiments, the compensation coefficient is applied to the system controller 140 based on processed sensor feedback and is dynamically adjusted.
[0045] Figure 4A illustrates several exemplary test scenarios demonstrating how similar the residual charge voltage can be in pulse mode with a 90% duty cycle to that of continuous mode. As shown in the figure, continuous mode operating at 360 watts would have a residual charge voltage of approximately 580 mV. In pulse mode, system controller 140 adjusts power setting 134 to increase the power up to 400 watts. The residual charge voltage has been measured to be approximately 550 mV, or a reduction of 30 mV. If system controller 140 adjusts power setting 134 to increase the power up to 440 watts at a 90% duty cycle, the residual charge voltage would be approximately 580 mV, or roughly equivalent to the residual charge voltage from continuous mode at 360 watts.
[0046] Therefore, with a small increase in input power, the pulse-mode beveling system 103 can achieve nearly the same residual charge voltage as the continuous-wave mode beveling system, while significantly reducing charge accumulation and harmful arc damage 250. In one embodiment, when the beveling chamber 103 requires a target residual charge voltage or active power, a conversion factor may be determined and used by the system controller 140 to make an increased adjustment at the increased power setting 134. Even if the power increases due to the activation of pulse mode, charge accumulation decreases because charge dissipation occurs during the off-time of each cycle based on the selected duty cycle used for the process. For example, charge dissipation occurs during the afterglow in pulse mode after the off-period has started. In one exemplary experiment, it was shown that a reduction in residual charge voltage was achieved by implementing a 90% duty cycle setting. In this experiment, a probe was used and placed at a point 148 mm from the center to the edge of the wafer. The outermost edge is 150 mm on a 300 mm wafer.
[0047] Figure 4B shows another embodiment in which pulse mode 420 is a setting that provides the calculated power setting 426 and pulse frequency setting 428 to one or more RF generators 130. In this embodiment, pulse mode 420 is set as a setting by the setting processor 424 of the system controller 140 to perform a process operation. As described above, this process operation may be depositing material on the bevel edge of a wafer or removing / cleaning material from the edge of a wafer. In either case, an optimized recipe is identified to perform the process operation. For example, if the process is a bevel edge etching operation, the duty cycle setting is selected from the recipe. As described above, the duty cycle may be in the range of 10% to 99%.
[0048] In one example, the duty cycle setting may be optimized based on one or more pre-tests of multiple wafers and / or materials to be removed. In some cases, the duty cycle setting is selected using machine learning that takes as input the results of many test etchings performed and the number of times to achieve a predetermined metric. In other embodiments, the duty cycle setting may be determined from tests over time and can be adjusted based on changes in the chamber or the material being etched or deposited. In some cases, the duty cycle setting may be obtained from a table or database accessible to the system controller 140 regarding the type of goal of the process being performed.
[0049] Once the duty cycle setting 422 is performed, the corresponding pulse power setting 426 can be calculated and determined. For example, if the duty cycle setting is 90%, the input pulse power level supplied from the RF generator 130 to the bevel plasma chamber 103 can be calculated. This calculation can be based on demonstration tests to identify the amount of input power required to produce an effective power supply to the bevel plasma chamber.
[0050] When the duty cycle is close to 99%, the power increase may be smaller than when the duty cycle is close to 10%. Therefore, since a lower duty cycle setting 422 provides less active power than a higher duty cycle setting 422, the adjustment calculation may be performed based on a formula, or based on wafer verification tests or machine learning. In some embodiments, the adjustment calculation may be based on pre-calculated values obtained from a table or database.
[0051] Figures 5A and 5B illustrate an example of a 90% duty cycle 506 operating in each cycle 502. In this example, the on-time represents the load time percentage in pulse mode. That is, a 90% duty cycle means that RF power is supplied for 90% of a given period, but the generator does not supply power for 10% of that period. As mentioned above, the duty cycle setting can be in the range of 10% to 99%. One exemplary range that showed even better results is approximately 85% to 95%. In general, a higher duty cycle will result in less time being provided for charge dissipation 512. Similarly, a lower duty cycle will result in less charge accumulation 510 that could cause arc damage.
[0052] However, a higher duty cycle helps increase throughput because more active etching or deposition occurs when RF power is supplied to the plasma within the bevel edge region 150. Given these trade-offs, it has been observed that having a high duty cycle still provides a significant reduction in charge accumulation due to charge dissipation 512 that occurs during the off-time. Furthermore, having a high duty cycle also helps reduce the amount of increased power setting provided by the system controller 142, which will compensate for the loss of power supplied during the duty cycle off-time. If further reduction in charge accumulation is required, the system controller 140 can adjust the pulse mode 136 to reduce the duty cycle. When the duty cycle is adjusted, the system controller 140 makes a corresponding adjustment to the power setting 134, increasing the power supplied by the RF generator 130.
[0053] Figure 6 shows an example of oxide etching rate at the edge of a wafer during pulse mode operation of the beveling chamber 103. As shown in the figure, the oxide etching rate, measured in angstroms divided by minutes (A / min), represents the material removed from the edge of wafer 101. In this example, the wafer is 300 mm in diameter and measures outward from the center of the wafer from 0 to 150 mm. The graph in Figure 6 shows the radial region extending from 148 mm to 149.5 mm. Since wafer 101 is placed inside the beveling chamber 103, the bevel edge region 150 is exposed to the etching plasma 220 as shown in Figure 2B. This will result in a corresponding etching operation occurring at the bevel edge of wafer 101 for the portion of wafer 101 exposed to the plasma 220 (shown in Figure 2B).
[0054] The figure shows test results comparing bevel edge etching using continuous wave (CW) 602 setting and bevel edge etching using pulsed mode 604 setting. As described above, pulsed mode 604 will make adjustments corresponding to its power setting 134 to provide the active power equivalent to that supplied to the bevel processing chamber 103. When the power to the chamber is increased during operation of pulsed mode 604, the etching rate characteristics of pulsed mode 604 were shown to be substantially equivalent to those of CW mode 602. In this exemplary experiment, the system operating in pulsed mode 604 was operating at a 90% duty cycle. The increase in power level compared to the power level used in CW mode 602 was approximately 10%. Thus, the bevel edge process under pulsed mode 604 can operate at the same level of etching efficiency as CW mode 602, but with the additional advantages of reduced charge accumulation and reduced arc damage 250. In one embodiment, the active power is selected to achieve the target bevel processing throughput. When the process is a bevel edge etching process, throughput correlates with the etching rate. In other words, by slightly increasing the input power to compensate for the selected duty cycle, it is possible to provide an effective level of etching that ensures the process still reaches the target bevel processing throughput.
[0055] Figure 7 shows the arc region (mm) at the edge of wafer 101 for experiments conducted in CW mode 702 and pulse mode 704. 2 This represents the result of ). The arc region as defined herein refers to the region around the outer periphery 207 of the wafer, as shown in Figure 3. For example, the arc region means the amount of region exhibiting arcing when measured at the edge 101a of the wafer. Specifically, the arc region is the amount of arc region around the outer periphery 207 near the edge 101a of the wafer on the upper surface of the film placed on the wafer 101. In one embodiment, it has been found that increasing the pulse frequency of pulse mode 704 has a corresponding effect of reducing the amount of arc region.
[0056] Referring to Figure 8, the arc region (mm 2 The arc region is shown to decrease significantly as the pulse frequency increases. An example is shown where 10 Hz is provided to provide an arc region similar to that of continuous wave mode operation. The pulse frequency is increased using frequency setting 138 by the system controller 140 to significantly reduce the arc region, as shown in Figure 7. The example in Figure 7 shows an approximate range of arc regions resulting from high pulse frequency operation. That is, in continuous wave mode 702, more arc region is consumed by arc damage, as shown in Figure 3, but in pulse mode 704, less arc region is shown as the pulse frequency increases, as shown in Figure 8. In one experiment using the example in Figure 8, it was observed that a reduction of more than 60% in the arc region was achieved when the pulse frequency was adjusted to 10000 Hz. This experiment shows that adjusting the pulse frequency can be useful as an adjustment knob to control the region where arc damage occurs when charge accumulation occurs.
[0057] It should be understood that increasing the pulse frequency in pulse mode 704 is an optional function if the arc region in the process requires further reduction. However, it should be understood that increasing the pulse frequency is not necessary if the charge has been sufficiently dissipated by pulse mode operation. Adjusting the pulse frequency upwards provides further adjustment knobs depending on the process.
[0058] Figure 9 graphically illustrates the advantages of operating in pulse mode while simultaneously increasing the pulse frequency compared to continuous wave mode operation. As shown in the figure, the active power supplied to the beveling chamber 130 is programmed to be approximately 1200 watts. In continuous wave (CW) mode operation, the system reaches 1200 watts, but the arc region will be substantially higher. By increasing the pulse power in pulse mode to 1333 W at a 90% duty cycle, the same active power of 1200 watts is achieved, but by increasing the pulse frequency, the arc region susceptible to arcing is significantly reduced. For example, 9% and 14% represent the increase in active power achieved when using pulse mode while having the same arc region as CW. For example, with 1050 W CW, the arc region is 40 mm 2 By pulsing it at 10kHz, the power can be increased to 1200W.
[0059] This figure shows a 90% duty cycle, but as mentioned above, the duty cycle may be programmed by the controller 140 depending on the process operation used or targeted. Also, the 1200 watts of active power is merely an example and is only shown in experimental tests conducted to demonstrate that pulse mode operation with high pulse frequency can achieve a smaller arc region around the top surface of the wafer at the outer edge than continuous wave mode operation.
[0060] Figure 10A shows an exemplary process for operating a beveling chamber according to one embodiment. In operation 832, the active power to be received by the plasma chamber is determined. The active power is selected to process a bevel edge process on a wafer. As described above, the bevel edge process may be a deposition process or an etching process. The controller 140 is configured to determine the input power level required for the RF generator in continuous wave mode setting to achieve the active power in operation 834. Once the input power is determined, in operation 836, the duty cycle of the RF generator in pulse mode setting is determined by the system controller 140. Based on the pulse mode duty cycle setting, in operation 838, the system controller will increase the input power level of the RF generator to achieve an active power equivalent to the active power that would have been received by the CW mode setting. The system controller may increase the input power of the RF generator 130 by determining compensation factors in a manner consistent with the various embodiments described herein. In addition, the system controller 140 may apply the determined compensation factors to control the increase in input power provided by the RF generator 130.
[0061] As an example, Figure 4A shows that additional power is required based on the selected duty cycle to achieve substantially equivalent residual charge voltage and the resulting input power of the RF generator 130. In operation 840, the bevel edge process is performed in pulse mode setting with increased input power levels to reduce charge accumulation at the bevel edge of the wafer.
[0062] Figure 10B shows an embodiment in which operations 832–838 are processes similar to those in Figure 10A. In operation 839, the pulse frequency of the RF generator is increased in pulse mode setting. The increased pulse frequency will function to reduce the amount of area around the wafer exposed to arcing due to charge accumulation. As described above, increasing the pulse frequency is an optional operation if charge accumulation still occurs after the duty cycle has been selected for pulse mode setting. In operation 841, a bevel edge process is performed with increased power level and increased pulse frequency in pulse mode setting to reduce charge accumulation and arcing at the bevel edge of the wafer.
[0063] In yet another embodiment, a table including input power level settings is pre-configured based on demonstration tests. These input power levels can be set to achieve similar active power as in continuous wave mode. Thus, instead of specifying input power levels for CW mode settings, the controller simply applies a higher input power level to compensate for the selected load time rate. As described above, the selected duty cycle specifies the amount of time the RF generator is on, and if the generator is on for nearly 99%, the power increase in input power will be minimal. For a 90% duty cycle, the increased input power may be about 5% to 20% more than the input power required if the RF generator were operating in continuous mode. Generally, by operating in pulse mode and setting to a desired duty cycle, the amount of charge accumulation in the bevel edge region 150 can be reduced, and arc damage 250 is reduced accordingly.
[0064] Figure 11 illustrates an embodiment in which the active power supplied from the RF generator to the bevel plasma chamber is identified in operation 832. In operation 844, the duty cycle of the pulse mode setting supplied to the RF generator is identified. As described above, the duty cycle can be selected and optimized for a particular bevel edge process. In some cases, the duty cycle is downregulated because charge accumulation is more problematic. Otherwise, the duty cycle may be close to 99% in pulse mode because charge accumulation is minimal. In operation 846, a model of the input power is accessed. This model may be a program that correlates the power increase required to compensate for the selected duty cycle. In some embodiments, this model may be modeling data built from demonstration tests. In yet other embodiments, the modeling data may be built from machine learning so that the optimal input power is set to the RF generator based on the selected process and selected duty cycle.
[0065] In operation 848, an optional step is taken to adjust the pulse frequency amount upward. The amount of pulse frequency adjustment is configured to help reduce the area where charge accumulation can occur at the outer edge of the wafer. The amount by which the pulse frequency is adjusted can also be set based on modeling data. The model can be built based on demonstration tests, dynamic real-time feedback, or predetermined settings. Once the pulse frequency of the RF generator is adjusted, operation 850 is performed as needed, and the bevel edge process is carried out using a pulse mode of the set duty cycle to reduce charge accumulation and associated arc damage.
[0066] Figure 12 shows a control model 800 for controlling the above system, including gap control 108. In one embodiment, the control module 110 in Figure 1 may comprise some of the exemplary components. For example, the control module 800 may comprise a processor, memory, and one or more interfaces. The control module 800 may be used to control devices in the system based in part on detected values. For example only, the control module 800 may control one or more of the valve 802, filter heater 804, pump 806, and other devices 808 based on detected values and other control parameters. The control module 800 may, for example only, receive detected values from a pressure gauge 810, a flow meter 812, a temperature sensor 814, and / or other sensors 816. The control module 800 may be used to control process conditions during precursor feeding and film deposition. The control module 800 would typically comprise one or more memory devices and one or more processors.
[0067] The control module 800 may control the operation of the precursor supply system and the deposition apparatus. The control module 800 runs a computer program that includes a set of instructions for controlling the process timing of a particular process, the temperature of the supply system, the pressure difference across the filter, the position of the valves, the gas mixture, the chamber pressure, the chamber temperature, the wafer temperature, the RF power level, the position of the wafer chuck or pedestal, and other parameters. The control module 800 may monitor the pressure difference and automatically switch the supply of the vapor precursor from one or more paths to one or more other paths. In some embodiments, other computer programs stored in a memory device associated with the control module 800 may be used.
[0068] Typically, there will be a user interface associated with the control module 800. The user interface may include a display device 818 (e.g., a display screen for the device and / or processing conditions and / or an image software screen) and a user input device 820 (such as a pointing device, keyboard, touch screen, microphone, etc.).
[0069] Computer programs for controlling the supply, deposition, and other processes in the process sequence of precursors can be written in any conventional computer-readable programming language (e.g., assembly language, C, C++, Pascal, Fortran, or others). The compiled object code or script is executed by the processor to perform the tasks specified in the program.
[0070] The control module parameters relate to process conditions such as the filter pressure difference, the composition and flow rate of the processing gas, temperature, pressure, plasma conditions (RF power level, low-frequency RF frequency, etc.), cooling gas pressure, and chamber wall temperature.
[0071] The system software may be configured or set up in many different ways. For example, subroutines or control objects for various chamber components may be created to control the operation of the chamber components necessary to perform an inventive deposition process. Examples of programs or program sections for this purpose include substrate positioning code, processing gas control code, pressure control code, heater control code, and plasma control code.
[0072] The substrate positioning program may include program code for controlling chamber components used to place the substrate on a pedestal or chuck and to control the space between the substrate and other components of the chamber (gas inlet and / or target object). The processing gas control program may include code for controlling the composition and flow rate of the gas and, if necessary, for flowing the gas into the chamber before deposition to stabilize the pressure inside the chamber. The filter monitoring program may include code for comparing the measured difference with a default value and / or for switching paths. The pressure control program may include code for controlling the pressure inside the chamber, for example, by adjusting a throttle valve in the chamber's exhaust system. The heater control program may include code for controlling the current to a heating unit for heating components of the precursor supply system, the substrate, and / or other parts of the system. Alternatively, the heater control program may control the supply of a heat transfer gas, such as helium, to the wafer chuck.
[0073] Examples of sensors that may be monitored during deposition include, but are not limited to, a mass flow control module, a pressure sensor (such as a pressure gauge 810), and a thermocouple (e.g., a temperature sensor 814) installed in the supply system, base, or chuck. Appropriately programmed feedback and control algorithms may be used in conjunction with data from these sensors to maintain desired process conditions. The foregoing describes the implementation of embodiments of the invention in a single-chamber or multi-chamber semiconductor processing tool.
[0074] In some embodiments, the controller 140 is part of a system, which may be part of the examples described above. Such a system may include a semiconductor processing apparatus comprising a processing tool, a chamber, a processing platform, and / or specific processing components (such as a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronic equipment for controlling pre-processing, in-processing, and post-processing operations of semiconductor wafers or substrates. These electronic components may be referred to as “controllers” that can control various components or sub-components of the system. Depending on the processing requirements and / or the type of system, the controller may be programmed to control any of the processes disclosed herein, including the supply of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid supply settings, position operation settings, and wafer loading and unloading to and from a load lock connected to or coupled to a specific system, including tools and other transport tools and / or a specific system.
[0075] Generally, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive and issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. An integrated circuit may include a firmware-type chip that stores program instructions, a chip defined as a digital signal processor (DSP), an application-specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions are instructions that are transmitted to the controller in the form of various individual settings (or program files) and may define operating parameters for executing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to realize one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or one or more processing steps during the manufacturing of a wafer die.
[0076] In some embodiments, the controller may be part of a computer that is integrated with or coupled to the system, or is networked to the system, or a combination thereof, or coupled to such a computer. For example, the controller may be in a “cloud” that enables remote access to wafer processing, or may be all or part of a fab host computer system. The computer may enable remote access to the system to monitor the progress of manufacturing operations, investigate the history of past manufacturing operations, investigate trends or performance criteria from multiple manufacturing operations, modify parameters of the current operation, set up subsequent processing steps for the current operation, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network that may include a local network or the internet. The remote computer may include a user interface that enables the entry or programming of parameters and / or settings that are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in a data format that specify the parameters of each processing step performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool that the controller is configured to connect to or control. Therefore, as described above, the controllers may be distributed by, for example, including one or more separate controllers that are networked together and by cooperating toward a common purpose, such as the processes and control described herein. An example of controllers distributed toward such a purpose would be one or more integrated circuits on a chamber that are located remotely (for example, at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that cooperate to control the processes in the chamber.
[0077] Examples of the systems described include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and other semiconductor processing systems that may be used in connection with or in use in the fabrication and / or manufacture of semiconductor wafers.
[0078] As described above, the controller may communicate with one or more of the following, depending on the processing steps performed by the tool: other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools installed throughout the factory, a main computer, another controller, or tools used for material handling to load and unload wafer containers to and from tool locations and / or load ports in a semiconductor manufacturing plant.
[0079] The above descriptions of embodiments are provided for illustrative and explanatory purposes only. They are not intended to be exclusive or limiting to the present invention. Individual elements or features of a particular embodiment are not generally limited to that particular embodiment, but may be used synonymously in selected embodiments, even if not specifically noted, where applicable. The same may differ in many ways. Such differences are not considered departures from the invention, and all such modifications are intended to fall within the scope of the invention.
[0080] Although the embodiments described above have been explained in some detail for clear understanding, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. Accordingly, these embodiments should be considered illustrative rather than restrictive, and are not limited to the details described herein, but may be modified within the scope equivalent to that of the claims. [Application Example 1] A method for performing a bevel edge process in a plasma chamber, A wafer is provided to the lower electrode of the plasma chamber, the plasma chamber has an insulating plate positioned above the lower electrode, the insulating plate is positioned at a certain distance from the upper surface of the wafer to reduce plasma formation above the upper surface of the wafer, the plasma chamber includes an outer lower electrode surrounding the lower electrode and an outer upper electrode surrounding the insulating plate, the edge of the wafer is positioned between the outer upper electrode and the outer lower electrode, The RF generator is configured to operate in pulse mode, and the pulse mode is configured to provide a duty cycle greater than approximately 10% and less than approximately 99%, and the RF generator is connected to the lower electrode while the outer upper electrode and the outer lower electrode are connected to ground potential. Setting the power level of the RF generator to an increased power level lower than the aforementioned 99% setting, A method that includes [a certain feature]. [Application Example 2] The method described in Application Example 1, Regarding the aforementioned 10% setting, the RF generator is in the ON state for 10% of the cycle and in the OFF state for 90% of the cycle. [Application Example 3] The method described in Application Example 1, A method wherein the capacitive coupling between the outer upper electrode and the outer lower electrode forms an edge plasma that facilitates a deposition process or etching process at the edge of the wafer. [Application Example 4] The method described in Application Example 3, A method relating to the etching process, wherein the increased power level is set for setting the duty cycle, and the increased power level is configured to offset the reduction in etching rate in pulse mode with respect to the power supply in CW mode by a continuous wave (CW) RF generator. [Application Example 5] The method described in Application Example 3, A method in which the power level of the RF generator is set to an increased power level when the duty cycle is reduced from the 99% setting, thereby enabling charge dissipation in the region around the wafer edge, and the charge dissipation reduces charge accumulation in the region around the wafer edge that causes arcing by the metallic material. [Application Example 6] The method described in Application Example 1, The method wherein the duty cycle in the pulse mode is a percentage setting between the setting of approximately 10% and the setting of approximately 99%, and the percentage setting of the duty cycle correlates with a predetermined increase in power level with respect to the power level during power supply of CW mode by a continuous wave (CW) RF generator. [Application Example 7] The method described in Application Example 6, A method for setting the duty cycle ratio such that it allows charge dissipation in the region around the wafer edge in order to reduce charge accumulation that causes arcing in the region around the wafer edge. [Application Example 8] The method described in Application Example 1, further, A method comprising increasing the pulse frequency setting of the RF generator such that, during the pulse mode, the increased power level of the RF generator functions to supply effective power for the bevel edge process, bringing it close to the power supplied for the CW mode power supply by the continuous wave (CW) RF generator. [Application Example 9] The method described in Application Example 1, further, A method comprising configuring the RF generator to operate at an increased pulse frequency during the pulse mode relative to the continuous wave (CW) mode. [Application Example 10] The method described in Application Example 9, A method wherein the increased pulse frequency functions to reduce the arc region around the wafer during the bevel edge process. [Application Example 11] The method described in Application Example 10, A method wherein the setting of the duty cycle with the increased power level in the pulse mode acts to supply effective power to the bevel edge process as a power supply using the CW mode. [Application Example 12] The method described in Application Example 11, A method of power supply using the CW mode, wherein the power supply is lower than that of the pulse mode. [Application Example 13] The method described in Application Example 1, The duty cycle is set to 90% such that the RF generator is ON for 90% of the cycle and OFF for 10% of the cycle. [Application Example 14] A method for processing the bevel edge of a wafer in a bevel plasma chamber, further comprising: The pulse mode setting for the generator of the bevel plasma chamber is received, Identify the duty cycle of the pulse mode, and define the on and off times in each cycle of power supplied by the generator. A compensation coefficient for the input power setting of the generator is identified, and the identified coefficient is configured to add a power increase to the input power setting in order to offset the power loss caused by the duty cycle operated in pulse mode. A method comprising operating the generator in pulse mode during the duty cycle, wherein the generator is configured to generate the input power, including a power increase based on the compensation coefficient, in order to realize active power in the bevel plasma chamber, and the active power is selected to achieve a target bevel processing throughput. [Application Example 15] The method described in Application Example 14, The duty cycle is set to be greater than approximately 10% and less than approximately 99%. [Application Example 16] The method described in Application Example 14, A method wherein the pulse mode enables charge dissipation in the region of the wafer adjacent to the bevel edge in order to reduce charge accumulation that causes arcing by metallic material on the surface of the wafer in the region adjacent to the bevel edge. [Application Example 17] The method described in Application Example 14, A method wherein the power increase correlates with the increased loss in active power caused by the duty cycle operated in pulse mode. [Application Example 18] The method described in Application Example 17, A method wherein the sensor is coupled to the bevel plasma chamber to determine the increased loss in active power and to correct the compensation coefficient selected for processing the bevel edge in the pulse mode. [Application Example 19] A system for processing the bevel edge of a wafer in a bevel plasma chamber, further comprising: The bevel plasma chamber has a lower electrode and an insulating plate positioned above the lower electrode, the insulating plate being positioned separately from the upper surface of the wafer to reduce plasma formation above the upper surface of the wafer, the plasma chamber includes an outer lower electrode surrounding the lower electrode and an outer upper electrode surrounding the insulating plate, the edge of the wafer being positioned between the outer upper electrode and the outer lower electrode, The system comprises a controller configured to receive pulse mode settings for the generator of the bevel plasma chamber, The controller is configured to identify the duty cycle of the pulse mode, the duty cycle defining the on and off times in each cycle of power supplied by the generator, The controller is configured to apply a compensation factor to the input power setting of the generator, and the compensation factor is configured to add a power increase to the input power setting to offset power losses caused by the duty cycle operated in pulse mode. The controller is configured to operate the generator in pulse mode during the duty cycle, the generator is configured to generate the input power including a power increment to realize active power in the bevel plasma chamber, and the active power is selected to achieve a target bevel processing throughput, the system. [Application Example 20] The system described in Application Example 19, The pulse mode is a system that enables charge dissipation in the region of the wafer adjacent to the bevel edge in order to reduce charge accumulation that causes arcing by the metallic material on the surface of the wafer in the region adjacent to the bevel edge.
Claims
1. A method for performing a bevel edge process in a plasma chamber, A wafer is provided to the lower electrode of the plasma chamber, the plasma chamber has an insulating plate positioned above the lower electrode, the insulating plate is positioned at a certain distance from the upper surface of the wafer to reduce plasma formation above the upper surface of the wafer, the plasma chamber includes an outer lower electrode surrounding the lower electrode and an outer upper electrode surrounding the insulating plate, the edge of the wafer is positioned between the outer upper electrode and the outer lower electrode, The RF generator is configured to operate in pulse mode, and the pulse mode is configured to provide a duty cycle greater than 10% and less than 99%, and the RF generator is connected to the lower electrode while the outer upper electrode and the outer lower electrode are connected to ground potential. For duty cycle settings lower than the aforementioned 99% setting, the power level of the RF generator is set to an increased power level that is higher than the power level of the duty cycle setting at the aforementioned 99% setting. Setting the RF generator to operate with an increased pulse frequency during the pulse mode relative to the continuous wave (CW) mode, A method that includes [a certain feature].
2. The method according to claim 1, Regarding the aforementioned 10% setting, the RF generator is in the ON state for 10% of the cycle and in the OFF state for 90% of the cycle.
3. The method according to claim 1, A method wherein the capacitive coupling between the outer upper electrode and the outer lower electrode forms an edge plasma that facilitates a deposition process or etching process at the edge of the wafer.
4. The method according to claim 3, A method relating to the etching process, wherein the increased power level is set based on the duty cycle setting, and the increased power level is configured to offset the reduction in etching rate in pulse mode with respect to the power supply in CW mode by a continuous wave (CW) RF generator.
5. The method according to claim 3, A method wherein the power level of the RF generator is set to an increased power level when the duty cycle is reduced from the 99% setting, the off state of the duty cycle allows charge dissipation in the region around the edge of the wafer, and the charge dissipation reduces charge accumulation that causes arcing by metallic material in the region around the edge of the wafer.
6. The method according to claim 1, A method wherein the duty cycle in the pulse mode is a percentage setting between the 10% setting and the 99% setting, and the percentage setting of the duty cycle correlates with a predetermined increase in power level with respect to the power level during power supply in CW mode by a continuous wave (CW) RF generator.
7. The method according to claim 6, A method for setting the duty cycle ratio such that it allows charge dissipation in the region around the edge of the wafer in order to reduce charge accumulation that causes arcing in the region around the edge of the wafer.
8. The method according to claim 1, further, A method comprising increasing the pulse frequency setting of the RF generator such that, during the pulse mode, the increased power level of the RF generator functions to supply effective power for the bevel edge process, bringing it close to the power supplied for the CW mode power supply by the continuous wave (CW) RF generator.
9. The method according to claim 1, A method wherein the increased pulse frequency functions to reduce the arc region around the wafer during the bevel edge process.
10. The method according to claim 9, A method wherein the setting of the duty cycle with the increased power level in the pulse mode acts to supply the bevel edge process with active power equivalent to that supplied using the CW mode.
11. The method according to claim 10, A method in which the power supply using the CW mode is lower than that of the pulse mode.
12. The method according to claim 1, The duty cycle is set to 90% such that the RF generator is ON for 90% of the cycle and OFF for 10% of the cycle.
13. A method for processing the bevel edge of a wafer in a bevel plasma chamber, further comprising: The pulse mode setting for the generator of the bevel plasma chamber is received, Identify the duty cycle of the pulse mode, and define the on and off times in each cycle of power supplied by the generator. A compensation coefficient for the input power setting of the generator is identified, and the compensation coefficient is configured to add a power increase to the input power setting in order to offset the power loss caused by the duty cycle operating in pulse mode. The generator is operated in pulse mode during the duty cycle, and the generator is configured to generate the input power, including a power increase based on the compensation coefficient, in order to realize the active power in the bevel plasma chamber, and the active power is selected to achieve a target bevel processing throughput. A method comprising setting the generator to operate at an increased pulse frequency during the pulse mode relative to the continuous wave (CW) mode.
14. The method according to claim 13, The duty cycle is greater than a 10% setting and less than a 99% setting.
15. The method according to claim 13, A method wherein the pulse mode enables charge dissipation in the region of the wafer adjacent to the bevel edge in order to reduce charge accumulation that causes arcing by metallic material on the surface of the wafer in the region adjacent to the bevel edge.
16. The method according to claim 13, A method wherein the power increase correlates with the increased loss in active power caused by the duty cycle operated in pulse mode.
17. The method according to claim 16, A method wherein the sensor is coupled to the bevel plasma chamber to determine the increased loss in active power and to correct the compensation coefficient selected for processing the bevel edge in the pulse mode.
18. A system for processing the bevel edge of a wafer in a bevel plasma chamber, further, The bevel plasma chamber has a lower electrode and an insulating plate positioned above the lower electrode, the insulating plate being positioned separately from the upper surface of the wafer to reduce plasma formation above the upper surface of the wafer, the bevel plasma chamber includes an outer lower electrode surrounding the lower electrode and an outer upper electrode surrounding the insulating plate, the edge of the wafer being positioned between the outer upper electrode and the outer lower electrode, The system comprises a controller configured to receive pulse mode settings for the RF generator of the bevel plasma chamber, The controller is configured to identify the duty cycle of the pulse mode, the duty cycle defining the on and off times in each cycle of power supplied by the RF generator, The controller is configured to apply a compensation factor to the input power setting of the RF generator, the compensation factor being configured to add a power increase to the input power setting to offset power losses caused by the duty cycle operated in pulse mode. The controller is configured to operate the RF generator in pulse mode during the duty cycle, the RF generator is configured to generate the input power including a power increment to realize active power in the bevel plasma chamber, the active power is selected to achieve a target bevel processing throughput. The system is configured such that the controller sets the RF generator to operate at an increased pulse frequency during the pulse mode relative to the continuous wave (CW) mode.
19. The system according to claim 18, The pulse mode is a system that enables charge dissipation in the region of the wafer adjacent to the bevel edge in order to reduce charge accumulation that causes arcing by the metallic material on the surface of the wafer in the region adjacent to the bevel edge.
Citation Information
Patent Citations
Customizable Bevel Etcher
JP2010517296A
Plasma processing apparatus and plasma processing method
JP2017204467A
Multi-regime plasma wafer processing to increase ion directionality
JP2019053978A
Smart high frequency pulse conditioning using a variable frequency generator.
JP2020515001A