Coil substrate, method for manufacturing the same, and electronic device including the same

Abstract

Provided is a coil substrate, a manufacturing method thereof, and an electronic device including the same, which can eliminate problems such as damage to the appearance of the coil substrate and electrical short defects by controlling the lead-in wiring of the coil substrate to be formed thinly without being plated to the thickness level of the coil conductor pattern. The coil substrate includes a base substrate, a first seed pattern formed on a first surface of the base substrate and including a seed region and a lead-in wiring region, a first coil formed on the seed region of the first seed pattern, a first seed pattern protective layer formed on the lead-in wiring region of the first seed pattern, and a first insulating layer formed to contact at least one surface of the seed pattern protective layer.

Description

Technical Field

[0001] The present invention relates to a thin film type coil substrate capable of ensuring high electromagnetic force, an electronic device including the same, and a manufacturing method thereof.

Background Art

[0002] Coil devices can be used in various fields that require electromagnetic force, such as inductors, vibration motors, and camera actuators. Among them, a camera actuator mechanically adjusts the position and angle of an image sensor, a lens optical system, etc., and is provided for optical shake correction (OIS; Optical Image Stabilizer).

[0003] In recent years, with the miniaturization of portable electronic products such as smartphones to which camera actuators are applied, notebook computers, tablet PCs, digital cameras, etc., the size of the coil device mounted on the camera actuator has also been increasingly tending to become smaller.

[0004] For such miniaturization of coil devices, thin film type coil devices in which conductor patterns are formed spirally on the upper surface of a substrate are widely used. In order to ensure high electromagnetic force so that sufficient functions can be exhibited even when the size of the coil device becomes smaller, efforts have been continuously made mainly by expanding the thickness of the coil conductor pattern formed in the coil device.

[0005] However, when the plating process is continued to expand the thickness of the conductor pattern, a phenomenon occurs in which the conductor pattern cannot maintain a certain shape as the plating time elapses. In addition, there are cases where the upper part of the conductor pattern is over-plated due to plating deviation and a fine pattern interval cannot be maintained, which may cause problems such as circuit failures such as short circuits.

[0006] Furthermore, the plating of the lead-in wiring simultaneously with the conductor pattern increases its thickness, leading to problems with reduced workability during the processing stage when the lead-in wiring is removed. Additionally, the conductor pattern or lead-in wiring may have an uneven surface due to burrs, and its appearance may be damaged by continuously applied impact forces. [Overview of the project] [Problems that the invention aims to solve]

[0007] The technical problem that the present invention aims to solve is to provide a coil substrate, a method for manufacturing the same, and an electronic device including the same, which can eliminate problems such as cosmetic damage to the coil substrate and electrical short-circuit failures by controlling the pulling wiring of the coil substrate so that it is formed thinly without being plated to the thickness level of the coil conductor pattern.

[0008] The technical problems of the present invention are not limited to those mentioned above, and any other technical problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0009] One aspect of the coil substrate of the present invention for achieving the aforementioned technical objectives includes: a base substrate; a first seed pattern formed on a first surface of the base substrate and including a seed region and a pull-in wiring region; a first coil formed on the seed region of the first seed pattern; a first seed pattern protective layer formed on the pull-in wiring region of the first seed pattern; and a first insulating layer formed in contact with at least one surface of the seed pattern protective layer, wherein the first coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern, the first seed pattern formed below the seed pattern protective layer extends to a cut line, and the first insulating layer is formed in contact with at least one of the base substrate, the first coil, the seed pattern, and the seed pattern protective layer.

[0010] An embodiment of the electronic device of the present invention for achieving the aforementioned technical problem is formed including the coil substrate.

[0011] A method for manufacturing a coil substrate of the present invention to achieve the aforementioned technical objectives includes the steps of: preparing a base substrate including a first surface and a second surface corresponding to the first surface; forming a first seed pattern on the first surface of the base substrate; forming a first coil on the first seed pattern; forming a first seed pattern protective layer on the first seed pattern; and forming a first insulating layer in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer.

[0012] Specific details of other embodiments are included in the detailed description and drawings. [Effects of the Invention]

[0013] The present invention provides the following effects by forming via pads connected to the coil pattern on the outside of the coil substrate and forming a protective layer on seed patterns that connect the via pads to the lead wiring.

[0014] Firstly, differences in the viscosity and area of ​​the protective layer can reduce bleeding and connection defects that may occur during the formation of the protective layer.

[0015] Secondly, it can reduce short-circuit and open-circuit defects, thereby improving circuit performance.

[0016] Thirdly, even if alignment errors occur during protective layer formation, the likelihood of short circuits or open circuits can be relatively reduced.

[0017] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief explanation of the drawing]

[0018] [Figure 1] A cross-sectional view schematically showing the structure of a coil substrate according to an embodiment of the present invention. [Figure 2] A first exemplary view for explaining a first protective layer constituting a coil substrate according to an embodiment of the present invention. <0OO0072>A second exemplary view for explaining a first protective layer constituting a coil substrate according to an embodiment of the present invention. [Figure 4] A third exemplary view for explaining a first protective layer constituting a coil substrate according to an embodiment of the present invention. [Figure 5] A fourth exemplary view for explaining a first protective layer constituting a coil substrate according to an embodiment of the present invention. [Figure 6] A flowchart for explaining a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 7] A cross-sectional view for explaining step S310 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 8] A cross-sectional view for explaining step S320 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 9] A cross-sectional view for explaining step S330 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 10] A cross-sectional view for explaining step S340 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 11] A cross-sectional view for explaining step S350 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 12] A cross-sectional view for explaining step S360 in a method of manufacturing a coil substrate according to an embodiment of the present invention. [Figure 13] A cross-sectional view schematically showing the structure of a coil substrate according to another embodiment of the present invention.

Mode for Carrying Out the Invention

[0019] Embodiments of the present invention will be described in detail below with reference to the attached drawings. The same reference numerals will be used for the same components in the drawings, and redundant descriptions relating to them will be omitted.

[0020] The present invention relates to a coil substrate on which a protective layer is formed on a pull-in wiring, an electronic device including the same, and a method for manufacturing the coil substrate. The present invention will be described in detail below with reference to the drawings and other documents.

[0021] Figure 1 is a schematic cross-sectional view showing the structure of a coil substrate according to one embodiment of the present invention. Figure 13 is a schematic cross-sectional view showing the structure of a coil substrate according to another embodiment of the present invention.

[0022] According to Figures 1 and 13, the coil substrate 100 can be configured to include a base substrate 110, a first seed pattern 120, a first coil 130, and a first seed pattern protective layer 160.

[0023] The base substrate 110 constitutes the core of the coil substrate 100 and can be formed from an insulating material as a base film having a predetermined thickness (for example, 5 μm to 100 μm). The base substrate 110 is provided as a flexible film having flexibility, but is not limited to this, and can also be provided as a rigid flexible or rigid film.

[0024] The base substrate 110 can be formed using at least one insulating material selected from various types of polymeric substances. These various types of polymeric substances may include polyimide, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate, epoxy, and glass fiber.

[0025] Furthermore, the base material 110 can be any shape as long as it can realize a coil device. It can be formed into polygons such as squares, circles, plates, trapezoids, and triangles, or into shapes with rounded corners. It can also be formed into a shape that follows the coil profile described below, and is not limited to any shape as long as it is a shape that allows the coil of the present invention to be preferably realized.

[0026] The base substrate 110 may include a cut line (210). Here, the cut line 210 is the boundary portion that divides the coil substrate 100 into a product area 220 and a non-product area, i.e., a dummy area (230). The cut line 210 can be cut during the product production process using methods such as laser cutting or dicing, thereby separating the dummy area 230 from the product area 220. The cut line 210 may be the edge region of the coil substrate 100, which consists only of the product area 220, but it may also be an inner region located inside the edge region.

[0027] The dummy region 230 may include a pull-in wiring layer 140, a dummy pattern for separating the product region 220 from the non-product region, and a dummy pattern for controlling the plating deviation between the wiring when forming the first coil, in order to serve as wiring for receiving current when forming the first coil 130. The first seed pattern (120) is formed on the first surface of the base substrate 110 and is provided to improve the bonding between the base substrate 110 and the first coil 130 or to apply an external current to the first coil 130. The first seed pattern 120 can be formed as a thin-film conductive layer using an electrically conductive material as the material, and can be formed from one metal selected from various conductive metals such as nickel (Ni), chromium (Cr), copper (Cu), gold (Au), aluminum (Al), and palladium (Pd), or from an alloy of multiple metals. The first seed pattern 120 can be formed on the base substrate 110 by physical or chemical methods such as vapor deposition, bonding, or plating.

[0028] The first seed pattern 120 can be formed with a thickness of, for example, 0.1 μm to 5 μm, preferably 0.5 μm to 1.5 μm. Such a thickness for the first seed pattern 120 allows sufficient current to be applied to form the first conductive pattern 130a and / or the second conductive pattern 130b, which will be described later, and can suppress defects that occur during processing such as cutting.

[0029] Although not shown in Figure 1, an underlayer can be further provided on the first seed pattern 120. The underlayer can be formed using the same metal as the first seed pattern 120, but it may also be formed using a different metal. Furthermore, the underlayer can be formed to have the same thickness as the first seed pattern 120, or to be thicker than the first seed pattern 120, and thinner than the thickness of the first coil 130.

[0030] Furthermore, the first seed pattern 120 includes a seed region and a pull-in wiring region. Here, the seed region is the base region (i.e., the seed region) when forming the first conductive pattern 130a and / or the second conductive pattern 130b of the first coil, which will be described later, and the pull-in wiring region is the region that serves as the wiring to which current is applied when forming the first conductive pattern 130a and / or the second conductive pattern 130b.

[0031] The first coil 130 is capable of conducting electric current and inducing electromagnetic force. The first coil 130 can be formed on the first seed pattern 120, preferably on the seed region of the first seed pattern 120, at a thin film level, and can be formed by winding it in a spiral shape. Alternatively, the third coil can be formed on the second surface of the base substrate 110, so that coils can be formed on both sides of the base substrate 110, but this is not limited to this, and it is also possible to form them only on one surface of the base substrate 110.

[0032] The first coil 130 can be formed from one or more metals selected from various conductive metals such as nickel (Ni), copper (Cu), gold (Au), silver (Ag), platinum (Pt), aluminum (Al), palladium (Pd), and titanium (Ti). The first coil 130 can be formed on the base substrate 110 using various techniques such as etching, plating, printing, and coating.

[0033] Furthermore, the first coil 130 can be formed including a first conductive pattern 130a and a second conductive pattern 130b on at least one surface of the first conductive pattern 130a.

[0034] When the first conductive pattern 130a of the first coil 130 is formed on the base substrate 110 using plating, either electroplating or electroless plating can be used. Although not shown in Figure 1, when the first conductive pattern 130a is formed on the base substrate 110 using electroplating, it can be formed in areas where the resist pattern layer is not formed. Furthermore, the first conductive pattern 130a can be formed on the first seed pattern 120 to have the same thickness as the resist pattern layer, or it can be formed on the first seed pattern 120 to have a thinner thickness than the resist pattern layer. In such cases, it is possible to prevent the plating from being unevenly distributed at the top, and to form the top and bottom widths uniformly. The resist pattern layer can be removed on the base substrate 110 after the first conductive pattern 130a of the first coil has been formed, along with a portion of the first seed pattern. The resist pattern layer can be removed on the base substrate 110 before the second conductive pattern 130b is formed on the first conductive pattern 130a of the first coil.

[0035] Furthermore, when the first seed pattern 120 is formed on the seed region using plating, it can be formed by performing one or more plating processes. In this case, one or more boundary lines may be formed on the cross-section of the first conductive pattern 130a of the first coil 130 due to changes in the number of plating processes or plating conditions.

[0036] In other words, by performing one or more plating processes, even if the thickness of the first conductive pattern 130a of the first coil 130 is formed to be 40 μm or more, productivity can be easily ensured, such as preventing charring defects caused by the high current applied during plating. Furthermore, the second conductive pattern 130b of the first coil 130 can be formed by plating growth from the upper or side surface of the first conductive pattern 130a. In this case, if the second conductive pattern 130b grows isotropically, the thickness or width of the upper and side surfaces of the first conductive pattern 130a will be expanded to the same or similar levels, and if it grows anisotropically, it can be formed in a shape where the thickness or width is concentrated on one side, either the upper or side surface.

[0037] Furthermore, a first seed pattern protective layer 160 can be formed on the lead-in wiring of the first seed pattern 120. The first seed pattern protective layer 160 is a resin layer composed of an insulating material and can be formed on the lead-in region of the first seed pattern 120 after the first conductive pattern 130a of the first coil has been formed. For example, it can be formed using the same solder resist material as the first insulating layer described later, or using an insulating material with different physical properties, and can be formed using various methods such as printing, bonding, coating, and photolithography.

[0038] As shown in Figure 1, the first seed pattern protective layer 160 is formed on the pull-in region of the first seed pattern and extends to the cut line. Furthermore, at least one side surface of the first seed pattern protective layer 160 is formed to be in contact with the first conductive pattern of the first coil, and at least a portion of the top surface or side surface of the first seed pattern protective layer is formed to be in contact with the second conductive pattern of the first coil.

[0039] This allows the pull-in region of the first seed pattern to be left as a passage for receiving the current necessary to form the second conductive pattern of the first coil, after the first conductive pattern of the first coil has been formed and before a portion of the first seed pattern has been removed. Therefore, the seed regions of the first seed pattern between the first conductive patterns of the first coil can be separated from each other to prevent short-circuit failures, and current can be applied to the first coil from the pull-in wiring layer 140 outside the cut line through the pull-in region of the first seed pattern. Furthermore, the thickness of the pull-in region of the first seed pattern is at a level of 0.1 μm to 5 μm, which is lower than the thickness of the first conductive pattern or the second conductive pattern of the first coil. Because it is formed at a thin thickness, it facilitates cutting the first coil along the cut line, eliminating problems such as damage to the appearance of the side of the cut line or short-circuit failures between the wiring.

[0040] In this case, the thickness of the first seed pattern protective layer within the pull-in wiring area of ​​the first seed pattern can be formed to be thicker than or the same as the pull-in wiring area of ​​the first seed pattern, and thinner than the thickness of the first insulating layer described later, preferably at a thickness level of 1 to 45 μm. If the thickness of the first seed pattern protective layer is thinner than the thickness of the pull-in wiring area of ​​the first seed pattern, the pull-in wiring area of ​​the first seed pattern cannot be protected during the process of removing a portion of the first seed pattern, and instead, both the first seed pattern protective layer and the pull-in wiring area of ​​the first seed pattern are damaged, resulting in a problem where the thickness of the pull-in wiring area of ​​the first seed pattern becomes thicker. Also, if it is thicker than the thickness of the first insulating layer described later, irregularities will occur on the surface of the first insulating layer, making it difficult to stack the nth coil for forming a multilayer structure, and a problem may arise where the processing quality deteriorates due to burrs and residues generated during the cutting process.

[0041] On the other hand, the first coil is defined as having a wiring area and a pad area, the wiring area including a plurality of first wiring patterns wound in a spiral shape, and the pad area may include first connecting lines or first coil pads formed with a wider width than the first wiring patterns.

[0042] In this case, the pull-in wiring area of ​​the first seed pattern can be formed as an extension of the seed area of ​​the first seed pattern formed at the lower part of the first coil pad. When the pull-in wiring area of ​​the first seed pattern is formed as an extension of the first coil wiring pattern, the first seed pattern protective layer is formed up to the top of the first coil wiring pattern, thereby protecting against the removal of a portion of the seed area of ​​the first seed pattern at the lower part of the first coil wiring pattern. In other words, the first wiring pattern of the first coil may not be able to separate, potentially causing a short circuit failure.

[0043] Therefore, the present invention presents a structure in which the pulling-in wiring of the first seed pattern is formed continuously with the outermost pad area among the wiring and pad areas constituting the first coil, which is spaced further apart than the spacing between the first wiring patterns and formed thicker than the first wiring patterns, thereby protecting the pulling-in area of ​​the first seed pattern and preventing short-circuit failures between the first wiring patterns in the first coil.

[0044] Furthermore, the first seed pattern protective layer 160 can also be formed on the outermost first wiring pattern side of the first coil, rather than on the pad of the first coil.

[0045] The first seed pattern 120 and the first seed pattern protective layer 160 can be formed on one surface of the base substrate 110 with respect to the cut line 210, as shown in Figure 1. However, the method is not limited to this, and the first seed pattern 120 and the first seed pattern protective layer 160 can also be formed on both sides (front and back) of the base substrate 110 with respect to the cut line 210, as shown in Figure 13.

[0046] The first seed pattern protection layer 160 can be formed to have the same width as the pad 150 of the first coil, or, as shown in Figure 3, it can be formed to have a width greater than the pad 150 of the first coil. Furthermore, as shown in Figure 4 or Figure 5, it is also possible to form the first seed pattern protection layer 160 to have the same width as the maximum width of the pad 150 of the first coil. This ensures that the thin first seed pattern protection layer 160 has enough area to apply the maximum current to the first coil. Figures 2 to 5 are illustrative diagrams illustrating the first protection layer constituting a coil substrate according to one embodiment of the present invention.

[0047] Although not shown in Figure 1, the coil substrate 100 may further include a first insulating layer. The first insulating layer is formed to cover the top or sides of the first coil 130 to protect the first coil 130, or to be in contact with at least one of the base substrate, the first coil, the first seed pattern, and the seed pattern protective layer. The first insulating layer is formed from an insulating material, for example, solder resist. The first insulating layer can be formed to cover the first coil 130 using various methods such as printing, bonding, coating, and photolithography. Also, as described above, a third coil can be formed on the second surface of the base substrate 110, so that coils can be formed on both sides of the base substrate 110. The third coil can be formed symmetrically to the structure of the first coil or in the same shape, however, the two coils can be formed in a shape that does not completely overlap, separated by a predetermined distance with respect to the centers in the normal direction of both coils.

[0048] The third coil will be described below, but any explanations that overlap with the explanation of the first coil will be omitted.

[0049] A third seed pattern is formed on the second surface of the base substrate, and a third coil is formed on the third seed pattern. Preferably, the third coil can be formed on the seed region of the third seed pattern, among the seed region and pull-in region included in the third seed pattern.

[0050] Furthermore, a third seed pattern protective layer is formed on the pull-in wiring region of the third seed pattern. The level of its thickness and other properties, as well as the effects during its formation, are the same as those of the first seed pattern protective layer, so no further explanation is provided. Moreover, when the first coil and the third coil are formed on both sides of the base substrate, by leaving seed pattern pull-in wiring regions on both sides, the current during plating of both coils can be set at the same level (speed, current density, etc.), so that the thickness of both coils can be formed without significant difference.

[0051] Of course, if the pull-in wiring area of ​​the first seed pattern formed only on the first surface of the base substrate can apply sufficient current to the second surface, then it is not necessary to form a third seed pattern on the second surface of the base substrate.

[0052] Furthermore, the second insulating layer can be formed so as to be in contact with at least one of the following: the second surface of the base substrate, the third coil, the third seed pattern, and the third seed pattern protective layer.

[0053] Furthermore, the first coil and the third coil, which are formed on both sides of the base substrate 110, can be connected via vias (240) formed through the base substrate.

[0054] The coil substrate 100 can be formed in multiple layers. For example, a second coil can be formed on a first insulating layer that covers the first coil, and the first coil and the second coil can be electrically connected via a first via contained inside the first insulating layer.

[0055] More specifically, a second coil is formed on the seed region of a second seed pattern formed on the first insulating layer, and in the case of the second seed pattern, it does not need to include a pull-in region. This is because the second coil can be formed by the application of current from the pull-in region of the first coil formed on the base substrate or the first seed pattern formed adjacent to the first coil. In other words, when forming the second coil, it is not necessary to form a separate second seed pattern protective layer to leave the pull-in region of the second seed pattern, thus improving productivity.

[0056] Furthermore, the second coil may have the same structure as the first coil and may include a third conductive pattern and a fourth conductive pattern formed on at least one surface of the third conductive pattern. Of course, the second coil also has defined wiring regions and pad regions, the wiring region includes a plurality of second wiring patterns wound in a spiral shape, and the pad region includes second connecting lines or second coil pads that are wider than the second wiring patterns.

[0057] Next, a method for manufacturing the coil substrate 100 will be described. Figure 6 is a flowchart illustrating a method for manufacturing a coil substrate according to one embodiment of the present invention, and Figures 7 to 12 are cross-sectional views illustrating each step of the manufacturing method according to Figure 6.

[0058] The coil substrate 100 can be manufactured by electroplating or by isotropic plating. The manufacturing method of the coil substrate 100 described below is intended to prevent defects in isotropic plating.

[0059] First, a base substrate is prepared, which includes a first surface and a second surface corresponding to the first surface. Then, a step is performed to form a first seed pattern on the first surface of the base substrate.

[0060] Subsequently, a first coil is formed on the first seed pattern, and a first seed pattern protective layer is formed on the first seed pattern.

[0061] In the step of forming the first coil, the first coil is formed on the seed region of the first seed pattern. Preferably, after forming the first conductive pattern of the first coil on the seed region of the first seed pattern, a second conductive pattern is further formed so as to be in contact with at least one surface of the first conductive pattern.

[0062] In this case, one or more plating steps can be performed to ensure that the thickness of the first conductive pattern is 40 μm or more, and the second conductive pattern can be formed by growing the upper or side surface of the first conductive pattern using a plating method.

[0063] More specifically, a resist layer is formed on the first seed pattern, and a resist pattern layer is formed by applying a photolithography method such as exposure and development. Subsequently, a first conductive pattern can be formed by plating on the first seed pattern where the resist pattern layer is not formed. After removing the resist pattern layer, a first seed pattern protective layer is formed on the pull-in region of the first seed pattern.

[0064] The seed region and other parts of the first seed pattern that are not protected by the first seed pattern protective layer can be removed by etching. Subsequently, the top or side surface of the first conductive pattern is plated and grown by applying current from the pull-in region of the first seed pattern that remains protected by the first seed pattern protective layer, thereby forming the second conductive pattern.

[0065] Subsequently, the first coil of the present invention can be formed by forming a first insulating layer in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer.

[0066] It goes without saying that the dummy area outside the cut line can also be plated to the same level as the first coil by applying the same current.

[0067] Subsequently, after forming the second protective layer 170, the coil substrate according to the present invention can be secured by cutting along the cut line 210, and the coil device according to the present invention can also be secured by connecting the coil substrate of the present invention with other external components.

[0068] Alternatively, a first seed pattern can be formed on the first surface of the base substrate, and then a third seed pattern can be formed on the second surface of the base substrate. Subsequently, a third coil can be formed on the seed region of the third seed pattern, similar to the step of forming the first coil, and then a second insulating layer can be formed to cover the third coil, thereby forming coils on the first and second surfaces of the base substrate.

[0069] In this case, vias 240 penetrating the base substrate 110 are formed before forming the seed patterns on both sides, so that the two seed patterns 120 formed on both sides of the base substrate 110 are electrically connected. Of course, the vias 240 can be filled with an electrically conductive material, and it is also possible to process the vias 240 after forming the seed patterns on both sides of the base substrate.

[0070] It goes without saying that a sixth plating pattern 140b can also be formed on the fifth plating pattern 140a of the incoming wiring layer 140 (see Figure 11 for details).

[0071] Subsequently, a second protective layer 170 is formed on top of the coil wiring layer 130, the pull-in wiring layer 140, the via pad 150, etc. (S360) (see Figure 12 for details).

[0072] As explained with reference to Figure 2, after the second protective layer 170 is formed, the base substrate 110, seed pattern 120, pull-in wiring layer 140, first seed pattern protective layer 160, second protective layer 170, etc. of the dummy region 230 can be separated from the product via the cut line 210.

[0073] Although embodiments of the present invention have been described above with reference to the attached drawings, the present invention is not limited to the above embodiments and can be manufactured in a variety of different forms. A person with ordinary skill in the art to which the present invention belongs should understand that the invention can be implemented in other specific forms without changing the technical idea or essential features of the present invention. Therefore, it should be understood that the above embodiment is illustrative in all respects and not limiting. [Industrial applicability]

[0074] This invention can be applied to coil substrates and electronic devices including them.

Claims

1. Base material; A first seed pattern formed on the first surface of the base substrate, including a seed region and a pull-in wiring region; A first coil formed on the seed region of the first seed pattern; A first seed pattern protective layer formed on the pull-in wiring region of the first seed pattern; and It includes a first insulating layer formed in contact with at least one surface of the first seed pattern protective layer, The first coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The first seed pattern formed below the first seed pattern protective layer extends to the cut line. The first insulating layer is formed to be in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer. A second coil is formed on the first insulating layer. The second coil includes a third conductive pattern and a fourth conductive pattern formed on at least one surface of the third conductive pattern. The third conductive pattern of the second coil is formed on the seed region of the second seed pattern, in a coil substrate.

2. At least one side surface of the first seed pattern protective layer is formed to be in contact with the first conductive pattern of the first coil, The coil substrate according to claim 1, wherein at least a portion of the upper or side surface of the first seed pattern protective layer is formed to be in contact with the second conductive pattern of the first coil.

3. The coil substrate according to claim 1, wherein the thickness of the first seed pattern protective layer within the pull-in wiring region of the first seed pattern is the same as or thicker than that of the pull-in wiring region of the first seed pattern, and thinner than that of the first insulating layer.

4. The thickness of the first seed pattern is formed to be thinner than the thickness of the first conductive pattern or the second conductive pattern of the first coil. The coil substrate according to claim 1, wherein the thickness of the first seed pattern protective layer is formed to be 5 to 45 μm.

5. The first coil has a wiring area and a pad area defined, The aforementioned wiring region includes a plurality of first wiring patterns that are wound in a spiral shape. The coil substrate according to claim 1, wherein the pad region includes a first connecting line or a first coil pad formed with a wider width than the first wiring pattern.

6. The first coil pad is, A first conductive layer formed on the seed region of the first seed pattern, At least a portion of the first seed pattern protective layer formed on the pull-in wiring area of ​​the first seed pattern, The coil substrate according to claim 5, further comprising a second conductive layer formed so as to be in contact with the upper or side surface of the first conductive layer and the upper or side surface of at least a portion of the first seed pattern protective layer.

7. The coil substrate according to claim 1, wherein the first seed pattern protective layer and the first insulating layer differ in at least one of the following: main component, viscosity, hue, bubble content, and fluidity.

8. The coil substrate according to claim 1, wherein the second seed pattern does not include a pull-in region.

9. The first insulating layer includes a first via on the inside. The coil substrate according to claim 1, wherein the first coil and the second coil are electrically connected by the first via.

10. A third seed pattern formed on the second surface of the base substrate; A third coil formed on the third seed pattern; The coil substrate according to claim 1, comprising a second insulating layer formed to cover the third coil.

11. The third seed pattern includes a seed region and a pull-in region. The coil substrate according to claim 10, wherein the third coil is formed on the seed region of the third seed pattern.

12. A third seed pattern protective layer formed on the pull-in wiring region of the third seed pattern; The third seed pattern protective layer has at least one surface in contact with the second insulating layer. The third coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The second seed pattern formed below the third seed pattern protective layer extends to the cut line. The coil substrate according to claim 10, wherein the second insulating layer is formed to be in contact with at least one of the base substrate, the third coil, the third seed pattern, and the third seed pattern protective layer.

13. Base material; A first seed pattern formed on the first surface of the base substrate, including a seed region and a pull-in wiring region; A first coil formed on the seed region of the first seed pattern; A first seed pattern protective layer formed on the pull-in wiring region of the first seed pattern; and It includes a first insulating layer formed in contact with at least one surface of the first seed pattern protective layer, The first coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The first seed pattern formed below the first seed pattern protective layer extends to the cut line. The first insulating layer is formed to be in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer. A third seed pattern formed on the second surface of the base substrate; A third coil formed on the third seed pattern; It includes a second insulating layer formed to cover the third coil, A third seed pattern protective layer formed on the pull-in wiring region of the third seed pattern; The third seed pattern protective layer has at least one surface in contact with the second insulating layer. The third coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The second seed pattern formed below the third seed pattern protective layer extends to the cut line. The second insulating layer is formed to be in contact with at least one of the base substrate, the third coil, the third seed pattern, and the third seed pattern protective layer. At least one side surface of the third seed pattern protective layer is formed to be in contact with the first conductive pattern of the third coil, A coil substrate in which at least a portion of the upper or side surface of the third seed pattern protective layer is formed to be in contact with the second conductive pattern of the third coil.

14. The coil substrate according to claim 12, wherein the thickness of the third seed pattern protective layer within the pull-in wiring region of the third seed pattern is the same as or thicker than that of the pull-in wiring region of the third seed pattern, and thinner than that of the second insulating layer.

15. Base material; A first seed pattern formed on the first surface of the base substrate, including a seed region and a pull-in wiring region; A first coil formed on the seed region of the first seed pattern; A first seed pattern protective layer formed on the pull-in wiring region of the first seed pattern; and It includes a first insulating layer formed in contact with at least one surface of the first seed pattern protective layer, The first coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The first seed pattern formed below the first seed pattern protective layer extends to the cut line. The first insulating layer is formed to be in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer. A third seed pattern formed on the second surface of the base substrate; A third coil formed on the third seed pattern; It includes a second insulating layer formed to cover the third coil, A third seed pattern protective layer formed on the pull-in wiring region of the third seed pattern; The third seed pattern protective layer has at least one surface in contact with the second insulating layer. The third coil has a first conductive pattern and a second conductive pattern formed on at least one surface of the first conductive pattern. The second seed pattern formed below the third seed pattern protective layer extends to the cut line. The second insulating layer is formed to be in contact with at least one of the base substrate, the third coil, the third seed pattern, and the third seed pattern protective layer. The thickness of the third seed pattern is formed to be thinner than the thickness of the first conductive pattern or the second conductive pattern of the third coil. The coil substrate is formed with a third seed pattern protective layer having a thickness of 5 to 45 μm.

16. The third coil has a defined wiring area and a pad area. The aforementioned wiring region includes a plurality of second wiring patterns that are wound in a spiral shape. The coil substrate according to claim 12, wherein the pad area includes a second connecting line or a second coil pad formed with a wider width than the second wiring pattern.

17. An electronic device comprising a coil substrate according to any one of claims 1 to 16.

18. A step of preparing a base substrate including a first surface and a second surface corresponding to the first surface; A step of forming a first seed pattern on the first surface of the base substrate; Steps include forming a first coil on the first seed pattern; Steps include forming a first seed pattern protective layer on the first seed pattern; The step includes forming a first insulating layer in contact with at least one of the base substrate, the first coil, the first seed pattern, and the first seed pattern protective layer. After forming the first seed pattern, A step of forming a third seed pattern on the second surface of the base substrate; Steps include forming a third coil on the third seed pattern; The process further includes the step of forming a second insulating layer that covers the third coil, The third coil has a defined wiring area and a pad area. The aforementioned wiring region includes a plurality of second wiring patterns that are wound in a spiral shape. A method for manufacturing a coil substrate, wherein the pad region includes a second connecting line or a second coil pad formed with a wider width than the second wiring pattern.

19. The first seed pattern includes a seed area and a pull-in wiring area. The method for manufacturing a coil substrate according to claim 18, wherein, in the step of forming the first coil, the first coil is formed on the seed region of the first seed pattern.

20. The method for manufacturing a coil substrate according to claim 19, wherein, in the step of forming the first coil, the first coil is formed by first forming a first conductive pattern on the seed region of the first seed pattern, and then further forming a second conductive pattern so as to be in contact with at least one surface of the first conductive pattern.

21. The first coil has a wiring area and a pad area defined, The method for manufacturing a coil substrate according to claim 18, wherein in the step of forming the first coil, the wiring region includes a plurality of first wiring patterns wound in a spiral shape, and the pad region is formed with a first connecting line or a first coil pad that is wider than the first wiring pattern.

22. In the step of forming the first coil, The method for manufacturing a coil substrate according to claim 21, wherein the first coil pad includes a first conductive layer formed on the seed region of the first seed pattern, at least a portion of a first seed pattern protective layer formed on the pull-in wiring region of the first seed pattern, and a second conductive layer formed so as to be in contact with the upper or side surface of the first conductive layer and the upper or side surface of at least a portion of the first seed pattern protective layer.

23. The third seed pattern includes a seed region and a pull-in region. The step of forming a third seed pattern protective layer on the retraction region of the third seed pattern; and The method for manufacturing a coil substrate according to claim 18, further comprising the step of forming the third coil on the seed region of the third seed pattern.

24. The method for manufacturing a coil substrate according to claim 23, wherein the second insulating layer is formed to be in contact with at least one of the base substrate, the third coil, the third seed pattern, and the third seed pattern protective layer.

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