Indication device
The display device addresses light loss and color reproducibility issues by employing a structured pixel region with light-shielding regions and an overcoat layer, resulting in enhanced flatness and color conversion efficiency.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SAMSUNG DISPLAY CO LTD
- Filing Date
- 2022-04-19
- Publication Date
- 2026-04-23
AI Technical Summary
Existing display devices using semiconductor nanocrystals for color conversion suffer from light loss and require improvements in color reproducibility and flatness.
A display device design incorporating a unit pixel region with specific arrangements of light-shielding regions and color filters, including an overcoat layer to enhance flatness and improve color conversion efficiency.
The design achieves improved flatness and color reproducibility by optimizing the arrangement of light-shielding regions and color filters, enhancing the display device's overall performance.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a display device.
Background Art
[0002] Display devices including a color conversion layer using semiconductor nanocrystals such as quantum dots have been proposed in order to reduce light loss generated by color filters and the like and to realize a display device having a high color reproducibility.
Summary of the Invention
Problems to be Solved by the Invention
[0003] An embodiment provides a display device including an overcoat layer with improved flatness.
Means for Solving the Problems
[0004] A display device according to an embodiment includes a unit pixel region including a first pixel region, a second pixel region, a third pixel region, and a light-shielding region disposed on a substrate. The light-shielding region includes a first light-shielding region and a second light-shielding region. The first pixel region includes a first color conversion layer located on a light-emitting element and a first color filter located on the first color conversion layer. The second pixel region includes a second color conversion layer located on the light-emitting element and a second color filter located on the second color conversion layer. The third pixel region includes a transmissive layer located on the light-emitting element and a third color filter located on the transmissive layer. The first light-shielding region overlaps with the first color filter, the second color filter, and the third color filter. The second light-shielding region overlaps with two color filters selected from the first color filter, the second color filter, and the third color filter.
[0005] In the unit pixel region, the area occupied by the first light-shielding region may be smaller than the area occupied by the second light-shielding region.
[0006] The first light-shielding region may be located between the first and second pixel regions, which are adjacent to each other within the unit pixel region, or between the second and third pixel regions, which are adjacent to each other.
[0007] The first pixel region, the second pixel region, and the third pixel region may be arranged along a first direction.
[0008] The unit pixel region includes at least two of the second light-shielding regions, and the second light-shielding region, the first pixel region, and the second light-shielding region may be arranged along a second direction.
[0009] The first color filter may include an aperture that overlaps with the second pixel region and the third pixel region.
[0010] The second color filter may include a second-first aperture overlapping the first pixel region and the third pixel region, and a second-second aperture overlapping the second light-shielding region.
[0011] The third color filter may include an aperture that overlaps with the first pixel region and the second pixel region.
[0012] The thickness of the first light-shielding region may differ from the thickness of the second light-shielding region.
[0013] The thickness of the first light-shielding region may be greater than the thickness of the second light-shielding region.
[0014] The display device may further include an overcoat layer located on the first color filter, the second color filter, and the third color filter, and a cover window located on the overcoat layer.
[0015] A display device according to one embodiment includes a unit pixel region that is repeatedly arranged on a substrate, the unit pixel region includes a pixel region and a light-shielding region, the light-shielding region includes a first light-shielding region and a second light-shielding region, the pixel region includes a first pixel region including a first color filter located on a first color conversion layer, a second pixel region including a second color filter located on a second color conversion layer, and a third pixel region including a third color filter located on a transmission layer, the first light-shielding region and the second light-shielding region overlap at least two of the first color filters, second color filters and third color filters, and the thickness of the first light-shielding region and the thickness of the second light-shielding region are different.
[0016] A method for manufacturing a display device according to one embodiment includes the step of forming a unit pixel region that is repeatedly arranged on a substrate, wherein the unit pixel region includes a pixel region and a light-shielding region, the light-shielding region includes a first light-shielding region and a second light-shielding region, the first light-shielding region is formed by overlapping a first color filter, a second color filter and a third color filter, the second light-shielding region is formed by overlapping a first color filter and a third color filter, and the thickness of the first light-shielding region is greater than the thickness of the second light-shielding region. [Effects of the Invention]
[0017] According to the embodiment, a display device including an overcoat layer with improved flatness and a manufacturing method for producing the same can be provided. [Brief explanation of the drawing]
[0018] [Figure 1] This is a schematic exploded perspective view of a display device according to one embodiment. [Figure 2] This is a plan view specifically showing a portion of a display panel according to one embodiment. [Figure 3] This is a schematic cross-sectional view of a display panel according to one embodiment. [Figure 4] This is a cross-sectional view of a display panel according to one embodiment. [Figure 5] This is a plan view showing a color filter according to one embodiment. [Figure 6]It is a plan view showing a color filter according to an embodiment. [Figure 7] It is a plan view showing a color filter according to an embodiment. [Figure 8] It is a plan view showing a color filter according to an embodiment. [Figure 9] It is a cross-sectional view taken along A-A' of FIG. 5. [Figure 10] It is a cross-sectional view taken along B-B' of FIG. 5. [Figure 11] It is a plan view showing a color filter according to an embodiment. [Figure 12] It is a plan view showing a color filter according to an embodiment. [Figure 13] It is a plan view showing a color filter according to an embodiment. [Figure 14] It is a plan view showing a color filter according to an embodiment.
Embodiments for Carrying Out the Invention
[0019] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those having ordinary knowledge in the technical field to which the present invention pertains can easily implement them. The present invention can be realized in various different forms and is not limited to the embodiments described here.
[0020] In order to clearly explain the present invention, descriptions of known technologies may be omitted, and the same reference numerals are assigned to the same or similar configurations and components throughout the specification.
[0021] Also, the sizes and thicknesses of each configuration and component shown in the drawings are shown in arbitrary sizes and thicknesses for the convenience of explanation, and the sizes and thicknesses of each configuration and component of the present invention are not necessarily limited to those shown. Also, in the drawings, in order to clearly represent a plurality of layers and various regions, for example, the thicknesses of various layers and regions are exaggerated. Furthermore, in the drawings, for the convenience of explanation, the thicknesses of some layers and regions are exaggerated.
[0022] Furthermore, when a layer, membrane, region, plate, or other part is said to be "on top of" or "on top of" another part, this includes not only the case where it is "immediately above" the other part, but also the case where it lies between them, and also the case where there is another part in between. When one part is said to be "immediately above" another part, it means that there is no other part between them. Also, "on top of" or "on top of" a reference part means that it is located above or below the reference part, and does not necessarily mean that it is located "on top of" or "on top of" the opposite side of gravity.
[0023] Furthermore, throughout the specification, when a part "includes" a certain component, unless otherwise stated to indicate the opposite, it means that it may include other components rather than excluding them.
[0024] Furthermore, throughout the specification, "on a plane" means when the subject is viewed from above, and "on a cross-section" means when the subject is viewed from the side of a cross-section obtained by cutting the subject perpendicularly.
[0025] The following describes a display device according to one embodiment with reference to Figure 1. Figure 1 is a schematic exploded perspective view of the display device according to one embodiment.
[0026] Referring to Figure 1, one embodiment of the display device may include a cover window CW, a display panel DP, and a housing HM.
[0027] The cover window CW may include an insulating panel. For example, the cover window CW can be made of glass, plastic, or a combination thereof.
[0028] The front surface of the cover window CW can define the front surface of the display device 1000. The transparent region TA may be an optically transparent region. For example, the transparent region TA may be a region having a visible light transmittance of approximately 90% or more.
[0029] The blocking region CBA can define the shape of the transmitting region TA. The blocking region CBA is adjacent to and surrounds the transmitting region TA. The blocking region CBA may be a region with relatively lower light transmittance compared to the transmitting region TA. The blocking region CBA may contain an opaque material that blocks light.
[0030] The blocking area CBA may have a predetermined color. The blocking area CBA can be defined by a bezel layer provided separately from the transparent substrate that defines the transparent area TA, or by an ink layer formed by inserting or coloring the transparent substrate.
[0031] The surface on which the image is displayed on the display panel DP is parallel to the surface defined by the first direction DR1 and the second direction DR2. The normal direction of the surface on which the image is displayed, i.e., the thickness direction of the display panel DP, is indicated by the third direction DR3. The front (or top) and back (or bottom) surfaces of each component are separated by the third direction DR3. However, the directions indicated by the first to third directions DR1, DR2, and DR3 are relative concepts and can be converted to other directions.
[0032] The display panel DP may be a flat, rigid display panel, but is not limited to this; it may also be a flexible display panel. On the other hand, the display panel DP consists of an organic light-emitting display panel. However, the type of display panel DP is not limited to this, and can consist of a variety of panels. For example, the display panel DP may consist of a liquid crystal display panel, an electrophoretic display panel, an electrowetting display panel, etc. Furthermore, the display panel DP may consist of next-generation display panels such as a micro light-emitting diode display panel, a quantum dot light-emitting diode display panel, or a quantum dot organic light-emitting diode display panel.
[0033] Micro LED (Micro Light Emitting Diode) display panels consist of a system in which light-emitting diodes (LEDs) with a size of 10 to 100 micrometers constitute each pixel. Such micro LED display panels use inorganic materials, may eliminate the need for a backlight, have a fast response time, can achieve high brightness with low power consumption, and have advantages such as being unbreakable until bent. Quantum dot LED display panels consist of a system in which a film containing quantum dots is attached or a material containing quantum dots is formed. Quantum dots are made of inorganic materials such as indium and cadmium, are self-luminous particles with a diameter of a few nanometers or less. By adjusting the size of the quantum dot particles, it is possible to display light of a desired color. Quantum dot organic light-emitting diode (OLED) display panels use a blue OLED as a light source, and achieve color by attaching a film containing red and green quantum dots on it or by depositing a material containing red and green quantum dots. A display panel DP according to one embodiment consists of a variety of other display panels.
[0034] As shown in Figure 1, the display panel DP includes a display area DA where an image is displayed, and a non-display area PA adjacent to the display area DA. The non-display area PA is an area where no image is displayed. The display area DA may be rectangular in shape, for example, and the non-display area PA may have a shape that surrounds the display area DA. However, the shapes of the display area DA and the non-display area PA may be designed relatively, without limitation.
[0035] The housing HM provides a predetermined internal space. The display panel DP is mounted inside the housing HM. In addition to the display panel DP, various other electronic components, such as a power supply unit, storage devices, and audio input / output modules, can be mounted inside the housing HM.
[0036] The following describes a display panel according to one embodiment with reference to Figure 2. Figure 2 is a plan view showing a portion of the display panel according to one embodiment.
[0037] Referring to Figure 2, the display panel DP includes a display area DA and a non-display area PA. The non-display area PA can be defined along the edge of the display area DA.
[0038] The display panel DP includes multiple pixels PX. These multiple pixels PX are arranged within the display area DA on the substrate SUB. Each pixel PX includes an organic light-emitting diode and a pixel driving circuit connected to it.
[0039] Each pixel PX emits, for example, red, green, blue, or white light, and may include, as an example, an organic light-emitting diode. The display panel DP provides a predetermined image by the light emitted from the pixels PX, and the pixels PX define the display area DA. In this specification, the non-display area PA is an area where no pixels PX are located and does not provide an image.
[0040] The display panel DP may include multiple signal lines and pad sections. The multiple signal lines may include scan lines SL extended in the first direction DR1, data lines DL extended in the second direction DR2, and drive voltage lines PL, etc.
[0041] The scan drive unit 20 is located in the non-display area PA on the substrate SUB. The scan drive unit 20 generates and transmits a scan signal to each pixel PX via the scan line SL. In one embodiment, the scan drive unit 20 is arranged on the left and right sides of the display area DA. Figure 2 illustrates a structure in which the scan drive unit 20 is arranged on both sides of the display area DA, but in other embodiments, the scan drive unit can be arranged on only one side of the display area DA.
[0042] The pad portion 40 is located at one end of the display panel DP and includes a plurality of terminals 41, 42, 44, and 45. The pad portion 40 is exposed without being covered by an insulating layer and is electrically connected to a control unit (not shown), such as a flexible printed circuit board or an IC chip.
[0043] The control unit converts multiple video signals transmitted from an external source into multiple video data signals and transmits the converted signals to the data drive unit 50 via terminal 41. The control unit also receives vertical synchronization signals, horizontal synchronization signals, and clock signals, generates control signals to control the driving of the scan drive unit 20 and the data drive unit 50, and transmits them to each via terminals 44 and 41, respectively. The control unit transmits the drive voltage ELVDD to the drive voltage supply line 60 via terminal 42. The control unit also transmits a common voltage to each of the common voltage supply lines VSSL via terminal 45.
[0044] The data drive unit 50 is located on the non-display area PA and generates data signals, which are then transmitted to each pixel PX via the data line DL. The data drive unit 50 is located on one side of the display panel DP and may be located, for example, between the pad section 40 and the display area DA.
[0045] The drive voltage supply line 60 is located on the non-display area PA. For example, the drive voltage supply line 60 is located between the data drive unit 50 and the display area DA. The drive voltage supply line 60 provides the drive voltage to the pixel PX. The drive voltage supply line 60 is located in the first direction DR1 and can be connected to a plurality of drive voltage lines PL located in the second direction DR2.
[0046] The common voltage supply line VSSL is located on the non-display area PA and provides a common voltage to the common electrode of the organic light-emitting element of the pixel PX. The common voltage supply line VSSL can extend from one side of the substrate SUB and form a closed loop that encloses three sides along the edge of the substrate SUB. The common voltage supply line VSSL may include the main supply line 70 and the sub-supply line 71, etc.
[0047] The display area of a display panel according to one embodiment will be described below with reference to Figures 3 and 4. Figure 3 is a schematic cross-sectional view of a display panel according to one embodiment, and Figure 4 is a cross-sectional view of a display panel according to one embodiment.
[0048] First, referring to Figure 3, multiple pixels PA1, PA2, and PA3 are formed on the substrate SUB corresponding to the display area DA. Each of these pixels PA1, PA2, and PA3 may include multiple transistors and light-emitting elements connected to the transistors.
[0049] A sealing layer ENC is located on multiple pixels PA1, PA2, and PA3. The display area DA is protected from outside air or moisture by the sealing layer ENC. The sealing layer ENC is integrally provided so as to overlap with the front surface of the display area DA, and may also be partially placed on the non-display area PA.
[0050] The first color conversion unit CC1, the second color conversion unit CC2, and the transmission unit CC3 are located on the sealing layer ENC. The first color conversion unit CC1 overlaps with the first pixel PA1, the second color conversion unit CC2 overlaps with the second pixel PA2, and the transmission unit CC3 overlaps with the third pixel PA3.
[0051] Light emitted from the first pixel PA1 passes through the first color conversion unit CC1 to provide red light LR. Light emitted from the second pixel PA2 passes through the second color conversion unit CC2 to provide green light LG. Light emitted from the third pixel PA3 passes through the transmission unit CC3 to provide blue light LB.
[0052] The following describes the stacked structure of each pixel PA1, PA2, PA3 and the stacked structure of the color conversion units CC1, CC2 and the transmission unit CC3. Referring to Figure 4, the color conversion unit CC is located on the pixel unit PP which includes the first to third pixels PA1, PA2, PA3.
[0053] Referring to Figure 4, a substrate SUB according to one embodiment may contain an inorganic insulating material such as glass or an organic insulating material such as a plastic such as polyimide (PI). The substrate SUB may be single-layer or multi-layer. The substrate SUB may have a structure in which at least one base layer containing sequentially stacked polymer resins and at least one inorganic layer are alternately stacked.
[0054] Substrates (SUBs) can have various degrees of flexibility. A substrate SUB can be a rigid substrate or a flexible substrate that can be bent, folded, rolled, etc.
[0055] A buffer layer BF is located on top of the substrate SUB. The buffer layer BF prevents impurities from migrating from the substrate SUB to the upper layer of the buffer layer BF, particularly to the semiconductor layer ACT, thereby preventing degradation of the semiconductor layer ACT's properties and easing stress. The buffer layer BF may contain inorganic or organic insulating materials such as silicon nitride or silicon oxide. Part or all of the buffer layer BF may be omitted.
[0056] A semiconductor layer ACT is located on a buffer layer BF. The semiconductor layer ACT may contain at least one of polycrystalline silicon and an oxide semiconductor. The semiconductor layer ACT includes a channel region C, a first region P, and a second region Q. The first region P and the second region Q are located on either side of the channel region C. The channel region C may contain a semiconductor that is doped with a small amount of impurities or is not doped with impurities, while the first region P and the second region Q may contain semiconductors that are doped with a larger amount of impurities than the channel region C. The semiconductor layer ACT may also be made of an oxide semiconductor, in which case a separate protective layer (not shown) may be added to protect the oxide semiconductor material, which is vulnerable to external environments such as high temperatures.
[0057] The first gate insulating layer GI1 is located on top of the semiconductor layer ACT.
[0058] The gate electrode GE and the lower electrode LE are located on the first gate insulating layer GI1. In some embodiments, the gate electrode GE and the lower electrode LE can be formed integrally.
[0059] The gate electrode GE and the lower electrode LE may be a single-layer or multilayer film consisting of a metal film containing one of the following: copper (Cu), copper alloy, aluminum (Al), aluminum alloy, molybdenum (Mo), molybdenum alloy, titanium (Ti), and titanium alloy. The gate electrode GE may overlap with the channel region C of the semiconductor layer ACT.
[0060] A second gate insulating layer GI2 may be located on the gate electrode GE and the first gate insulating layer GI1. The first gate insulating layer GI1 and the second gate insulating layer GI2 may be monolayers or multilayers containing at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon nitrogen oxide (SiOxNy).
[0061] The upper electrode UE is located on the second gate insulating layer GI2. The upper electrode UE overlaps with the lower electrode LE to form a retention capacitor.
[0062] A first interlayer insulating layer IL1 is located on the upper electrode UE. The first interlayer insulating layer IL1 may be a single layer or a multilayer containing at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon nitrogen oxide (SiOxNy).
[0063] The source electrode SE and drain electrode DE are located on the first interlayer insulating layer IL1. The source electrode SE and drain electrode DE are connected to the first region P and the second region Q of the semiconductor layer ACT, respectively, via contact holes formed in the insulating layer.
[0064] The source electrode SE and drain electrode DE may contain aluminum (Al), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), chromium (Cr), calcium (Ca), molar ribdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may be a single layer or multilayer structure containing them.
[0065] A second interlayer insulating layer IL2 is located above the first interlayer insulating layer IL1, the source electrode SE, and the drain electrode DE. The second interlayer insulating layer IL2 may contain organic insulating materials such as general-purpose polymers like polymethylmethacrylate (PMMA) and polystyrene (PS), polymer derivatives having a phenolic group, acrylic polymers, imide polymers, polyimides, acrylic polymers, and siloxane polymers.
[0066] A first electrode E1 may be located on the second interlayer insulating layer IL2. The first electrode E1 can be connected to the drain electrode DE through a contact hole in the second interlayer insulating layer IL2.
[0067] The first electrode E1 may contain metals such as silver (Ag), lithium (Li), calcium (Ca), aluminum (Al), magnesium (Mg), and gold (Au), and may also contain transparent conductive oxides (TCOs) such as indium tin oxide (ITO) and indium zinc oxide (IZO). The first electrode E1 consists of a single layer containing the metallic substance or transparent conductive oxide, or a multilayer containing these. For example, the first electrode E1 may have a triple-layer structure of indium tin oxide (ITO) / silver (Ag) / indium tin oxide (ITO).
[0068] The transistor, consisting of a gate electrode GE, a semiconductor layer ACT, a source electrode SE, and a drain electrode DE, is connected to the first electrode E1 to supply current to the light-emitting element.
[0069] A partition wall IL3 is located above the second interlayer insulating layer IL2 and the first electrode E1. Although not shown, a spacer (not shown) may be located on the partition wall IL3. The partition wall IL3 overlaps with at least a portion of the first electrode E1 and has a partition wall opening that defines a light-emitting region.
[0070] The partition IL3 may contain organic insulating materials such as general-purpose polymers like polymethylmethacrylate (PMMA) and polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, polyimides, acrylic polymers, and siloxane polymers.
[0071] A light-emitting layer EL is located on the first electrode E1. Functional layers FL1 and FL2 may be located above and below the light-emitting layer EL. The first functional layer FL1 may be a multilayer film containing at least one of a hole injection layer (HIL) and a hole transporting layer (HTL), and the second functional layer FL2 may be a multilayer film containing at least one of an electron transporting layer (ETL) and an electron injection layer (EIL). Functional layers FL1 and FL2 may overlap the front surface of the substrate SUB.
[0072] A second electrode E2 is located on top of the functional layers FL1 and FL2. The second electrode E2 may contain reflective metals such as calcium (Ca), barium (Ba), magnesium (Mg), aluminum (Al), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), lithium (Li), calcium (Ca), etc., or transparent conductive oxides (TCO) such as indium tin oxide (ITO) or indium zinc oxide (IZO).
[0073] The first electrode E1, the light-emitting layer EL, the functional layers FL1 and FL2, and the second electrode E2 can constitute a light-emitting element. Here, the first electrode E1 may be the anode of a hole injection electrode, and the second electrode E2 may be the cathode of an electron injection electrode. However, the embodiment is not necessarily limited to this, and depending on the driving method of the light-emitting display device, the first electrode E1 may become the cathode and the second electrode E2 may become the anode.
[0074] Holes and electrons are injected into the light-emitting layer EL from the first electrode E1 and the second electrode E2, respectively. Light emission occurs when the exciton formed by the coupling of the injected holes and electrons falls from the excited state to the ground state.
[0075] The sealing layer ENC is located on the second electrode E2. The sealing layer ENC can cover and seal not only the top surface but also the sides of the light-emitting element. Since the light-emitting element is very vulnerable to moisture and oxygen, the sealing layer ENC seals the light-emitting element and blocks the inflow of external moisture and oxygen. The sealing layer ENC may include multiple layers, and can be formed as a composite film containing both inorganic and organic layers. For example, it can be formed as a triple layer in which a first sealing inorganic layer EIL1, a sealing organic layer EOL, and a second sealing inorganic layer EIL2 are formed sequentially.
[0076] The first encapsulating inorganic layer EIL1 covers the second electrode E2. The first encapsulating inorganic layer EIL1 can prevent external moisture and oxygen from penetrating the light-emitting element. For example, the first encapsulating inorganic layer EIL1 may contain silicon nitride, silicon oxide, silicon oxynitride, or a compound combining these. The first encapsulating inorganic layer EIL1 can be formed by a vapor deposition process.
[0077] The encapsulating organic layer EOL is placed on the first encapsulating inorganic layer EIL1 and is in contact with the first encapsulating inorganic layer EIL1. Bends formed on the upper surface of the first encapsulating inorganic layer EIL1 and particles present on the first encapsulating inorganic layer EIL1 are covered by the encapsulating organic layer EOL, thereby blocking the influence of the surface state of the upper surface of the first encapsulating inorganic layer EIL1 on the structure formed on the encapsulating organic layer EOL. Furthermore, the encapsulating organic layer EOL can relieve stress between the contacting layers. The encapsulating organic layer EOL may contain organic material and can be formed by solution processes such as spin coating, slit coating, and inkjet processes.
[0078] The second sealing inorganic layer EIL2 is placed on the sealing organic layer EOL and covers the sealing organic layer EOL. Because the second sealing inorganic layer EIL2 is placed on the first sealing inorganic layer EIL1, it is stably formed on a relatively flat surface. The second sealing inorganic layer EIL2 seals in moisture and other substances released from the sealing organic layer EOL, preventing them from flowing in from the outside. The second sealing inorganic layer EIL2 may contain silicon nitride, silicon oxide, silicon oxynitride, or compounds combining these. The second sealing inorganic layer EIL2 can be formed by a vapor deposition process.
[0079] Although not shown in this specification, a capping layer may be further included, located between the second electrode E2 and the sealing layer ENC. The capping layer may contain an organic material. The capping layer protects the second electrode E2 from subsequent processes, such as sputtering, and improves the light emission efficiency of the light-emitting element. The capping layer may have a higher refractive index than the first sealing inorganic layer EIL1.
[0080] The color conversion unit CC includes a first insulating layer P1 located on the pixel unit PP. The first insulating layer P1 can be integrally formed so as to overlap the entire display area DA. The first insulating layer P1 may be a single layer or a multilayer containing at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon nitrogen oxide (SiOxNy). Depending on the embodiment, the first insulating layer P1 may be omitted.
[0081] A first light-shielding layer BM1 may be located on the first insulating layer P1. The first light-shielding layer BM1 can define the region on which the first color conversion layer CCL1, the second color conversion layer CCL2, and the transmission layer CCL3 are located.
[0082] The first color conversion layer CCL1, the second color conversion layer CCL2, and the transparent layer CCL3 are located within the region defined by the first light-shielding layer BM1. The first color conversion layer CCL1, the second color conversion layer CCL2, and the transparent layer CCL3 are formed by an inkjet process, but are not limited to the inkjet process and may be formed by any manufacturing method.
[0083] The transparent layer CCL3 transmits light of the first wavelength incident from the pixel portion PP and may contain multiple scatterers SC. In this case, the light of the first wavelength may be blue light with a maximum emission peak wavelength of approximately 380 nm to approximately 480 nm, for example, approximately 420 nm or higher, approximately 430 nm or higher, approximately 440 nm or higher, or approximately 445 nm or higher, and approximately 470 nm or lower, approximately 460 nm or lower, or approximately 455 nm or lower.
[0084] The first color conversion layer CCL1 converts light of the first wavelength incident from the pixel portion PP into red light and may include multiple scatterers SC and multiple first quantum dots SN1. In this case, the red light may have a maximum emission peak wavelength of approximately 600 nm to approximately 650 nm, for example, approximately 620 nm to approximately 650 nm.
[0085] The second color conversion layer CCL2 converts the first wavelength light incident from the display panel into green light and may include multiple scatterers SC and multiple second quantum dots SN2. The green light may have a maximum emission peak wavelength of approximately 500 nm to 550 nm, for example, approximately 510 nm to 550 nm. Multiple scatterers SC scatter the light incident on the first color conversion layer CCL1, the second color conversion layer CCL2, and the transmission layer CCL3, thereby increasing the efficiency of the light.
[0086] Each of the first quantum dots SN1 and SN2 (hereinafter also referred to as semiconductor nanocrystals) may independently contain group II-VI compounds, group III-V compounds, group IV-VI compounds, group IV elements or compounds, group I-III-VI compounds, group II-III-VI compounds, group I-II-IV-VI compounds, or combinations thereof. The quantum dots do not need to contain cadmium.
[0087] The aforementioned group II-VI compounds are two-element compounds selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS and mixtures thereof, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, Cd The group can be selected from the group consisting of three elemental compounds selected from HgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS and mixtures thereof, and from the group consisting of four elemental compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe and mixtures thereof. The group II-VI compounds may further contain group III metals.
[0088] The group III-V compounds can be selected from the group consisting of two element compounds selected from GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb and mixtures thereof; three element compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InNAs, InNSb, InPAs, InZnP, InPSb and mixtures thereof; and four element compounds selected from the group consisting of GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, InZnP and mixtures thereof. The group III-V compounds may further contain group II metals (e.g., InZnP).
[0089] The aforementioned Group IV-VI compounds can be selected from the group consisting of two-element compounds selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe and mixtures thereof; three-element compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe and mixtures thereof; and four-element compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe and mixtures thereof.
[0090] The aforementioned Group IV elements or compounds are selected from, but are not limited to, mono-element compounds selected from the group consisting of Si, Ge, and combinations thereof, and di-element compounds selected from the group consisting of SiC, SiGe, and combinations thereof.
[0091] Examples of the aforementioned Group I-III-VI compounds include, but are not limited to, CuInSe2, CuInS2, CuInGaSe, and CuInGaS. Examples of the aforementioned Group I-II-IV-VI compounds include, but are not limited to, CuZnSnSe and CuZnSnS. The aforementioned Group IV elements or compounds can be selected from the group consisting of single elements selected from the group consisting of Si, Ge, and mixtures thereof, and dielemental compounds selected from the group consisting of SiC, SiGe, and mixtures thereof.
[0092] The aforementioned group II-III-VI compounds are selected from, but are not limited to, the group consisting of ZnGaS, ZnAlS, ZnInS, ZnGaSe, ZnAlSe, ZnInSe, ZnGaTe, ZnAlTe, ZnInTe, ZnGaO, ZnAlO, ZnInO, HgGaS, HgAlS, HgInS, HgGaSe, HgAlSe, HgInSe, HgGaTe, HgAlTe, HgInTe, MgGaS, MgAlS, MgInS, MgGaSe, MgAlSe, MgInSe, and combinations thereof.
[0093] The aforementioned group I-II-IV-VI compounds are selected from, but are not limited to, CuZnSnSe and CuZnSnS.
[0094] In one embodiment, the quantum dot may not contain cadmium. The quantum dot may include semiconductor nanocrystals based on a group III-V compound containing indium and phosphorus. The group III-V compound may further contain zinc. The quantum dot may include semiconductor nanocrystals based on a group II-VI compound containing a chalcogen element (e.g., sulfur, selenium, tellurium, or a combination thereof) and zinc.
[0095] In quantum dots, the aforementioned two-element, three-element, and / or four-element compounds can exist within the particle at uniform concentrations, or they can exist within the same particle in partially different concentration distributions. Furthermore, one quantum dot can have a core / shell structure surrounding other quantum dots. The interface between the core and shell can have a concentration gradient, where the concentration of elements present in the shell decreases towards the center.
[0096] In some embodiments, a quantum dot may have a core-shell structure comprising a core containing the aforementioned nanocrystals and a shell surrounding the core. The shell of the quantum dot may act as a protective layer to prevent chemical degradation of the core and maintain its semiconductor properties, and / or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be a single layer or multiple layers. The interface between the core and the shell may have a concentration gradient in which the concentration of elements present in the shell decreases towards the center. Examples of the shell of the quantum dot include metallic or nonmetallic oxides, semiconductor compounds, or combinations thereof.
[0097] For example, the metal or nonmetal oxides mentioned above can be dielemental compounds such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, and NiO, or trielemental compounds such as MgAl2O4, CoFe2O4, NiFe2O4, and CoMn2O4, but the present invention is not limited thereto.
[0098] Furthermore, while the semiconductor compounds mentioned above can include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, etc., the present invention is not limited thereto.
[0099] The interface between the core and the shell may have a concentration gradient, where the concentration of elements present in the shell decreases towards the center. Furthermore, the semiconductor nanocrystal may have a structure comprising a single semiconductor nanocrystal core and a multilayer shell surrounding it. In one embodiment, the multilayer shell may have two or more layers, for example, two, three, four, five, or more layers. Two adjacent layers of the shell may have a single composition or distinct compositions. In the multilayer shell, each layer may have a composition that varies with radius.
[0100] Quantum dots can have an emission wavelength spectrum with a full width at half maximum (FWHM) of approximately 45 nm or less, preferably approximately 40 nm or less, and more preferably approximately 30 nm or less, and color purity and color reproducibility can be improved within this range. Furthermore, since the light emitted through such quantum dots is emitted in all directions, the optical viewing angle can be improved.
[0101] The quantum dot may have shell material and core material with different energy band gaps. For example, the energy band gap of the shell material may be even larger than that of the core material. In other embodiments, the energy band gap of the shell material may be even smaller than that of the core material. The quantum dot may have a multilayer shell. In a multilayer shell, the energy band gap of the outer layer may be even larger than that of the inner layer (i.e., the layer closer to the core). In a multilayer shell, the energy band gap of the outer layer may be even smaller than that of the inner layer.
[0102] Quantum dots can have their absorption / emission wavelengths tuned by adjusting their composition and size. The maximum emission peak wavelength of a quantum dot can be in the ultraviolet or infrared wavelength range or higher.
[0103] The quantum dot may contain an organic ligand (for example, having hydrophobic residues and / or hydrophilic residues). The organic ligand residue is bound to the surface of the quantum dot. The organic ligand includes RCOOH, RNH2, R2NH, R3N, RSH, R3PO, R3P, ROH, RCOOR, RPO(OH)2, RHPOOH, R2POOH, or a combination thereof, where R is independently a substituted or unsubstituted alkyl group C3-C40 (e.g., C5 and above and C24 and below), a substituted or unsubstituted aliphatic hydrocarbon group C3-C40 such as a substituted or unsubstituted alkenyl group, a substituted or unsubstituted aromatic hydrocarbon group C6-C40 (e.g., C6 and above and C20 and below) such as a substituted or unsubstituted aryl group C6-C40, or a combination thereof.
[0104] Examples of the aforementioned organic ligands include thiol compounds such as methanethiol, ethanethiol, propanethiol, butanethiol, pentanethiol, hexanethiol, octanthiol, dodecanethiol, hexadecanethiol, octadecanethiol, and benzylthiol; amines such as methaneamine, ethaneamine, propaneamine, butanamine, pentylamine, hexylamine, octylamine, nonylamine, decylamine, dodecylamine, hexadecaneamine, octadecylamine, dimethylamine, diethylamine, dipropylamine, tributylamine, and trioctylamine; and amines such as methaneic acid, ethaneic acid, propanoic acid, butanoic acid, pentanoic acid, hexanoic acid, heptanoic acid, octanoic acid, dodecanoic acid, hexadecaneic acid, octadecanoic acid, and oleic acid. Examples include, but are not limited to, carboxylic acid compounds such as benzoic acid; phosphine compounds such as methylphosphine, ethylphosphine, propylphosphine, butylphosphine, pentylphosphine, octylphosphine, dioctylphosphine, tributylphosphine, and trioctylphosphine; phosphine compounds or their oxide compounds such as methylphosphine oxide, ethylphosphine oxide, propylphosphine oxide, butylphosphine oxide, pentylphosphine oxide, tributylphosphine oxide, octylphosphine oxide, dioctylphosphine oxide, and trioctylphosphine oxide; diphenylphosphine, triphenylphosphine compounds or their oxide compounds; C5-C20 alkylphosphine acids such as hexylphosphine, octylphosphine, dodecanephosphine, tetradecanephosphine, hexadecanephosphine, and octadecanephosphine; and C5-C20 alkylphosphonic acids. Quantum dots may contain hydrophobic organic ligands alone or in mixtures of one or more. The hydrophobic organic ligand (e.g., acrylate group, methacrylate group, etc.) does not necessarily have to contain photopolymerizable residues.
[0105] A second insulating layer P2 may be located on the first color conversion layer CCL1, the second color conversion layer CCL2, and the transparent layer CCL3. The second insulating layer P2 covers and protects the first color conversion layer CCL1, the second color conversion layer CCL2, and the transparent layer CCL3, thereby preventing foreign matter from entering the first color conversion layer CCL1, the second color conversion layer CCL2, and the transparent layer CCL3. The second insulating layer P2 may be a single layer or a multilayer containing at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon nitrogen oxide (SiOxNy).
[0106] A third insulating layer P3 may be located on the second insulating layer P2. The third insulating layer P3 is formed to overlap with the front surface of the pixel portion PP. The third insulating layer P3 overlaps with the first color conversion layer CCL1, the second color conversion layer CCL2, the transmission layer CCL3, and the first light-shielding layer BM1. The third insulating layer P3 may contain organic or inorganic material.
[0107] A fourth insulating layer P4 may be located on a third insulating layer P3. The fourth insulating layer P4 may be a single layer or a multilayer containing at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon nitrogen oxide (SiOxNy).
[0108] Depending on the embodiment, at least one of the second insulating layer P2, the third insulating layer P3, and the fourth insulating layer P4 can be omitted.
[0109] The first color filter CF1, the second color filter CF2, and the third color filter CF3 may be located on the upper surface of the fourth insulating layer P4.
[0110] The first color filter CF1 transmits the red light that has passed through the first color conversion layer CCL1, while absorbing the remaining wavelengths of light, thereby increasing the purity of the red light emitted outside the display device.
[0111] The second color filter CF2 transmits the green light that has passed through the second color conversion layer CCL2 while absorbing the remaining wavelengths of light, thereby increasing the purity of the green light emitted outside the display device.
[0112] The third color filter CF3 allows blue light that has passed through the transmission layer CCL3 to pass through while absorbing light of the remaining wavelengths, thereby increasing the purity of the blue light emitted outside the display device.
[0113] A display panel according to one embodiment may include a first pixel region PX1 overlapping with a first color filter CF1 and a first color conversion layer CCL1, a second pixel region PX2 overlapping with a second color filter CF2 and a second color conversion layer CCL2, and a third pixel region PX3 overlapping with a third color filter CF3 and a transmission layer CCL3.
[0114] The first light-shielding region BA1 may be located between the first pixel region PX1 and the second pixel region PX2, between the second pixel region PX2 and the third pixel region PX3, and between the third pixel region PX3 and the first pixel region PX1. The first light-shielding region BA1 overlaps with the first light-shielding layer BM1.
[0115] In the first light-shielding region BA1, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be in an overlapping configuration. In one embodiment, the color conversion unit CC can provide a light-shielding region that blocks light by the overlapping of multiple color filters, even without a separate light-shielding material.
[0116] Below, the pixel region and light-shielding region according to one embodiment will be described in more detail with reference to Figures 5 to 10. Figures 5, 6, 7, and 8 are plan views showing a color filter according to one embodiment, Figure 9 is a cross-sectional view taken along line A-A' in Figure 5, and Figure 10 is a cross-sectional view taken along line B-B' in Figure 5. Descriptions of components that are the same as those described above will be omitted.
[0117] First, referring to Figure 5, a display panel according to one embodiment may include a plurality of unit pixel regions PU. The plurality of unit pixel regions PU may be repeatedly arranged along a first direction DR1 and a second direction DR2.
[0118] A unit pixel region PU may include pixel regions PX1, PX2, PX3 and a light-shielding region BA. A single unit pixel region PU may include a first pixel region PX1 that emits light representing the first color, a second pixel region PX2 that emits light representing the second color, and a third pixel region PX3 that emits light representing the third color. A light-shielding region BA may include a first light-shielding region BA1 and a second light-shielding region BA2. For example, in a unit pixel region PU, the area occupied by pixel regions PX1, PX2, and PX3 may be 30% to 40% of the total unit pixel area, and the area occupied by light-shielding regions BA1 and BA2 may be 60% to 70% of the total unit pixel area.
[0119] Depending on the embodiment, the unit pixel region PU may include at least one first light-shielding region BA1 and a second light-shielding region BA2. In one embodiment, the unit pixel region PU may include four first light-shielding regions BA1 and two second light-shielding regions BA2.
[0120] Along the first direction DR1, the first light-shielding region BA1, the first pixel region PX1, the first light-shielding region BA1, the second pixel region PX2, the first light-shielding region BA1, the third pixel region PX3, and the first light-shielding region BA1 may be located. Along the second direction DR2, the second light-shielding region BA2, the first light-shielding region BA1, and the second light-shielding region BA2 may be arranged, or the second light-shielding region BA2, one of the pixel regions PX1, PX2, or PX3, and the second light-shielding region BA2 may be located. Such arrangements may vary depending on the various embodiments and are not limited thereto.
[0121] According to one embodiment, the area of the first light-shielding region BA1 and the area of the second light-shielding region BA2 may be different. Specifically, the area of the first light-shielding region BA1 may be smaller than the area of the second light-shielding region BA2. The first light-shielding region BA1 may be between the adjacent first pixel region PX1 and the second pixel region PX2, between the second pixel region PX2 and the third pixel region PX3, or between the first pixel region PX1 and the third pixel region PX3 which are contained in different unit pixel regions PU. The second light-shielding region BA2 is the area of the unit pixel region PU excluding the pixel regions PX1, PX2, PX3 and the first light-shielding region BA1, and can have a relatively larger planar area compared to the first light-shielding region BA1.
[0122] Second light-shielding regions BA2 located in adjacent unit pixel regions PU can be connected to each other. Second light-shielding regions BA2 located adjacent to each other along the first direction DR1 may be connected to each other and may have a stripe configuration.
[0123] The following section specifically describes the color filters placed on the unit pixel region (PU).
[0124] Referring to Figure 6 in the aforementioned drawings, in one embodiment, the first color filter CF1 may include a first-first aperture OP1-1 that overlaps with the first pixel area PX1 and the second pixel area PX2, and a first-second aperture OP1-2 that overlaps with the third pixel area PX3. The first color filter CF1 may overlap with the first pixel area PX1, the first light-shielding area BA1, and the second light-shielding area BA2. The first color filter CF1 can be separated from the second pixel area PX2 and the third pixel area PX3 without overlapping.
[0125] Referring to Figure 7, in one embodiment, the second color filter CF2 overlaps with the second pixel region PX2. Also, the second color filter CF2 overlaps with the first light-shielding region BA1. Furthermore, the second color filter CF2 does not overlap with the first pixel region PX1, the third pixel region PX3, and the second light-shielding region BA2. The second color filter CF2 is separated from the first pixel region PX1, the third pixel region PX3, and the second light-shielding region BA2.
[0126] The second color filter CF2 may include a second-first aperture OP2-1 that overlaps with the first pixel region PX1, a second-second aperture OP2-2 that overlaps with the third pixel region PX3, and a second-third aperture OP2-3 that overlaps with the second light-shielding region BA2.
[0127] Referring to Figure 8, in one embodiment, the third color filter CF3 overlaps with the third pixel region PX3. Furthermore, the third color filter CF3 overlaps with the first light-shielding region BA1 and the second light-shielding region BA2. Also, the third color filter CF3 does not overlap with the first pixel region PX1 and the second pixel region PX2. The third color filter CF3 is separated from the first pixel region PX1 and the second pixel region PX2.
[0128] The third color filter CF3 may include a third-first aperture OP3-1 that overlaps with the first pixel region PX1, and a third-second aperture OP3-2 that overlaps with the second pixel region PX2.
[0129] In addition to the information mentioned above, the cross-section will be described below with reference to Figures 9 and 10. The explanation of the components described in Figure 4 above will be omitted. The configuration of the color filter will be described below.
[0130] Referring to Figure 9, the first pixel region PX1 may contain the first color filter CF1. The second pixel region PX2 may contain the second color filter CF2. The third pixel region PX3 may contain the third color filter CF3.
[0131] Within a single unit pixel region, the first light-shielding region BA1 may be located between adjacent first pixel region PX1 and second pixel region PX2, and between second pixel region PX2 and third pixel region PX3. Furthermore, the first light-shielding region BA1 may be located between adjacent unit pixel regions, specifically between first pixel region PX1 and third pixel region PX3.
[0132] The first light-shielding region BA1 may contain a first color filter CF1, a second color filter CF2, and a third color filter CF3. Even without a separate light-shielding section, the first light-shielding region BA1 can provide a light-shielding area through the overlapping of multiple color filters.
[0133] Referring to Figure 10 below, the area within a single unit pixel region excluding the first light-shielding region BA1, the first pixel region PX1, the second pixel region PX2, and the third pixel region PX3 is called the second light-shielding region BA2.
[0134] The second light-shielding region BA2 is a region where no separate color conversion layer is located, and the first insulating layer P1, the first light-shielding layer BM1, the second insulating layer P2, the third insulating layer P3, and the fourth insulating layer P4 are laminated in the second light-shielding region BA2.
[0135] A first-color filter CF1 and a third-color filter CF3 may be located on the fourth insulating layer P4. The first-color filter CF1 and the third-color filter CF3 overlap with the second light-shielding region BA2.
[0136] The first light-shielding region BA1 contains the first color filter CF1, the second color filter CF2, and the third color filter CF3, while the second light-shielding region BA2 may contain the first color filter CF1 and the third color filter CF3. In the second light-shielding region BA2, the superposition of only the first color filter CF1 and the third color filter CF3 is sufficient to provide adequate light-shielding functionality.
[0137] The thickness t1 of the first light-shielding region BA1 may be greater than the thickness t2 of the second light-shielding region BA2. Since the first light-shielding region BA1 is located between pixel regions PX1, PX2, and PX3, it needs to be thick enough to prevent color mixing between these regions. Because there is less of a color mixing problem in the second light-shielding region BA2, the second light-shielding region BA2 can be provided with a relatively thinner thickness.
[0138] An overcoat layer OC may be located on the color filters CF1, CF2, and CF3. The overcoat layer OC may be formed to overlap the front surface of the substrate SUB. The overcoat layer OC may contain organic material and can provide a planar top surface.
[0139] When the step difference caused by the color filters CF1, CF2, and CF3 is large, the overcoat layer OC is also formed to have a large step difference. However, according to one embodiment, the second light-shielding region BA2, which has a relatively large area, has a thinner thickness than the first light-shielding region BA1, so the step difference in the overcoat layer OC can be mitigated. According to one embodiment, the flatness of the overcoat layer OC can be improved. Furthermore, since the cover window placed on the overcoat layer OC is stably bonded, a display device with improved reliability can be provided.
[0140] Although a detailed explanation is omitted in this specification, in one embodiment of the display device, a second color filter CF2, a first color filter CF1, and a third color filter CF3 can be formed in order on a fourth insulating layer P4. The order of the second color filter CF2, the first color filter CF1, and the third color filter CF3 may be changed.
[0141] At this time, the first color filter CF1 can be formed in the form shown in Figure 6, the second color filter CF2 can be formed in the form shown in Figure 7, and the third color filter CF3 can be formed in the form shown in Figure 8. By stacking the first to third color filters CF1, CF2, and CF3, a stacked structure as shown in Figures 9 and 10 can be provided.
[0142] The unit pixel region according to one embodiment will be described below with reference to Figures 11 to 14. Figure 11 is a plan view showing the unit pixel region according to one embodiment, Figure 12 is a plan view showing the first color filter according to one embodiment, Figure 13 is a plan view showing the second color filter according to one embodiment, and Figure 14 is a plan view showing the third color filter according to one embodiment. Descriptions of components that are the same as those described above will be omitted.
[0143] Referring to Figure 11, the unit pixel region PU may include the first pixel region PX1, the second pixel region PX2, the third pixel region PX3, the first light-shielding region BA1, and the second light-shielding region BA2.
[0144] The first light-shielding region BA1 may be located between adjacent first pixel region PX1 and second pixel region PX2, between second pixel region PX2 and third pixel region PX3, and between third pixel region PX3 and first pixel region PX1. Furthermore, the first light-shielding region BA1 may be located between boundary pixel regions PX1, PX2, and PX3 of the unit pixel region PU. In one embodiment, the first light-shielding regions BA1 may be connected to each other or separated within the unit pixel region PU.
[0145] The first light-shielding region BA1 may contain a first color filter CF1, a second color filter CF2, and a third color filter CF3. Even without a separate light-shielding section, the first light-shielding region BA1 can provide a light-shielding area through the overlapping of multiple color filters.
[0146] The second light-shielding region BA2 may be any region within the unit pixel region PU other than the first light-shielding region BA1 and the pixel regions PX1, PX2, and PX3. The second light-shielding region BA2 can be connected to other second light-shielding regions BA2 contained within adjacent unit pixel regions PU, but the second light-shielding region BA2 is not limited to such a form and arrangement. The form, position, etc., of the first light-shielding region BA1 and the second light-shielding region BA2 may change depending on the arrangement of the pixel regions PX1, PX2, and PX3.
[0147] The second light-shielding region BA2 is adjacent to the second pixel region PX2, as shown in Figure 11. The second light-shielding region BA2, the second pixel region PX2, and the second light-shielding region BA2 can be repeatedly arranged along the first direction DR1.
[0148] Referring to Figure 12 in the aforementioned drawings, in one embodiment, the first color filter CF1 may include a first-first aperture OP1-1 that overlaps with the first pixel area PX1 and the second pixel area PX2, and a first-second aperture OP1-2 that overlaps with the third pixel area PX3. The first color filter CF1 overlaps with the first pixel area PX1, the first light-shielding area BA1, and the second light-shielding area BA2. The first color filter CF1 can be separated from the second pixel area PX2 and the third pixel area PX3 without overlapping them.
[0149] Referring to Figure 13, in one embodiment, the second color filter CF2 overlaps with the second pixel region PX2. Also, the second color filter CF2 overlaps with the first light-shielding region BA1. Furthermore, the second color filter CF2 does not overlap with the first pixel region PX1, the third pixel region PX3, and the second light-shielding region BA2. The second color filter CF2 is separated from the first pixel region PX1, the third pixel region PX3, and the second light-shielding region BA2.
[0150] The second color filter CF2 may include a second-first aperture OP2-1 that overlaps with the first pixel region PX1, a second-second aperture OP2-2 that overlaps with the third pixel region PX3, and a second-third aperture OP2-3 that overlaps with the second light-shielding region BA2.
[0151] Referring to Figure 14, in one embodiment, the third color filter CF3 overlaps with the third pixel region PX3. Furthermore, the third color filter CF3 overlaps with the first light-shielding region BA1 and the second light-shielding region BA2. Also, the third color filter CF3 does not overlap with the first pixel region PX1 and the second pixel region PX2. The third color filter CF3 is separated from the first pixel region PX1 and the second pixel region PX2.
[0152] The third color filter CF3 may include a third-first aperture OP3-1 that overlaps with the first pixel region PX1, and a third-second aperture OP3-2 that overlaps with the second pixel region PX2.
[0153] The cross-sections in the embodiments shown in Figures 11 to 14 are identical to those in Figures 9 and 10, and therefore will not be described further. Note that the embodiments in Figures 11 to 14 differ from those in Figures 5 to 8 in the arrangement and configuration of the first to third pixel regions, as well as the arrangement and configuration of the first and second light-shielding regions. The arrangement and configuration of the pixel regions and light-shielding regions are not limited to the embodiments shown herein and may be modified and applied to the embodiments described above.
[0154] The comparative examples and embodiments are described below with reference to Table 1. The comparative examples include a first and second light-shielding region where the first to third color filters all overlap. In the embodiments, the first to third color filters overlap in the first light-shielding region, and the first and third color filters overlap in the second light-shielding region.
[0155] As shown in Table 1 below, even when only the first and third color filters overlapped in the second light-shielding region, the embodiment showed light efficiency, reflectance, reflected color, color match rate, and WAD at levels almost equivalent to those of the comparative example.
[0156] [Table 1]
[0157] Furthermore, according to the embodiment, it was confirmed that the thickness of the overlapping color filters in the second light-shielding region can be reduced by approximately 2 micrometers or more compared to the thickness of the overlapping color filters in the first light-shielding region. The display device according to this embodiment can improve the flatness of the overcoat layer formed on the upper edge of the display panel by reducing the thickness of the second light-shielding region. As a result, the cover window formed on the overcoat layer is stably bonded, providing a display device with improved reliability and quality.
[0158] Although embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art that utilize the basic concepts of the present invention as defined in the following claims also fall within the scope of the present invention. [Explanation of Symbols]
[0159] SUB board PX1 First pixel area PX2 Second pixel area PX3 Third pixel area PU unit pixel area BA light-shielding area BA1 1st shade area BA2 2nd light blocking area CF1 First Color Filter CF2 Second Color Filter CF3 Third Color Filter
Claims
1. It includes a unit pixel region which includes a first pixel region, a second pixel region, a third pixel region, and a light-shielding region arranged on the substrate, The light-shielding region includes a first light-shielding region and a second light-shielding region. The first pixel region is, A first color conversion layer located on the light-emitting element, and The first color filter located on the first color conversion layer includes, The aforementioned second pixel region is, A second color conversion layer located on the light-emitting element, and The system includes a second color filter located on the second color conversion layer, The aforementioned third pixel region is, A transparent layer located on the light-emitting element, and It includes a third color filter located on the aforementioned transparent layer, The first light-shielding region is formed by overlapping with the first color filter, the second color filter, and the third color filter. A display device in which the second light-shielding region is formed by overlapping with two color filters selected from the first color filter, the second color filter, and the third color filter.
2. In the aforementioned unit pixel region, The display device according to claim 1, wherein the area occupied by the first light-shielding region is smaller than the area occupied by the second light-shielding region.
3. The first light-shielding region is, The display device according to claim 2, located between the first pixel region and the second pixel region which are adjacent to each other within the unit pixel region, and between the second pixel region and the third pixel region which are adjacent to each other.
4. The first pixel region, the second pixel region, and the third pixel region are arranged along the first direction, The unit pixel region includes at least two of the second light-shielding regions, The display device according to claim 2, wherein the second light-shielding region, the first pixel region, and the second light-shielding region are arranged along a second direction.
5. The display device according to claim 1, wherein the first color filter includes an aperture that overlaps with the second pixel region and the third pixel region.
6. The aforementioned second color filter is, The second-first aperture overlapping the first pixel region, The second-second aperture overlapping with the third pixel region, and The display device according to claim 1, comprising a second to third opening that overlaps with the second light-shielding region.
7. The aforementioned third color filter is, The display device according to claim 1, comprising an aperture that overlaps the first pixel region and the second pixel region.
8. The display device according to claim 1, wherein the thickness of the first light-shielding region is different from the thickness of the second light-shielding region.
9. The display device according to claim 8, wherein the thickness of the first light-shielding region is greater than the thickness of the second light-shielding region.
10. The aforementioned display device is The first color filter, the second color filter and the third color filter, and the overcoat layer located on them, The display device according to claim 1, further comprising a cover window located on the overcoat layer.
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