Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

Abstract

To provide a method of manufacturing a silicon carbide semiconductor device which has long-term reliability by improving the adhesion between an ohmic electrode and a region formed on the ohmic electrode, and the silicon carbide semiconductor device.SOLUTION: A method of manufacturing a silicon carbide semiconductor device includes: a first process of forming a semiconductor element 20 on a semiconductor substrate; a second process of polishing the reverse surface of the semiconductor element 20 to a roughness (Ra) of 2 to less than 10 nm; a third process of depositing molybdenum and nickel, or titanium and nickel in this order on the reverse surface of the semiconductor element 20 after the polishing; and a fourth process of performing laser annealing after the deposition to form an ohmic electrode 21 consisting of nickel silicide and titanium carbide, or nickel silicide and molybdenum carbide.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] This invention relates to a method for manufacturing a silicon carbide semiconductor device and a silicon carbide semiconductor device.

Background Art

[0002] Conventionally, a single crystal of silicon (Si) has been used as a material for power semiconductor devices that control high breakdown voltage and large current. There are several types of silicon power semiconductor devices, and currently they are properly selected according to the application. For example, a PiN diode (P-intrinsic-N diode), a bipolar transistor, and further, an IGBT (Insulated Gate Bipolar Transistor) are so-called bipolar devices. Although these devices can handle a large current density, they cannot switch at high speed. The switching frequency limit of a bipolar transistor is several kHz, and that of an IGBT is about 20 kHz. On the other hand, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) cannot handle a large current, but can be used at high speeds up to several MHz. However, in the market, the demand for power devices that combine large current and high speed is strong, and efforts have been made to improve silicon IGBTs, power MOSFETs, etc. Currently, the development has advanced to almost the limit of the physical properties of silicon materials.

[0003] Furthermore, material studies have also been conducted from the perspective of power semiconductor devices, and silicon carbide (SiC) has recently attracted particular attention as a next-generation power semiconductor device due to its low on-voltage and excellent high-speed / high-temperature characteristics. This is because SiC is a chemically very stable material, has a wide bandgap of 3 eV, and can be used as a semiconductor extremely stably even at high temperatures. In addition, its maximum electric field strength is more than an order of magnitude larger than that of silicon. Since SiC has a high potential to exceed the material limits of silicon, it is expected to see significant growth in power semiconductor applications in the future. In particular, for ultra-high voltage applications such as power and pulsed power withstand voltages exceeding 10 kV, expectations for bipolar devices such as PiN diodes are also leaning towards SiC.

[0004] A power semiconductor module is a power semiconductor device that incorporates one or more power semiconductor chips to constitute part or all of a power conversion device, and has a structure in which the power semiconductor chips and the multilayer substrate or metal substrate are electrically insulated. Power semiconductor modules are used in industrial applications such as control inverters that drive motors in elevators and the like. More recently, they have also come to be widely used in control inverters that drive motors in automobiles. Automotive inverters require miniaturization and weight reduction to improve fuel efficiency, and long-term reliability at high temperatures is required because they are located near the drive motor in the engine compartment.

[0005] In automotive power semiconductor modules, compared to industrial power semiconductor modules, there is a need for smaller size and lighter weight due to space constraints. Furthermore, as the output power density required to drive motors increases, the semiconductor chip temperature during operation rises, and the demand for long-term reliability at high temperatures also increases. Therefore, there is a growing need for power semiconductor module structures that offer both high-temperature operation and long-term reliability.

[0006] In conventional silicon carbide semiconductor devices, when a power semiconductor chip is mounted on a silicon carbide semiconductor substrate, ohmic electrodes are formed to reduce the contact resistance between the silicon carbide semiconductor substrate and the back electrode when forming electrodes, particularly drain electrodes, for connecting the power semiconductor chip to electrical circuits, etc.

[0007] As a method for forming the above-mentioned ohmic electrodes, in a semiconductor device composed of a silicon carbide semiconductor substrate, a silicide process is known in which nickel (Ni) is deposited onto the silicon carbide semiconductor substrate, followed by heat treatment, to obtain ohmic electrodes that provide low-resistance (small potential barrier) connections to both n-type SiC and p-type SiC, thereby forming a Ni silicide film on the silicon carbide semiconductor substrate.

[0008] For example, a metal thin film forming a silicide layer is formed on the back surface of a silicon carbide semiconductor substrate, and a laser is irradiated to form a silicide layer on the metal thin film, thereby forming a back electrode (see, for example, Patent Document 1 below). The metal thin film uses a metal containing one or more of Ni, titanium (Ti), molybdenum (Mo), and tungsten (W). To form the silicide layer, the back surface of the semiconductor substrate is polished to a roughness (Ra) of 10 nm or more and 500 nm or less, and a laser light with a wavelength of 355 nm is used, and the photon energy (eV) and laser output (mJ / cm²) are adjusted. 2 The product of ) is 1000 (eV·mJ / cm²). 2 ) or more and 8000 (eV·mJ / cm 2 The laser beam is irradiated within the range below the specified area.

[0009] Furthermore, in addition to Mo, the metal that produces carbide, Ni, the metal that produces silicide, is also included to form a metal thin film which is a multilayer film of Mo and Ni. The metal thin film is reacted with the carbon in silicon carbide to form a carbide layer, thereby forming an ohmic electrode, and the back electrode is formed by removing the unwanted film consisting of silicon oxide or silicon particles that has formed on the surface of the carbide layer (see, for example, Patent Document 2 below). Here, the carbide layer is formed by reacting the metal thin film with the carbon in silicon carbide using laser annealing. [Prior art documents] [Patent Documents]

[0010] [Patent Document 1] Patent No. 5460975 [Patent Document 2] Patent No. 5369762 [Overview of the project] [Problems that the invention aims to solve]

[0011] The above-mentioned document illustrates that a silicide layer is uniformly formed on the back surface of the silicon carbide semiconductor substrate. However, in reality, the thickness of the silicide layer varies depending on the polishing condition of the back surface of the silicon carbide semiconductor substrate.

[0012] Furthermore, the above-mentioned literature does not describe the conditions for unevenness in the thickness of the silicide layer or the roughness of the back surface of the silicon carbide semiconductor substrate after silicide formation. In addition, with conventional techniques, it has been difficult to form ohmic electrodes with improved adhesion to the region formed on the ohmic electrode.

[0013] This invention aims to provide a method for manufacturing a silicon carbide semiconductor device that has long-term reliability by improving the adhesion between the ohmic electrode and the region formed on the ohmic electrode, in order to solve the problems of the prior art described above. [Means for solving the problem]

[0014] To solve the above-mentioned problems and achieve the objectives of the present invention, the method for manufacturing a silicon carbide semiconductor device according to this invention has the following features. First, a deposition step of depositing a first film containing nickel on the back side of a silicon carbide semiconductor substrate; after the deposition step, an electrode formation step of forming an electrode on the back side including a plurality of nickel silicide film thicknesses with sides facing each other; and after the electrode formation step, a protective film formation step of forming a titanium-containing protective film on the back side. The electrode is the film thickness portion The aforementioned The electrode includes a thin film portion of nickel silicide that is in contact with the side surface, and the electrode has an uneven surface formed by the convex shape of the thick film portion and the concave shape of the thin film portion. The aforementioned thin film portion contains a carbon layer.

[0015] Furthermore, the method for manufacturing a silicon carbide semiconductor device according to this invention, in the above-described invention, in the electrode formation step The aforementioned The film thickness portion is surrounded by the thin film portion.

[0016] Furthermore, in the method for manufacturing a silicon carbide semiconductor device according to this invention, the protective film is in contact with the side surfaces of the plurality of film thicknesses in the invention described above.

[0017] Furthermore, the method for manufacturing a silicon carbide semiconductor device according to this invention, in the invention described above, before the deposition step, Note back This process includes polishing the surface to achieve a roughness (Ra) of 2 nm or more and less than 10 nm.

[0018] Furthermore, the method for manufacturing a silicon carbide semiconductor device according to this invention is, in the invention described above, electrode The formation process involves laser annealing to create an ohmic electrode composed of nickel silicide and titanium carbide, or nickel silicide and molybdenum carbide.

[0019] Furthermore, the method for manufacturing a silicon carbide semiconductor device according to this invention, in the invention described above, by adjusting the overlap of laser light in the laser annealing, Recording film Atsubetsu and, Recording film It constitutes a thin portion, and the ratio of the area of the thin portion to the area of the thick film portion and the thin film portion is formed to be 10% or more and 30% or less.

[0020] In addition, the manufacturing method of the silicon carbide semiconductor device according to this invention includes, in the above-described invention, a second deposition step of depositing a second film containing nickel on the back side after the protective film formation step.

[0021] In addition, the silicon carbide semiconductor device according to this invention has the following characteristics. A power semiconductor chip that is a silicon carbide semiconductor element, an electrode provided on the back surface of the power semiconductor chip and including a plurality of thick film portions of nickel silicide whose side surfaces face each other, a protective film containing titanium that contacts the side surfaces of the plurality of thick film portions, and a film provided on the back surface of the protective film and containing nickel. The electrode includes a thin film portion of nickel silicide that contacts the side surface of the thick film portion, and the electrode has unevenness formed by the convex shape of the thick film portion and the concave shape of the thin film portion. The aforementioned The electrode includes a thin film portion around the thick film portion, and the electrode has unevenness formed by the convex shape of the thick film portion and the concave shape of the thin film portion. The aforementioned thin film portion contains a carbon layer.

[0022] In addition, the silicon carbide semiconductor device according to this invention, in the above-described invention, the electrode The aforementioned includes the thin film portion around the thick film portion.

[0023] In addition, the silicon carbide semiconductor device according to this invention, in the above-described invention, the electrode contains titanium carbide or molybdenum carbide.

[0024] In addition, the silicon carbide semiconductor device according to this invention, in the above-described invention, the ratio of the area of the thin film portion to the area of the thick film portion and the thin film portion is 10% or more and 30% or less.

[0025] According to the above-described invention, the adhesion between the ohmic electrode and the Ti film (protective film) can be improved, and the resistance between the ohmic electrode and the Ti film can be made good.

Effect of the Invention

[0026] The method for manufacturing a silicon carbide semiconductor device and the silicon carbide semiconductor device according to the present invention improve the adhesion between the ohmic electrode and the region formed on the ohmic electrode, resulting in the effect of long-term reliability. [Brief explanation of the drawing]

[0027] [Figure 1] This is a cross-sectional view showing the configuration of a power semiconductor module according to an embodiment. [Figure 2] This is a cross-sectional view showing the configuration of the back electrode portion of a power semiconductor module according to an embodiment. [Figure 3A] This figure shows the overall cross-section of the MoNi silicide layer. [Figure 3B] This figure shows the overall cross-section of the MoNi silicide layer. [Figure 4A] This figure shows a magnified view of the dotted line portion of the MoNi silicide layer in Figure 3A. [Figure 4B] This figure shows a magnified view of the dotted line portion of the MoNi silicide layer in Figure 3B. [Figure 5A] This figure shows the surface image of the MoNi silicide layer at 0 / 0 laser overlap. [Figure 5B] This figure shows a magnified image of the surface of the MoNi silicide layer at 0 / 0 laser overlap. [Figure 5C] This figure shows a cross-sectional image of the MoNi silicide layer at 0 / 0 laser overlap. [Figure 6A] This figure shows the surface image of the MoNi silicide layer at a laser overlap of 33 / 33. [Figure 6B] This figure shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 33 / 33. [Figure 6C] This figure shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 33 / 33. [Figure 7A] This figure shows the surface image of the MoNi silicide layer at a laser overlap of 67 / 50. [Figure 7B]This figure shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 67 / 50. [Figure 7C] This figure shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 50. [Figure 8A] This figure shows the surface image of the MoNi silicide layer at a laser overlap of 67 / 67. [Figure 8B] This figure shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 67 / 67. [Figure 8C] This figure shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 67. [Figure 9A] This figure shows the surface image of the MoNi silicide layer with an 80 / 80 laser overlap. [Figure 9B] This figure shows a magnified image of the surface of the MoNi silicide layer with an 80 / 80 laser overlap. [Figure 9C] This figure shows a cross-sectional image of the MoNi silicide layer with an 80 / 80 laser overlap. [Figure 10] This graph shows the relationship between laser overlap and the second region where the silicide is thin. [Figure 11] This is a cross-sectional view (part 1) showing the state of the back electrode of a power semiconductor module according to an embodiment during the manufacturing process. [Figure 12] This is a cross-sectional view (part 2) showing the state of the back electrode of a power semiconductor module according to the embodiment during the manufacturing process. [Figure 13] This is a cross-sectional view (part 3) showing the state of the back electrode of a power semiconductor module according to the embodiment during the manufacturing process. [Figure 14A] This figure shows cross-sectional images of the Mo film and Ni film before laser irradiation. [Figure 14B] This figure shows cross-sectional images of the dotted lines in Figure 14A of the Mo film and Ni film before laser irradiation. [Modes for carrying out the invention]

[0028] A preferred embodiment of the silicon carbide semiconductor device and the silicon carbide semiconductor device according to the present invention will be described in detail below with reference to the attached drawings. In the following description of embodiments and in the attached drawings, the same reference numerals are used for similar components, and redundant explanations are omitted. In Miller exponential notation, "-" represents a bar attached to the exponent immediately following it, and a "-" before the exponent indicates a negative exponent.

[0029] (Embodiment) Figure 1 is a cross-sectional view showing the configuration of a power semiconductor module according to an embodiment. As shown in Figure 1, the power semiconductor module 50 comprises a power semiconductor chip 1, an insulating substrate 2, bonding materials 3a, 3b, 3c, an electrode pattern 4, a metal substrate 5, a lead frame wiring 6, a resin case 7, a sealing resin 8, a metal terminal 9, and a metal wire 10.

[0030] The power semiconductor chip 1 is a semiconductor element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), or a diode chip. There are no particular restrictions on the semiconductor element, and other semiconductor elements may be used. An electrode pattern 4 made of copper (Cu) or the like is provided on the front surface (power semiconductor chip 1 side) and back surface (metal substrate 5 side) of an insulating substrate 2, such as a ceramic substrate, to ensure insulation. A substrate in which the electrode pattern 4 is provided on at least one side of the insulating substrate 2 is defined as a laminated substrate 12. The power semiconductor chip 1 is bonded to the electrode pattern 4 on the front surface using a bonding material 3b such as solder. A metal substrate 5 with heat dissipation fins (not shown) is bonded to the electrode pattern 4 on the back surface using a bonding material 3c such as solder. Furthermore, one end of the lead frame wiring 6 is joined to the top surface of the power semiconductor chip 1 (the surface opposite to the surface in contact with the bonding material 3b) using a bonding material 3a such as solder, as wiring for electrical connection. The other end of the lead frame wiring 6 is joined to the electrode pattern 4 using bonding material 3b.

[0031] The resin case 7 is combined with a laminated assembly in which the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5 are laminated. For example, the resin case 7 is bonded to the laminated assembly via an adhesive such as a silicone-based adhesive. In addition, the inside of the resin case 7 is filled with a sealing resin 8, such as a hard resin such as epoxy resin, to insulate and protect the power semiconductor chip 1 on the laminated substrate 12. In Embodiment 1, a hard resin such as epoxy resin is used as the sealing resin 8, and no lid is used. A metal wire 10 connects the power semiconductor chip 1 and the metal terminal 9. The metal terminal 9 penetrates the resin case 7 and protrudes to the outside.

[0032] Figure 2 is a cross-sectional view showing the configuration of the back electrode portion of a power semiconductor module according to an embodiment. Figure 2 is an enlarged view of the portion enclosed by the dotted line in Figure 1. As shown in Figure 2, an ohmic electrode 21 that makes ohmic contact with the semiconductor substrate is provided on the back surface of the silicon carbide semiconductor element 20 (corresponding to the power semiconductor chip 1 in Figure 1) on the semiconductor substrate. The ohmic electrode 21 is a composite film composed of nickel silicide and molybdenum carbide, or nickel silicide and titanium carbide. The composite film of nickel silicide and molybdenum carbide is a MoNi silicide layer formed by laser annealing after depositing Mo and Ni in that order on the silicon carbide semiconductor element 20. The composite film of nickel silicide and titanium carbide is a TiNi silicide layer formed by laser annealing after depositing Ti and Ni in that order on the silicon carbide semiconductor element 20.

[0033] A Ti film 22, which functions as a protective film, is provided on the back surface of the ohmic electrode 21. The Ti film 22 may be a TiN (titanium nitride) film or a Ta (tantalum) film. On the back surface of the Ti film 22, a Ni / Au film 23 is provided, which has nickel deposited to improve adhesion with the Ti film 22 and gold deposited to prevent oxidation. Solder 24 (corresponding to the bonding material 3b in Figure 1) for joining the lead frame wiring 6 is provided on the back surface of the Ni / Au film 23. In addition, for example, a tin (Sn)-based low-temperature solder can be used for the solder 24.

[0034] Here, the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate is between 0.1 μm and 0.15 μm. Here, roughness (Ra) refers to the arithmetic mean roughness (Ra) of the back surface. As will be described later, during the manufacturing of the power semiconductor module, the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate is polished to between 2 nm and 10 nm. This roughness increases due to laser annealing when forming the ohmic electrode 21, so the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate after manufacturing is as described above.

[0035] Furthermore, the thickness of the silicide layer varies depending on the polishing condition of the back surface of the silicon carbide semiconductor substrate. Figures 3A and 3B show the overall cross-section of the MoNi silicide layer. Figure 4A shows a magnified view of the dotted line portion of the MoNi silicide layer in Figure 3A, and Figure 4B shows a magnified view of the dotted line portion of the MoNi silicide layer in Figure 3B. Figures 3A and 3B are images taken with a scanning electron microscope (SEM) at a magnification of 5000x, and Figures 5A and 5B are images at a magnification of 30000x. In Figures 3A to 4B, images of the cross-section were taken after the MoNi silicide layer 21 was formed with a laser overlap of 67 / 50 (described later) and a protective film was formed on the MoNi silicide layer 21.

[0036] Figures 3A and 3B show different cross-sections of the same semiconductor chip. Figure 3A shows a cross-section where there are many areas with thick silicide, while Figure 3B shows a cross-section where there are fewer areas with thick silicide. In Figures 3A to 4B, the areas with thick silicide are the white areas S3.

[0037] As shown in Figures 3A to 4B, the ohmic electrode 21 is composed of a first region with a thick silicide layer and a second region with a thin silicide layer. When the second region is examined with a transmission electron microscope (TEM), it is found that an ohmic contact layer is formed in the second region as well, but about half of this layer is a deposited carbon (C) layer. As a result, the adhesion between the second region and the Ti film 22 is poor.

[0038] Figure 2 schematically shows the ohmic electrode 21, which consists of a first region 30 (hatched region in Figure 2) with a thick silicide layer and a second region 31 with a thin silicide layer containing precipitated carbon.

[0039] Next, to investigate the relationship between the proportion of the second region 31 and its adhesion to the Ti film 22, the ohmic electrode 21 was used as a MoNi silicide layer, and the adhesion between the ohmic electrode 21 and the Ti film 22 was tested by changing the laser annealing conditions. In laser annealing, it is not possible to irradiate the entire surface of the silicon carbide semiconductor substrate with laser light in one pass, so each laser irradiation is performed with slight shifts. For example, after one laser irradiation, the laser position is shifted in the x-direction and the next irradiation is performed. When the laser position reaches the outermost edge of the silicon carbide semiconductor substrate, the laser position is shifted in the y-direction and the next irradiation is performed. In this way, the silicon carbide semiconductor substrate is scanned and irradiated with laser light. Furthermore, a solid-state laser such as a YAG (Yttrium Aluminum Garnet) laser is used as the laser.

[0040] In this case, if the next irradiation is performed with a shift in the x and y directions, one irradiation of laser light can be overlapped. The overlap of irradiation in the x direction between one irradiation of laser light and the next irradiation of laser light is A%, and the overlap of irradiation in the y direction is B%, which is indicated by the laser overlap A / B. Furthermore, one irradiation of laser light is the region (full width at half maximum) until the intensity of the laser light is halved. The x direction is, for example, the <11-20> direction, and if the silicon carbide semiconductor device has a striped trench structure, it is the direction of the stripes. The y direction is the direction perpendicular to the x direction on the back surface of the silicon carbide semiconductor substrate.

[0041] For example, a laser overlap of 0 / 0 indicates that the overlap of the irradiation in the x-direction between one laser pulse and the next laser pulse is 0%, and the overlap of the irradiation in the y-direction is 0%. Similarly, a laser overlap of 67 / 50 indicates that the overlap of the irradiation in the x-direction between one laser pulse and the next laser pulse is 67%, and the overlap of the irradiation in the y-direction is 50%.

[0042] The following shows the test results of the adhesion between the ohmic electrode 21 and the Ti film 22 under the laser annealing conditions of 0 / 0, 33 / 33, 67 / 50, 67 / 67, and 80 / 80.

[0043] Figure 5A shows a surface image of the MoNi silicide layer with 0 / 0 laser overlap. Figure 5B shows a magnified image of the surface of the MoNi silicide layer with 0 / 0 laser overlap. Figure 5C shows a cross-sectional image of the MoNi silicide layer with 0 / 0 laser overlap. Figures 5A to 5C are scanning electron microscope images after the formation of the MoNi silicide layer 21. Figure 5A is an image at 500x magnification, Figure 5B is an image at 5000x magnification, and Figure 5C is an image at 20000x magnification. In Figure 5C, a cross-sectional image was taken after a protective film was formed on the MoNi silicide layer 21.

[0044] In a laser overlap of 0 / 0, since one irradiation of laser light is circular, if the irradiation overlap in the x and y directions is 0%, there will be areas on the back surface of the silicon carbide semiconductor substrate that are not sufficiently irradiated by laser light. For example, in Figure 5A, the circular white area S1 is the first region 30 where laser light is irradiated and the silicide is thick, while the black area S2 is the region where laser light irradiation is insufficient and heat does not rise sufficiently, so silicide is not formed. Also, in the cross-section of Figure 5C, the central white area S3 is the first region 30 where the silicide is thick.

[0045] In a laser overlap of 0 / 0, regions are not irradiated by the laser, or are not sufficiently heated by the laser irradiation, resulting in no silicide formation. Therefore, the proportion of the second region 31, where the silicide containing precipitated carbon is thin, is small, and the area ratio of the second region 31 was approximately 6%. The area ratio of the second region 31 is the ratio of the area of ​​the region with thin silicide containing precipitated carbon to the area of ​​the region with thick silicide. For example, in Figure 2, E2 and E4 are the areas of the second region 31, and the area ratio of the second region 31 is E2 + E4 / (E1 + E2 + E3 + E4 + E5). This area ratio was calculated by examining a magnified image of the surface of the MoNi silicide layer, for example, by setting the image brightness to 256 levels and detecting black spots with a brightness threshold of 75. This measurement can be performed by setting a threshold for the image brightness and binarizing the image.

[0046] In this case, with zero laser overlap, the adhesion between the ohmic electrode 21 and the Ti film 22 was good. However, in the second region 31 where the silicide is thin, the resistance is low due to the deposition of carbon. With zero laser overlap, in addition to the second region 31 where the silicide is thin, there are also areas where the laser is not irradiated or heated sufficiently to not silicide, and where no ohmic junction is formed, resulting in a higher resistance between the ohmic electrode 21 and the Ti film 22.

[0047] Figure 6A shows a surface image of the MoNi silicide layer at a laser overlap of 33 / 33. Figure 6B shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 33 / 33. Figure 6C shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 33 / 33. The imaging conditions for Figures 6A to 6C are the same as those for Figures 5A to 5C.

[0048] In a 33 / 33 laser overlap, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with a 33% overlap in the x-direction scan and with laser light with a 33% overlap in the y-direction scan. As a result, the central part of the circular area irradiated by the laser light is irradiated only once. In Figure 6A, the boundary between the first region 30 with thick silicide and the second region 31 with thin silicide is not clear, but in the more magnified Figure 6B, the white area S1, which is the first region 30 with thick silicide, and the black area S2, which is the second region 31 with thin silicide, can be observed. In addition, the central white area S3, which is the first region 31 with thick silicide, can also be observed in the cross-section in Figure 6C.

[0049] Thus, in the 33 / 33 laser overlap, the proportion of the second region 31 with a thin silicide increased compared to the 0 / 0 laser overlap, reaching approximately 10%. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0050] Figure 7A shows a surface image of the MoNi silicide layer at a laser overlap of 67 / 50. Figure 7B shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 67 / 50. Figure 7C shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 50. The imaging conditions for Figures 7A to 7C are the same as those for Figures 5A to 5C.

[0051] In a laser overlap of 67 / 50, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with 67% overlap in the x-direction scan and with laser light with 50% overlap in the y-direction scan. Therefore, the laser light is irradiated at least three times in the x-direction. Consequently, as in Figures 6A and 6C, the boundary between the first region with thick silicide and the second region with thin silicide is not clear in Figure 7A. However, in the more magnified Figure 7B, the white area S1, which is the first region with thick silicide, and the black area S2, which is the second region with thin silicide, can be observed. Furthermore, in the cross-section of Figure 7C, the central white area S3, which is the first region with thick silicide, can also be observed.

[0052] Thus, with a laser overlap of 67 / 50, the proportion of the second region 31, where the silicide is thin, increased compared to the laser overlap of 33 / 33, reaching approximately 14%. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0053] Figure 8A shows a surface image of the MoNi silicide layer at a laser overlap of 67 / 67. Figure 8B shows a magnified image of the surface of the MoNi silicide layer at a laser overlap of 67 / 67. Figure 8C shows a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 67. The imaging conditions for Figures 8A to 8C are the same as those for Figures 5A to 5C.

[0054] In a 67 / 67 laser overlap, the back surface of the silicon carbide semiconductor substrate is illuminated with laser light with 67% overlap during the x-direction scan and with laser light with 67% overlap during the y-direction scan. Therefore, the laser light is irradiated at least six times, three times in the x-direction and three times in the y-direction. As a result, images similar to those in Figures 6A to 6C are obtained.

[0055] Thus, with a laser overlap of 67 / 67, the proportion of the second region 31 with a thin silicide increased compared to the laser overlap of 67 / 50, reaching approximately 25%. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0056] Figure 9A shows a surface image of the MoNi silicide layer with an 80 / 80 laser overlap. Figure 9B shows a magnified image of the surface of the MoNi silicide layer with an 80 / 80 laser overlap. Figure 9C shows a cross-sectional image of the MoNi silicide layer with an 80 / 80 laser overlap. The imaging conditions for Figures 9A to 9C are the same as those for Figures 5A to 5C.

[0057] In an 80 / 80 laser overlap, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with 80% overlap in the x-direction scan and with laser light with 80% overlap in the y-direction scan. Therefore, the laser light is irradiated at least four times in the x-direction. Consequently, in Figure 9A, the boundary between the first region 30 with thick silicide and the second region 31 with thin silicide is not clear, but in the more magnified Figure 9B, the proportion of the black area S2, which is the second region 31 with thin silicide, is greater than in Figures 6B to 8B. This is because the laser irradiation was excessive. Furthermore, comparing Figure 9B with Figure 8B, the second region 31 with thin silicide is larger in Figure 9B.

[0058] Thus, with a laser overlap of 80 / 80, the proportion of the second region 31, where the silicide is thin, increased compared to the laser overlap of 67 / 67, reaching approximately 34%. In this case, the proportion of the second region 31 was too high, and because the second region 31 was large, the adhesion between the ohmic electrode 21 and the Ti film 22 was poor. Furthermore, the resistance between the ohmic electrode 21 and the Ti film 22 was also not good. This is thought to be because the adhesion between the second region 31 and the Ti film 22 was insufficient, leading to the formation of gaps and other factors, which increased the resistance.

[0059] Furthermore, although not shown in the diagram, at a laser overlap of 67 / 80, the proportion of the second region 31 with a thin silicide was between that of the laser overlap of 67 / 67 and 80 / 80, and was approximately 30%. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0060] Furthermore, while Figures 5A to 9C above show the results for the MoNi silicide layer, similar results can be obtained for the TiNi silicide layer.

[0061] Figure 10 is a graph showing the relationship between laser overlap and the ratio of the second region where silicide is thin. In Figure 10, the horizontal axis shows the laser overlap in the x-direction, in units of %, and the vertical axis shows the ratio of the second region where silicide is thin, in units of %, and the unit of %. Figure 10 is a graph of the results from Figures 5A to 9C above, but the results for 67 / 80, which are not included in Figures 5A to 9C, have also been added.

[0062] In the second region 31 where the silicide is thin, the adhesion to the Ti film 22 is poor. Therefore, if the area ratio of the second region 31 where the silicide is thin is high, the adhesion between the ohmic electrode 21 and the Ti film 22 deteriorates. Specifically, based on the results of laser overlap 67 / 67 and laser overlap 80 / 80, if the area ratio of the second region 31 where the silicide is thin exceeds 30%, the adhesion between the ohmic electrode 21 and the Ti film 22 deteriorates. For this reason, the area ratio of the second region is preferably between 0% and 30%. Also, in the second region 31 where the silicide is thin, carbon is deposited, resulting in low resistance. If the area of ​​the second region 31 where the silicide is thin is too small, the resistance becomes high, so the area ratio of the second region is preferably 10% or more.

[0063] Therefore, in this embodiment, the ratio of the area of ​​the second region 31 to the area of ​​the ohmic electrode 21 is set to 10% or more and 30% or less. This improves the adhesion between the ohmic electrode 21 and the Ti film 22, and improves the resistance between the ohmic electrode 21 and the Ti film 22.

[0064] (Method for manufacturing a silicon carbide semiconductor device according to an embodiment) Next, a method for manufacturing a silicon carbide semiconductor device according to an embodiment will be described. Figures 11 to 13 are cross-sectional views showing the state during the manufacturing of the back electrode of a power semiconductor module according to an embodiment. First, a silicon carbide semiconductor element 20 is formed on a silicon carbide semiconductor substrate, similar to the conventional method for manufacturing a silicon carbide semiconductor device. For example, if the silicon carbide semiconductor device is a MOSFET, a drift layer is formed on the silicon carbide semiconductor substrate by epitaxial growth, and impurities are implanted by ion implantation to form a base region, a source region, etc. on the front surface. Next, a gate insulating film is selectively formed on the front surface by thermal oxidation, etc., to form a MOS gate structure. Next, the top electrode is formed. The state up to this point is shown in Figure 11. In Figure 11, the device structure of the silicon carbide semiconductor element 20 and the top electrode are omitted.

[0065] Next, the back surface of the silicon carbide semiconductor element 20 is polished to make the back surface roughness (Ra) between 2 nm and less than 10 nm. If only rough polishing is performed using relatively coarse abrasive grains, the back surface roughness (Ra) will be 10 nm or more. Therefore, after rough polishing, finish polishing is performed using abrasive grains (#10000) that are about five times finer than the abrasive grains (#2000) used for rough polishing, which makes it possible to make the back surface roughness (Ra) between 2 nm and less than 10 nm. By achieving this roughness (Ra), a damage layer is formed on the back surface of the silicon carbide semiconductor element 20, making it easier for silicides to be formed during laser annealing. On the other hand, if dry polishing is performed, the roughness (Ra) will be between 0.5 nm and 2 nm, no damage layer will be formed on the back surface, and silicides will not be easily formed during laser annealing, so dry polishing is not preferable.

[0066] Next, a Mo film 32 is deposited on the back surface of the semiconductor device 20. The Mo film 32 can be formed, for example, by sputtering deposition. Next, a Ni film 33 is deposited on the Mo film 32. The Ni film 33 can be formed, for example, by sputtering deposition. The state up to this point is shown in Figure 12. When forming a TiNi silicide layer, the Ti film and Ni film are deposited using a similar method.

[0067] Here, Figure 14A shows cross-sectional images of the Mo film and Ni film before laser irradiation. Figure 14B shows cross-sectional images of the dotted line portions of the Mo film and Ni film in Figure 14A before laser irradiation. Figures 14A and 14B are SEM images of the cross-section after depositing the Mo film 32 and Ni film 33 on the back surface of a silicon carbide semiconductor device 20 with a back surface roughness (Ra) of 2 nm or more and less than 10 nm. As shown in Figure 14B, a damage layer 34 is formed between the back surface of the semiconductor device 20 and the Mo film 32, making it easier for silicide to form during laser annealing. Furthermore, this damage layer 34 is not present in the images after laser annealing (for example, Figures 9A and 9B), suggesting that it was relaxed during the silicide formation process of laser annealing.

[0068] Next, laser annealing is performed to form an ohmic electrode 21 composed of nickel silicide and molybdenum carbide. For laser annealing, for example, a third-frequency YAG laser (355 nm) is used with a laser energy of 2.0 J / cm². 2 More than 3.0J / cm 2 The following applies. In addition, laser annealing is performed so that the same location is irradiated with laser light two or three times. For example, when scanning a silicon carbide semiconductor substrate and irradiating it with laser light, the laser overlap can be set to 33 / 33, 67 / 50, 67 / 67, or 67 / 80 so that the same location is irradiated with laser light two or three times. This state is shown in Figure 13. Next, a thick film, such as a multilayer film in which a Ti film 22 and a Ni / Au film 23 are stacked in order, is formed by electron beam (EB) deposition or the like. In this way, the power semiconductor chip 1 is formed.

[0069] The manufacturing method for the power semiconductor module shown in Figure 1 is the same as that for a power semiconductor module using conventional technology. In the manufacturing method for the power semiconductor module, first, a power semiconductor chip 1 is mounted on a laminated substrate 12, and the power semiconductor chip 1 and the electrode pattern 4 provided on the insulating substrate 2 are electrically connected by lead frame wiring 6 via solder 24 (bonding material 3b). Next, these are bonded to a metal substrate 5 to assemble a laminated assembly consisting of the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5. A resin case 7 is bonded to this laminated assembly with an adhesive such as a silicone-based adhesive.

[0070] Next, a metal wire 10 is used to connect the power semiconductor chip 1 and the metal terminal 9, and a sealing resin 8, such as epoxy resin or other rigid resin, is filled into the resin case 7. This completes the power semiconductor module according to the embodiment shown in Figure 1. If the sealing resin 8 is not a rigid resin such as epoxy resin, a lid is attached to prevent the sealing resin 8 from leaking out.

[0071] As described above, according to the silicon carbide semiconductor device manufacturing method of this embodiment, the area ratio of the second region with a thin silicide in the ohmic electrode is 10% to 30%. This improves the adhesion between the ohmic electrode and the Ti film and improves the resistance between the ohmic electrode and the Ti film. Furthermore, before forming the ohmic electrode, the back surface is polished to make the back surface roughness (Ra) 2 nm to less than 10 nm. This forms a damage layer on the back surface, making it easier for silicide to form during laser annealing.

[0072] As described above, the present invention can be modified in various ways without departing from the spirit of the invention, and in each of the embodiments described above, for example, the dimensions of each part, the impurity concentration, etc., can be set in various ways according to the required specifications. Furthermore, the embodiments are applicable to silicon carbide semiconductor devices such as MOSFETs and diodes. [Industrial applicability]

[0073] As described above, the silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device according to the present invention are useful for power semiconductor devices used in power conversion devices such as inverters, power supply devices for various industrial machines, and igniters for automobiles. [Explanation of symbols]

[0074] 1 Power semiconductor chip 2. Insulating substrate 3a, 3b, 3c Bonding material 4 electrode patterns 5 Metal substrate 6 Lead frame wiring 7. Resin case 8 Sealing resin 9 Metal terminal 10 metal wires 12 Multilayer substrates 20 Silicon Carbide Semiconductor Devices 21 Ohmic electrodes 22Ti film 23 Ni / Au film 24 solder 30. Region 1 with a thick layer of silicide. 31. Second region with a thin silicide layer. 32 Mo film 33 Ni film 34 Damage Layer

Claims

1. A deposition process in which a first nickel-containing film is deposited on the back side of a silicon carbide semiconductor substrate, Following the deposition step, an electrode formation step is performed to form an electrode on the back side, which includes multiple nickel silicide film thicknesses with their sides facing each other. The process includes, after the electrode formation step, a protective film formation step in which a protective film containing titanium is formed on the back side, The electrode includes a thin film portion of nickel silicide that is in contact with the side surface of the film thickness portion. The electrode has an uneven surface formed by a convex shape in the film thickness portion and a concave shape in the film thin portion. A method for manufacturing a silicon carbide semiconductor device, characterized in that the thin film portion contains a carbon layer.

2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, characterized in that the electrode formation step includes the thin film portion around the film thickness portion.

3. The method for manufacturing a silicon carbide semiconductor device according to claim 1 or 2, characterized in that the protective film is in contact with the side surfaces of a plurality of the film thickness portions.

4. The method for manufacturing a silicon carbide semiconductor device according to claim 1, characterized in that, prior to the deposition step, the back surface is polished to a roughness (Ra) of 2 nm or more and less than 10 nm.

5. The method for manufacturing a silicon carbide semiconductor device according to claim 1, characterized in that the electrode formation step involves forming an ohmic electrode composed of nickel silicide and titanium carbide, or nickel silicide and molybdenum carbide, by laser annealing.

6. The method for manufacturing a silicon carbide semiconductor device according to claim 5, characterized in that the film thickness portion and the thin film portion are formed by adjusting the overlap of the laser light in the laser annealing, and the ratio of the area of ​​the thin film portion to the area of ​​the film thickness portion and the thin film portion is formed to be 10% or more and 30% or less.

7. A method for manufacturing a silicon carbide semiconductor device according to any one of claims 1 to 6, characterized in that, after the protective film formation step, a second deposition step is performed in which a second film containing nickel is deposited on the back surface.

8. Power semiconductor chips, which are silicon carbide semiconductor devices, An electrode provided on the back surface of the power semiconductor chip, including multiple nickel silicide film thicknesses with their sides facing each other, A titanium-containing protective film in contact with the side surfaces of multiple film thicknesses, A nickel-containing film is provided on the back surface of the aforementioned protective film, Equipped with, The electrode includes a thin film portion of nickel silicide that is in contact with the side surface of the film thickness portion. The electrode has an uneven surface formed by a convex shape in the film thickness portion and a concave shape in the film thin portion. The silicon carbide semiconductor device is characterized in that the thin film portion contains a carbon layer.

9. The silicon carbide semiconductor device according to claim 8, characterized in that the electrode includes the thin film portion around the thick film portion.

10. The silicon carbide semiconductor device according to claim 8, characterized in that the electrode contains titanium carbide or molybdenum carbide.

11. The silicon carbide semiconductor device according to claim 8, characterized in that the ratio of the area of ​​the thin film portion to the area of ​​the thick film portion and the thin film portion is 10% or more and 30% or less.

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