Method for manufacturing semiconductor devices and semiconductor manufacturing apparatus
The formation of a self-assembled monolayer on semiconductor substrates addresses etching challenges by enhancing selectivity and airtightness, enabling effective and defect-reduced etching processes for semiconductor devices.
Patent Information
- Application Number
- JP2022204960
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-12-21
- Publication Date
- 2026-05-21
- Estimated Expiration
- 2042-12-21
AI Technical Summary
Existing etching processes for semiconductor devices, such as three-dimensional NAND type flash memory, face challenges in achieving selective etching with high selectivity and preventing silicon component precipitation, due to issues with silicon nitride film etching rates and silicon oxide film etching selectivity.
A method involving the formation of a self-assembled monolayer (SAM) as a protective layer on the substrate, including steps of chemical adsorption, removal of unadsorbed molecules, surface modification, and densification to enhance SAM density and protective performance, allowing selective etching of the etchable layer.
The method enables efficient and selective etching of semiconductor layers with reduced film defects and improved airtightness, facilitating the production of semiconductor devices like three-dimensional NAND structures.
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Abstract
Citation Information
Patent Citations
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