Material bonding method, semiconductor wafer bonding method, material bonding apparatus, and semiconductor wafer bonding apparatus

Abstract

The present invention provides a material joining method, material joining apparatus, and joined body that can prevent poor conductivity and increased connection resistance when joining a first material and a second material. [Solution] The method comprises: an activation step in which, in a vacuum environment and with the plasma lit, a processing gas containing hydrogen is supplied to reduce the oxide films Oe1 and Oe2 formed on the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2 to remove the oxide films Oe1 and Oe2, and activate the surfaces of the non-electrode portions Zi1 and Zi2 of the first material Z1 and the second material Z2; and a joining step in which, after the activation step, in a vacuum environment and with the plasma lit, or immediately after the vacuum environment and the plasma is turned off, the electrode portion Ze1 of the first material Z1 and the electrode portion Ze2 of the second material Z2, and the non-electrode portion Zi1 of the first material Z1 and the non-electrode portion Zi2 of the second material Z2 are joined together so that they come into contact with each other.

Description

Technical Field

[0001] The present invention relates to a material bonding method for bonding a first material and a second material by, for example, radio frequency ion flow bonding (RFIFB), a material bonding apparatus, the material bonding method, and a bonded body bonded by the material bonding method and the material bonding apparatus.

[0002] The present invention relates to a semiconductor wafer bonding method for bonding a first semiconductor wafer and a second semiconductor wafer by, for example, radio frequency ion flow bonding (RFIFB), a semiconductor wafer bonding apparatus, the semiconductor wafer bonding method, and a bonded wafer bonded by the semiconductor wafer bonding method and the semiconductor wafer bonding apparatus.

Background Art

[0003] Conventionally, for example, in high integration and material integration of semiconductor devices, wafer bonding technology is extremely important. Conventional direct bonding technology is known. As direct bonding technology, for example, Surface Activated Bonding (SAB method) is known, in which two semiconductor wafers are subjected to oxide film removal and activation by an argon beam and directly bonded at the atomic level to achieve a strong bond between the wafers.

[0004] Also, as oxide film bonding technology, Fusion Bonding is known. Plasma Activated Bonding (PAB method) is known, in which a wafer is activated by vacuum plasma, OH groups are attached by pure water washing, the wafer is placed on a planar stage arranged to face each other, and a pair of wafers facing each other are bonded together.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

[0006] However, direct bonding technology requires the complete removal of the oxide film formed on the surface of the semiconductor wafer and the removal of several nanometers of the substrate together with the oxide film using argon sputtering to create active bonds, making it impossible to bond oxide films.

[0007] On the other hand, in fusion bonding, 3D packaging, and hybrid bonding technologies, a common semiconductor manufacturing process involves plasma treatment of the semiconductor wafer, followed by exposure to air and cleaning with pure water to introduce OH groups. However, this process presents a challenge: the electrode portion of the semiconductor wafer (metal portion, such as metal pads (Cu, Al, etc.)) easily oxidizes, leading to poor conductivity and increased connection resistance.

[0008] Therefore, in view of the above problems, the present invention aims to provide a material joining method, a material joining apparatus, and a joined body that can prevent poor conductivity and increased connection resistance when joining a first material and a second material.

[0009] Furthermore, in view of the above problems, the present invention aims to provide a semiconductor wafer bonding method, a semiconductor wafer bonding apparatus, and a bonded wafer that can prevent poor conductivity and increased connection resistance in bonding a first semiconductor wafer and a second semiconductor wafer. [Means for solving the problem]

[0010] The first invention is a material joining method comprising applying high-frequency power supplies of mutually different frequencies to a first material and a second material to polarize ions on the respective surfaces of the first material and the second material, and joining the first material and the second material by the movement of the ions on the surfaces of the first material and the second material, A first step involves reducing the oxide film formed on the electrode portions of the first and second materials in a vacuum environment with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, thereby removing the oxide film and activating the surface of the non-electrode portions of the first and second materials. The material joining method comprises, after the first step, a second step of joining the first material and the second material so that the electrode portion of the first material and the electrode portion of the second material, and the non-electrode portion of the first material and the non-electrode portion of the second material come into contact with each other, in a vacuum environment with the plasma lit (ON), or in a vacuum environment with the plasma turned OFF.

[0011] In this case, it is preferable that in the first step, oxygen atoms are removed from the oxide film formed on the electrode portions of the first and second materials, exposing the metal, or that the surfaces of the electrode portions of the first and second materials are struck by plasma ions, removing the oxide film and exposing the activated metal, thereby removing oxygen atoms from the surfaces of the non-electrode portions of the first and second materials.

[0012] In the second step described above, it is preferable that the non-electrode portion of the first material and the non-electrode portion of the second material, which are joined together, function as an oxide film.

[0013] The non-electrode portion is preferably an insulating film.

[0014] The processing gas may contain nitrogen.

[0015] The plasma is preferably a VUV plasma.

[0016] The first material and the second material are preferably held by an electrostatic chuck acting as a parallel plate plasma electrode.

[0017] It is preferable to use a bipolar electrostatic chuck.

[0018] Preferably, the first material is a substrate located upstream in the direction of gravity, and the second material is a substrate located downstream in the direction of gravity.

[0019] The combination of materials constituting the first material and the second material (first material / second material) is preferably one of the following: Si / Si, SiC / SiC, SiC / Si, sapphire / SiC, sapphire / Si, GaN (gallium nitride) / Si, oxide / oxide, nitride / nitride, metal / metal, metal / oxide, resin / inorganic material, or glass / metal.

[0020] The second invention is a semiconductor wafer bonding method comprising applying high-frequency power supplies of mutually different frequencies to a first semiconductor wafer and a second semiconductor wafer to polarize ions on the respective surfaces of the first semiconductor wafer and the second semiconductor wafer, and bonding the first semiconductor wafer and the second semiconductor wafer by the movement of the ions on the surfaces of the first semiconductor wafer and the second semiconductor wafer, A first step involves reducing the oxide film formed on the electrode portions of the first and second semiconductor wafers in a vacuum environment with a plasma ignited and a hydrogen-containing processing gas supplied, thereby removing the oxide film and activating the surface of the non-electrode portions of the first and second semiconductor wafers. A second step is to join the first semiconductor wafer and the second semiconductor wafer so that, in a vacuum environment and with the plasma lit (ON), or in a vacuum environment and immediately after the plasma has been turned off (OFF), the electrode portion of the first semiconductor wafer and the electrode portion of the second semiconductor wafer, and the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, respectively, come into contact. This is a semiconductor wafer bonding method having [a specific characteristic].

[0021] In the first step, oxygen atoms are separated from the oxide film formed on the electrode portions of the first semiconductor wafer and the second semiconductor wafer, exposing the metal, or the surface of the electrode portions of the first semiconductor wafer and the second semiconductor wafer is struck by plasma ions to remove the oxide film, exposing the activated metal, and preferably, oxygen atoms are separated from the surfaces of the non-electrode portions of the first semiconductor wafer and the second semiconductor wafer.

[0022] In the second step, it is preferable that the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer that are joined to each other function as an oxide film.

[0023] The non-electrode portion is preferably an insulating film.

[0024] The processing gas may contain nitrogen.

[0025] The plasma is preferably VUV plasma.

[0026] The first semiconductor wafer and the second semiconductor wafer are preferably held by an electrostatic chuck as a parallel plate plasma electrode.

[0027] It is preferable to use a bipolar electrostatic chuck as the electrostatic chuck.

[0028] It is preferable that the first semiconductor wafer is a substrate located on the upstream side in the gravity direction, and the second semiconductor wafer is a substrate located on the downstream side in the gravity direction.

[0029] The combination of materials constituting the first semiconductor wafer and the second semiconductor wafer (first semiconductor wafer / second semiconductor wafer) is preferably one of the following: Si / Si, SiC / SiC, SiC / Si, sapphire / SiC, sapphire / Si, GaN (gallium nitride) / Si, oxide / oxide, nitride / nitride, metal / metal, metal / oxide, resin / inorganic material, or glass / metal.

[0030] The third invention is a material bonding apparatus that applies high-frequency power supplies of mutually different frequencies to a first material and a second material to polarize ions on the respective surfaces of the first material and the second material, and bonds the first material and the second material by the movement of the ions on the surfaces of the first material and the second material, In a single chamber, under a vacuum and with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, the oxide film formed on the electrode portions of the first and second materials is reduced and removed, while the surfaces of the non-electrode portions of the first and second materials are activated. This material joining apparatus joins a first material and a second material such that the electrode portion of the first material and the electrode portion of the second material, and the non-electrode portion of the first material and the non-electrode portion of the second material, are in contact with each other, in a vacuum environment with the plasma lit (ON), or in a vacuum environment with the plasma turned off (OFF).

[0031] Preferably, oxygen atoms are removed from the oxide film formed on the electrode portions of the first and second materials, exposing the metal, or the surfaces of the electrode portions of the first and second materials are struck by plasma ions, removing the oxide film and exposing the activated metal, thereby removing oxygen atoms from the surfaces of the non-electrode portions of the first and second materials.

[0032] It is preferable that the non-electrode portions of the first material and the second material, which are joined together, function as an oxide film.

[0033] The non-electrode portion is preferably an insulating film.

[0034] The processing gas may contain nitrogen.

[0035] The plasma is preferably a VUV plasma.

[0036] The first material and the second material are preferably held by an electrostatic chuck acting as a parallel plate plasma electrode.

[0037] The electrostatic chuck is preferably a bipolar electrostatic chuck.

[0038] Preferably, the first material is a substrate located upstream in the direction of gravity, and the second material is a substrate located downstream in the direction of gravity.

[0039] The combination of materials constituting the first material and the second material (first material / second material) is preferably one of the following: Si / Si, SiC / SiC, SiC / Si, sapphire / SiC, sapphire / Si, GaN (gallium nitride) / Si, oxide / oxide, nitride / nitride, metal / metal, metal / oxide, resin / inorganic material, or glass / metal.

[0040] The fourth invention is a semiconductor wafer bonding apparatus that applies high-frequency power supplies of mutually different frequencies to a first semiconductor wafer and a second semiconductor wafer to polarize ions on the respective surfaces of the first semiconductor wafer and the second semiconductor wafer, and bonds the first semiconductor wafer and the second semiconductor wafer by the movement of the ions on the surfaces of the first semiconductor wafer and the second semiconductor wafer, In a single chamber, under a vacuum environment and with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, the oxide film formed on the electrode portions of the first and second semiconductor wafers is reduced and removed, while the surfaces of the non-electrode portions of the first and second semiconductor wafers are activated. This semiconductor wafer bonding apparatus bonds a first semiconductor wafer and a second semiconductor wafer so that the electrode portion of the first semiconductor wafer and the electrode portion of the second semiconductor wafer, and the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, are in contact with each other, in a vacuum environment with the plasma lit (ON), or immediately after the plasma has been turned off (OFF).

[0041] Preferably, oxygen atoms are pulled away from the oxide film formed on the electrode portions of the first and second semiconductor wafers, exposing the metal, or the surfaces of the electrode portions of the first and second semiconductor wafers are struck by plasma ions, removing the oxide film and exposing the activated metal, thereby pulling oxygen atoms away from the surfaces of the non-electrode portions of the first and second semiconductor wafers.

[0042] It is preferable that the non-electrode portions of the first semiconductor wafer and the second semiconductor wafer, which are joined together, function as an oxide film.

[0043] The non-electrode portion is preferably an insulating film.

[0044] The processing gas may contain nitrogen.

[0045] The plasma is preferably a VUV plasma.

[0046] The first semiconductor wafer and the second semiconductor wafer are preferably held by an electrostatic chuck acting as a parallel planar plasma electrode.

[0047] The electrostatic chuck is preferably a bipolar electrostatic chuck.

[0048] Preferably, the first semiconductor wafer is a substrate located upstream in the direction of gravity, and the second semiconductor wafer is a substrate located downstream in the direction of gravity.

[0049] The combination of materials constituting the first semiconductor wafer and the second semiconductor wafer (first semiconductor wafer / second semiconductor wafer) is preferably one of the following: Si / Si, SiC / SiC, SiC / Si, sapphire / SiC, sapphire / Si, GaN (gallium nitride) / Si, oxide / oxide, nitride / nitride, metal / metal, metal / oxide, resin / inorganic material, or glass / metal.

[0050] The fifth invention is a joined body in which the first material and the second material are joined by the material joining method of the first invention.

[0051] The sixth invention is a bonded wafer obtained by bonding the first semiconductor wafer and the second semiconductor wafer using the semiconductor wafer bonding method of the second invention.

[0052] The seventh invention is a joined body in which the first material and the second material are joined by a material joining device, which is the third invention.

[0053] The eighth invention is a bonded wafer obtained by bonding the first semiconductor wafer and the second semiconductor wafer using the semiconductor wafer bonding apparatus of the fourth invention. [Effects of the Invention]

[0054] According to the present invention, poor conductivity and increased connection resistance can be prevented when joining the first material and the second material.

[0055] According to the present invention, poor conductivity and increased connection resistance can be prevented at the junction of a first semiconductor wafer and a second semiconductor wafer. [Brief explanation of the drawing]

[0056] [Figure 1] This is a diagram showing the configuration of a semiconductor wafer bonding apparatus, which constitutes a semiconductor manufacturing apparatus according to one embodiment of the present invention. [Figure 2] This is a diagram showing the plasma processing and bonding processes performed by a semiconductor wafer bonding apparatus, which constitutes a semiconductor manufacturing apparatus according to one embodiment of the present invention. [Figure 3] This is a process diagram showing the plasma treatment and bonding processes of a semiconductor wafer bonding apparatus, which constitutes a semiconductor manufacturing apparatus according to one embodiment of the present invention. [Figure 4] This is a flowchart illustrating an example of high-frequency ionic fluid bonding. [Figure 5] This is a plan view of a semiconductor manufacturing system in which a semiconductor wafer bonding apparatus, which constitutes a semiconductor manufacturing apparatus according to one embodiment of the present invention, is assembled. [Figure 6] This is a side view of a semiconductor manufacturing system in which a semiconductor wafer bonding apparatus, which constitutes a semiconductor manufacturing apparatus according to one embodiment of the present invention, is assembled. [Figure 7] This is a diagram showing the structure of a unipolar electrostatic chuck. [Figure 8] This is a diagram showing the structure of a bipolar electrostatic chuck. [Figure 9] This diagram shows the configuration when semiconductor wafers are joined together using a bipolar electrostatic chuck provided on a stage that constitutes a semiconductor wafer bonding apparatus. [Figure 10] This is a diagram illustrating the state in which each material is plasma-treated before being joined in a material joining apparatus according to one embodiment of the present invention. [Figure 11] This is a schematic diagram showing the chemical changes on the surfaces of each material joined by a material joining apparatus according to one embodiment of the present invention. [Modes for carrying out the invention]

[0057] One embodiment of the present invention is a material joining apparatus and a material joining method for joining a first material and a second material, and the material joining apparatus and material joining method produce a joined material.

[0058] Here, the combination of materials constituting the first material and the second material (denoted as first material / second material) may be, for example, Si (silicon) / Si (silicon), SiC (silicon carbide) / SiC (silicon carbide), SiC (silicon carbide) / Si (silicon), sapphire / SiC (silicon carbide), sapphire / Si (silicon), GaN (gallium nitride) / Si (silicon), oxide / oxide, nitride / nitride, metal / metal, metal / oxide, resin / inorganic material, or glass / metal, but is not limited to these.

[0059] As an example of a material bonding apparatus, material bonding method, and bonded body according to one embodiment of the present invention, it is applied, for example, to a semiconductor wafer bonding apparatus, a semiconductor wafer bonding method, and a bonded wafer. In this case, the first material and the second material are semiconductor wafers, and semiconductor wafers are bonded together to produce a bonded wafer.

[0060] However, the present invention is not limited to semiconductor wafers for the first and second materials. Nor is it limited to semiconductor wafer bonding apparatus and semiconductor wafer bonding method applications for semiconductor wafer bonding apparatus and semiconductor wafer bonding method.

[0061] Beyond semiconductor products, this technology has many other applications. For example, it can be applied to techniques for joining a first material and a second material with a predetermined bonding strength without using adhesives. For instance, it can be used in the aerospace industry for joining materials that can withstand high temperatures, such as in aircraft re-entering the atmosphere or in nuclear reactors used in high-temperature environments at nuclear power plants. Because it does not use adhesives to bond materials together as in conventional methods, the bonding strength between materials remains high even in high-temperature environments without the adhesive melting or evaporating, preventing damage to equipment and ultimately improving safety.

[0062] As described above, the present invention can be used in a variety of applications, but as an example, one embodiment applied to a semiconductor manufacturing apparatus and a semiconductor manufacturing method will be described. The semiconductor manufacturing apparatus and semiconductor manufacturing method utilize semiconductor materials and relate to the bonding of semiconductor materials, but the semiconductor material may be, for example, a semiconductor wafer. For example, a Si wafer can be used as a semiconductor wafer, but it may also be made of glass or the like. Alternatively, it may be a material suitable for semiconductors such as ceramic or sapphire. In the following embodiments, for the sake of explanation, a "semiconductor wafer" will be used as an example of a material, but the present invention is not intended to be limited to semiconductor wafers.

[0063] [Technical Concept of the Invention] The technical concept of the present invention is as shown in Figures 1, 10, and 11, in a vacuum chamber where plasma treatment is performed on each material, a high-frequency power supply 110 (Figure 1) with mutually different frequencies is applied to the first material Z1 and the second material Z2 in a vacuum environment and with the plasma lit (ON), thereby polarizing ions on the respective surfaces of the first material Z1 and the second material Z2, and causing the ions to move on the surfaces of the first material Z1 and the second material Z2. This material joining apparatus and method are used to join a first material Z1 and a second material Z2 in a vacuum environment with the plasma lit (ON), or in a vacuum environment immediately after the plasma has been turned off (OFF), and comprises the following manufacturing process.

[0064] In this case, by utilizing RF high-frequency ion flow and Coulomb force (also called "electrostatic force"; the same applies hereinafter), the following steps are taken to join a pair of opposing materials Z1 and Z2, thereby increasing the bonding strength between them, and preventing poor conductivity and increased connection resistance in the joining of the first material Z1 and the second material Z2.

[0065] [Activation process (first process)] In the activation process, under vacuum conditions and with the plasma lit (ON), in an atmosphere supplied with a hydrogen-containing processing gas, the oxide films Oe1 and Oe2 formed on the electrode portions (metals) Ze1 and Ze2 of the first material Z1 and the second material Z2 are reduced to remove the oxide films Oe1 and Oe2, and the surfaces Oi1 and Oi2 of the non-electrode portions (insulating material, insulating film) Zi1 and Zi2 of the first material Z1 and the second material Z2 are activated.

[0066] The electrode portions Ze1 and Ze2 are made of metal, such as copper (Cu) or aluminum (Al).

[0067] The non-electrode portions Zi1 and Zi2 are composed of an insulating material or insulating film, for example, a silicon oxide film (SiO2).

[0068] In the activation process, oxygen atoms are removed from the oxide films Oe1 and Oe2 formed on the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2, exposing the metal, or the surfaces of the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2 are struck by plasma ions, removing the oxide films Oe1 and Oe2 and exposing the activated metal, and oxygen atoms are removed from the surfaces Oi1 and Oi2 of the non-electrode portions Zi1 and Zi2 of the first material Z1 and the second material Z2.

[0069] Specifically, oxide films Oe1 and Oe2 are formed on the surfaces of the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2. When exposed to a hydrogen-containing processing gas, a reduction reaction proceeds, and oxygen atoms are removed from the oxide films Oe1 and Oe2, exposing the metal. Furthermore, when the surfaces of the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2 are exposed to a hydrogen-containing processing gas, they are struck by plasma ions, which removes oxygen atoms from the oxide films Oe1 and Oe2, exposing the activated metal.

[0070] The surfaces Oi1 and Oi2 of the non-electrode portions Zi1 and Zi2 of the first material Z1 and the second material Z2 are non-conductive. However, when exposed to a hydrogen-containing processing gas, a reduction reaction proceeds, and oxygen atoms are removed from the surfaces Oi1 and Oi2 of the non-electrode portions (insulating material, insulating film) Zi1 and Zi2, leaving only the atoms of the insulating material. In other words, the atoms of the insulating material on the surfaces Oi1 and Oi2 of the non-electrode portions Zi1 and Zi2 of the first material Z1 and the second material Z2 become activated.

[0071] From the above, in the activation process, the oxide films Oe1 and Oe2 formed on the surfaces of the electrode portions Ze1 and Ze2 of the first material Z1 and the second material Z2 are removed, exposing the metal (including the activated metal). On the surfaces Oi1 and Oi2 of the non-electrode portions (insulating material, insulating film) Zi1 and Zi2 of the first material Z1 and the second material Z2, oxygen atoms are released, resulting in an activated state. Note that the activation of the non-electrode portions (insulating material, insulating film) Zi1 and Zi2 does not extend throughout the entire thickness of the non-electrode portions Zi1 and Zi2, but is limited to at least the surface Oi1 and Oi2 of the non-electrode portions Zi1 and Zi2.

[0072] [Joining process (second process)] In the bonding process, after the activation process, the first material Z1 and the second material Z2 are bonded together in a vacuum environment with the plasma turned ON, or in a vacuum environment with the plasma turned OFF, such that the electrode portion Ze1 of the first material Z1 and the electrode portion Ze2 of the second material Z2 are in contact with each other, and the non-electrode portion Zi1 of the first material Z1 and the non-electrode portion Zi2 of the second material Z2 are in contact with each other.

[0073] As a result, during the bonding process, the electrode portion Ze1 of the first material Z1 and the electrode portion Ze2 of the second material Z2 are in direct contact without the intervening oxide films Oe1 and Oe2, and at the same time, the non-electrode portion Zi1 of the first material Z1 and the non-electrode portion Zi2 of the second material Z2 are directly bonded together.

[0074] However, the surfaces Oi1 and Oi2 of the non-electrode portion Zi1 of the first material Z1 and the non-electrode portion Zi2 of the second material Z2 are activated by the removal of oxygen atoms, and the atoms of Oi1 on the surface of the non-electrode portion Zi1 of the first material Z1 and the atoms of Oi2 on the surface of the non-electrode portion Zi2 of the second material Z2 become bonded. Since the non-electrode portions Zi1 of the first material Z1 and Zi2 of the second material Z2 have the properties of an oxide film P (for example, a silicon oxide film), the non-electrode portions Zi1 and Zi2 function as adhesive layers that cause poor conductivity. In this way, an oxide film P (for example, a silicon oxide film) in the form of the non-electrode portions Zi1 and Zi2 intervenes between the first material Z1 and the second material Z2 that are joined together, resulting in a state of poor conductivity.

[0075] As described above, the semiconductor manufacturing process of the present invention allows the first material Z1 and the second material Z2 to be joined without using an adhesive and without performing pure water cleaning between plasma treatment and joining. At this time, in the joined state of the first material Z1 and the second material Z2, the electrode portion Ze1 of the first material Z1 and the electrode portion Ze2 of the second material Z2 are in direct contact without the intervening oxide films Oe1 and Oe2, resulting in good conductivity between the electrode portions Ze1 and Ze2. At the same time, an oxide film P (for example, a silicon oxide film) is interposed between the first material Z1S and the second material Z2, resulting in poor conductivity between the non-electrode portions Zi1 and Zi2. In this way, in the first material Z1 and the second material Z2, it is possible to simultaneously form areas where the electrode portions Ze1 and Ze2 have good conductivity and areas where the non-electrode portions Zi1 and Zi2 have poor conductivity.

[0076] The processing gas may contain nitrogen.

[0077] The presence of nitrogen in the processing gas allows OH atoms and nitrogen atoms to work together to form a protective passive film against dangling bonds and carbon-related defects at the electrode interface, thereby preventing destabilization (passivation treatment).

[0078] For the plasma, VUV plasma is preferred.

[0079] VUV plasma, also known as vacuum ultraviolet plasma, is a plasma that generates vacuum ultraviolet (VUV) light with a wavelength of 200 nm or less. VUV plasma can generate high concentrations of reactive oxygen species and radicals in a short time, enabling the oxidative decomposition and modification of organic matter while minimizing adverse effects on the material (substrate).

[0080] The first material Z1 and the second material Z2 are preferably held by electrostatic chucks 78 and 80 (see Figures 7 and 9) as parallel plate plasma electrodes.

[0081] A bipolar electrostatic chuck 80 (see Figure 9) may also be used.

[0082] Preferably, the first material Z1 is a substrate located upstream in the direction of gravity, and the second material Z2 is a substrate located downstream in the direction of gravity.

[0083] The first material Z1 and the second material Z2 are preferably semiconductor wafers W1 and W2.

[0084] In the activation and bonding processes, for example, a processing gas containing hydrogen and nitrogen is introduced into a vacuum device or vacuum chamber or plasma chamber, and the surfaces of each material Z1 and Z2 are activated by plasma treatment. Then, within a predetermined time, ions are polarized on the surfaces of each material Z1 and Z2 under a high vacuum state, and two high-frequency power supplies 110 of different frequencies are applied to each of the opposing materials Z1 and Z2. This removes the oxide films Oe1 and Oe2 formed on the electrode portions Ze1 and Ze2 of each material Z1 and Z2, and activates the surfaces Oi1 and Oi2 of the non-electrode portions Zi1 and Zi2 of each material Z1 and Z2, causing ions to move across the surfaces of each material Z1 and Z2 and bond the materials Z1 and Z2 together.

[0085] The activation and bonding processes are carried out by a bonding apparatus 34 that bonds materials Z1 and Z2 together using high-frequency ionic flow bonding (RFIFB). Details of the bonding apparatus 34 will be described later.

[0086] In the bonding process, the bonding surfaces of at least two opposing materials Z1 and Z2 are brought into close contact and joined together. The bonding temperature at this time is preferably room temperature (e.g., 0 to 35°C) or 100 to 200°C.

[0087] [Annealing process] It is preferable to heat-treat the bonded materials Z1 and Z2 (for example, to a temperature below 180°C). Examples of heat treatments include batch processing, single-wafer RTA, and laser annealing. Batch processing is a method in which multiple materials are heat-treated simultaneously at once, by placing the materials in a quartz furnace tube and heating them from the outside with a heater. Single-wafer RTA is a method in which each material is heated rapidly using an infrared lamp. Laser annealing is a method in which only the surface of the material is heat-treated by irradiating it with an ultraviolet laser.

[0088] The following describes the details of the bonding apparatus used in the semiconductor manufacturing apparatus and semiconductor manufacturing method of this embodiment. The bonding apparatus 34 bonds semiconductor materials together, for example, by radio frequency ion flow bonding (RFIFB). The first material Z1 and the second material Z2 will be described using a semiconductor wafer as an example of the semiconductor material.

[0089] The semiconductor material is fed into the bonding apparatus 34. At least an activation step and a bonding step are performed in the semiconductor material bonding apparatus 34.

[0090] [Configuration of semiconductor wafer bonding equipment] As shown in Figure 1, the semiconductor wafer bonding apparatus 34 of this embodiment bonds various types of wafers together. While semiconductor wafers and bonded wafers can be, for example, silicon wafers, they are not limited to silicon wafers. It is also possible to use semiconductor wafers made of different materials that have been used conventionally, or to bond semiconductor wafers made of different materials together.

[0091] As shown in Figure 1, the semiconductor wafer bonding apparatus 34 includes a chamber 14 which is a housing, a first stage 36 located on the upper side inside the chamber, and a second stage 38 located on the lower side inside the chamber. The first stage 36 is provided with a first holding portion 102 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode). The second stage 38 is provided with a second holding portion 104 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode).

[0092] The enclosure chamber 14 or the joining device 34 can also be referred to as a "vacuum chamber."

[0093] Here, the first stage 36 and the second stage 38, or the first holding part 102 and the second holding part 104, can be, for example, electrostatic chucks or mechanical clamps. Note that, for example, electrostatic chucks 78 and 80 (Figures 7 to 9) may be used. The configuration of electrostatic chucks 78 and 80 in Figures 7 to 9 will be described later.

[0094] Furthermore, as shown in Figure 2, a first replacement device 106 is arranged at or near the first stage 36, which is upstream in the direction of gravity, for replacing the first holding part 102 and the semiconductor wafer W1 or silicon electrode G1 held by the first holding part 102 with a semiconductor wafer or silicon electrode held by another holding part. In the replacement process between the silicon electrode G1 and the semiconductor wafer W1, it is preferable to replace the silicon electrode G1 and the first holding part 102 that holds the silicon electrode G1 as a set, and the semiconductor wafer W1 and the first holding part 102 that holds the semiconductor wafer W1 as a set, in sets, but the invention is not limited to this embodiment.

[0095] The silicon electrode G1 is a well-known material, also known as a dummy wafer or bare wafer, for example.

[0096] The semiconductor wafer W1 held by the first holding portion 102 includes, for example, a silicon electrode G1 as well as a bonded wafer G2, etc.

[0097] The first replacement device 106 is not limited to being provided on the first stage 36 side, but may also be part of the joining device 34 or located outside the joining device 34.

[0098] Furthermore, a second replacement device 108 may be arranged at or near the second stage 38, which is downstream in the direction of gravity, for replacing the second holding part 104 and the semiconductor wafer W2 or silicon electrode held by the second holding part 104 with a semiconductor wafer W2 or silicon electrode held by another holding part. In the process of replacing the silicon electrode (not shown) and the semiconductor wafer W2, it is preferable to replace them in sets, with the silicon electrode (not shown) and the second holding part 104 that holds the silicon electrode (not shown) being replaced as a set, and the semiconductor wafer W2 and the second holding part 104 that holds the semiconductor wafer W2 being replaced as a set, but the invention is not limited to this embodiment.

[0099] The second replacement device 108 is not limited to being provided on the second stage 38 side, but may also be part of the joining device 34 or located outside the joining device 34.

[0100] Furthermore, it is preferable that at least one of the first replacement device 106 or the second replacement device 108 is provided.

[0101] Here, the first replacement device 106 and the second replacement device 108 are, for example, robot hands, but are not limited to these.

[0102] Examples of semiconductor wafers W1 held by the first holding portion 102 and semiconductor wafers W2 held by the second holding portion 104 include, but are not limited to, Si wafers or SiC wafers.

[0103] As shown in Figure 1, a high-frequency power supply 110 is connected to the first stage 36 and the second stage 38, respectively. The high-frequency power supply 110 has the capability to realize a high-frequency electric field (13.56 MHz, 200 W). When the high-frequency power supply 110 is applied, the flow and diffusion of atoms are promoted by the electric field, improving the adhesion of the junction surfaces of the semiconductor wafers W1 and W2.

[0104] In this embodiment or example, a configuration is used in which a high-frequency power supply 110 is connected to the first stage 36 and the second stage 38, respectively, and it is assumed that a high-frequency voltage is applied to both the semiconductor wafer W1 held on the first stage 36 side and the semiconductor wafer W2 held on the second stage 38 side, for example, at mutually different frequencies. However, in a configuration in which a high-frequency power supply 110 is connected to both the first stage 36 and the second stage 38, the high-frequency voltage may be applied to only one of the semiconductor wafers. In this case, however, the high-frequency power supply 110 may be installed on only one of the first stage 36 or the second stage 38.

[0105] The semiconductor wafer bonding apparatus 34 is equipped with an automatic pressure control device 112 (APC) that can control the pressure inside the housing. The pressure inside the housing is controlled by the automatic pressure control device 112.

[0106] The semiconductor wafer bonding apparatus 34 may be equipped with a turbomolecular pump 114 (TMP). The turbomolecular pump 114 is composed of, for example, a rotor (moving blades) having turbine-type blades and a stator (fixed blades).

[0107] The turbomolecular pump 114 has a capacity of 1 × 10 -6 This is a high-performance pump with a high vacuum of Pa and a large pumping speed.

[0108] [Effectiveness of semiconductor wafer bonding equipment] The bonding between each wafer becomes stronger. When bonding semiconductor wafers that require different plasma processing times, the plasma processing time can be shortened by using a semiconductor wafer that requires a shorter plasma processing time as the bonding wafer and replacing the silicon electrodes. This enables short-duration plasma processing of the bonding wafer. As a result, the surface of the bonding wafer does not deteriorate due to prolonged plasma processing, and quality degradation of the semiconductor product (semiconductor device, etc.) formed by bonding the wafers can be prevented.

[0109] [First plasma treatment execution] As shown in Figures 1 and 2, the semiconductor wafer bonding apparatus 34 has a parallel plate electrode structure. With the inside of the housing in a vacuum, the silicon electrode G1 (for example, also called the "silicon wafer electrode") is held in the first holding part 102, and the semiconductor wafer W2 (for example, the silicon wafer) is held in the second holding part 104. A first plasma treatment is then performed using plasma. As a result, silicon is sputtered from the silicon electrode G1 using plasma inside the vacuum chamber 14, and the surface of the semiconductor wafer W2 held in the second holding part 104 is activated by the plasma, forming a silicon vapor-deposited film X on the surface of the semiconductor wafer W2. In the plasma surface activation of the semiconductor wafer W2, a gas such as hydrogen (H2) or nitrogen (N2) is used to remove the oxide film and contaminants from the surface of the semiconductor wafer W2. A similar effect is obtained in the surface activation of the semiconductor wafer W2 in the second plasma treatment.

[0110] Here, because a high-frequency power supply 110 is used, the energy is reduced, resulting in less plasma damage to the surface of the semiconductor wafer W2. In addition, a thin deposited film X is formed on the semiconductor wafer W2 by sputtering onto the silicon electrode G1, which is the silicon wafer electrode.

[0111] The first plasma treatment may be omitted (the same applies to the following embodiments and examples). In other words, instead of using an upper silicon electrode (semiconductor wafer), the upper and lower semiconductor wafers may be set directly and plasma may be generated by applying a high-frequency power supply in the first step to bond the upper and lower semiconductor wafers together. In particular, if the oxide film on the semiconductor wafers is removed in advance by wet etching before placing them in the apparatus, the oxide film can be removed in a single plasma treatment without dividing the plasma treatment into two steps.

[0112] [Isotropic etching] Furthermore, between the first plasma treatment and the subsequent second plasma treatment, an isotropic etching process may be performed to remove the oxide film formed on the surface of the semiconductor wafer W2 by supplying an etching gas such as SF6. After the isotropic etching process, the wafer surface is activated in the second plasma treatment, in which a gas such as hydrogen (H2) or nitrogen (N2) is supplied.

[0113] [Second plasma treatment execution] Next, the silicon electrode G1 is replaced with a bonded wafer G2, which is a semiconductor wafer W1. The bonded wafer G2 is a semiconductor wafer such as a silicon wafer, but is not limited to silicon. The replacement process between the silicon electrode G1 and the bonded wafer G2 is carried out by replacing the silicon electrode G1 and the first holding part 102 that holds the silicon electrode G1 as a set component with another set component consisting of the bonded wafer G2 and the first holding part 102 that holds the bonded wafer G2. Alternatively, the first holding part 102 may be used in its original state, and only the silicon electrode G1 may be separated from the first holding part 102 before the bonded wafer G2 is held in the first holding part 102. During and after the exchange process, plasma treatment is performed, and the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are activated using a gas such as hydrogen (H2) or nitrogen (N2). The oxide film and contaminants on the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are removed, respectively. Then, in an environment where the high-frequency power supply 110 is continuously applied, in a vacuum environment and with the plasma lit, the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 become polarized by ions. Then, the oxide film formed on the electrode portions (not shown in Figures 2 and 3) of the bonded wafer G2 held by the first holding portion 102 and the semiconductor wafer W2 held by the second holding portion 104 is reduced, and the surface of the non-electrode portions (not shown in Figures 2 and 3) is activated.

[0114] [Execution of wafer joining process] In a vacuum environment with the plasma lit, for example as shown in Figure 3, the first stage 36 and / or the second stage 38 move closer to each other, thereby reducing the distance between the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104. Due to the Coulomb force (electrostatic force) generated on the surfaces of both wafers, the interatomic distance between them decreases, and they eventually come into contact. At this time, the first stage 36 may be fixed and the second stage 38 may be moved closer to the first stage 36. Alternatively, the second stage 38 may be fixed and the first stage 36 may be moved closer to the second stage 38. The initial bonding force between the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 is strong. However, by continuing to apply the high-frequency power supply 110 even after the opposing wafers G2 and W2 come into contact with each other, the RF high frequency flows between the surfaces of the respective wafers G2 and W2, and ionic flow (atomic diffusion) is generated by the electric field, making the bond between the two even stronger.

[0115] The semiconductor wafer manufacturing method according to this embodiment is the first of its kind in the industry and is called RF Ion Flow Bonding (RFIFB).

[0116] Furthermore, while the plasma treatment of the bonded wafer G2 held by the first holding unit 102 is performed only once, the plasma treatment of the semiconductor wafer W2 held by the second holding unit 104 is performed only twice.

[0117] Furthermore, it is preferable, but not limited to, a configuration in which the silicon electrode G1 held by the first holding part 102 is replaced with another first holding part 102 and a bonded wafer G2 held by the first holding part 102, and then the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are joined. It is also preferable that the first holding part 102 is located on the upstream side (upper side) in the direction of gravity, and the second holding part 104 is located on the downstream side (lower side) in the direction of gravity.

[0118] On the other hand, there is a conventional technology called atomic diffusion bonding (ADB). Atomic diffusion bonding is a technique also known as room-temperature activated bonding, and is known to be performed by activating the semiconductor wafer surface with an Ar beam or by activating the semiconductor wafer surface with Si sputtering, but in both cases, bonding the activated semiconductor wafers together takes several minutes.

[0119] Generally, the activated state of semiconductor wafer surfaces deteriorates rapidly, requiring quick vacuuming and bonding.

[0120] In this case, after activating the wafer surface by plasma treatment, for example, by evacuating to the target pressure using a turbomolecular pump 114 within about 10 seconds and bonding the wafers together, atomic diffusion bonding becomes possible with the surface activation decay after wafer surface activation reduced to the absolute minimum.

[0121] This embodiment utilizes, for example, parallel planar plasma electrodes in the vertical direction, and employs a structure (e.g., an electrostatic chuck, a mechanical clamp, etc.) that can hold wafers on the upper and lower electrodes, and one of the electrodes may be designed to be interchangeable with a bonded wafer.

[0122] According to this embodiment, due to the roughening of the electrode surface of the silicon electrode G1 by sputtering, fine particles appear in the parallel flat wafer plasma, and voids are formed. The surface of the silicon electrode G1 is roughened by the sputtering, and the sputtered silicon grows and peels off from the surface of the silicon electrode G1. The peeled-off silicon continues to float as particles undergoing Brownian motion, causing void defects in the wafer. However, in this embodiment, since the silicon electrode G1 (e.g., a Si bare wafer) is used in place of the bonded wafer G2 in the initial stage, damage to the bonded wafer G2 due to voids can be reduced. This makes it possible to avoid a decrease in the quality and degradation of the semiconductor product obtained by bonding the bonded wafer G2 and the semiconductor wafer W2. It is preferable to replace the silicon electrode G1 every time or periodically every few times.

[0123] As described above, by surface activation of the wafer used on one or both sides of the parallel plate and soft sputtering by applying a high-frequency power supply 110 to the silicon electrode G1, an extremely thin, high-purity Si deposition film X is formed on the processed surface of the semiconductor wafer W2 facing the silicon electrode G1.

[0124] In a plasma environment, the surface of the semiconductor wafer W2 is struck by ions, exposing a clean surface. After the surface of the semiconductor wafer W2 is cleaned, a high-frequency power supply 110 of a different frequency is applied to the silicon electrode G1 (for example, a silicon wafer) located above it. As a result, tiny silicon particles are ejected from the silicon electrode G1 and accumulate on the surface of the semiconductor wafer W2 located below it, forming a deposited film X, which is a thin film created by vapor deposition.

[0125] Furthermore, if the application using the technology of the present invention eliminates the need for a thin film formed by deposition, such as a deposited film X, this step can be omitted.

[0126] Next, during the bonding of the bonded wafer G2 and the semiconductor wafer W2, with the bonded wafer G2 set, for example, on the upper electrode, the surface of the bonded wafer G2 is activated using a gas such as hydrogen (H2) or nitrogen (N2) in a vacuum environment with the plasma lit. At this time, the surface of the semiconductor wafer W2, which is located at the bottom, is also activated. As a result, the surface activation of the bonded wafer G2 is performed only once, and the surface activation of the semiconductor wafer W2 is performed only twice.

[0127] Within the chamber 14, which is a single housing, the surfaces of the two wafers (bonded wafer G2 and semiconductor wafer W2) are activated by applying a pressure that allows plasma to be generated between mutually opposing electrodes, and at a pressure that allows the plasma to be maintained in a high vacuum as much as possible. The electrode structure may be configured by adding a magnetron, ICP coil, etc., to enable the maintenance of plasma in a high vacuum.

[0128] Furthermore, it is preferable that the separation distance between the bonded wafer G2 positioned above and the semiconductor wafer W2 positioned below after the plasma surface activation is completed be narrow. Similarly, it is preferable that the separation distance between the silicon electrode G1 positioned above and the semiconductor wafer W2 positioned below be narrow. The separation distance can be, for example, the smallest possible gap between electrodes to which plasma can be uniformly applied during plasma processing, and may be in the range of 10 μm to 50 μm when the pressure is changed to a high vacuum after completion. This is because narrowing the separation distance makes it difficult for particles from the outside to penetrate between the electrodes, preventing the mixing of particles during the wafer bonding process, and simultaneously shortening the time from achieving the vacuum to bonding.

[0129] After the bonding wafer G2 and semiconductor wafer W2 are activated by plasma treatment, the supply of gas such as hydrogen (H2) or nitrogen (N2) may be stopped, and the automatic pressure control device 112 may be driven to control the pressure to reach the vacuum pressure achievable by the turbomolecular pump 114 (or cryopump) within, for example, about 10 seconds. At this time, the application of the high-frequency power supply 110 is continued, but is not limited to this.

[0130] As a result, oxide films formed on the wafer surfaces during processes such as the transport of the bonded wafer G2 and semiconductor wafer W2 are removed, and polarized ions (electrons) remain on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. When the bonded wafer G2 and semiconductor wafer W2 are joined in a high vacuum, the ionic potential charged on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2 increases the motion of atoms, making it easier for atoms to temporarily move on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. Furthermore, the application of a high-frequency power supply 110 after the bonding of the bonded wafer G2 and semiconductor wafer W2 also increases the motion of atoms, making it easier for atoms to temporarily move on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. Due to these synergistic effects, the atoms are rearranged into a more stable energy state. In particular, when the surfaces of the bonded wafer G2 and the semiconductor wafer W2 are activated, atoms are more easily rearranged to more optimal positions. As a result, the energy of the surfaces of the bonded wafer G2 and the semiconductor wafer W2 is minimized, and the bonding strength between the bonded wafer G2 and the semiconductor wafer W2 is improved.

[0131] Generally, the time between plasma treatment of a semiconductor wafer and the bonding of the semiconductor wafers involves a waiting period of several minutes, which includes the transfer time of the semiconductor wafer from the plasma treatment chamber to the bonding chamber, and the plasma treatment and transport time for the second semiconductor wafer. During this time, the surface of the semiconductor wafer deteriorates by approximately 10-50% in activity immediately after plasma treatment (attenuation rate of 10-50%).

[0132] In contrast, in this embodiment, instantaneous bonding is performed immediately after plasma treatment of the bonded wafer G2 and the semiconductor wafer W2. As a result, the activated state of each surface of the bonded wafer G2 and the semiconductor wafer W2 is maintained at an attenuation rate of 1% or less while the bonded wafer G2 and the semiconductor wafer W2 are bonded. Consequently, the bond between the bonded wafer G2 and the semiconductor wafer W2 becomes strong.

[0133] [Voidless bonding] Most voids consist of Si sputtering flakes and particles within the chamber. Frequent replacement of the silicon electrode G1 eliminates the sputtering-formed flakes and particles, thereby reducing voids. Furthermore, in the vacuum plasma, organic matter that acts as a seed for void formation between the bonded wafer G2 and the semiconductor wafer W2 is removed by the plasma. The plasma also prevents organic matter from entering the wafer space from the outside. These measures enable void-free bonding.

[0134] [Characteristics of high-frequency ion flow bonding] High-frequency ionic fluid bonding has the following characteristics: (1) Surface activation and cleaning of wafers can be achieved through plasma treatment and controlled instantaneous vacuum level. (2) The initial bonding force between wafers can be strengthened by utilizing Coulomb force (electrostatic force). (3) The use of a high-frequency power supply (RF high frequency) promotes the flow and diffusion of atoms, thereby improving the bonding strength between wafers.

[0135] [Flowchart of High-Frequency Ion Fluid Bonding Process] An example of a high-frequency ionic fluid bonding process flow is described below. As shown in Figure 4, for example, a wafer is removed from the wafer cassette (S100), and wafer alignment is performed (S200). The wafer is cleaned (S300), and then transported to the load lock chamber (S400). Plasma treatment is performed on the wafer (S500), and the wafers are bonded together (S600). After that, the semiconductor product formed by bonding the wafers is removed from the load lock chamber (S700), and the semiconductor product is inspected (S800). Here, it is preferable that the time required from the end of the plasma treatment process (S500) on the wafer to the end of the bonding process (S600) is, for example, 10 seconds or less. Between the plasma treatment process (S500) and the bonding process (S600) on the wafer, a vacuum state and a plasma-lit state are maintained, and the wafer is not washed with pure water. As described above, for example, by using an ESC chuck for Coulomb force-controlled assisted bonding, it is possible to prevent misalignment when opposing wafers come into contact, and to achieve high-strength bonding through high-frequency ionic fluid bonding technology.

[0136] (Examples) Next, we will describe an example of high-frequency ionic fluid bonding.

[0137] [Overview] (1) Two Si wafers are placed in a vacuum in a parallel plate electrode structure. (2) A replaceable silicon wafer electrode is used on one side, and the surface of the silicon wafer electrode is activated with plasma. (3) The silicon ejected from the surface of the silicon wafer electrode is sputtered onto the surface of the semiconductor wafer facing the silicon wafer electrode.

[0138] [Process] (1) Surface activation by silicon wafer electrodes Plasma treatment (first stage) using plasma is used to activate the surfaces of the silicon wafer electrode and the semiconductor wafer facing the silicon wafer electrode, and silicon is sputtered from the silicon wafer electrode. The silicon wafer electrodes are replaced with bonded wafers that will serve as the bonding target. Plasma treatment (second time) is performed on the bonded wafer and the semiconductor wafer, and after stopping the gas supply, a vacuum level is achieved using a turbomolecular pump or the like, for example, within approximately 10 seconds. Although the plasma disappears due to the vacuum, ions remain in a polarized state on the surfaces of the opposing bonded wafers and semiconductor wafers. This removes the oxide film formed on the surface of the semiconductor wafer during the semiconductor wafer transport process. (2) Wafer joining Ions that remain polarized on the surfaces of the bonded wafer and the semiconductor wafer generate a Coulomb force (electrostatic force), which reduces the interatomic distance between the wafers and causes them to come into contact. RF high-frequency current flows across the surface of each wafer, causing ionic flow (atomic diffusion) due to the electric field, resulting in a strong bond between the wafers.

[0139] In wafer bonding, while it is possible to rapidly create a high vacuum after plasma application and bond the wafers together, it is also possible to bond the wafers together while the plasma is still applied (by performing vacuum evacuation during plasma excitation). In other words, the wafers can be bonded together without changing the vacuum level down to a region where plasma does not rise. Generally, in the case of parallel plate plasma, the region where plasma does not rise is about 1 Pa. In the case of magnetron or ICP plasma, it is 1 × 10⁻⁶ -2 It is to that extent.

[0140] [Specific structure] (1) Parallel plate plasma electrode structure (1-1) Wafer holding mechanism The structure is designed to hold each wafer on the upper and lower electrodes using electrostatic chucks or mechanical clamps as the respective holding parts. At least one of the upper or lower electrodes is designed to be replaceable with a bonded wafer. The replacement operation is preferably performed by a robotic hand or the like. Furthermore, it is preferable to replace the upper electrode with a bonded wafer. This suppresses the generation of particles due to surface roughness of the electrodes. (1-2) Sputtering of electrodes By using silicon electrodes made from SI bare wafers as electrodes, particles are controlled during the plasma process. This reduces voids during bonding of the bonded wafer and the semiconductor wafer. (1-3) Surface activation of one or both sides of wafers facing each other By applying a high-frequency power supply to each electrode, soft sputtering is performed, and the silicon ejected from the electrode accumulates on the surface of the opposing wafer, forming a thin, high-purity Si film. If necessary, the step of forming the high-purity Si film (silicon film) can be omitted. A high-frequency power supply of a different frequency may be applied to the upper electrode to sputter silicon (Si).

[0141] (2) Set of bonded wafers (2-1) Activation of wafer surface using gas The wafer surface is activated using a gas such as hydrogen (H2) or nitrogen (N2). Plasma processing is performed simultaneously on two wafers, one positioned above and one below, within a single chamber. (2-2) Plasma treatment Plasma processing is performed in a high vacuum. A magnetron or ICP coil can be used. The structure between the electrodes ensures that the plasma is uniform and is not affected by external influences such as the intrusion of dust from outside. Plasma treatment can remove oxide films formed on the surface of semiconductor wafers during the semiconductor wafer transport process. (2-3) Vacuuming after plasma treatment The supply of gases such as hydrogen (H2) or nitrogen (N2) into the chamber is stopped, an automatic pressure control (APC) is activated, and a turbomolecular pump controls the pressure inside the chamber to the target vacuum pressure in, for example, about 10 seconds. Depending on the product, the application of high-frequency power to the upper and lower electrodes may be continued or stopped. (2-4) Vacuum bonding (vacuum joining) Two wafers with charged surfaces are brought close together and brought into contact by Coulomb force (electrostatic force). Because Coulomb force is used, the initial bonding force between the wafers is improved. Also, because Coulomb force is used, the motion of atoms increases, making it easier for atoms residing on the surface of each wafer to move. By applying a high-frequency power supply to each electrode, atoms are rearranged to a stable energy state, forming a strong bond between the wafers.

[0142] (3) Instantaneous bonding of wafers after plasma treatment (instantaneous bonding) After the surface of each wafer is activated, bonding occurs, for example, within about 10 seconds, which minimizes the degradation of the wafer surface's activation state (activity level). In contrast, conventional room-temperature activated bonding or atomic diffusion bonding requires time for wafer bonding. Specifically, a waiting time of several minutes can reduce the active state by approximately 20%. This has led to problems with the quality of semiconductor wafer products, but this problem has been solved by the high-frequency ionic fluid bonding of this embodiment.

[0143] [In high vacuum (1×10 -6 [Attenuation rate after surface activation in Pa(pascal)] Attenuation rate after 10 seconds in a vacuum: A(10 seconds) ≈ 99.83% A(10 seconds) = 99.83% = 0.17% attenuation rate Attenuation rate after 2 minutes in a vacuum: A(2 mins) ≈ 81.87% A(2 mins) = 81.87% = 18.13% From the above, it has been found that rapid vacuuming and wafer bonding are extremely important for maintaining the surface activation state, and as a result, a strong bond between wafers is obtained.

[0144] Next, we analyze ion diffusion in a high-frequency ion fluid bonding process, in which silicon wafers are plasma-treated in a vacuum to activate their surface, then the gas is stopped and the surface activated state is maintained at high speed in a vacuum, while the wafers are bonded together and a high-frequency power supply is applied.

[0145] [High-frequency ionic fluid bonding process] (1) Plasma surface activation Plasma etching using a fluorine-based gas chemically removes organic contaminants and oxides from the wafer surface. Sputtering removes potentially residual minute contaminants and heterogeneous chemical residues. By activating the wafer surface and performing plasma etching, the oxide film on the wafer surface is removed and cleaned. Simultaneously, by physically striking the wafer surface with sputtering, the atoms on the wafer surface are further activated, improving the bonding efficiency between wafers. The combined effects of cleaning and activating the wafer surface cause atoms to diffuse, resulting in high bonding strength between wafers.

[0146] (2) Gas shutoff and high-speed vacuuming After plasma treatment of the wafer, the supply of gas such as hydrogen (H2) or nitrogen (N2) is stopped, and a turbomolecular pump is used to create a high vacuum (1 × 10⁻¹⁰). -6 Control the process to reach Pa(pascal). By reaching the required vacuum level within approximately 10 seconds, the activated state of the wafer surface is maintained.

[0147] (3) Lamination of wafers The wafers are joined together while the polarized ions remain on the surface of each wafer. Coulomb force (electrostatic force) reduces the interatomic distance between the surfaces of closely placed wafers, thereby strengthening the contact between the wafers.

[0148] (4) Application of high-frequency power supply After joining the wafers together, a high-frequency power supply is applied to generate an electric field on the surface of each wafer. The electric field causes ions on the wafer surface to flow, strengthening the bonds between atoms.

[0149] [Considerations on ion diffusion] (1) Ionic state of the wafer surface The ions remaining on the wafer surface become polarized due to activation by plasma treatment. Because the polarized ions are strongly adsorbed onto the wafer surface, ion movement is facilitated. In a high vacuum, electrodes become insulated, and ions do not ionize (discharge), remaining on the wafer surface.

[0150] (2) High vacuum state In a high vacuum, the activated state of the wafer surface is maintained, and re-contamination of the wafer surface is suppressed.

[0151] (3) Effects of high-frequency power supply The high-frequency electric field (13.56 MHz, 200 W) has the following effects on the wafer surface and interface: (3-1) Surface potential variation A high-frequency electric field generates an alternating electric field on the wafer surface. This causes fluctuations in the potential of the wafer surface, leading to the following effects. Surface potential fluctuations: A potential of ±200V fluctuates at 13.56MHz, causing the movement of electrons and ions on the wafer surface. Influence of high-frequency electric fields: High-frequency electric fields (alternating electric fields) rearrange atoms and ions on the wafer surface. (3-2) Promotion of atomic diffusion at the interface The high-frequency electric field has the following effects on the wafer surface: Ion movement: The alternating electric field makes it easier for ions on the wafer surface to move. Interatomic changes: The alternating electric field alters the interatomic forces between wafers, forming stronger bonds. Reduction of activation energy: The alternating electric field reduces the energy required for atomic diffusion, promoting bonding between atoms.

[0152] [Mechanism of ion diffusion] When a high-frequency power supply is applied, ion diffusion occurs through the following mechanism. Furthermore, by applying the high-frequency power supply to only one of the opposing wafers, all of the following effects can be achieved: (1) ion movement due to electric field induction, (2) surface diffusion, and (3) strengthening of interatomic bonds. Therefore, by applying the high-frequency power supply to at least one of the opposing wafers, ionic flow phenomena can be generated. (1) Movement of ions by electric field induction High-frequency electric fields attract or push ions on the wafer surface. This causes ions to move uniformly across the entire wafer surface.

[0153] (2) Surface diffusion As ions move across the wafer surface, atoms are rearranged. The rearrangement of atoms on the wafer surface creates a more stable energy state.

[0154] (3) Strengthening of interatomic bonds The rearrangement of atoms on the wafer surface strengthens the bonds between atoms. This results in a stronger bond between wafers.

[0155] After isotropically etching the oxide film on the wafer surface, the high-frequency ionic fluid bonding process, in particular, involves chemically reacting the silicon wafer in a vacuum and activating the wafer surface by soft sputtering. Subsequently, a high-vacuum environment is created at high speed, for example, about 10 seconds, and the wafers are bonded together while maintaining the activated state of the wafer surface with the plasma lit. Furthermore, by continuously applying a high-frequency power supply between the wafers, the oxide film on the wafer surface is removed by the diffusion of ions on the wafer surface, and the interatomic bonds are strengthened as ions move on the wafer surface. As a result, the bond between the wafers becomes stronger. Thus, high-frequency ionic fluid bonding technology is very effective in wafer bonding technology, and can simultaneously improve the bonding strength and bonding quality between wafers.

[0156] Furthermore, frequent automatic electrode replacement and the use of bare wafers contribute to reducing flakes and particles formed by Si sputtering, thereby achieving voidless bonding. This significantly reduces the frequency of cleaning within the chamber, contributing to reduced maintenance time and improved equipment uptime.

[0157] [An example of a semiconductor manufacturing system] An example of how the semiconductor wafer bonding apparatus of this embodiment and its examples is incorporated into a semiconductor manufacturing system will be described.

[0158] As shown in Figures 5 and 6, the semiconductor wafer bonding apparatus 34 can also be incorporated into the semiconductor manufacturing system 200 in place of the plasma chamber 10 in a conventional system. In the semiconductor manufacturing system 200 shown in Figures 5 and 6, a semiconductor wafer bonding apparatus 34 capable of plasma processing of semiconductor wafers and bonding of wafers, a vacuum bonding chamber 204, an atomic bonding chamber 206, a rotary cleaning chamber 208, a standby chamber 210, and a load lock chamber 212 are arranged around a central chamber 202 that houses a robot hand. A wafer transport mechanism 214 and multiple wafer cassettes 216 are arranged near the load lock chamber 212.

[0159] [An example of a wafer holding mechanism] Next, we will describe an example of a wafer holding mechanism for holding each wafer.

[0160] In this embodiment, a semiconductor wafer bonding apparatus and bonding method are configured such that an electrostatic chuck 80 (see Figures 7 to 9) is arranged as a wafer holding mechanism on the first stage 36 and the second stage 38 for holding semiconductor wafers W1 and W2. Alternatively, the electrostatic chuck 80 (see Figures 7 to 9), the first holding part 102, and the second holding part 104 may be replaced with other components.

[0161] Figures 7 and 8 illustrate the structures of a unipolar electrostatic chuck 78 and a bipolar electrostatic chuck 80. The electrostatic chucks 78 and 80 are made of insulating materials such as aluminum oxide (Al2O3) or aluminum nitride (AIN). The structure incorporates electrodes within the insulator, and applying a voltage to these electrodes attracts objects such as semiconductor wafers W1 and W2 (86 and 92).

[0162] The unipolar electrostatic chuck 78 shown in Figure 7 is a unipolar type and has a base substrate 82 and an internal electrode (also called an electrode sheet or polyimide film electrode layer) 84 disposed on the base substrate 82. The base substrate 82 applies either a positive or negative voltage to the internal electrode 84. For example, when a positive voltage is applied to the internal electrode 84, negative charges move to the surface of the object to be adsorbed 86, and the object to be adsorbed 86 is attracted to the unipolar electrostatic chuck 78. Conversely, when a negative voltage is applied to the internal electrode 84, positive charges move to the surface of the object to be adsorbed 86, and the object to be adsorbed 86 is attracted to the unipolar electrostatic chuck 78.

[0163] The electrostatic chuck 80 shown in Figure 8 is of the bipolar type and has a base substrate 88 and internal electrodes (also called electrode sheets or polyimide film electrode layers) 90 arranged on the base substrate 88. The base substrate 88 applies both positive and negative voltages to the internal electrodes 90. For example, when a positive voltage is applied to the internal electrode 90, negative charges move to the surface of the object to be adsorbed 92 facing it, and when a negative voltage is applied to the internal electrode 90, positive charges move to the surface of the object to be adsorbed 92 facing it, causing the object to be adsorbed 92 to be attracted to the bipolar electrostatic chuck 80.

[0164] An example of the use of a bipolar electrostatic chuck in a semiconductor wafer bonding apparatus is described. As shown in Figure 9, it is preferable that the electrostatic chucks 80 are built into the first stage 36 and the second stage 38, respectively. For convenience of explanation, the electrostatic chuck 80 built into the first stage 36 will be referred to as the first electrostatic chuck 80A, and the electrostatic chuck 80 built into the second stage 38 will be referred to as the second electrostatic chuck 80B. Each electrostatic chuck 80A and 80B is, for example, a bipolar type. Since the first stage 36 and the second stage 38 are arranged opposite each other, each electrostatic chuck 80A and 80B is positioned opposite each other, thereby forming a pair of electrostatic chucks.

[0165] The first electrostatic chuck 80A includes a first base substrate 88A and a first internal electrode 90A disposed on the first base substrate 88A. The first internal electrode 90A is connected to ground. The first base substrate 88A controls the voltage applied to the first internal electrode 90A. The first internal electrode 90A is composed of two or more adjacent first unit electrodes 91A, and voltages that are opposite to each other, positive and negative, are applied to each of the mutually adjacent first unit electrodes 91A.

[0166] The second electrostatic chuck 80B is positioned opposite the first electrostatic chuck 80A. The second electrostatic chuck 80B has the same configuration as the first electrostatic chuck 80A, including a second base substrate 88B and a second internal electrode 90B positioned on the second base substrate 88B. The second internal electrode 90B is connected to ground. The second base substrate 88B controls the voltage applied to the second internal electrode 90B. The second internal electrode 90B is composed of two or more adjacent second unit electrodes 91B, and voltages that are positive (plus) and negative (minus) and reversed with respect to each other are applied to the mutually adjacent second unit electrodes 91B.

[0167] Here, the first unit electrode 91A on the first electrostatic chuck 80A side and the second unit electrode 91B on the second electrostatic chuck 80B side, which is opposite to the first unit electrode 91A, are controlled by the first base board 88A and the second base board 88B to have voltages of opposite polarity (positive and negative) applied to them, respectively. As a result, the first unit electrode 91A of the first electrostatic chuck 80A, which is applied to the negative voltage, is positioned opposite the second unit electrode 91B of the second electrostatic chuck 80B, which is applied to the positive voltage. Similarly, the first unit electrode 91A of the first electrostatic chuck 80A, which is applied to the positive voltage, is positioned opposite the second unit electrode 91B of the second electrostatic chuck 80B, which is applied to the negative voltage.

[0168] As a general principle of the bipolar electrostatic chuck 80, with a semiconductor wafer W1 placed on the first electrostatic chuck 80A and a semiconductor wafer W2 placed on the second electrostatic chuck 80B, positive and negative voltages are applied to the first internal electrode 90A and the second internal electrode 90B, respectively. This causes the positive and negative charges on the semiconductor wafers W1 and W2 to move in an attractive manner toward the respective internal electrodes 90A and 90B facing them (dielectric polarization). As a result, an attractive force is generated between the first internal electrode 90A and the semiconductor wafer W1, and between the second internal electrode 90B and the semiconductor wafer W2, thereby fixing the semiconductor wafers W1 and W2 in place.

[0169] As shown in Figure 7, in general, in a unipolar electrostatic chuck 78, applying a voltage between the object to be adsorbed (such as a semiconductor wafer) 86 and the internal electrode 84 (also called the chuck or holding device) generates an electric charge on the surface of the object to be adsorbed (such as a semiconductor wafer) 86. Specifically, if the internal electrode 84 is positively charged, the surface of the object to be adsorbed (such as a semiconductor wafer) 86 facing it becomes negatively charged, and if the internal electrode 84 is negatively charged, the surface of the object to be adsorbed (such as a semiconductor wafer) 86 facing it becomes positively charged. This principle is the same in the bipolar electrostatic chuck 80 shown in Figure 8.

[0170] Normally, the surfaces of semiconductor wafers W1 and W2 become negatively charged (or potentially positively charged) after plasma treatment and activation. Therefore, when attempting to join semiconductor wafers W1 and W2, whose surfaces are negatively charged (or positively charged) to each other, they repel each other electrically. In this state, if semiconductor wafers W1 and W2 are forcibly joined together, they will repel each other, causing misalignment and reducing the accuracy of the bond between semiconductor wafers W1 and W2.

[0171] As shown in Figure 9, by positively (negatively) charging the surface of one semiconductor wafer W1 and negatively (positively) charging the surface of the other semiconductor wafer W2, a state in which the semiconductor wafers to be joined are charged with opposite polarities is intentionally created. This allows for improved adhesion by utilizing both van der Waals forces (intermolecular forces) and Coulomb forces (electrostatic forces) generated between them, thereby assisting in the joining of semiconductor wafers W1 and W2.

[0172] Generally, objects with negative static charge (or positive charge) repel each other. This is one of the fundamental properties of static electricity; charges of the same sign (for example, both having a negative charge) repel each other, while charges of opposite polarity (for example, one positive and the other negative) attract each other.

[0173] Semiconductor wafers W1 and W2, charged with opposite polarities, are controlled by a surface voltage that does not cause discharge. When the positively charged semiconductor wafer W1 (or W2) comes into contact with the negatively charged semiconductor wafer W2 (or W1), electrons move from the positively charged object to the negatively charged object, neutralizing the charge. This weakens the effect of static electricity and simultaneously increases the bonding adhesion force during bonding.

[0174] In a typical bipolar electrostatic chuck, the surface of a semiconductor wafer is maintained in an electrical equilibrium state by applying voltages of the same magnitude (absolute value) to both the positive and negative sides.

[0175] In contrast, instead of applying voltages of the same magnitude (absolute value) to the positive and negative terminals, the system is designed to intentionally disrupt the balance between positive and negative by applying voltages of different magnitudes. In other words, it creates an unbalanced state between the positive and negative voltages in terms of the magnitude of the applied voltages.

[0176] As shown in Figure 9, for example, a voltage of -400 volts is applied to one of the first unit electrodes 91A constituting the first internal electrode 90A of the first electrostatic chuck 80A, and a voltage of +500 volts is applied to the other first unit electrode 91A. Simultaneously, a voltage of +400 volts is applied to one of the second unit electrodes 91B constituting the second internal electrode 90B of the second electrostatic chuck 80B, and a voltage of -500 volts is applied to the other second unit electrode 91B.

[0177] Here, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a voltage of -400 volts is applied, and the second unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a voltage of +400 volts is applied, are positioned opposite each other. Although these have different polarities (positive and negative), they are subjected to the same magnitude of voltage in absolute terms.

[0178] Furthermore, the first unit electrode 91A on the other side of the first internal electrode 90A of the first electrostatic chuck 80A, to which a voltage of +500 volts is applied, and the second unit electrode 91B on the other side of the second internal electrode 90B of the second electrostatic chuck 80B, to which a voltage of -500 volts is applied, are set to face each other. Although these have different polarities (positive and negative), they are subjected to the same magnitude of voltage in absolute terms.

[0179] As a result, the surface of the semiconductor wafer W1 facing the first electrostatic chuck 80A becomes charged with a charge of +100 volts, which is the difference between the +500 volts and -400 volts of the first electrostatic chuck 80A. Similarly, the surface of the semiconductor wafer W2 facing the second electrostatic chuck 80B becomes charged with a charge of -100 volts, which is the difference between the +400 volts and -500 volts of the second electrostatic chuck 80B.

[0180] At this time, floating charges are generated on the surfaces of semiconductor wafers W1 and W2. As a result, by applying a reverse voltage to the opposing internal electrodes 90A and 90B (or to the unit electrodes), the semiconductor wafers W1 and W2 are attracted to each other by a strong Coulomb force and bonded together. This suppresses the generation of bubbles when semiconductor wafers W1 and W2 are bonded together.

[0181] In this process, it is preferable that the semiconductor wafers W1 and W2, held by a pair of electrostatic chucks 80A and 80B, are placed in a miniature space where the distance between them is between 10 μm and 50 μm. In this miniature space, the semiconductor wafers W1 and W2 are bonded together while maintaining their planar orientation.

[0182] It should be noted that this embodiment and the examples illustrate one aspect of the present invention, and the present invention is not limited thereto. Differences in the degree of design modifications from this embodiment and the examples are naturally included within the scope of the technical idea of ​​the present invention. [Explanation of Symbols]

[0183] 14 Chambers 16 stages 34. Semiconductor wafer bonding equipment 36. Stage 1 38. Second Stage 78. Single-pole electrostatic chuck 80 Bipolar electrostatic chuck 80A First electrostatic chuck 80B Second electrostatic chuck 82 Base board 84 Internal electrode 86 Adsorbed object 88 Base Board 88A First base board 88B Second base 90 Internal electrode 90A First internal electrode 90B Second internal electrode 91A First unit electrode 91B Second unit electrode 92 Adsorbed object 102 First retaining part 104 Second retaining part 106 First replacement device 108 Second replacement device 110 High frequency power supply 112 Automatic pressure control device 114 Turbomolecular pumps 200 Semiconductor Manufacturing Systems 202 Central Chamber 204 Vacuum Bonding Chamber 206 Atomic junction chamber 208 Rotary Cleaning Chamber 210 Standby Chamber 212 Load Lock Chamber 214 Wafer transport mechanism 216 Wave Cassette 300 Semiconductor manufacturing equipment G1 Silicon wafer (semiconductor material) G2 Bonded wafer (semiconductor material) P oxide film (silicon oxide film) W1 Semiconductor wafer (semiconductor material) W2 Semiconductor wafer (semiconductor material) Z1 First material Z2 First material Ze1 electrode part Ze2 electrode part Zi1 non-electrode part Zi2 non-electrode part Oe1 oxide film Oe2 oxide film

Claims

1. A material joining method comprising applying high-frequency power supplies of mutually different frequencies to a first material and a second material to polarize ions on the respective surfaces of the first material and the second material, and joining the first material and the second material by the movement of the ions on the surfaces of the first material and the second material, A first step involves reducing the oxide film formed on the electrode portions of the first and second materials in a vacuum environment with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, thereby removing the oxide film, and activating the surface of the non-electrode portions of the first and second materials to leave the oxide film intact. A second step is performed to join the first material and the second material in a vacuum environment with the plasma lit, or in a vacuum environment with the plasma lit immediately after the plasma has been turned off, such that the electrode portion of the first material and the electrode portion of the second material, and the non-electrode portion of the first material and the non-electrode portion of the second material, are in contact with each other. A method for joining materials having the following characteristics.

2. The material joining method according to claim 1, wherein in the first step, oxygen atoms are removed from the oxide film formed on the electrode portions of the first material and the second material, exposing the metal, or the surfaces of the electrode portions of the first material and the second material are struck by plasma ions, removing the oxide film and exposing the activated metal, and oxygen atoms are removed from the surfaces of the non-electrode portions of the first material and the second material.

3. The material joining method according to claim 1 or 2, wherein in the second step, the non-electrode portion of the first material and the non-electrode portion of the second material that are joined together function as an adhesive layer.

4. The material bonding method according to claim 1 or 2, wherein the non-electrode portion is an insulating film.

5. The material joining method according to claim 1 or 2, wherein the processing gas includes nitrogen.

6. The material bonding method according to claim 1 or 2, wherein the plasma is a VUV plasma.

7. The material joining method according to claim 1 or 2, wherein the first material and the second material are held by an electrostatic chuck as a parallel plate plasma electrode.

8. The material joining method according to claim 7, wherein the electrostatic chuck is a bipolar electrostatic chuck.

9. The material bonding method according to claim 1 or 2, wherein the first material is a substrate located upstream in the direction of gravity, and the second material is a substrate located downstream in the direction of gravity.

10. The material joining method according to claim 1 or 2, wherein one of the materials of the first material or the second material to be joined together is SiC and the other is Si, or one of the materials of the first material or the second material to be joined together is sapphire and the other is SiC.

11. A semiconductor wafer bonding method comprising applying high-frequency power supplies of mutually different frequencies to a first semiconductor wafer and a second semiconductor wafer to polarize ions on the respective surfaces of the first semiconductor wafer and the second semiconductor wafer, and bonding the first semiconductor wafer and the second semiconductor wafer by the movement of the ions on the surfaces of the first semiconductor wafer and the second semiconductor wafer, wherein A first step involves reducing the oxide film formed on the electrode portions of the first and second semiconductor wafers in a vacuum environment with a plasma ignited and a hydrogen-containing processing gas supplied, thereby removing the oxide film, and activating the surface of the non-electrode portions of the first and second semiconductor wafers to leave the oxide film intact. A second step is to join the first semiconductor wafer and the second semiconductor wafer in a vacuum environment with the plasma lit, or in a vacuum environment with the plasma lit immediately after the plasma has been turned off, such that the electrode portion of the first semiconductor wafer and the electrode portion of the second semiconductor wafer, and the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, are in contact with each other. A semiconductor wafer bonding method having [a specific feature].

12. The semiconductor wafer bonding method according to claim 11, wherein in the first step, oxygen atoms are pulled away from the oxide film formed on the electrode portions of the first semiconductor wafer and the second semiconductor wafer, exposing the metal, or the surfaces of the electrode portions of the first semiconductor wafer and the second semiconductor wafer are struck by plasma ions, removing the oxide film and exposing the activated metal, and oxygen atoms are pulled away from the surfaces of the non-electrode portions of the first semiconductor wafer and the second semiconductor wafer.

13. The semiconductor wafer bonding method according to claim 11 or 12, wherein in the second step, the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, which are bonded to each other, function as an adhesive layer.

14. The semiconductor wafer bonding method according to claim 11 or 12, wherein the non-electrode portion is an insulating film.

15. The semiconductor wafer bonding method according to claim 11 or 12, wherein the processing gas includes nitrogen.

16. The semiconductor wafer bonding method according to claim 11 or 12, wherein the plasma is a VUV plasma.

17. The semiconductor wafer bonding method according to claim 11 or 12, wherein the first semiconductor wafer and the second semiconductor wafer are held by an electrostatic chuck as a parallel planar plasma electrode.

18. The semiconductor wafer bonding method according to claim 17, wherein the electrostatic chuck is a bipolar electrostatic chuck.

19. The semiconductor wafer bonding method according to claim 11 or 12, wherein the first semiconductor wafer is a substrate located upstream in the direction of gravity, and the second semiconductor wafer is a substrate located downstream in the direction of gravity.

20. The semiconductor wafer bonding method according to claim 11 or 12, wherein one of the materials of the first semiconductor wafer or the second semiconductor wafer to be bonded to each other is SiC and the other is Si, or one of the materials of the first semiconductor wafer or the second semiconductor wafer to be bonded to each other is sapphire and the other is SiC.

21. A material bonding apparatus that applies high-frequency power supplies of mutually different frequencies to a first material and a second material to polarize ions on the respective surfaces of the first material and the second material, and joins the first material and the second material by the movement of the ions on the surfaces of the first material and the second material, In a single chamber, under a vacuum and with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, the oxide film formed on the electrode portions of the first and second materials is reduced and removed, while the surface of the non-electrode portions of the first and second materials is activated to leave the oxide film intact. A material joining apparatus for joining a first material and a second material such that the electrode portion of the first material and the electrode portion of the second material, and the non-electrode portion of the first material and the non-electrode portion of the second material, are in contact with each other, in a vacuum environment with the plasma lit, or in a vacuum environment with the plasma immediately after it has been turned off.

22. The material bonding apparatus according to claim 21, wherein oxygen atoms are removed from the oxide film formed on the electrode portions of the first material and the second material, exposing the metal, or the surfaces of the electrode portions of the first material and the second material are struck by plasma ions, removing the oxide film and exposing the activated metal, and oxygen atoms are removed from the surfaces of the non-electrode portions of the first material and the second material.

23. The material joining apparatus according to claim 21 or 22, wherein the non-electrode portion of the first material and the non-electrode portion of the second material, which are joined together, function as an adhesive layer.

24. The material bonding apparatus according to claim 21 or 22, wherein the non-electrode portion is an insulating film.

25. The material bonding apparatus according to claim 21 or 22, wherein the processing gas contains nitrogen.

26. The material bonding apparatus according to claim 21 or 22, wherein the plasma is a VUV plasma.

27. The material bonding apparatus according to claim 21 or 22, wherein the first material and the second material are held by an electrostatic chuck as a parallel plate plasma electrode.

28. The material bonding apparatus according to claim 27, wherein the electrostatic chuck is a bipolar electrostatic chuck.

29. The material bonding apparatus according to claim 21 or 22, wherein the first material is a substrate located upstream in the direction of gravity, and the second material is a substrate located downstream in the direction of gravity.

30. The material joining apparatus according to claim 21 or 22, wherein one of the materials of the first material or the second material to be joined together is SiC and the other is Si, or where one of the materials of the first material or the second material to be joined together is sapphire and the other is SiC.

31. A semiconductor wafer bonding apparatus that applies high-frequency power supplies of mutually different frequencies to a first semiconductor wafer and a second semiconductor wafer to polarize ions on the respective surfaces of the first semiconductor wafer and the second semiconductor wafer, and bonds the first semiconductor wafer and the second semiconductor wafer by the movement of the ions on the surfaces of the first semiconductor wafer and the second semiconductor wafer, wherein In a single chamber, under a vacuum environment and with the plasma lit, in an atmosphere supplied with a hydrogen-containing processing gas, the oxide film formed on the electrode portions of the first and second semiconductor wafers is reduced and removed, while the surface of the non-electrode portions of the first and second semiconductor wafers is activated to leave the oxide film intact. A semiconductor wafer bonding apparatus for bonding a first semiconductor wafer and a second semiconductor wafer in a vacuum environment with the plasma lit, or in a vacuum environment with the plasma immediately after it has been turned off, such that the electrode portion of the first semiconductor wafer and the electrode portion of the second semiconductor wafer, and the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, are in contact with each other.

32. The semiconductor wafer bonding apparatus according to claim 31, wherein oxygen atoms are pulled away from the oxide film formed on the electrode portions of the first semiconductor wafer and the second semiconductor wafer, exposing the metal, or the surfaces of the electrode portions of the first semiconductor wafer and the second semiconductor wafer are struck by plasma ions, removing the oxide film and exposing the activated metal, thereby pulling oxygen atoms away from the surfaces of the non-electrode portions of the first semiconductor wafer and the second semiconductor wafer.

33. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the non-electrode portion of the first semiconductor wafer and the non-electrode portion of the second semiconductor wafer, which are bonded together, function as an adhesive layer.

34. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the non-electrode portion is an insulating film.

35. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the processing gas contains nitrogen.

36. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the plasma is a VUV plasma.

37. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the first semiconductor wafer and the second semiconductor wafer are held by an electrostatic chuck as a parallel planar plasma electrode.

38. The semiconductor wafer bonding apparatus according to claim 37, wherein the electrostatic chuck is a bipolar electrostatic chuck.

39. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein the first semiconductor wafer is a substrate located upstream in the direction of gravity, and the second semiconductor wafer is a substrate located downstream in the direction of gravity.

40. The semiconductor wafer bonding apparatus according to claim 31 or 32, wherein one of the materials of the first semiconductor wafer or the second semiconductor wafer to be bonded to each other is SiC and the other is Si, or where one of the materials of the first semiconductor wafer or the second semiconductor wafer to be bonded to each other is sapphire and the other is SiC.

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