Indication device
By incorporating a high-purity oxide semiconductor layer in transistors, the liquid crystal display device minimizes image signal leakage and maintains stable display quality under varying temperatures, addressing the issues of power consumption and environmental susceptibility.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2024-03-18
- Publication Date
- 2026-06-01
AI Technical Summary
Liquid crystal display devices suffer from image signal leakage through transistors, leading to display degradation and inconsistent quality under varying environmental conditions, particularly at higher temperatures.
Employing a transistor with a channel formation region made of an oxide semiconductor layer, optimized for high purity and high bandgap, to reduce off-current and minimize image signal leakage, thereby maintaining stable display quality.
The use of an oxide semiconductor layer in transistors significantly reduces off-current, preventing display degradation and maintaining consistent image quality under temperature fluctuations, thus enhancing the energy efficiency and environmental robustness of liquid crystal displays.
Smart Images

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Abstract
Description
[Technical Field]
[0001] One embodiment of the present invention is a display configured with a field-effect transistor using an oxide semiconductor. Regarding the device. [Background technology]
[0002] Liquid crystal displays range from large display devices such as television receivers to small display devices such as mobile phones. It has become so widespread. Therefore, the development of liquid crystal display devices is focused on reducing costs or increasing added value. Development is underway with the aim of quantifying the value. In particular, in recent years, there has been growing concern for the global environment and low consumption The development of energy-efficient liquid crystal display devices is attracting attention.
[0003] As an example, it meets basic display quality requirements such as brightness and contrast, and also provides sufficient low-resolution display quality. As a method to reduce power consumption, a scanning period and a non-scanning period longer than the scanning period are set. A method for driving a display device is disclosed (see Patent Document 1). Specifically, all driving During the pause period in which the signal lines and data signal lines are deselected, all data signal lines are electrically connected to the data This is a method for driving a display device by disconnecting it from the signal driver and putting it into a high-impedance state. [Prior art documents] [Patent Documents]
[0004] [Patent Document 1] Japanese Patent Publication No. 2001-312253 [Overview of the project] [Problems that the invention aims to solve]
[0005] For example, pixels in a liquid crystal display device consist of a transistor that controls the input of an image signal, and the input... A liquid crystal element to which a voltage corresponding to the image signal is applied, and a device that holds the voltage applied to the liquid crystal element. It has a holding capacity. The liquid crystal element is a liquid crystal material whose orientation changes according to the applied voltage. The liquid crystal material is present, and the display of each pixel is controlled by controlling the orientation of the liquid crystal material.
[0006] In the liquid crystal display device disclosed in Patent Document 1, during the idle period, each pixel included in the pixel section No image signal is input to it. That is, the image signal is held within each pixel, The transistor that controls the signal input remains in the off state for an extended period. Therefore, The effect of image signal leakage through the transistor on the display of each pixel has become apparent. Specifically, the voltage applied to the liquid crystal element decreases, and the surface of the pixel having the liquid crystal element decreases. The deterioration (change) of the indicator becomes apparent.
[0007] Furthermore, the leakage of the image signal through the transistor depends on the operating temperature of the transistor. It fluctuates. Specifically, as the operating temperature rises, the image signal leakage through the transistor increases. Therefore, the liquid crystal display device disclosed in Patent Document 1 is suitable for use in rooms with large environmental fluctuations. It is difficult to maintain consistent display quality when used outdoors.
[0008] Therefore, one aspect of the present invention aims to reduce the power consumption of a liquid crystal display device and to prevent display degradation (display One of the challenges is to suppress the deterioration of display quality. In addition, one aspect of the present invention relates to temperature, etc. To provide a liquid crystal display device in which degradation of display quality due to external factors is suppressed. This will be one of the challenges. [Means for solving the problem]
[0009] One aspect of the present invention is to apply a transistor provided in each pixel, in which a channel formation region is formed of an oxide semiconductor layer, to solve the above problems. That is, it is intended to solve the above problems by applying a transistor formed of an oxide semiconductor layer. The oxide semiconductor layer is preferably an oxide semiconductor layer with impurities (such as hydrogen or water) serving as electron donors (donors) removed as much as possible to achieve high purity. The transistor using the oxide semiconductor layer as a channel formation region can reduce the off-current to less than 10 zA / μm per channel width of 1 μm at room temperature and less than 100 zA / μm at 85 °C, reducing it to an extremely low level. That is why it can be reduced to an extremely low level. That is why it can be reduced to an extremely low level. That is why it can be reduced to an extremely low level.
[0010] The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced. The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced. The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced. The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced. The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced. The oxide semiconductor layer has a bandgap of 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. In addition, by achieving high purity, the conductivity type of the oxide semiconductor layer approaches the intrinsic type. Therefore, generation of carriers due to thermal excitation can be suppressed in the oxide semiconductor layer. As a result, an increase in the off-current associated with an increase in the operating temperature of the transistor formed with a channel formation region constituted by the oxide semiconductor layer can be reduced.
[0011] As one aspect of a transistor using an oxide semiconductor, in addition to the above-described oxide semiconductor layer, a transistor using a metal nitride for forming a part of the source electrode and the drain electrode is used. The gate electrode of the transistor may be provided below (substrate side) or above (opposite side to the substrate side) or on both sides of the oxide semiconductor layer via an insulating layer. In addition, as characteristics of the transistor, not only the off-state characteristics but also the on-state characteristics, the maximum value of the field-effect mobility is 5 cm² / V·sec or more, preferably 10 cm² / V·sec or more. As one aspect of a transistor using an oxide semiconductor, in addition to the above-described oxide semiconductor layer, a transistor using a metal nitride for forming a part of the source electrode and the drain electrode is used. The gate electrode of the transistor may be provided below (substrate side) or above (opposite side to the substrate side) or on both sides of the oxide semiconductor layer via an insulating layer. In addition, as characteristics of the transistor, not only the off-state characteristics but also the on-state characteristics, the maximum value of the field-effect mobility is 5 cm² / V·sec or more, preferably 10 cm² / V·sec or more. As one aspect of a transistor using an oxide semiconductor, in addition to the above-described oxide semiconductor layer, a transistor using a metal nitride for forming a part of the source electrode and the drain electrode is used. The gate electrode of the transistor may be provided below (substrate side) or above (opposite side to the substrate side) or on both sides of the oxide semiconductor layer via an insulating layer. In addition, as characteristics of the transistor, not only the off-state characteristics but also the on-state characteristics, the maximum value of the field-effect mobility is 5 cm² / V·sec or more, preferably 10 cm² / V·sec or more. As one aspect of a transistor using an oxide semiconductor, in addition to the above-described oxide semiconductor layer, a transistor using a metal nitride for forming a part of the source electrode and the drain electrode is used. The gate electrode of the transistor may be provided below (substrate side) or above (opposite side to the substrate side) or on both sides of the oxide semiconductor layer via an insulating layer. In addition, as characteristics of the transistor, not only the off-state characteristics but also the on-state characteristics, the maximum value of the field-effect mobility is 5 cm² / V·sec or more, preferably 10 cm² / V·sec or more. As one aspect of a transistor using an oxide semiconductor, in addition to the above-described oxide semiconductor layer, a transistor using a metal nitride for forming a part of the source electrode and the drain electrode is used. The gate electrode of the transistor may be provided below (substrate side) or above (opposite side to the substrate side) or on both sides of the oxide semiconductor layer via an insulating layer. In addition, as characteristics of the transistor, not only the off-state characteristics but also the on-state characteristics, the maximum value of the field-effect mobility is 5 cm² / V·sec or more, preferably 10 cm² / V·sec or more. 2 / V·sec or more, preferably 10 cm² / V·sec or more.2 / Vsec~150cm 2 Use the one from / Vsec It is possible to write at high speed even when the pixel density is increased by speeding up the operation of transistors. This is to enable functions such as loading.
[0012] One embodiment of the present invention is such that the oxide semiconductor layer is superimposed on the gate electrode via the gate insulating layer. A transistor is provided, and liquid crystal is connected to the source or drain side of the transistor. A driving pixel electrode, a counter electrode positioned opposite the pixel electrode, and an opposing electrode to the pixel electrode A pixel having one or more units, each having a liquid crystal layer between an electrode and a matrix It has pixel units arranged in a grid pattern and a drive circuit unit that drives the pixel units to display an image on the screen. It is a display device equipped with a display panel. The drive circuit section then sequentially drives the selected pixels. When writing the next image signal and displaying the image on the screen, and also when displaying the same image on the screen: This stops the operation of writing the image signal and turns off the transistor before writing to the screen. A function is provided to retain the image as it is. Such a function is provided by the above transistor This is achieved by using [this method].
[0013] One embodiment of the present invention is such that the oxide semiconductor layer is superimposed on the gate electrode via the gate insulating layer. A transistor is provided, and liquid crystal is connected to the source or drain side of the transistor. A driving pixel electrode, a counter electrode positioned opposite the pixel electrode, and an opposing electrode to the pixel electrode A pixel having one or more units, each having a liquid crystal layer between an electrode and a matrix It has pixel units arranged in a grid pattern and a drive circuit unit that drives the pixel units to display an image on the screen. This is a display device equipped with a display panel. The drive circuit sequentially displays an image to the selected pixel. There are two operating modes: one that writes a signal and displays an image on the screen, and another that displays the same image on the screen. When displaying the image, the process of writing the image signal is stopped and the image written to the screen is then... A function is provided to select between an operating mode that keeps the value as is and an operating mode that allows the user to select the status. Such a function is provided by the above-mentioned Tra This is achieved by using a generator. [Effects of the Invention]
[0014] A liquid crystal display device according to one aspect of the present invention is provided with a channel-type transistor in each pixel. A transistor is applied in which the constituent region is composed of an oxide semiconductor layer. By increasing the purity of the layer, the off-current value of the transistor at room temperature can be reduced by a channel width of 1 μm. It is possible to achieve less than 10 zA / μm per m and less than 100 zA / μm at 85°C. Therefore, it is possible to reduce the leakage of image signals through the transistor. In the case where the frequency of writing image signals to the pixel having the transistor is reduced This can suppress the deterioration (change) of the display. As a result, the power consumption of the liquid crystal display device is reduced. This makes it possible to reduce the amount of display degradation (decrease in display quality).
[0015] Furthermore, pixels using transistors with extremely low off-currents are in a certain state (when the image signal is written) This allows the display of still images to maintain a stable state. It can perform the operation. In that case, the transistor will turn off as the operating temperature rises. Because the increase in flow rate is extremely small, external factors such as temperature do not affect the image signal at that pixel. The impact on the system can be reduced. In other words, the liquid crystal display device is less susceptible to large environmental fluctuations. When displaying a still image while maintaining the state in which the image signal has been written, such as in the outdoors. Furthermore, it is possible to suppress the deterioration of the display (decrease in display quality). [Brief explanation of the drawing]
[0016] [Figure 1] A block diagram illustrating the various components of the liquid crystal display device according to Embodiment 1. [Figure 2] A block diagram illustrating the various components of the liquid crystal display device according to Embodiment 1. [Figure 3] A diagram illustrating the drive circuit and pixel configuration of a liquid crystal display device according to Embodiment 1. [Figure 4] A timing chart illustrating the operation of the liquid crystal display device according to Embodiment 1. [Figure 5] A timing chart illustrating the operation of the display control circuit of the liquid crystal display device according to Embodiment 1. [Figure 6] A schematic diagram showing the frequency of writing image signals during periods when video is displayed and when still images are displayed. [Figure 7] A diagram illustrating the configuration of a television receiver according to Embodiment 2. [Figure 8] A diagram illustrating the configuration of the monitor according to Embodiment 2. [Figure 9] A diagram illustrating an example of a backlight configuration for a liquid crystal display device. [Figure 10] A diagram illustrating an example of a backlight configuration for a liquid crystal display device. [Figure 11] A diagram illustrating an example of a transistor applicable to liquid crystal display devices. [Figure 12] A diagram illustrating an example of a transistor containing an oxide semiconductor layer and a method for fabricating it. [Figure 13] A graph showing an example of the Vg-Id characteristics of a transistor fabricated from an oxide semiconductor. [Figure 14]A graph illustrating the off-state characteristics of the Vg-Id properties of a transistor fabricated from an oxide semiconductor. [Figure 15] A graph showing the relationship between source-drain voltage V and off-current I. [Figure 16] A diagram illustrating an example of an e-book according to the present invention. [Figure 17] A diagram illustrating an example of a computer according to the present invention. [Figure 18] A plan view showing an example of a pixel in a liquid crystal display device. [Figure 19] A cross-sectional view showing an example of a pixel in a liquid crystal display device. [Modes for carrying out the invention]
[0017] Embodiments of the invention will be described below with reference to the drawings. However, the invention disclosed herein The invention is not limited to the following description, and without departing from the spirit and scope of the invention, it may take any form. It will be easily understood by those skilled in the art that the state and details can be changed in various ways. Therefore The inventions disclosed herein shall be construed as being limited to the embodiments described below. No.
[0018] When describing embodiments with reference to the drawings, different reference numerals may be used to indicate the same components. It may be used in common across drawings. Note that the components shown in the drawings, i.e., layers and The thickness and width of the regions, their relative positional relationships, etc., are described in the embodiments for clarity. It may be presented in an exaggerated manner.
[0019] (Embodiment 1) In this embodiment, the liquid crystal display device of the present invention and a liquid crystal display device that can achieve low power consumption are provided. One form of the operation method will be explained using Figures 1 to 6.
[0020] The components of the liquid crystal display device 100 illustrated in this embodiment are shown in the block diagram of Figure 1. The display device 100 includes an image processing circuit 110, a power supply 116, a display control circuit 113, and a display panel. It has 120. In the case of a transmissive liquid crystal display device or a semi-transmissive liquid crystal display device, it also has a light source and A backlight section 130 is provided.
[0021] The liquid crystal display device 100 receives an image signal (image signal data) from a connected external device. It is defined as follows: Power supply potential (high power supply potential Vdd, low power supply potential Vss, and common potential Vco m) is supplied by turning on the power supply 116 of the liquid crystal display and starting the power supply. The control signals (start pulse SP and clock signal CK) are then sent to the display control circuit 113. Therefore, it is supplied.
[0022] Note that the high power supply potential Vdd is a potential higher than the reference potential, and the low power supply potential Vss is This refers to a potential below the reference potential. Note that both the high power supply potential Vdd and the low power supply potential Vss are... It is desirable that the potential is sufficient for the transistor to operate. Note that the high power supply potential Vdd and The low power supply potential Vss is sometimes collectively referred to as the power supply voltage.
[0023] The common potential Vcom is a fixed potential that serves as a reference for the potential of the image signal supplied to the pixel electrode. That would suffice; for example, it could be the ground potential.
[0024] Image signal data is driven by dot inversion, source line inversion, gate line inversion, The system is configured to invert the frame appropriately in accordance with frame inversion drive and other factors before supplying it to the liquid crystal display device 100. That's fine. Also, if the image signal is an analog signal, it can be converted to digital via an A / D converter, etc. The signal can be converted to a barrel signal and supplied to the liquid crystal display device 100.
[0025] In this embodiment, the common electrode 128 and one electrode of the capacitive element 210 are connected to the power supply 116. A common potential Vcom, which is a fixed potential, is provided via the display control circuit 113.
[0026] The display control circuit 113 outputs a display panel image signal (Data) to the display panel 120, as well as control Your signals (specifically, the supply of control signals such as the start pulse SP and the clock signal CK) (A signal to control the switching between stopping and starting), power supply potential (high power supply potential Vdd, low power supply potential V) This is a circuit that supplies ss and the common potential (Vcom).
[0027] The image processing circuit 110 analyzes, calculates, and processes the input image signal (image signal data). The processed image signal is output to the display control circuit 113 along with a control signal.
[0028] Specifically, the image processing circuit 110 analyzes the input image signal Data to determine whether it is a video or a still image. It determines whether the image is still and outputs a control signal, including the determination result, to the display control circuit 113. The image processing circuit 110 processes one frame of an image signal Data, which includes a video or still image. The still image is extracted and output to the display control circuit 113 along with a control signal indicating that it is a still image. Furthermore, the image processing circuit 110 combines the input image signal Data with the control signal described above. The output is sent to the display control circuit 113. Note that the above-mentioned functions are provided by the image processing circuit 110. This is just one example; various image processing functions can be selected and applied depending on the intended use of the display device. .
[0029] Furthermore, the image signal converted to a digital signal is then subjected to calculations (for example, detecting the difference in the image signal). Because it is easy, when the input image signal (image signal data) is an analog signal The image processing circuit 110 includes an A / D converter and the like.
[0030] The display panel 120 sandwiches the liquid crystal element 215 between a pair of substrates (a first substrate and a second substrate). The device has the following configuration, and the first substrate is provided with a drive circuit section 121 and a pixel section 122. The second substrate has a common connection part (also called a common contact) and a common electrode 128 (como A common connection part is provided (also called a counter electrode). The common connection part is connected to the first substrate. It electrically connects to the second substrate, and the common connection part is provided on the first substrate. It's okay to be there.
[0031] The pixel section 122 has multiple gate lines 124 (scan lines) and source lines 125 (signal lines). It is provided, and multiple pixels 123 are surrounded by gate lines 124 and source lines 125. It is arranged in a trix shape. In the display panel illustrated in this embodiment, The gate wire 124 extends from the gate wire side drive circuit 121A, and the source wire 125 is the source wire side drive It extends from the drive circuit 121B.
[0032] Furthermore, the pixel 123 has a transistor 214 as a switching element, and the transistor 214 It has a capacitive element 210 and a liquid crystal element 215 connected to it.
[0033] The liquid crystal element 215 is an element that controls the transmission or non-transmission of light by the optical modulation effect of liquid crystals. Yes. The optical modulation effect of liquid crystals is controlled by the electric field applied to the liquid crystal. The field direction varies depending on the liquid crystal material, driving method, and electrode structure, and can be selected as appropriate. For example, when using a driving method that applies an electric field in the thickness direction of the liquid crystal (the so-called vertical direction), The structure is such that the first substrate has pixel electrodes and the second substrate has common electrodes, so as to sandwich the crystal. This can be done. Also, a driving method that applies an electric field to the liquid crystal in the direction within the substrate plane (so-called transverse electric field). When using this method, the structure should be such that the pixel electrodes and common electrodes are placed on the same plane as the liquid crystal. Furthermore, the pixel electrodes and common electrodes may have shapes with diverse aperture patterns. In its form, if it is an element that controls the transmission or non-transmission of light by optical modulation, The liquid crystal material, driving method, and electrode structure are not particularly limited.
[0034] Transistor 214 is connected to one of the multiple gate lines 124 provided in the pixel section 122. A gate electrode is connected, and either the source electrode or the drain electrode is connected to a plurality of source wires 125. One of them is connected, and the other of the source electrode or drain electrode is one of the capacitive elements 210 It is connected to the electrode and one of the electrodes (pixel electrodes) of the liquid crystal element 215.
[0035] It is preferable to use a transistor with reduced off-current for transistor 214. When transistor 214 is in the off state, the off current is reduced and connected to transistor 214. The charge stored in the liquid crystal element 215 and the capacitive element 210 is transferred via the transistor 214. This makes leakage less likely, and the state written before transistor 214 turns off is then transmitted to the next signal. It can be held stably until it is written. Therefore, the off-current of transistor 2 is reduced. It is also possible to construct pixels 123 without using the capacitive element 210 connected to 14. .
[0036] With this configuration, the capacitive element 210 maintains the voltage applied to the liquid crystal element 215. This is possible. In addition, the electrodes of the capacitive element 210 are configured to be connected to a separately provided capacitance line. That's good too.
[0037] The drive circuit section 121 includes a gate line side drive circuit 121A and a source line side drive circuit 121B. The gate line drive circuit 121A and the source line drive circuit 121B have multiple pixels. This is a drive circuit for driving the pixel section 122, and a shift register circuit (shift register and It also has (also known as).
[0038] Furthermore, the gate line side drive circuit 121A and the source line side drive circuit 121B are located in the pixel section 122 It may be formed on the same substrate, or it may be formed on a different substrate.
[0039] The drive circuit section 121 has a high power supply potential Vdd controlled by the display control circuit 113. Low power supply potential Vss, start pulse SP, clock signal CK, and image signal Data are supplied. It can be done.
[0040] Terminal 126 receives a predetermined signal (high power supply potential Vdd, low power supply) output by the display control circuit 113. Potential Vss, start pulse SP, clock signal CK, image signal Data, common potential Vc This is an input terminal that supplies power (such as OM) to the drive circuit unit 121.
[0041] The common electrode 128 provides a common potential Vcom controlled by the display control circuit 113. The wires are electrically connected at the common connection point.
[0042] A specific example of a common connection is a conductive particle in which an insulating sphere is coated with a thin metal film. By using this, an electrical connection can be made between the common electrode 128 and the common potential line. The common connection points may be configured to be provided in multiple locations within the display panel 120.
[0043] Furthermore, the liquid crystal display device may have a photometering circuit. A liquid crystal display device equipped with a photometering circuit is The brightness of the environment in which the liquid crystal display device is placed can be detected. As a result, the photometering circuit is connected. The display control circuit 113 controls the backlight and other elements according to the signal input from the photometering circuit. It is possible to control the driving method of light sources such as idlights.
[0044] The backlight section 130 includes a backlight control circuit 131 and a backlight 132. The backlight 132 can be selected and combined according to the application of the liquid crystal display device 100. The liquid crystal display device 100 has an illumination means for illumination, and the light source of the illumination means is a light-emitting diode LEDs and the like can be used. The backlight 132 can, for example, use white light-emitting elements. A sub-element (for example, an LED) can be placed. The backlight control circuit 131 has a display control The backlight signal and power potential are supplied from circuit 113 to control the backlight. .
[0045] Furthermore, color display is possible by using a color filter. Other optical films (polarizing films, phase difference films, anti-reflective films, etc.) are also used. This is possible. This is used in transmissive or semi-transmissive liquid crystal displays. Light sources such as kerites can be used according to the application of the liquid crystal display device 100, and cold cathode tubes and light-emitting diodes can be used. Diodes (LEDs), etc., can be used. Also, multiple LED light sources, or multiple A surface light source may be constructed using an electroluminescent (EL) light source or the like. Furthermore, you may use three or more types of LEDs, or you may use white-emitting LEDs. A time-division multiplexer is used to display colors using RGB light-emitting diodes and other components. When using a color mixing method (field sequential method), do not use a color filter. .
[0046] Next, the driving method for the liquid crystal display device illustrated in Figure 1 will be explained using Figures 2 to 6. The driving method for the liquid crystal display device described in this embodiment is determined according to the characteristics of the image to be displayed. This is a display method that changes the refresh rate (or frequency) of the display panel. Specifically, it is a continuous... When displaying images (videos) where the image signals of each frame are different, the image signal for each frame must be different. The display mode used for writing is used. On the other hand, if the image signals of consecutive frames are the same image (static When displaying a still image, new image signals are written during the period in which the same image is continuously displayed. Alternatively, the frequency of writing is made extremely low, and furthermore, the pixel electrodes that apply voltage to the liquid crystal elements... The voltage applied to the liquid crystal element is maintained by making the potential of the common electrode a floating state. This displays a still image without supplying any additional electrical potential.
[0047] The liquid crystal display combines video and still images to display on the screen. The video consists of multiple frames. By rapidly switching between multiple different images that are time-divided into segments, the human eye perceives them as moving images. This refers to images that are recognized. Specifically, images are switched more than 60 times per second (60 frames). By doing so, the flicker is reduced to the human eye and it is perceived as a video. On the other hand, still images Unlike videos and partial videos, it rapidly cuts multiple images that have been time-divided into multiple frame periods. Even when switching and running, the continuous frame period, for example, frame n and (n+1) This refers to an image that does not change from frame to frame.
[0048] The liquid crystal display device according to the present invention can display moving images and still images. At that time, there are two different display modes: video display mode and still image display mode. It can be used. In this specification, when the image displayed in still image display mode is still Also called an image.
[0049] Next, the various components of the liquid crystal display device 100 of this embodiment will be described using the block diagram in Figure 2. The liquid crystal display device 100 is a transmissive type that displays images by utilizing the transmission and non-transmission of light at the pixels. An example of a liquid crystal display device, or a semi-transmissive liquid crystal display device, including an image processing circuit 110 and a power supply 116 It has a display panel 120 and a backlight unit 130. In this case, since ambient light is used as the light source, the backlight unit 130 can be omitted.
[0050] The liquid crystal display device 100 receives an image signal (image signal data) from a connected external device. It is defined as follows: Power supply potential (high power supply potential Vdd, low power supply potential Vss, and common potential Vco m) is supplied by turning on the power supply 116 of the liquid crystal display and starting the power supply. The control signals (start pulse SP and clock signal CK) are then sent to the display control circuit 113. Therefore, it is supplied.
[0051] Next, we will discuss the configuration of the image processing circuit 110 and the procedure by which the image processing circuit 110 processes signals. An example will be shown and explained in Figure 2. Note that the image processing circuit 110 shown in Figure 2 is the form used in this implementation. This is one aspect of the configuration, and this embodiment is not limited to this configuration.
[0052] The image processing circuit 110 illustrated in Figure 2 analyzes continuously input image signals and distinguishes between moving and static images. It identifies still images. It also identifies when the input image signal (image signal data) is converted from a video to a still image. When performing this operation, a still image is extracted and displayed along with a control signal indicating that it is a still image. Output to channel 113. Also, the input image signal (image signal data) changes from a still image to a video. When transitioning to this, the image signal, including video, is displayed along with a control signal indicating that it is video. Output to control circuit 113.
[0053] The image processing circuit 110 includes a memory circuit 111, a comparison circuit 112, and a selection circuit 115. The image processing circuit 110 converts the input digital image signal Data into a display panel image signal It generates a backlight signal. The display panel image signal controls the display panel 120. The image signal is the signal used to control the backlight unit 130, while the backlight signal is the signal used to control the backlight unit 130.
[0054] The memory circuit 111 stores multiple frame data for image signals related to multiple frames. It has a mori. The number of frame memories that the memory circuit 111 has is not particularly limited. Any element capable of storing image signals related to multiple frames will suffice. For example, DRAM (Dynamic Random Access Memory) , memory elements such as SRAM (Static Random Access Memory) It can be constructed using [this method].
[0055] The frame memory can be configured to store the image signal for each frame period. There are no particular limitations on the number of memory slots. Also, the image signal in the frame memory is... The data is selectively read out by the comparison circuit 112 and the display control circuit 113. The frame memory 111b inside conceptually illustrates the memory area for one frame. ru.
[0056] The comparison circuit 112 selects image signals from consecutive frame periods stored in the memory circuit 111. The image signal is read out sequentially, and a pixel-by-pixel comparison is performed between consecutive frames of the image signal to detect the difference. This is the circuit for outputting the signal.
[0057] In this embodiment, the display control cycle is determined by whether or not there is a difference in the image signals between consecutive frames. The operation of path 113 and selection circuit 115 is determined. The comparison circuit 112 determines the operation between frames. If a difference is detected in any pixel (if a difference "exists"), the comparison circuit 112 checks if the image signal is static. The system determines that the image is not a still image and identifies the consecutive frame period in which differences were detected as a video.
[0058] On the other hand, if no difference is detected in all pixels by comparing the image signals in the comparison circuit 112 (If there is "no" difference), the consecutive frame period in which no difference was detected is a still image. It is determined that... In other words, the comparison circuit 112 determines the difference between the image signals over consecutive frame periods. By detecting the absence of a signal, it determines whether it is an image signal for displaying a video or a still image. This determines whether the signal is an image signal intended for display.
[0059] The criterion for detecting a "difference" in this comparison is that the magnitude of the difference must be at a certain level. You can also configure it so that when it exceeds a certain threshold, it is considered to have detected a difference. The difference detected by circuit 112 should be determined by the absolute value of the difference.
[0060] Furthermore, in this embodiment, the comparison circuit 112 provided inside the liquid crystal display device 100 By detecting the difference in image signals over consecutive frame periods, the image can be determined to be a video or a still image. The configuration for determining whether it is a video or a still image has been shown, but if it is a video or a still image from the outside The configuration may also include supplying a signal indicating whether or not it is working.
[0061] The selection circuit 115 is configured to include, for example, multiple switches formed by transistors. When the comparison circuit 112 detects a difference between consecutive frames, that is, when the image is a video... The display control circuit 113 selects the video image signal from the frame memory in the memory circuit 111. Output to [this location].
[0062] Furthermore, if the comparison circuit 112 does not detect a difference between consecutive frames, the selection circuit 115 will be used. In other words, when the image is a still image, the display control circuit 113 retrieves the frame from the memory in the memory circuit 111. The image signal is not output. The image signal is not output from the frame memory to the display control circuit 113. This configuration allows for a reduction in the power consumption of the liquid crystal display device.
[0063] In addition, in the liquid crystal display device of this embodiment, the comparison circuit 112 determines that the image is a still image. The operation performed is in still image display mode, and the comparison circuit 112 performs the operation when it determines that the image is a video. This will switch to video display mode.
[0064] The display control circuit 113 displays the image signal selected by the selection circuit 115 to the display panel 120, and the sequence of images. The supply of control signals (specifically, the start pulse SP and the clock signal CK) (or a signal to control the switching of stopping), power supply potential (high power supply potential Vdd, low power supply potential The system supplies a voltage Vss and a common potential Vcom to the backlight unit 130 for backlight control. The signal (specifically, the backlight control circuit 131 controls the turning the backlight on and off) This is a circuit that supplies signals for [a specific purpose].
[0065] Furthermore, the image processing circuit illustrated in this embodiment has a display mode switching function. This is also acceptable. The display mode switching function can be controlled manually or via an external device by the user of the LCD display device. By using the device to select the operating mode of the liquid crystal display, you can choose between video display mode or still image display mode. This is a function that switches the display mode.
[0066] The selection circuit 115 displays an image signal according to the signal input from the display mode switching circuit. It can also output to control circuit 113.
[0067] For example, when operating in still image display mode, the display mode switching circuit selects circuit 1 When a mode switching signal is input to 15, the comparison circuit 112 performs a comparison over a continuous frame period. Even if the difference in the image signal is not detected, the selection circuit 115 will still receive the input image signal A mode can be executed in which numbers are output sequentially to the display control circuit 113, i.e., a video display mode. Furthermore, when operating in video display mode, the selection circuit 115 from the display mode switching circuit When a mode switching signal is input, the comparison circuit 112 analyzes the image over a continuous frame period. Even when detecting the difference in the image signal, the selection circuit 115 selects one frame of image It is possible to execute a mode that outputs only the image signal, i.e., a still image display mode. In this embodiment, the liquid crystal display device displays one frame from a video as a still image.
[0068] Furthermore, if the liquid crystal display has a photometering circuit, the brightness of the environment detected by the photometering circuit If it is discovered that the liquid crystal display is being used in a dimly lit environment, the display control circuit 113 will The backlight 132 is controlled to increase its light intensity to ensure good visibility of the display screen. Conversely, liquid crystal displays are used under extremely bright ambient light (for example, in direct sunlight outdoors). When it is determined that this is the case, the display control circuit 113 reduces the light intensity of the backlight 132. This controls the power consumption of the backlight 132 to reduce its power consumption.
[0069] In this embodiment, the display panel 120 has a switching element 127 in addition to the pixel section 122. It has. In this embodiment, the display panel 120 has a first substrate and a second substrate, and the first The substrate is provided with a drive circuit section 121, a pixel section 122, and a switching element 127. Yes, they are.
[0070] Furthermore, the pixel 123 has a transistor 214 as a switching element, and the transistor 214 It has a capacitive element 210 and a liquid crystal element 215 connected to it (see Figure 3).
[0071] It is preferable to use a transistor with reduced off-current for transistor 214. When transistor 214 is in the off state, the off current is reduced and connected to transistor 214. The charge stored in the liquid crystal element 215 and the capacitive element 210 is transferred via the transistor 214. This makes leakage less likely, and the state written before transistor 214 turns off is retained for a long period of time. It can be held.
[0072] In this embodiment, the liquid crystal is provided on a second substrate facing the pixel electrodes provided on the first substrate. It is controlled by a vertical electric field formed by the common electrode that is placed there.
[0073] Examples of liquid crystals applied to liquid crystal elements include nematic liquid crystals, cholesteric liquid crystals, and smeck liquid crystals. Titic liquid crystal, discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight Liquid crystal, polymer-dispersed liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain liquid crystal Examples include polymer liquid crystals and banana-shaped liquid crystals.
[0074] Another example of an LCD driving method is the TN (Twisted Nematic) mode. STN (Super Twisted Nematic) mode, OCB (Optica (Compensated Birefringence) mode, ECB (El (Ecologically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFL C (AntiFerroelectric Liquid Crystal) mode, P DLC (Polymer Dispersed Liquid Crystal) Mode PNLC (Polymer Network Liquid Crystal) mode This includes features such as guest host mode.
[0075] The switching element 127 changes to a common potential according to the control signal output by the display control circuit 113. Vcom is supplied to the common electrode 128. The switching element 127 is a transistor. The gate electrode and source electrode or drain electrode of the transistor can be used. One side is connected to the display control circuit 113, and one of the source electrode or drain electrode is connected to the terminal section 1 A common potential Vcom is supplied from the display control circuit 113 via 26, and the other is shared It should be connected to the conductive electrode 128. Note that the switching element 127 is connected to the drive circuit section 121 and The pixel portion 122 may be formed on the same substrate, or it may be formed on a different substrate. That's fine.
[0076] By using a transistor with reduced off-current as the switching element 127, This can suppress the phenomenon in which the voltage applied to both terminals of the liquid crystal element 215 decreases over time.
[0077] The common connection is the terminal connected to the source electrode or drain electrode of the switching element 127. The child and the common electrode 128 are electrically connected.
[0078] Source of a switching element 127 that uses a transistor, which is one form of a switching element. One of the electrodes or the drain electrode is connected to terminal 126B via a common connector, and the switch The source electrode or the other drain electrode of the chipping element 127 is connected to the transistor 214. The other electrode of the capacitive element 210, which is not connected, and the other electrode of the liquid crystal element 215 are connected. Furthermore, the gate electrode of the switching element 127 is connected to terminal 126A.
[0079] Next, the signal supplied to the pixels is shown in the equivalent circuit diagram of the liquid crystal display device in Figure 3, and in Figure 4. I will explain using the timing chart shown.
[0080] Figure 4 shows the clock signal GC supplied by the display control circuit 113 to the gate line drive circuit 121A. K and the start pulse GSP are shown. Also, the display control circuit 113 is the source line side drive circuit The clock signal SCK and start pulse SSP supplied to 121B are shown. To explain the timing of the clock signal output, Figure 4 shows the waveform of the clock signal as a simple rectangle. It is shown using a shape wave.
[0081] Also, Figure 4 shows the high power supply potential Vdd, the potential of source line 125 (the potential of the data line), The potentials of the pixel electrodes, terminal 126A, terminal 126B, and the common electrode are shown. vinegar.
[0082] In Figure 4, period 1401 corresponds to the period during which the image signal for displaying the video is written. During period 1401, the image signal and common potential are supplied to each pixel of the pixel unit 122 and the common electrode. It works in this way.
[0083] Furthermore, period 1402 corresponds to the period during which a still image is displayed. During period 1402, the pixel section 1 This will stop the image signal to each of the 22 pixels and the common potential to the common electrode. (See Figure 4) During period 1402, a configuration is shown in which signals are supplied to stop the operation of the drive circuit section. However, the image signal is written periodically according to the length of the period 1402 and the refresh rate. It is preferable to have a configuration that prevents degradation of still images by incorporating this feature.
[0084] First, let's explain the timing chart for period 1401. In period 1401, Cross As the clock signal GCK, a clock signal is constantly supplied, and as the start pulse GSP, a vertical A pulse corresponding to the synchronization frequency is supplied. Also, during period 1401, the clock signal SCK is supplied. A clock signal is constantly supplied, and the start pulse SSP is set to 1 gate selection period. A corresponding pulse is supplied.
[0085] Additionally, an image signal Data is supplied to each row's pixels via the source line 125, and the gate line 12 The potential of source line 125 is supplied to the pixel electrode according to the potential of 4.
[0086] Furthermore, the display control circuit 113 connects the switching element 127 to terminal 126A of the switching element A potential is supplied to make terminal 127 conductive, and a common potential is supplied to the common electrode via terminal 126B. do.
[0087] On the other hand, period 1402 is the period during which still images are displayed. Next, the tie in period 1402 Let's explain the ming chart. In period 1402, the clock signal GCK and the start pulse G SP, clock signal SCK, and start pulse SSP all stop. Also, period 14 In step 02, the image signal Data that was being supplied to source line 125 stops. During period 1402, when both the GCK and start pulse GSP are stopped, transistor 21 4 becomes non-conductive, and the potential of the pixel electrode becomes floating.
[0088] Furthermore, the display control circuit 113 connects the switching element 127 to terminal 126A of the switching element A potential is supplied that causes 127 to become non-conductive, and the potential of the common electrode is set to a floating state.
[0089] During period 1402, the potentials of the electrodes at both ends of the liquid crystal element 215, i.e., the pixel electrodes and the common electrode, are By creating a floating state, it is possible to display still images without supplying any additional electrical potential.
[0090] Furthermore, the gate line drive circuit 121A and the source line drive circuit 121B are supplied with crossovers. By stopping the C signal and the start pulse, power consumption can be reduced.
[0091] In particular, the transistor 214 and the switching element 127 have reduced off-currents. The use of a sta results in a phenomenon where the voltage applied to both terminals of the liquid crystal element 215 decreases over time. This can suppress it.
[0092] Next, the period during which the video switches to a still image (period 1403 in Figure 4), and the period from still image to video. The operation of the display control circuit during the transition period (period 1404 in Figure 4) is shown in Figure 5(A). This will be explained using (B). Figures 5(A) and (B) show the high power supply potential output by the display control circuit. Vdd, clock signal (GCK here), start pulse signal (GSP here), and This shows the potential at terminal 126A.
[0093] Figure 5(A) shows the operation of the display control circuit during the period 1403 when switching from video to still image. The control circuit stops the start pulse GSP (E1 in Figure 5(A), the first step). After the pulse output reaches the final stage of the shift register, multiple clock signals GCK are stopped. Stop (E2 in Figure 5(A), the second step). Next, set the power supply voltage to the high power supply potential Vdd. Next, set the power supply potential to a low level Vss (E3 in Figure 5(A), the third step). Then, terminal 126 Set the potential of A to the potential at which the switching element 127 becomes non-conductive (E4 in Figure 5(A)). (The fourth step).
[0094] By following the above procedure, the drive circuit unit 121 can be operated without causing a malfunction of the drive circuit unit 12 The signal supplied to 1 can be stopped. Malfunctions when switching from video to still images produce noise. Since noise is retained as a still image, the LCD display is equipped with a display control circuit that minimizes malfunctions. The display device can show still images with minimal image degradation.
[0095] Next, Figure 5(B) shows the operation of the display control circuit during the period 1404 when the image switches from a still image to a video. The display control circuit sets the potential of terminal 126A to a potential that causes the switching element 127 to conduct. (S1 in Figure 5(B), the first step). Next, the power supply voltage is set to the low power supply potential Vss. Then, the power supply potential is raised to Vdd (S2 in Figure 5(B), the second step). Next, the clock signal First, a high potential is applied as the GCK signal, and then multiple GCK clock signals are supplied (Figure 5). (B) S3, the third step). Next, supply the start pulse signal GSP (Figure 5( B) S4, the fourth step).
[0096] By following the above procedure, the drive circuit unit 121 can be operated without causing any malfunction of the drive circuit unit 121. The drive signal can be resumed. By returning the potential of each wire to its appropriate position in sequence during video display, errors can be corrected. The drive circuit can be driven without any external operation.
[0097] Furthermore, Figure 6 shows the period 601 during which a video is displayed and the period 602 during which a still image is displayed. The frequency of writing the image signal is schematically shown. In Figure 6, "W" represents the writing period of the image signal. This represents the period during which the image signal is retained, as shown in Figure 6. In the example, period 603 represents the duration of one frame, but it could be any other period.
[0098] Thus, in the configuration of the liquid crystal display device of this embodiment, the static display shown in period 602 The image signal of the picture is written in period 604, and the image signal written in period 604 is written in period 6 It is retained during other periods of 02.
[0099] The liquid crystal display device illustrated in this embodiment writes the image signal during the period when a still image is displayed. This reduces congestion frequency. As a result, it becomes possible to reduce power consumption when displaying still images. ru.
[0100] Furthermore, when displaying still images by overwriting the same image multiple times, the image transitions may not be visually apparent. When this happens, humans may experience eye strain. The liquid crystal display device of this embodiment displays images Because the frequency of signal writing is reduced, it also has the effect of reducing eye strain.
[0101] In particular, the liquid crystal display device of this embodiment uses transistors with reduced off-current for each pixel, and By applying this to a switching element with a common electrode, the voltage can be held by the holding capacitance. This allows for longer intervals between operations. As a result, the frequency of writing image signals is drastically reduced. This makes it possible to reduce power consumption when displaying still images and to reduce eye strain. It has a remarkable effect.
[0102] (Embodiment 2) In this embodiment, the electronic device is equipped with the liquid crystal display device described in Embodiment 1 above. Let's explain an example.
[0103] Figure 7(A) shows an external view of a television receiver, which is an electronic device. (A) shows a display module 7 made using the display panel described in Embodiment 1 above. The enclosure 700, which houses unit 01, contains a speaker 702, operation keys 703, and an external connection terminal 704. This shows a configuration that includes an illuminance sensor 705, etc.
[0104] The television receiver shown in Figure 7(A) can display not only video but also text information or still images. It is possible to display video in only a portion of the display area, while displaying still images in the remaining area. It is also possible to display still images, such as text, figures, symbols, photographs, patterns, or paintings. This includes combinations of these or combinations of these with colors.
[0105] Figure 7(B) shows a block diagram of the main components of a television receiver. The television receiver 710 shown includes a tuner 711, a digital demodulation circuit 712, and a video signal processing circuit. Path 713, audio signal processing circuit 714, display adjustment circuit 715, display control circuit 716, display panel Nell 717, gate line side drive circuit 718, source line side drive circuit 719, speaker 720, It has an image processing circuit 724.
[0106] Tuner 711 receives video and audio signals from antenna 721. Digital demodulation circuit 712 demodulates the signal from tuner 711 into digital video and audio signals. This is a circuit. The video signal processing circuit 713 converts the digital video signal into red, green, and blue colors. This is a circuit for performing processing such as converting to a corresponding color signal. The audio signal processing circuit 714 is The digital audio signal is converted into a signal that can be output as audio by speaker 720. This is a circuit for performing processes such as [specific processing]. The display adjustment circuit 715 controls the receiving station (receiving frequency) and sound. The control information for the quantity is received from the external input unit 722, and the tuner 711 or the audio signal processing circuit 714 This is a circuit for transmitting signals.
[0107] Also, the display control circuit 716, display panel 717, gate line side drive circuit 718, source line side The drive circuit 719 and the image processing circuit 724 are used for the display control described in Embodiment 1 above. Circuit 113, display panel 120, source line side drive circuit 121B, gate line side drive circuit 12 1A corresponds to the image processing circuit 110. That is, the dotted line portion 723 corresponds to the above embodiment 1. This configuration corresponds to the liquid crystal display device 100 described above. Furthermore, the display control circuit 716 and image processing... The function of the processing circuit 724 may also be combined with the video signal processing circuit 713 described above. Therefore, a configuration can be adopted that reduces the number of times the image signal is rewritten, It also has the effect of reducing flickering and decreasing eye strain.
[0108] Next, Figure 8(A) shows the model used for electronic devices, specifically personal computers. This shows the external appearance of a monitor (also called a PC monitor). In Figure 8(A), The display module 801, manufactured using the display panel described in Embodiment 1 above, is housed within the... The following describes a configuration in which the enclosed enclosure 800 has a speaker 802, an external connection terminal 803, etc. Figure 8(A) shows a windowed PC monitor to help understand that it is a PC monitor. This shows the display unit 804.
[0109] Figure 8(A) shows the configuration of a so-called desktop PC monitor. However, a PC monitor intended for use with a notebook personal computer may also be used. The display on a PC monitor can show not only videos, but also text, graphics, symbols, photographs, patterns, or pictures. This includes still images that combine these elements or combine them with colors.
[0110] Figure 8(B) shows a block diagram of the main components of a PC monitor. The PC monitor 810 shown includes a video signal processing circuit 813, an audio signal processing circuit 814, and a display control Circuit 816, display panel 817, gate line side drive circuit 818, source line side drive circuit 81 9. It has a speaker 820 and an image processing circuit 824.
[0111] The video signal processing circuit 813 processes the video signal from the external processing circuit 821, such as the CPU, into red, green, and blue. This is a circuit for performing processing such as converting to color signals corresponding to each color. (Audio signal processing circuit) 814 receives audio signals from external arithmetic circuits such as the CPU 821 and outputs them to the speaker 820 as sound. This is a circuit that performs processing such as converting the signal into an output signal. The path 813 and the audio signal processing circuit 814 are operated by an external operating means 822 such as a keyboard. The output signal is varied accordingly.
[0112] Also, the display control circuit 816, display panel 817, gate line side drive circuit 818, source line side The drive circuit 819 and the image processing circuit 824 are used for the display control described in Embodiment 1 above. Circuit 113, display panel 120, source line side drive circuit 121B, gate line side drive circuit 12 1A corresponds to the image processing circuit 110. That is, the dotted line portion 823 corresponds to the above embodiment 1. This configuration corresponds to the liquid crystal display device 100 described above. Furthermore, the display control circuit 816 and image processing... The function of the processing circuit 824 may also be combined with that of the video signal processing circuit 813 described above. Therefore, a configuration can be adopted that reduces the number of times the image signal is rewritten, It also has the effect of reducing flickering and decreasing eye strain.
[0113] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case.
[0114] (Embodiment 3) In this embodiment, a backlight that can be used in the liquid crystal display device disclosed herein Figures 9 and 10 illustrate an example of the configuration of the (backlight section, backlight unit). explain.
[0115] Figure 9(A) shows the backlight unit 5201, which is called an edge-lit type, and the display panel 52 An example of a liquid crystal display having 07 is shown. Edge-lit type refers to the backlight part This method involves placing a light source at the edge and emitting light from that light source across the entire light-emitting surface.
[0116] The backlight section 5201 includes a diffuser plate 5202 (also called a diffuser sheet), a light guide plate 5203, It consists of a reflector 5204, a lamp reflector 5205, and a light source 5206. The backlight section 5201 may also be configured to include a brightness-enhancing film or the like.
[0117] The light source 5206 has the function of emitting light as needed. For example, the light source 5206 is Cold Cathode Fluorescent Lamp (CCFL) Light-emitting diodes or EL elements are used.
[0118] Figure 9(B) shows a detailed configuration of the edge-lit backlight section. The descriptions of diffusers, light guides, and reflectors are omitted.
[0119] The backlight section 5201 shown in Figure 9(B) uses a light-emitting diode (LED) 52 as its light source. The configuration uses 23. For example, the light-emitting diode (LED) 5223 that emits white light is located They are arranged at fixed intervals. And the light from the light-emitting diode (LED) 5223 is efficiently... A lamp reflector 5222 is provided to reflect the light. When used in combination with the SHARU system for display, RGB light-emitting diodes are used as the light source. A configuration using (LEDs) is also possible.
[0120] Figure 9(C) shows a liquid crystal display device having a backlight unit called a direct-lit type and a liquid crystal panel. An example is shown. A direct-lit type is one in which the light source is placed directly below the light-emitting surface, causing the light from that light source to be emitted. This method radiates from the entire surface.
[0121] The backlight section 5290 consists of a diffuser plate 5291, a light shielding section 5292, and a lamp reflector 529 3. It consists of a light source 5294 and a liquid crystal panel 5295.
[0122] The light source 5294 has the function of emitting light as needed. For example, as the light source 5294 EL elements (e.g., organic electroluminescent elements) are cold cathode tubes, light-emitting diodes, or light-emitting elements. Minescence elements are used.
[0123] Furthermore, in the backlight section known as the direct-lit type, an EL element, which is a light-emitting element, is used as the light source. This allows for a thinner backlight section. An example of the thread section is shown in Figure 10(A).
[0124] The backlight section 5290 shown in Figure 10(A) consists of an EL element 1 provided on the substrate 1020. Includes 025. The EL element 1025 emits electricity between a pair of electrodes (anode 1001, cathode 1002). It has a structure in which an EL layer 1003 containing an optical region is sandwiched. A configuration may be used in which a substrate, film, protective film, etc., are provided to enclose the EL element 1025. .
[0125] In this embodiment, light from the EL layer 1003 that passes through the anode 1001 is irradiated onto the display panel. Since it has such a structure, as the anode 1001, a material that transmits light, for example, indium tin oxide (ITO) or the like can be used for the configuration. As the cathode 1002, a material that reflects light, for example, a material such as an aluminum film can be used for the configuration. At least one of the anode 1001 and the cathode 1 002 may have light transmittance.
[0126] Examples of the element structure of the EL element 1025 in FIG. 10(A) are shown in FIGS. 10(B) and (C).
[0127] The EL layer 1003 only needs to be formed including at least the light-emitting layer 1013, and it may have a laminated structure including functional layers other than the light-emitting layer 1 013. As functional layers other than the light-emitting layer 1013, substances with high hole injection property, substances with high hole transport property, substances with high electron transport property, substances with high electron injection property, layers containing substances with bipolarity (substances with high electron and hole transport properties), etc. can be used. Specifically, functional layers such as a hole injection layer 1011, a hole transport layer 1012, a light-emitting layer 101 3, an electron transport layer 1014, an electron injection layer 1015, etc. can be appropriately combined and used.
[0128] Next, the materials that can be used for the above-described EL element 1025 will be specifically described.
[0129] As the anode 1001, it is preferable to use a metal, an alloy, an electrically conductive compound, and a mixture thereof having a large work function (specifically, preferably 4.0 eV or more). Specifically speaking, for example, indium tin oxide (ITO: Indium Tin Oxid e), indium tin oxide containing silicon or silicon oxide, indium oxide - acid e Zinc oxide (IZO), tungsten oxide, and pyroxene oxide Examples include conductive metal oxides such as indium oxide containing lead.
[0130] These conductive metal oxide films are usually deposited by sputtering, but sol-gel methods and other methods are also used. It is acceptable to apply and manufacture it. For example, indium oxide-zinc oxide (IZO) is made from indium oxide Sputtering method using a target with 1-20 wt% zinc oxide added to cinnabar. It can be formed by [method]. Also, an oxide containing tungsten oxide and zinc oxide Dium contains 0.5-5 wt% tungsten oxide and 0.5 wt% zinc oxide relative to indium oxide. It can be formed by sputtering using a target containing 1-1 wt% of the substance. .
[0131] Other materials used for anode 1001 include gold (Au), platinum (Pt), and nickel. (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), chromium Baltic (Co), copper (Cu), palladium (Pd), titanium (Ti), or metallic materials Nitrides (e.g., titanium nitride), molybdenum oxide, vanadium oxide, ruthenic acid Examples include oxides, tungsten oxides, manganese oxides, and titanium oxides.
[0132] For cathode 1002, a small work function (specifically, 3.8 eV or less is preferred) is desirable. Metals, alloys, electrically conductive compounds, and mixtures thereof can be used. Specific examples of such cathode materials include elements belonging to Group 1 or Group 2 of the periodic table. , namely alkali metals such as lithium (Li) and cesium (Cs), and magnesium Alkaline earth metals such as magnesium (Mg), calcium (Ca), strontium (Sr), and These include alloys (MgAg, AlLi), europium (Eu), and ytterbium (Y). b) Examples include rare earth metals and alloys containing them. Note that alkali metals, aluminum Films of potassium earth metals and alloys containing them can be formed using vacuum deposition. Furthermore, alloys containing alkali metals or alkaline earth metals are formed by the sputtering method. It was also possible to deposit silver paste and other materials using inkjet technology. It is possible.
[0133] In addition, alkali metal compounds, alkaline earth metal compounds, or rare earth metal compounds (examples) For example, lithium fluoride (LiF), lithium oxide (LiOx), cesium fluoride (CsF) Thin films of calcium fluoride (CaF2), erbium fluoride (ErF3), etc., and It is also possible to form cathode 1002 by laminating a metal film such as luminium. be.
[0134] Next, specific examples of materials used for each layer constituting the EL layer 1003 are shown below.
[0135] The hole injection layer 1011 is a layer containing a material with high hole injection potential. For example, molybdenum oxide, vanadium oxide, ruthenium oxide, tungsten H13 oxides, manganese oxides, etc. can be used. In addition, phthalocyanine (abbreviation: H13) can be used. Phthalocyanine compounds such as 2Pc and copper phthalocyanine (CuPc), 4,4'-bi S[N-(4-diphenylaminophenyl)-N-phenylamino]biphenyl (abbreviation: DPAB), N,N'-bis[4-[bis(3-methylphenyl)amino]phenyl]- N,N'-Diphenyl-[1,1'-biphenyl]-4,4'-diamine (abbreviation: DNT PD), or other aromatic amine compounds, or poly(3,4-ethylenedioxythiophene) / poly(styrenesulfonic acid) (PEDOT / PSS), etc., polymers can also form the hole injection layer 1011. Furthermore, tris(p-ethylenediamine-substituted-aminophenyl )amine compound, 2,7-diamino-9-fluorenylidene compound, tri(p-N-ethylenediamine substituted-aminophenyl)benzene compound, pyrene compound with at least one aryl group substituted ethene nyl group substituted one or two, N,N'-di(biphenyl-4-yl)- N,N'-diphenylbiphenyl-4,4'-diamine, N,N,N',N'-tetra( (biphenyl-4-yl)biphenyl-4,4'-diamine, N,N,N',N'-tetra (biphenyl-4-yl)-3,3'-diethylbiphenyl-4,4'-diamine, 2, 2'-(methylenedi-4,1-phenylene)bis[4,5-bis(4-methoxyphenyl )-2H-1,2,3-triazole], 2,2'-(biphenyl-4,4'-diyl) bis(4,5-diphenyl-2H-1,2,3-triazole), 2,2'-(3,3' -dimethylbiphenyl-4,4'-diyl)bis(4,5-diphenyl-2H-1,2, 3-triazole), bis[4-(4,5-diphenyl-2H-1,2,3-triazole lu-2-yl)phenyl](methyl)amine, etc. can be used to form the hole injection layer 1011 .
[0136] In addition, as the hole injection layer 1011, a hole injection composite material formed by combining an organic compound and an inorganic compound (preferably an inorganic compound showing electron-accepting property with respect to the organic compound) can be used . This is possible. In hole-injectable composite materials, electrons are transferred between organic and inorganic compounds. As a result of increased carrier density, it exhibits excellent hole injection and hole transport properties.
[0137] Furthermore, when a hole-injectable composite material is used as the hole injection layer 1011, the anode 1001 and the o Because contact becomes possible, the material forming the anode 1001 can be used regardless of the work function. You can choose.
[0138] Inorganic compounds used in hole-injectable composite materials are preferably transition metal oxides. Furthermore, oxides of metals belonging to groups 4 through 8 of the periodic table can be listed. Specifically, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide. Den, tungsten oxide, manganese oxide, and rhenium oxide are preferred due to their high electron-accepting properties. In particular, molybdenum oxide is preferred because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle. It seems so.
[0139] Organic compounds used in hole-injectable composite materials include aromatic amine compounds and carbazole derivatives. Conductors, aromatic hydrocarbons, polymer compounds (oligomers, dendrimers, polymers, etc.), Various compounds can be used. Furthermore, as organic compounds used in hole-injectable composite materials... Therefore, it is preferable that the organic compound has high hole transport properties. Specifically, 10 -6 cm 2 It is preferable that the material has a hole mobility of / Vs or greater. However, the hole mobility is greater than the electron mobility. Other materials with high propulsion properties may be used. Below, hole-injecting composites are discussed. List the organic compounds that can be used as materials.
[0140] For example, an aromatic amine compound is N,N'-di(p-tolyl)-N,N'-diphenyl Nyl-p-phenylenediamine (abbreviation: DTDPPA), 4,4'-bis[N-(4-di Phenylaminophenyl)-N-phenylamino]biphenyl (abbreviation: DPAB), N, N'-bis[4-[bis(3-methylphenyl)amino]phenyl]-N,N'-diphenyl Nyl-[1,1'-biphenyl]-4,4'-diamine (abbreviation: DNTPD), 1,3, 5-Tris[N-(4-diphenylaminophenyl)-N-phenylamino]benzene( Examples include the abbreviation DPA3B.
[0141] Specifically, 3 carbazole derivatives that can be used in hole-injectable composite materials are -[N-(9-phenylcarbazole-3-yl)-N-phenylamino]-9-phenyl Lucarbazole (abbreviation: PCzPCA1), 3,6-bis[N-(9-phenylcarbazole [I-3-yl)-N-phenylamino]-9-phenylcarbazole (abbreviation: PCzP) CA2), 3-[N-(1-naphthyl)-N-(9-phenylcarbazole-3-yl) Examples include amino-9-phenylcarbazole (abbreviated as PCzPCN1). .
[0142] Also, 4,4'-di(N-carbazolyl)biphenyl (abbreviation: CBP), 1,3,5- Lith[4-(N-carbazolyl)phenyl]benzene (abbreviation: TCPB), 9-[4-( N-carbazolyl)phenyl-10-phenylanthracene (abbreviation: CzPA), 1, 4-Bis[4-(N-carbazolyl)phenyl]-2,3,5,6-tetraphenylbene Zen and the like can be used.
[0143] Furthermore, aromatic hydrocarbons that can be used in hole-injectable composite materials include, for example, 2- tert-butyl-9,10-di(2-naphthyl)anthracene (abbreviation: t-BuDNA) ), 2-tert-butyl-9,10-di(1-naphthyl)anthracene, 9,10-bi (3,5-diphenylphenyl)anthracene (abbreviation: DPPA), 2-tert- Tyl-9,10-bis(4-phenylphenyl)anthracene (abbreviation: t-BuDBA) , 9,10-di(2-naphthyl)anthracene (abbreviation: DNA), 9,10-diphenyl Anthracene (abbreviation: DPAnth), 2-tert-butylanthracene (abbreviation: t- BuAnth), 9,10-bis(4-methyl-1-naphthyl)anthracene (abbreviation: D MNA), 2-tert-butyl-9,10-bis[2-(1-naphthyl)phenyl] Anthracene, 9,10-bis[2-(1-naphthyl)phenyl]anthracene, 2,3, 6,7-Tetramethyl-9,10-di(1-naphthyl)anthracene, 2,3,6,7- Tetramethyl-9,10-di(2-naphthyl)anthracene, 9,9'-bianthryl, 10,10'-diphenyl-9,9'-biantryl, 10,10'-bis(2-phenyl Ruphenyl)-9,9'-biantryl,10,10'-bis[(2,3,4,5,6- Pentaphenyl)phenyl]-9,9'-bianthryl, anthracene, tetracene, ru Examples include blen, perylene, and 2,5,8,11-tetra(tert-butyl)perylene. In addition, pentacene, coronene, etc. can also be used. 10 -6 cm 2 Aromatic hydrocarbons having a hole mobility of / Vs or higher and having 14 to 42 carbon atoms. It is more preferable to use.
[0144] In addition, the aromatic hydrocarbon that can be used for the hole injection composite material may have a vinyl skeleton. As the aromatic hydrocarbon having a vinyl group, for example, 4,4'-bis( 2,2-diphenylvinyl)biphenyl (abbreviation: DPVBi), 9,10-bis[4-( 2,2-diphenylvinyl)phenyl]anthracene (abbreviation: DPVPA), etc. can be mentioned. be.
[0145] In addition, polymer compounds such as poly(N-vinylcarbazole) (abbreviation: PVK) and poly(4-vinyltriphenyl lamine) (abbreviation: PVTPA) can also be used.
[0146] The hole transport layer 1012 is a layer containing a substance with high hole transportability. As the substance with high hole transportability, for example, it is preferably a compound of an aromatic amine (that is, having a benzene ring-nitrogen bond). As a widely used material, 4,4'-bis[N-(3 -methylphenyl)-N-phenylamino]biphenyl, its derivative 4,4'-bi s[N-(1-naphthyl)-N-phenylamino]biphenyl (hereinafter referred to as NPB), 4,4',4''-tris(N,N-diphenyl-amino)triphenylamine, 4,4 ',4''-tris[N-(3-methylphenyl)-N-phenylamino]triphenyl amine and other starburst-type aromatic amine compounds can be mentioned. The substances described here are mainly substances having a hole mobility of 10 cm -6 / Vs or more. However, as long as it is a substance with higher hole transportability than electrons, other substances may be used. In addition, the hole transport layer 10 2 is... transport layer, if it is a substance with higher hole transportability than electrons, other substances may be used. In addition, the hole transport layer 10 12 refers not only to single layers, but also to mixed layers of the above materials, or layers of two or more stacked materials. That's fine.
[0147] Furthermore, even if a hole-transporting material is added to an electrically inert polymer compound such as PMMA, good.
[0148] Also, poly(N-vinylcarbazole) (abbreviation: PVK) and poly(4-vinyltriphenyl (Abbreviation: PVTPA), poly[N-(4-{N'-[4-(4-diphenylamine) [Phenylamino(N'-phenylamino)phenyl(N'-phenylamino)phenyl(methacrylamide) (abbreviated) Name: PTPDMA) Poly[N,N'-bis(4-butylphenyl)-N,N'-bis(f High molecular weight compounds such as [(enyl)benzidine) (abbreviated as Poly-TPD) may also be used. Furthermore, the hole transport material may be appropriately added to the above polymer compound. p-enamine-substituted aminophenyl)amine compounds, 2,7-diamino-9-fluorenyl Lydene compounds, tri(pN-enamine-substituted-aminophenyl)benzene compounds, Alley A pyrene compound having at least one substituted ethenyl group and one or two substituted ethenyl groups, N,N '-di(biphenyl-4-yl)-N,N'-diphenylbiphenyl-4,4'-diamine N,N,N',N'-tetra(biphenyl-4-yl)biphenyl-4,4'-dia Min, N,N,N',N'-tetra(biphenyl-4-yl)-3,3'-diethylbiphenyl Phenyl-4,4'-diamine, 2,2'-(methylenedi-4,1-phenylene)bis[4 ,5-bis(4-methoxyphenyl)-2H-1,2,3-triazole],2,2'- (Biphenyl-4,4'-diyl)bis(4,5-diphenyl-2H-1,2,3-tri Azole), 2,2'-(3,3'-dimethylbiphenyl-4,4'-diyl)bis(4 ,5-diphenyl-2H-1,2,3-triazole), bis[4-(4,5-diphenyl [2H-1,2,3-triazole-2-yl)phenyl](methyl)amine etc. also have holes. It can be used in the transport layer 1012.
[0149] The light-emitting layer 1013 is a layer containing a light-emitting substance, and various materials can be used. For example, luminescent substances include fluorescent compounds that emit fluorescence and phosphorescent compounds that emit phosphorescence. Materials can be used. The following describes organic compound materials that can be used in the light-emitting layer. However, the materials applicable to the EL element 1025 are not limited to these.
[0150] The blue to blue-green luminescence is, for example, due to perylene, 2,5,8,11-tetra-t-butylperi Len (abbreviated as TBP), 9,10-diphenylanthracene, etc. are used as guest materials. It can be obtained by dispersing it in a suitable host material. Also, 4,4'-bis(2,2 Styryl arylene derivatives such as diphenylvinyl)biphenyl (abbreviation: DPVBi) or, 9,10-di-2-naphthylanthracene (abbreviation: DNA), 9,10-bis(2- Anthracenes such as naphthyl)-2-t-butylanthracene (abbreviation: t-BuDNA) It can be obtained from derivatives. Also, polymers such as poly(9,9-dioctylfluorene) - may be used. Also, styrylamine derivatives are preferred as blue light-emitting guest materials. Furthermore, N,N'-bis[4-(9H-carbazol-9-yl)phenyl]-N,N'- Diphenylstilbene-4,4'-diamine (abbreviation: YGA2S), and N,N'-diphenyl Nyl-N,N'-bis(9-phenyl-9H-carbazole-3-yl)stilbene-4 Examples include ,4'-diamines (abbreviated as PCA2S). In particular, YGA2S is 450n It is preferable as it has a peak around m. Furthermore, as a host material, anthracene derivatives Preferably, 9,10-bis(2-naphthyl)-2-t-butylanthracene (abbreviation: t -BuDNA) and 9-[4-(10-phenyl-9-antryl)phenyl]-9H- Carbazole (abbreviated as CzPA) is preferred. In particular, CzPA is electrochemically stable. Therefore, it is preferable.
[0151] The blue-green to green luminescence is caused by coumarin dyes such as coumarin-30 and coumarin-6, and by S[2-(2,4-difluorophenyl)pyridinato]picolinatoiridium (abbreviation: F Irpic), bis(2-phenylpyridinato)acetylacetonatoiridium (Ir( Use ppy)2(acac)) as a guest material and distribute it to a suitable host material. It is obtained by the above-mentioned perylene or TBP at a high concentration of 5 wt% or more. It can also be obtained by dispersing it in a host material. Furthermore, BAlq, Zn(BTZ)2, Gold such as bis(2-methyl-8-quinolinolate)chlorogallium (Ga(mq)2Cl) It can also be obtained from genus complexes. In addition, polymers such as poly(p-phenylenevinylene) can be obtained. It may also be used. In addition, as a guest material for the blue-green to green luminescence layer, anthracene derivatives may be used. This is preferable because it yields highly efficient light emission. For example, 9,10-bis{4-[N-(4- Diphenylamino)phenyl-N-phenyl]aminophenyl}-2-tert-butyl By using anthracene (abbreviated as DPABPA), highly efficient blue-green emission can be obtained. Furthermore, anthracene derivatives with an amino group substituted at the 2nd position yield highly efficient green emission. Therefore, N-(9,10-diphenyl-2-anthryl)-N,9-diphenyl -9H-carbazole-3-amine (abbreviated as 2PCAPA) is particularly suitable due to its long lifespan. These host materials are preferably anthracene derivatives, and the aforementioned CzPA is It is preferable because it is electrochemically stable. Also, by combining green and blue light emission, blue or When fabricating EL element 1025 which has two peaks in the green wavelength region, the blue light-emitting layer Using an electron-transporting anthracene derivative such as CzPA as the host, the host of the green light-emitting layer When a hole-transporting aromatic amine compound such as NPB is used, a blue light-emitting layer and a green light-emitting layer are produced. This is preferable because light emission is obtained at the interface with the layer. In other words, in this case, a green like 2PCAPA is preferable. As the host for the color-emitting material, an aromatic amine compound such as NPB is preferred.
[0152] Yellow to orange luminescence is seen, for example, in rubrene, 4-(dicyanomethylene)-2-[p-(dimethicone). [Tylamino)styryl]-6-methyl-4H-pyran (abbreviation: DCM1), 4-(dicya Nomethylene)-2-methyl-6-(9-juloridyl)ethenyl-4H-pyran (abbreviation: DCM2), bis[2-(2-thienyl)pyridinato]acetylacetonatoiridium ( Ir(thp)2(acac)), bis(2-phenylquinolinate)acetylacetonate Using iridium (Ir(pq)2(acac)) as a guest material, and a suitable host It is obtained by dispersing it in the material. In particular, tetrahydrocanths such as rubrene are used as guest materials. Helical derivatives are preferred because they are highly efficient and chemically stable. In this case, the host material and For this purpose, aromatic amine compounds such as NPB are preferred. Other host materials include bis (8-Quinolinolato)zinc(II) (abbreviation: Znq2) and bis[2-cinnamoyl-8- Metal complexes such as quinolinolato[zinc](abbreviation: Znsq2) can be used. Also, Polymers such as poly(2,5-dialkoxy-1,4-phenylenevinylene) may also be used. stomach.
[0153] Orange to red luminescence is, for example, 4-(dicyanomethylene)-2,6-bis[p-(dimeth [Luamino)styryl]-4H-pyran (abbreviation: BisDCM), 4-(dicyanomethylene) )-2,6-bis[2-(juloridine-9-yl)ethenyl]-4H-pyran (abbreviation: BisDCJ), 4-(dicyanomethylene)-2-methyl-6-(9-juloridyl) Tenyl-4H-pyran (abbreviation: DCM2), bis[2-(2-thienyl)pyridinate] Cetylacetonatoiridium (abbreviation: Ir(thp)2(acac)), etc., as guest materials It is obtained by using it as a material and dispersing it in a suitable host material. (8-Kinori) Zinc(II) (abbreviation: Znq2) or bis[2-cinnamoyl-8-quinolinolato It can also be obtained from metal complexes such as zinc (abbreviation: Znsq2). In addition, poly(3- Polymers such as alkylthiophene may also be used. As a guest material that exhibits red light emission, , 4-(dicyanomethylene)-2,6-bis[p-(dimethylamino)styryl]-4H -Pyran (abbreviation: BisDCM), 4-(dicyanomethylene)-2,6-bis[2-(di [9-yl)ethenyl]-4H-pyran (abbreviation: BisDCJ), 4-(dish Anomethylene)-2-methyl-6-(9-juloridyl)ethenyl-4H-pyran (abbreviation) :DCM2), {2-isopropyl-6-[2-(2,3,6,7-tetrahydro-1, 1,7,7-Tetramethyl-1H,5H-benzo[ij]quinoridine-9-yl)ethen [Lu]-4H-pyran-4-ylidene}propanedinitrile (abbreviation: DCJTI), {2, 6-Bis[2-(2,3,6,7-tetrahydro-8-methoxy-1,1,7 Lamethyl-1H,5H-benzo[ij]quinoridine-9-yl)ethenyl]-4H-pyra 4H-pyra such as n-4-ylidene propanedinitrile (abbreviation: BisDCJTM) The derivatives are highly efficient and therefore preferable. In particular, DCJTI and BisDCJTM are 620n It is preferable because it has an emission peak around m.
[0154] Furthermore, the light-emitting layer 1013 may consist of the aforementioned light-emitting substance (guest material) and other substances (phosphorus). It may also be configured as a material dispersed in a (material). Various materials can be used, and materials with higher luminescence have a lower lowest unoccupied orbital level (LUM). It is preferable to use a material with a high O level and a low highest occupied orbital level (HOMO level). stomach.
[0155] Specifically, a substance used to disperse luminescent materials is tris(8-quinolinolato). ) Aluminum(III) (abbreviation: Alq), Tris(4-methyl-8-quinolinolate) Aluminum(III) (abbreviation: Almq3), bis(10-hydroxybenzo[h]k Nolinato) Beryllium(II) (abbreviation: BeBq2), bis(2-methyl-8-quinoline) (4-phenylphenolato)aluminum(III) (abbreviation: BAlq), bis( 8-Quinolinolato)zinc(II) (abbreviation: Znq2), bis[2-(2-benzoxaz [Ryl)phenolate]zinc(II) (abbreviation: ZnPBO), bis[2-(2-benzothiazo Metal complexes such as lyl(phenolate)zinc(II) (abbreviation: ZnBTZ), 2-(4-bif Phenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole ( Abbreviation: PBD), 1,3-bis[5-(p-tert-butylphenyl)-1,3,4- Oxadiazole-2-yl]benzene (abbreviation: OXD-7), 3-(4-biphenylyl) )-4-phenyl-5-(4-tert-butylphenyl)-1,2,4-triazole (Abbreviation: TAZ), 2,2',2''-(1,3,5-benzenetriyl)tris(1- Phenyl-1H-benzoimidazole (abbreviation: TPBI), vasophenanthroline (abbreviation) Heterocyclic compounds such as BPhen (abbreviation: BCP) and vasocuproine (abbreviation: BCP), and 9-[4 -(10-phenyl-9-antryl)phenyl]-9H-carbazole (abbreviation: CzP) A) 3,6-diphenyl-9-[4-(10-phenyl-9-antryl)phenyl] -9H-carbazole (abbreviation: DPCzPA), 9,10-bis(3,5-diphenylf Enyl anthracene (abbreviation: DPPA), 9,10-di(2-naphthyl)anthracene (Abbreviation: DNA), 2-tert-butyl-9,10-di(2-naphthyl)anthracene (Abbreviation: t-BuDNA), 9,9'-biantril (Abbreviation: BANT), 9,9'-( Stilben-3,3'-diyl)diphenanthrene (abbreviation: DPNS), 9,9'-(S Tilben-4,4'-diyl)diphenanthrene (abbreviation: DPNS2), 3,3',3' '-(benzene-1,3,5-triyl)tripylene (abbreviation: TPB3), 9,10-di Phenylanthracene (abbreviation: DPAnth), 6,12-dimethoxy-5,11-diph Condensed aromatic compounds such as phenylchrysene, N,N-diphenyl-9-[4-(10-phenyl [Nyl-9-anthryl)phenyl]-9H-carbazole-3-amine (abbreviation: CzA1 PA), 4-(10-phenyl-9-anthryl)triphenylamine (abbreviation: DPhP) A) N,9-diphenyl-N-[4-(10-phenyl-9-antryl)phenyl] -9H-carbazole-3-amine (abbreviation: PCAPA), N,9-diphenyl-N-{ 4-[4-(10-phenyl-9-antryl)phenyl]phenyl}-9H-carbazo 3-amine (abbreviation: PCAPBA), N-(9,10-diphenyl-2-antriamine) (Lu)-N,9-diphenyl-9H-carbazole-3-amine (abbreviation: 2PCAPA), Aromatic amineralization of NPB (or α-NPD), TPD, DFLDPBi, BSPB, etc. Mixed ingredients can be used.
[0156] Furthermore, multiple types of materials can be used to disperse the luminescent substance. For example, crystal To further suppress crystallization, substances that inhibit crystallization, such as rubrene, may be added. To more efficiently transfer energy to luminescent materials, NPB or Alq, etc. Further additions may be made.
[0157] By using a configuration in which a luminescent substance is dispersed in other substances, the crystallization of the luminescent layer 1013 is achieved. It can be suppressed. Furthermore, it suppresses concentration quenching caused by high concentrations of luminescent substances. It is possible.
[0158] The electron transport layer 1014 is a layer containing a material with high electron transport properties. For example, tris(8-quinolinolato)aluminum(III) (abbreviation: Alq) Tris(4-methyl-8-quinolinolato)aluminum(III) (abbreviation: Almq3) ), bis(10-hydroxybenzo[h]quinolinato)beryllium (abbreviation: BeBq2) , bis(2-methyl-8-quinolinolato)(4-phenylphenolato)aluminum (abbreviated) Name: BAlq, etc., derived from metal complexes having a quinoline skeleton or a benzoquinoline skeleton. This is the layer. In addition, bis[2-(2-hydroxyphenyl)benzoxazolate] Zinc (abbreviation: Zn(BOX)2), bis[2-(2-hydroxyphenyl)benzothiazo It contains oxazole and thiazole ligands such as [lat]zinc (abbreviation: Zn(BTZ)2). Metal complexes such as 2-(4-biface) can also be used. Niryl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (abbreviated) Name: PBD) or 1,3-bis[5-(p-tert-butylphenyl)-1,3,4- Oxadiazole-2-yl]benzene (abbreviation: OXD-7), 3-(4-biphenylyl) )-4-phenyl-5-(4-tert-butylphenyl)-1,2,4-triazole (Abbreviation: TAZ), vasophenanthroline (Abbreviation: BPhen), vasocuproin (Abbreviation) Name: BCP), Bis[3-(1H-benzimidazole-2-yl)fluoren-2-ol Lato]zinc(II), bis[3-(1H-benzoimidazole-2-yl)fluoren- 2-Olat]beryllium(II), bis[2-(1H-benzoimidazole-2-yl) Dibenzo[b,d]furan-3-orato](phenolate)aluminum(III), bis [2-(benzoxazol-2-yl)-7,8-methylenedioxydibenzo[b,d [Furan-3-orato](2-naphtholato)aluminum(III) can also be used. Yes, it is possible. The substances mentioned here are mainly 10 -6 cm 2 Substances having an electron mobility of / Vs or greater Furthermore, any substance with higher electron transport capabilities than holes can transport electrons, except for the substances mentioned above. It may also be used as layer 1014. Furthermore, the electron transport layer 1014 is not limited to a single layer. Furthermore, two or more layers made of the above-mentioned material may be stacked on top of each other.
[0159] The electron injection layer 1015 is a layer containing a material with high electron injection potential. For example, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (C) Examples include alkali metals such as aF2, alkaline earth metals, or compounds thereof. Furthermore, an organic compound (preferably an organic compound having electron transport properties) and an inorganic compound (preferably It is a compound of alkali metals, alkaline earth metals, rare earth metals, or compounds thereof. It is also possible to use electron-injection composite materials. Examples of electron-injection composite materials include Alq containing magnesium (Mg) can be used. By doing so, the electron injection efficiency from cathode 1002 can be further increased.
[0160] Furthermore, if the electron injection layer 1015 is the electron injection composite material described above, the work Regardless of the function, various derivatives such as Al, Ag, ITO, silicon, or silicon oxide-containing ITO are used. The electrochemical material can be used as the material for the cathode 1002.
[0161] By appropriately combining and stacking the above layers, the EL layer 1003 can be formed. The light-emitting layer 1013 may also be made into a laminated structure of two or more layers. By using the above layered structure and changing the type of light-emitting material used in each light-emitting layer, various types of light emission can be achieved. Color can be obtained. Furthermore, by using multiple light-emitting materials with different emission colors, This allows for the emission of broad-spectrum or white light. In particular, high brightness For the required backlighting applications, a structure with multiple light-emitting layers is preferable.
[0162] Furthermore, various methods can be used to form the EL layer 1003 depending on the material used (for example, dry The appropriate method can be selected (e.g., chemical method or wet method). For example, vacuum deposition, sputtering method, Inkjet printing, spin coating, etc., can be used. Furthermore, different methods can be used for each layer. It may be formed using [a specific method / tool].
[0163] Furthermore, the method for manufacturing the EL element 1025 shown in this embodiment is a dry process (for example) For example, vacuum deposition, sputtering, wet processes (e.g., inkjet method, It can be formed using various methods, including spin coating.
[0164] The configuration of the EL element 1025 shown in this embodiment is a pair as shown in Figure 10(C). The structure may also be one in which multiple EL layers 1003 are stacked between electrodes, a so-called multilayer device configuration. However, if the EL layer 1003 has a laminated structure of, for example, n layers (where n is a natural number greater than or equal to 2), It includes the m-th EL layer (where m is a natural number, and m is between 1 and (n-1) inclusive) and the (m+1)th layer Each layer has an intermediate layer 1004 sandwiched between the EL layers.
[0165] The intermediate layer 1004 is formed when a voltage is applied to the anode 1001 and cathode 1002. Electrons are poured onto one of the EL layers 1003 on the anode 1001 side, which is in contact with layer 1004. It has the function of injecting, and has the function of injecting holes into the other EL layer 1003 on the cathode 1002 side. ru.
[0166] The intermediate layer 1004 is a composite material of the aforementioned organic compound and inorganic compound (hole injection composite material). In addition to electron-injection composite materials, it can be formed by appropriately combining materials such as metal oxides. It is possible. Furthermore, it is preferable to use a combination of hole-injectable composite materials and other materials. These materials used in the intermediate layer 1004 have excellent carrier injectability and carrier transportability. Therefore, low-current and low-voltage driving of the EL element 1025 can be achieved. .
[0167] In the configuration of a stacked element, when the EL layer has two stacked layers, the first The complementary color relationship between the emission color obtained from the EL layer and the emission color obtained from the second EL layer. By doing so, white light emission can be extracted to the outside. Note that the first EL layer and Even if the second EL layer has a configuration in which each of the two EL layers has multiple light-emitting layers in a complementary color relationship, white Luminescence is produced. Examples of complementary color relationships include blue and yellow, or blue-green and red. Examples of substances that emit blue, yellow, blue-green, and red light include the light-emitting materials listed above. You can choose from the options available in terms of quality.
[0168] Below are multiple light-emitting layers in which the first EL layer and the second EL layer are complementary in color. An example of a configuration that has the necessary components and can produce white light emission is shown.
[0169] For example, the first EL layer exhibits an emission spectrum with a peak in the blue to blue-green wavelength region. The first light-emitting layer and the second layer exhibiting an emission spectrum with a peak in the yellow to orange wavelength region The second EL layer has an emission spectrum having a peak in the blue-green to green wavelength region. A third emitting layer exhibits a torrent, and the emission spectrum shows a peak in the orange to red wavelength region. It shall have a fourth light-emitting layer.
[0170] In this case, the light emitted from the first EL layer is emitted from both the first and second light-emitting layers. Since it combines light, it covers both the blue to blue-green wavelength range and the yellow to orange wavelength range. It exhibits an emission spectrum with a peak in the direction. That is, the first EL layer is a two-wavelength type white It emits light that is close to white in color.
[0171] Furthermore, the light emitted from the second EL layer is due to the light emitted from both the third and fourth light-emitting layers. Because it is a combination, it is effective in both the blue-green to green wavelength range and the orange to red wavelength range. It exhibits an emission spectrum with a peak. That is, the second EL layer is different from the first EL layer. It emits a two-wavelength type of white or near-white light.
[0172] Therefore, the light emitted from the first EL layer and the light emitted from the second EL layer are superimposed. This results in the blue to blue-green wavelength range, the blue-green to green wavelength range, the yellow to orange wavelength range, and orange It is possible to obtain white light emission covering the wavelength range from color to red.
[0173] Furthermore, in the stacked element configuration described above, an intermediate layer is placed between the stacked EL layers. This makes it possible to achieve long-life elements in the high-brightness region while maintaining a low current density. Furthermore, since the voltage drop due to the resistance of the electrode material can be reduced, uniform light emission over a large area is possible. It becomes Noh.
[0174] The backlight section described in Figures 9(A) to (C) and 10(A) to (C) is defined as having a luminance. The configuration may also be such that the brightness is adjusted according to the ambient light around the liquid crystal display. The system may be configured to either adjust brightness according to the displayed image signal, or it may be configured to adjust brightness according to the displayed image signal.
[0175] In addition, color display is possible by combining color filters. Also, other optical films (polarizing films, phase difference films, anti-reflective films, etc.) They can be used in combination. Furthermore, RGB light-emitting diodes, etc., can be used for the backlight. It employs a time-division color mixing method (field sequential method) that displays colors by positioning and time division. In some cases, a color filter may not be used.
[0176] Furthermore, this embodiment can be appropriately combined with other embodiments.
[0177] (Embodiment 4) This embodiment shows an example of a transistor that can be applied to the liquid crystal display device disclosed herein. The transistor structure applicable to the liquid crystal display devices disclosed herein is not particularly limited. For example, the gate electrode is positioned on the upper side of the oxide semiconductor layer via the gate insulating layer. A gate structure, or gate electrode, is located beneath the oxide semiconductor layer via a gate insulating layer. Staggered and planar bottom gate structures can be used. A lunger can be a single-gate structure where one channel-forming region is formed, or it can be two channels formed. It may be a double-gate structure or a triple-gate structure with three gates. The device has two gate electrode layers arranged above and below the channel region with a gate insulating layer in between. A dual-gate type is also acceptable. Figures 11(A) to (D) show the cross-sectional structure of a transistor. An example is shown below. The transistors shown in Figures 11(A) to (D) use oxide semiconductors. It uses a conductor. The advantage of using an oxide semiconductor is that the transistor's ON Field effect mobility in this state (maximum value at 5 cm) 2 / Vsec or more, preferably 10cm 2 / Vsec~150cm 2 (Below / Vsec) and low O in the transistor's off state Current (less than 1 aA / μm, more preferably less than 10 zA / μm at room temperature, and 85 The requirement is that a reading of less than 100 zA / μm can be obtained at °C.
[0178] The transistor 410 shown in Figure 11(A) is one of the bottom-gate transistors. It is also called an inverse staggered transistor.
[0179] The transistor 410 has a gate electrode layer 401 and a gate on a substrate 400 having an insulating surface. Insulating layer 402, oxide semiconductor layer 403, source electrode layer 405a, and drain electrode layer 40 It includes 5b. It also covers transistor 410 and is laminated on oxide semiconductor layer 403 as an insulating film. A layer 407 is provided. A protective insulating layer 409 is further formed on the insulating film 407. .
[0180] The transistor 420 shown in Figure 11(B) is a channel protection type (also known as a channel stop type). It is a type of bottom-gate structure called a (u) and is also known as an inverse staggered transistor.
[0181] The transistor 420 has a gate electrode layer 401 and a gate on a substrate 400 having an insulating surface. The insulating layer 402, the oxide semiconductor layer 403, and the channel formation region of the oxide semiconductor layer 403 An insulating layer 427 that functions as a channel protection layer, a source electrode layer 405a, and a drain electrode It includes layer 405b. Furthermore, a protective insulating layer 409 is formed covering transistor 420. ru.
[0182] The transistor 430 shown in Figure 11(C) is a bottom-gate type transistor, and has an insulating surface. A gate electrode layer 401, a gate insulating layer 402, and a source are placed on a substrate 400 which is a substrate having It includes an electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403. An insulating film 407 is provided that covers the transistor 430 and is in contact with the oxide semiconductor layer 403. A protective insulating layer 409 is further formed on the insulating film 407.
[0183] In transistor 430, the gate insulating layer 402 is connected to the substrate 400 and the gate electrode layer 40 1 is provided in contact with the gate insulating layer 402, and the source electrode layer 405a and drain electrode layer 405b is provided in contact with it. And the gate insulating layer 402 and the source electrode layer 40 5a. An oxide semiconductor layer 403 is provided on the drain electrode layer 405b.
[0184] The transistor 440 shown in Figure 11(D) is one of the top-gate transistors. The transistor 440 has an insulating layer 437 and an oxide semiconductor layer on a substrate 400 having an insulating surface. Conductor layer 403, source electrode layer 405a, drain electrode layer 405b, gate insulating layer 40 2. It includes a gate electrode layer 401, a source electrode layer 405a, and a drain electrode layer 405b. The wiring layers 436a and 436b are provided in contact with each other and are electrically connected.
[0185] In this embodiment, as described above, an oxide semiconductor layer 403 is used as the semiconductor layer. As the oxide semiconductor used in the material semiconductor layer 403, the quaternary metal oxide In-Sn- Ga-Zn-O-based oxide semiconductors and ternary metal oxides such as In-Ga-Zn-O-based oxides. Monocrystalline semiconductors, In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors Sn-Ga-Zn-O oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn- Al-Zn-O oxide semiconductors and binary metal oxides such as In-Zn-O oxide semiconductors Body, Sn-Zn-O oxide semiconductor, Al-Zn-O oxide semiconductor, Zn-Mg-O system Oxide semiconductors, Sn-Mg-O based oxide semiconductors, In-Mg-O based oxide semiconductors, and In -O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. are used. This can be done. Furthermore, the above oxide semiconductor may contain SiO2. Here, for example, In -Ga-Zn-O oxide semiconductors are composed of indium (In), gallium (Ga), and zinc ( This means an oxide film containing Zn, and its stoichiometric ratio is not particularly relevant. It may also contain elements other than In, Ga, and Zn.
[0186] Furthermore, the oxide semiconductor layer 403 has the chemical formula InMO3(ZnO) m (m>0, and m is a integer) Thin films can be used that are not represented by numbers. Here, M is Ga, Al, Mn, etc. It represents one or more metallic elements selected from Co. For example, as M, Ga, Ga and Examples include Al, Ga, and Mn, or Ga and Co.
[0187] Transistors 410, 420, 430, and 440 using the oxide semiconductor layer 403 are in the off state. The current value in the state (off-current value) can be reduced. Therefore, electrical signals such as image signals can be reduced. The number retention time can be extended, and the write interval can also be set to be longer when the power is on. Therefore, the frequency of refresh operations can be reduced, thus effectively suppressing power consumption. It will bear fruit.
[0188] Furthermore, transistors 410, 420, 430, and 440 using the oxide semiconductor layer 403 are, Because a relatively high field-effect mobility can be obtained, high-speed driving is possible. Therefore, liquid crystal display equipment By using the above transistor in the pixel section, color separation can be suppressed, resulting in high image quality. Images can be provided. Furthermore, the above transistor can be mounted on the same substrate as the drive circuit section. Because it can be manufactured by differently creating the pixel portion, the number of components in the liquid crystal display device can be reduced. It is possible.
[0189] There are no major restrictions on the substrates that can be used for the substrate 400 having an insulating surface, however Glass substrates such as borosilicate glass or aluminobrosilicate glass are used.
[0190] In bottom-gate transistors 410, 420, and 430, the insulating film that forms the base layer is used. A protective layer may be provided between the substrate and the gate electrode layer. The protective layer prevents the diffusion of impurity elements from the substrate. It has a stopping function, and is made of silicon nitride film, silicon oxide film, silicon nitride oxide film, or silicon oxide film. It can be formed by a laminated structure consisting of one or more films selected from silicon dioxide films.
[0191] The materials for the gate electrode layer 401 are molybdenum, titanium, chromium, tantalum, tungsten, Metal materials such as aluminum, copper, neodymium, scandium, or compounds mainly composed of these materials It can be formed using gold material, either as a single layer or in layers.
[0192] The gate insulating layer 402 is formed using plasma CVD or sputtering, etc. A layer, silicon nitride layer, silicon oxide nitride layer, silicon nitride oxide layer, aluminum oxide layer , aluminum nitride layer, aluminum oxide nitride layer, aluminum oxide nitride layer, or aluminum oxide The humium layer can be formed as a single layer or in multiple layers. For example, the first gate insulating layer and Then, a silicon nitride layer (SiN) with a thickness of 50 nm to 200 nm is formed by plasma CVD. y (y>0)) is formed, and a second gate insulating layer with a thickness of 5 nm is applied on the first gate insulating layer. Above is a silicon oxide layer (SiO) of 300 nm or less. x (x>0)) is stacked, for a total film thickness of 20 The gate insulating layer is 0 nm thick.
[0193] Examples of conductive films used for the source electrode layer 405a and drain electrode layer 405b include Al A metal film containing an element selected from Cr, Cu, Ta, Ti, Mo, W, or the above Metal nitride films composed of these elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) A film (or similar material) can be used. Also, either the underside or the topside of a metal film such as Al or Cu. Both sides have high melting point metal films such as Ti, Mo, and W, or metal nitride films of those metals (titanium nitride film). A configuration in which molybdenum nitride film and tungsten nitride film are stacked is also possible.
[0194] Wiring layer 436a and wiring layer 43 connected to source electrode layer 405a and drain electrode layer 405b The conductive film, such as 6b, is made of the same material as the source electrode layer 405a and the drain electrode layer 405b. It can be used.
[0195] Furthermore, source electrode layer 405a, drain electrode layer 405b (wiring formed from the same layer) The conductive film (including the layer) may be formed from a conductive metal oxide. Examples of oxides include indium oxide (In2O3), tin oxide (SnO2), and zinc oxide (ZnO2). ), indium tin oxide alloy (In2O3-SnO2, abbreviated as ITO), zinc oxide alloy (In2O3-ZnO) or these metal oxide materials with silicon oxide Products containing corn can be used.
[0196] Insulating films 407, 427, and 437 are typically silicon oxide films, silicon oxide nitride films, and acid Inorganic insulating films such as aluminum oxide films or aluminum oxide nitride films can be used. ru.
[0197] Furthermore, the protective insulating layer 409 provided above the oxide semiconductor layer is made of silicon nitride film, a silicon nitride film, and Inorganic insulating films such as luminium film, silicon nitride film, and aluminum nitride film are used. It is possible.
[0198] Furthermore, a planarizing insulating film is used on the protective insulating layer 409 to reduce surface irregularities caused by transistors. A planarizing insulating film may be formed. Polyimide, acrylic, benzocyclobutene Organic materials such as the above can be used. In addition to the above organic materials, low dielectric constant materials (low -k material) etc. can be used. Multiple insulating films formed from these materials can be stacked. A planar insulating film may be formed by doing so.
[0199] Figures 18 and 19 show examples of pixels in a liquid crystal display device using such transistors. Figure 18 shows a plan view of a pixel, and Figure 19 shows a cross-sectional view corresponding to the AB cutting line shown in that figure. Figure 18 shows a plan view of the substrate 400 on which the transistor 410 is formed. Furthermore, Figure 19 shows the configuration of the substrate 400 on which the transistor 410 is provided, as well as the opposing substrate 41 This shows a configuration in which 6 and liquid crystal layer 414 are provided. In the following explanation, both Figure 18 and Figure 19 are used. Refer to the explanation.
[0200] The configuration of transistor 410 is the same as in Figure 11(A), with gate electrode layer 401, gate insulating It has an edge layer 402 and an oxide semiconductor layer 403. When forming a pixel, gate electrode layer 4 01 is formed to extend in one direction. The oxide semiconductor layer 403 is the gate insulating layer 4 Source electrode layer 405 is provided so as to overlap with the gate electrode layer 401 via 02. a and the drain electrode layer 405b are located on the upper side of the oxide semiconductor layer 403 (Note, Here, the terms source electrode layer 405a and drain electrode layer 405b refer to a transistor. (Used for convenience to distinguish it as an electrode connected to 410). Source electrode layer 40 5a extends in a direction intersecting the gate electrode layer 401. Pixels are located on the protective insulating layer 409. An electrode 411 is provided and connected to the drain electrode layer 405b by a contact hole 412. The pixel electrode 411 is made of a transparent material such as indium tin oxide, zinc oxide, or tin oxide. It is made of polar material.
[0201] Furthermore, the retention capacity 419 may be provided as appropriate, and if it is provided, the gate electrode layer 401 It is formed by a capacitive wiring layer 417 and a capacitive electrode layer 418, which are formed in the same layer. Between layer 417 and capacitive electrode layer 418, a gate insulating layer 402 extends as a dielectric. This creates a holding capacity 419.
[0202] By providing a slit in the pixel electrode 411, the orientation of the liquid crystal can be controlled. This configuration is applied in the VA (Vertical Alignment) method. The VA method is a type of method for controlling the arrangement of liquid crystal molecules in a liquid crystal panel. This method aligns the liquid crystal molecules perpendicular to the panel surface when no voltage is applied. In addition to the VA method, there are also the TN (Twisted Nematic) method and the MVA (Multiple Verification) method. Ti-domain Vertical Alignment) method, IPS (In-P Lane Switching) method, CPA (Continuous Pinwhee) l Alignment) method, PVA (Patterned Vertical Al It is also possible to apply methods such as ignition.
[0203] A counter electrode 415 is provided on the opposing substrate 416 side. A liquid crystal layer 414 is provided in between. Also, an alignment film 413 is in contact with the liquid crystal layer 414. A feature is provided. The orientation treatment of the orientation film 413 is performed by photo-alignment or rubbing. The liquid crystal phases of liquid crystal layer 414 are nematic phase, smectic phase, cholesteric phase, and blue phase. These can be used.
[0204] The oxide semiconductor layer 403 is superimposed on the gate electrode layer 401 via the gate insulating layer 402. A transistor 410 is provided therein, and the source side or drain side of the transistor 410 is connected A pixel electrode 411 that drives the connected liquid crystal, and a portion provided opposite the pixel electrode 411 The opposing electrode 415 and the liquid crystal layer 414 provided between the pixel electrode 411 and the opposing electrode 415 This forms one unit. One or more of these units are used to form pixels. This can be done, and by arranging these in a matrix, a display panel that displays images, etc. It can be configured as a lu.
[0205] Thus, in this embodiment, an oxide semiconductor with high field-effect mobility and low off-current value is obtained. By using a transistor that includes a conductive layer, a low-power liquid crystal display device can be provided. It is possible.
[0206] (Embodiment 5) This embodiment uses Figure 12 to illustrate an example of a transistor including an oxide semiconductor layer and a method for fabricating it. The following will be explained in detail: parts identical to or having similar functions to those in the above embodiment, and processes. This can be done in the same manner as in the above embodiment, and repeated explanations will be omitted. Also, the same part A detailed explanation will be omitted.
[0207] Figures 12(A) to (E) show examples of the cross-sectional structure of a transistor. Transistor 510 shown in Figure 11(A) has a similar bottom to transistor 410 shown in Figure 11(A). It is an inverse staggered transistor with a gate structure.
[0208] The following describes the process of fabricating the transistor 510 on the substrate 505 using Figures 12(A) to (E). Let me explain the process.
[0209] First, a conductive film is formed on a substrate 505 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 511 is formed by the process. The resist mask is made by the inkjet method. It may be formed. If the resist mask is formed by the inkjet method, a photomask is used. Therefore, manufacturing costs can be reduced.
[0210] The substrate 505 having an insulating surface is a substrate similar to the substrate 400 shown in Embodiment 4. This is possible. In this embodiment, a glass substrate is used as the substrate 505.
[0211] An insulating film that serves as the base layer may be provided between the substrate 505 and the gate electrode layer 511. It has the function of preventing the diffusion of impurity elements from the substrate 505, and silicon nitride film, silicon oxide One or more films selected from a silicon nitride film, silicon nitride film, or silicon oxide film. It can be formed by a laminated structure.
[0212] Furthermore, the material of the gate electrode layer 511 is molybdenum, titanium, tantalum, tungsten, and Metal materials such as luminium, copper, neodymium, scandium, or alloy materials with these as the main components. It can be formed using a material, either as a single layer or in layers.
[0213] Next, a gate insulating layer 507 is formed on the gate electrode layer 511. The gate insulating layer 507 is Using plasma CVD or sputtering methods, a silicon oxide layer and a silicon nitride layer are created. silicon oxide nitride layer, silicon oxide nitride layer, aluminum oxide layer, aluminum nitride layer , an aluminum oxide nitride layer, an aluminum oxide nitride layer, or a hafnium oxide layer as a single layer It can be formed by stacking layers.
[0214] The oxide semiconductor of this embodiment is an acid that has had impurities removed and is type I or substantially type I. Oxide semiconductors are used. Such highly purified oxide semiconductors are suitable for interface levels and interface charges. Because it is extremely sensitive, the interface between the oxide semiconductor layer and the gate insulating layer is important. Therefore, the gate insulating layer that comes into contact with the highly purified oxide semiconductor requires high quality.
[0215] For example, high-density plasma CVD using μ-waves (e.g., frequency 2.45 GHz) is dense and It is preferable because it can form a high-quality insulating layer with high dielectric strength. The close contact between the high-quality gate insulating layer and the interface reduces the interface state and improves interface characteristics. This is because it can be done that way.
[0216] Of course, if it can form a good insulating layer as a gate insulating layer, sputtering Other film deposition methods such as plasma CVD can be applied. Furthermore, post-deposition heat treatment can be performed. Even if the insulating layer has modified film quality of the gate insulating layer and interface characteristics with the oxide semiconductor, Good. In any case, it is essential that the film quality as a gate insulating layer is good, as well as oxidation Any material that can reduce the interface state density with the semiconductor and form a good interface would be acceptable.
[0217] Furthermore, the gate insulating layer 507 and the oxide semiconductor film 530 contain as much hydrogen, hydroxyl groups, and moisture as possible. To prevent contamination, sputtering is used as a pretreatment for the deposition of the oxide semiconductor film 530. In the preheating chamber of the device, the substrate 505 on which the gate electrode layer 511 is formed, or the gate insulating layer 5 The substrate 505, on which layers 07 have been formed, is preheated to remove hydrogen, moisture, etc. adsorbed on the substrate 505. It is preferable to remove impurities and exhaust them. The exhaust means provided in the preheating chamber is cryogenic. A pump is preferred. Note that this preheating process can be omitted. The heat reaches the source electrode layer 515a and drain electrode layer 515b before the insulating layer 516 is formed. The same procedure may be performed on the formed substrate 505.
[0218] Next, a film thickness of 2 nm or more and 200 nm or less, preferably 5 nm or less, is applied to the gate insulating layer 507. An oxide semiconductor film 530 with a wavelength of 30 nm or less is formed (see Figure 12(A)).
[0219] Furthermore, before depositing the oxide semiconductor film 530 by sputtering, an argon gas is introduced. Reverse sputtering is performed to generate plasma by introducing the material, and it adheres to the surface of the gate insulating layer 507. It is preferable to remove the powdery material (also called particles or debris). Reverse sputtering is Without applying voltage to the target side, an RF power supply is used to apply voltage to the substrate side in an argon atmosphere. This method involves applying an argon atmosphere to form a plasma near the substrate and modify the surface. Nitrogen, helium, oxygen, etc., may be used instead of ambient air.
[0220] The oxide semiconductor used in the oxide semiconductor film 530 is the oxide semiconductor shown in Embodiment 4. It is possible to include SiO2 in the oxide semiconductor. This uses an In-Ga-Zn-O oxide target as the oxide semiconductor film 530. The film is formed by the tarting method. The cross-sectional view at this stage corresponds to Figure 12(A). Also, acid The ionized semiconductor film 530 is subjected to a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas atmosphere. It can be formed by sputtering in a mixed atmosphere of gas and oxygen.
[0221] For example, a target for fabricating oxide semiconductor film 530 by sputtering is The composition ratio of the metal acid is In2O3:Ga2O3:ZnO = 1:1:1 [molar ratio]. An In-Ga-Zn-O film is deposited using a crystalline target. Not limited to materials and composition, for example, In2O3:Ga2O3:ZnO=1:1:2[mo A metal oxide target with a specific ratio of l may also be used.
[0222] Furthermore, the filling rate of the metal oxide target is 90% to 100%, preferably 95% or more. It is 99.9% or less. By using a metal oxide target with a high packing efficiency, the film can be formed. The oxide semiconductor film can be made into a dense film.
[0223] The sputtering gas used when depositing the oxide semiconductor film 530 is hydrogen, water, hydroxyl group or hydrogen It is preferable to use a high-purity gas from which impurities such as monoxides have been removed.
[0224] The substrate is held in a film deposition chamber under reduced pressure, and the substrate temperature is kept between 100°C and 600°C. The temperature should be between 200°C and 400°C. By depositing the film while heating the substrate, The concentration of impurities in the deposited oxide semiconductor film can be reduced. Damage caused by rinsing is reduced. And, while removing residual moisture in the deposition chamber, hydrogen and moisture are removed. The removed sputtering gas is introduced, and the oxide semiconductor is placed on the substrate 505 using the target described above. A film 530 is deposited. To remove residual moisture in the deposition chamber, an adsorption-type vacuum pump is used, for example. For example, cryopumps, ion pumps, and titanium sublimation pumps are preferred. It seems so. Also, as an exhaust method, it was a turbo pump with a cold trap added. It is also possible. The deposition chamber, which is evacuated using a cryopump, contains, for example, hydrogen atoms and water (H2O). Compounds containing hydrogen atoms (more preferably compounds containing carbon atoms) are exhausted. Therefore, the concentration of impurities in the oxide semiconductor film deposited in the deposition chamber can be reduced.
[0225] An example of film deposition conditions is a distance of 100 mm between the substrate and the target, and a pressure of 0.6 Pa. The conditions applied are a DC power supply of 0.5kW and an oxygen atmosphere (oxygen flow rate ratio of 100%). It can be done. Furthermore, when using a pulsed DC power supply, powdery substances (particles) generated during film formation can be produced. This method is preferable because it reduces (also known as) the film thickness distribution and becomes more uniform.
[0226] Next, the oxide semiconductor film 530 is transformed into island-shaped oxide semiconductors by a second photolithography process. The material is processed into layers. Additionally, a resist mask is used to form island-shaped oxide semiconductor layers. It may also be formed by the jet method. If the resist mask is formed by the inkjet method, photomask Because no screws are used, manufacturing costs can be reduced.
[0227] Furthermore, when forming contact holes in the gate insulating layer 507, the process is carried out in an oxide semiconductor. This can be done simultaneously with the processing of film 530.
[0228] Note that the etching of the oxide semiconductor film 530 here can be done by dry etching or wet etching. Wetting is also acceptable, and both can be used. For example, wet etching of oxide semiconductor film 530 The etching solution used for chipping is a solution of phosphoric acid, acetic acid, and nitric acid, ITO07N( Products such as those manufactured by Kanto Chemical Co., Ltd. can be used.
[0229] Next, the oxide semiconductor layer is subjected to a first heat treatment. This first heat treatment causes the oxide semiconductor layer The conductive layer can be dehydrated or dehydrogenated. The temperature of the first heat treatment is 400°C. The temperature shall be 750°C or higher, or 400°C or higher, below the substrate's strain point. Here, the heat treatment equipment The substrate is introduced into an electric furnace, one of the furnaces, and the oxide semiconductor layer is subjected to a nitrogen atmosphere at 450°C. After a 1-hour heat treatment, water and water are removed from the oxide semiconductor layer without exposure to the atmosphere. This prevents the re-incorporation of the element and obtains the oxide semiconductor layer 531 (see Figure 12(B)).
[0230] Furthermore, the heat treatment device is not limited to electric furnaces, but also includes heat conduction or heat from heat-generating elements such as resistance heating elements. A device that heats the object to be processed by radiation may also be used. For example, GRTA(Gas R apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Annealing) devices such as hermal annealing equipment al) equipment can be used. LRTA equipment uses halogen lamps, metal halide lamps. Lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps This is a device that heats an object to be processed by radiating light (electromagnetic waves) from a lamp or similar light source. The GRTA device is a device that performs heat treatment using high-temperature gas. Noble gases such as argon, or nitrogen, which do not react with the material being treated by heat treatment. An active gas is used.
[0231] For example, as a first heat treatment, the base is placed in an inert gas heated to a high temperature of 650°C to 700°C. The board is moved and placed inside, heated for several minutes, then the substrate is moved and placed in a hot inert gas chamber. You may perform a GRTA (Great Value Analysis) from this source.
[0232] In the first heat treatment, nitrogen or a noble gas such as helium, neon, or argon is used. It is preferable that it does not contain water, hydrogen, etc. Alternatively, nitrogen introduced into the heat treatment device, Alternatively, the purity of noble gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., impurity concentration of 1 ppm or less, preferably) It is preferable that the concentration be 0.1 ppm or less.
[0233] Furthermore, after heating the oxide semiconductor layer in the first heat treatment, high-purity oxygen gas is added to the same furnace. A 10°C N2O gas or ultra-dry air (with a dew point of -40°C or lower, preferably -60°C or lower) is introduced. It may be added. It is preferable that the oxygen gas or N2O gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or N2O gas introduced into the heat treatment device is preferably 6N or higher. Preferably, the impurity concentration in oxygen gas or N2O gas is 7N or higher (i.e., 1 ppm or less). It is preferable to keep the concentration below 0.1 ppm. Due to the action of oxygen gas or N2O gas, The oxidation that was simultaneously reduced by the process of removing impurities through dehydration or dehydrogenation treatment. By supplying oxygen, which is the main component material that makes up the semiconductor, the oxide semiconductor layer can be improved. Purification and electrical conversion to Type I (intrinsic) are performed.
[0234] Furthermore, the first heat treatment of the oxide semiconductor layer is performed on the oxide before it is processed into an island-shaped oxide semiconductor layer. This can also be done on the semiconductor film 530. In that case, after the first heat treatment, the heating device is used The substrate is removed, and the photolithography process is performed.
[0235] Furthermore, the first heat treatment can also be performed after the deposition of an oxide semiconductor film. After stacking the source electrode layer and the drain electrode layer on top of the layer, or the source electrode layer and the drain This can be done either after forming an insulating layer on the rain electrode layer.
[0236] Furthermore, when forming contact holes in the gate insulating layer 507, the process is carried out in an oxide semiconductor. This can be done either before or after the first heat treatment of the film 530.
[0237] Furthermore, by depositing the oxide semiconductor layer in two stages and performing heat treatment in two stages, the substrate Regardless of the material of the component, such as oxides, nitrides, or metals, the crystalline region (non-single crystal) has a thick film thickness. A region, that is, an oxide semiconductor layer having a crystalline region oriented perpendicular to the film surface along the c axis, is formed. Alternatively, a first oxide semiconductor film of 3 nm to 15 nm may be deposited, and nitrogen and oxygen may be added. , under an atmosphere of noble gas or dry air, at a temperature of 450°C to 850°C, preferably 550°C The first heat treatment is performed at a temperature of 750°C or lower, and a crystalline region (including plate-like crystals) is formed in the region including the surface. A first oxide semiconductor film having ) is formed. Then, a film thicker than the first oxide semiconductor film is formed. A second oxide semiconductor film is formed, and the film is heated to a temperature of 450°C to 850°C, preferably 600°C to 7°C. A second heat treatment is performed at a temperature below 0°C, and the first oxide semiconductor film is used as a seed for crystal growth, upward Crystal growth is performed to crystallize a second oxide semiconductor film, resulting in a crystalline region with a thicker film thickness. An oxide semiconductor layer having the properties may be formed.
[0238] Next, a source electrode layer and a drain are placed on the gate insulating layer 507 and the oxide semiconductor layer 531. A conductive film is formed to form the electrode layer (including wiring formed from the same layer). Source electrode As the conductive film used for the layer and the drain electrode layer, the source electrode layer 4 shown in Embodiment 4 is used. The material used for 05a and the drain electrode layer 405b can be used.
[0239] A third photolithography step forms a resist mask on the conductive film, and selectively extracts the residue. After performing ching to form the source electrode layer 515a and drain electrode layer 515b, a resist is applied. Remove the mask (see Figure 12(C)).
[0240] For exposure during resist mask formation in the third photolithography process, ultraviolet light and KrF light are used. It is preferable to use a laser or ArF laser. Adjacent source electrodes on the oxide semiconductor layer 531 The gap width between the lower end of the layer and the lower end of the drain electrode layer determines the transistor that is later formed. The channel length L is determined. Note that if exposure is performed with a channel length L less than 25 nm, Extreme ultraviolet light (Ultraviolet) has extremely short wavelengths, ranging from a few nanometers to tens of nanometers. Using et) when exposure is performed during the resist mask formation in the third photolithography step, Good. Exposure with ultra-ultraviolet light has high resolution and a large depth of field. Therefore, later formation It is also possible to set the transistor channel length L to between 10 nm and 1000 nm. The operating speed of the circuit can be increased.
[0241] Furthermore, in order to reduce the number of photomasks and processes used in the photolithography process, The resist mask formed by a multi-tone mask, which is an exposure mask where the light has multiple intensities, is formed by the light. The etching process may be performed using a mask. A resist mask formed using a multi-gradation mask. The ske will have a shape with multiple film thicknesses, and its shape can be further deformed by etching. Because it can do this, it can be used in multiple etching processes that process different patterns. Therefore, a single multi-tone mask can accommodate at least two different patterns. This allows for the formation of a resist mask. Therefore, the number of exposure masks can be reduced. Furthermore, the corresponding photolithography process can also be reduced, thus simplifying the overall process.
[0242] Furthermore, during the etching of the conductive film, the oxide semiconductor layer 531 is etched and fragmented. It is desirable to optimize the etching conditions to avoid this. However, only the conductive film It is difficult to obtain the condition of etching without etching the oxide semiconductor layer 531 at all. Furthermore, during etching of the conductive film, only a portion of the oxide semiconductor layer 531 is etched, creating grooves. It may also become an oxide semiconductor layer having a recessed portion.
[0243] In this embodiment, a Ti film is used as the conductive film, and the oxide semiconductor layer 531 is made of In-Ga- Since a Zn-O-based oxide semiconductor was used, ammonia hydrogen peroxide (3) was used as the etchant for the Ti film. Use 1 wt% hydrogen peroxide solution, 28 wt% ammonia solution, and water (5:2:2).
[0244] Next, plasma treatment is performed using a gas such as N2O, N2, or Ar, and the exposed material is then... Adsorbed water and other substances attached to the surface of the oxide semiconductor layer may be removed. In this case, an insulating layer 5 becomes a protective insulating film that contacts a portion of the oxide semiconductor layer without being exposed to the atmosphere. Forms 16.
[0245] The insulating layer 516 has a thickness of at least 1 nm, and water is applied to the insulating layer 516 by sputtering or other methods. The insulating layer 516 can be formed using appropriate methods that prevent the inclusion of impurities such as hydrogen. When hydrogen is present, the hydrogen penetrates the oxide semiconductor layer, or the hydrogen affects the oxide semiconductor layer. Oxygen is extracted from the layer, and the back channel of the oxide semiconductor layer becomes less resistive (N-type). This may lead to the formation of parasitic channels. Therefore, the insulating layer 516 should be as thin as possible. To ensure that the resulting film is hydrogen-free, it is important to avoid using hydrogen in the film deposition method.
[0246] In this embodiment, a silicon oxide film with a thickness of 200 nm is sputtered as the insulating layer 516. The film is deposited using the 3D method. The substrate temperature during film deposition should be between room temperature and 300°C. The application method is set to 100°C. For silicon oxide film deposition by sputtering, a rare gas (representative) is used. In particular, under an argon atmosphere, an oxygen atmosphere, or a mixed atmosphere of a noble gas and oxygen. It is possible to use silicon oxide targets or silicon tar as targets. A GET can be used. For example, using a silicon target in an oxygen-containing atmosphere. Below, silicon oxide can be formed by sputtering. In contact with the oxide semiconductor layer, The insulating layer 516 that forms the structure is resistant to moisture, hydrogen ions, and OH - It does not contain impurities such as these, and these Inorganic insulating films are used to block external intrusion, typically silicon oxide films, acid A silicon nitride film, an aluminum oxide film, or an aluminum oxide nitride film is used.
[0247] Similar to the deposition of the oxide semiconductor film 530, residual moisture in the deposition chamber of the insulating layer 516 is removed. For this purpose, it is preferable to use an adsorption-type vacuum pump (such as a cryopump). The concentration of impurities in the insulating layer 516 deposited in the deposition chamber, which is evacuated using an op-pump, is reduced. Yes, it is possible. Furthermore, as an exhaust means for removing residual moisture in the film deposition chamber of the insulating layer 516, A turbopump with a cold trap added may also be used.
[0248] The sputtering gas used when forming the insulating layer 516 is hydrogen, water, hydroxyl groups, or hydrides. It is preferable to use a high-purity gas from which impurities have been removed.
[0249] Next, a second heat treatment (preferably 2) is performed under an inert gas atmosphere or an oxygen gas atmosphere. Perform the procedure at temperatures between 0°C and 400°C (for example, between 250°C and 350°C). For example, under a nitrogen atmosphere. A second heat treatment is performed at 250°C for 1 hour under gas pressure. After the second heat treatment, the oxide semiconductor A portion of the body layer (channel-forming region) is heated while in contact with the insulating layer 516.
[0250] Through the above process, the oxide semiconductor layer is subjected to a first heat treatment to release hydrogen. Impurities such as water, hydroxyl groups, or hydrides (also called hydrogen compounds) are removed from the oxide semiconductor layer. This constructs an oxide semiconductor that is graphically eliminated and simultaneously reduced by the impurity removal process. It can supply oxygen, which is one of the main component materials. Therefore, the oxide semiconductor layer is high Purification and electrical conversion to Type I (intrinsic) are performed.
[0251] Transistor 510 is formed through the above process (see Figure 12(D)).
[0252] Furthermore, if a silicon oxide layer containing many defects is used for the insulating layer 516, after the silicon oxide layer is formed... By heat treatment, hydrogen, water, hydroxyl groups or hydrides contained in the oxide semiconductor layer are removed. It diffuses impurities and has the effect of further reducing the amount of those impurities contained in the oxide semiconductor layer. .
[0253] A protective insulating layer 506 may be formed on the insulating layer 516. For example, the RF sputtering method A silicon nitride film is formed using this method. RF sputtering is suitable for mass production, and the protective insulating layer This is a preferred method for forming a film. The protective insulating layer does not contain impurities such as moisture, and these are protected from the outside. Using an inorganic insulating film that blocks penetration, silicon nitride film, aluminum nitride film, etc. In this embodiment, the protective insulating layer 506 is formed using a silicon nitride film. (See Figure 12(E)).
[0254] In this embodiment, the protective insulating layer 506 is made of the substrate 505 formed up to the insulating layer 516. Spam containing high-purity nitrogen, which has been heated to a temperature of 100°C to 400°C and from which hydrogen and moisture have been removed. A tagas is introduced and a silicon nitride film is deposited using a silicon semiconductor target. In the same case as with the insulating layer 516, the protective insulating layer 50 is applied while removing residual moisture in the processing chamber. It is preferable to form a film of 6.
[0255] After forming the protective insulating layer, further immerse in air at a temperature between 100°C and 200°C for 1 to 30 hours. The following heat treatment may be performed. This heat treatment may be carried out while maintaining a constant heating temperature. Furthermore, the temperature is raised from room temperature to a heating temperature of 100°C to 200°C, and from the heating temperature back to room temperature. The cooling process can be repeated multiple times.
[0256] Thus, a trace containing a highly purified oxide semiconductor layer fabricated using this embodiment Because the inverter achieves high field-effect mobility, high-speed operation is possible. Therefore, liquid crystal By using a transistor containing a highly purified oxide semiconductor layer in the pixel portion of the display device, It can suppress color separation and provide high-quality images. Furthermore, it can increase purity. A transistor containing an oxide semiconductor layer allows for the driving circuit or pixel section to be placed on the same substrate. Because different types can be manufactured separately, the number of components in a liquid crystal display can be reduced. ru.
[0257] Regarding the results of determining the field-effect mobility of transistors using highly purified oxide semiconductors I will explain.
[0258] According to the manufacturing method of this embodiment described above, a highly purified oxide semiconductor (film thickness 50 nm) A transistor (L / W=10μm / ) using an In-Ga-Zn-O oxide semiconductor film. A 50 μm (thickness) substrate was prepared, the substrate temperature was set to room temperature, and the source-drain voltage (hereinafter referred to as drain voltage) was set. Let the voltage (or Vd) be 10V, and the source-gate voltage (hereinafter referred to as gate voltage or Vd) be 10V. When the source-drain current (hereinafter referred to as g) is varied from -30V to +30V, the source-drain current (hereinafter referred to as g) is changed. The change characteristics of the rain current (or Id), i.e., the Vg-Id characteristics, were measured. Figure 13 shows Vg in the range of -5V to +30V. High purity as shown in Figure 13. The maximum field mobility of a transistor containing a densified oxide semiconductor layer is 10.7 cm⁻¹. 2 It can be confirmed that it is / Vsec.
[0259] Furthermore, by using a transistor containing a highly purified oxide semiconductor, the off state can be achieved. The current value (off-current value) can be made lower. Therefore, electrical signals such as image signals can be reduced. The number retention time can be extended, and the write interval can also be set to be longer. Therefore, refresh This allows for a lower frequency of the operation, thus increasing the effectiveness of reducing power consumption. ru.
[0260] Furthermore, regarding the results of determining the off-current of a transistor using a highly purified oxide semiconductor... I will explain.
[0261] According to the manufacturing method of this embodiment described above, a highly purified oxide semiconductor is used to transport A transistor was fabricated. First, the off-current of a transistor using a highly purified oxide semiconductor was measured. Considering that the value is sufficiently small, a transistor with a sufficiently large channel width W of 1 cm is used. We intentionally measured the off-current. We measured the off-current of a transistor with a channel width W of 1 cm. The results are shown in Figure 14. In Figure 14, the horizontal axis represents the gate voltage Vg, and the vertical axis represents the drain current. Id is the gate voltage Vg when the drain voltage Vd is +1V or +10V. In the range of -20V, the transistor's off-current is 1 × 10⁻¹⁶, which is the detection limit. -13 A The following was found. Also, the off-current of the transistor (here, the unit channel width) The value per 1 μm is 10 aA / μm (1 × 10⁻¹⁰ -17 It will be less than or equal to A / μm. Understood.
[0262] Next, we will more accurately determine the off-current of a transistor using a highly purified oxide semiconductor. The results will be explained below. As mentioned above, the transistor using a highly purified oxide semiconductor... The off-current of the zista is 1 × 10⁻¹⁶, which is the detection limit of the measuring instrument. -13 It was found to be less than or equal to A. Therefore, a characteristic evaluation element was fabricated to obtain a more accurate value of the off-current (measurement in the above measurement). We will now explain the results of determining values below the detection limit of the device.
[0263] The characteristic evaluation elements used in the current measurement method are described below.
[0264] The measurement system used for characterization employs three elements connected in parallel. Each measurement system consists of a capacitance element. The child, the first transistor, the second transistor, the third transistor, and the fourth transistor It has a first transistor, a second transistor, a third transistor, and The fourth transistor was fabricated according to this embodiment and is shown in Figure 12(D). It used the same structure as the Ta510.
[0265] One measurement system involves the source terminal and drain terminal of the first transistor, and a capacitance element. One of the child's terminals and one of the source and drain terminals of the second transistor are connected to the power supply. Connect to the power supply (which provides V2). Also, connect the source terminal and the drain terminal of the first transistor. The other terminal of the third transistor, one of the source and drain terminals of the third transistor, and the capacitive element The other terminal of this child is connected to the gate terminal of the second transistor. Also, the third transistor The source terminal and drain terminal of the transistor, and the source terminal of the fourth transistor One of the drain terminals and the gate terminal of the fourth transistor are connected to the power supply (V1). It is connected to the source. Also, the source terminal and the other drain terminal of the second transistor, Connect the source terminal and the other drain terminal of the fourth transistor to form the output terminal. .
[0266] Furthermore, the gate terminal of the first transistor has an ON state and an OFF state. A potential Vext_b2 is supplied to control the state, and the gate terminal of the third transistor is The potential Vext_b1 that controls the ON and OFF states of transistor 3 is supplied. Additionally, a voltage (Vout) is output from the output terminal.
[0267] Next, the off-current is measured using the measurement system described above.
[0268] First, during the initialization period, between the source terminal and drain terminal of the first transistor, and the third A potential difference is applied between the source and drain terminals of the transistor. Initialization is complete. Furthermore, due to the off-current of the first and third transistors, the second transistor... The potential at the gate terminal of the sta fluctuates. Therefore, over time, the output potential V at the output terminal changes. The potential of out will also change. From the output potential Vout obtained in this way, the off-current can be calculated. It is possible to calculate this.
[0269] The first transistor, the second transistor, the third transistor, and the fourth transistor Each of these is a highly purified oxidized material with a channel length L=10μm and a channel width W=50μm. This is a transistor using a semiconductor. In addition, in three parallel measurement systems, the first measurement The capacitance value of the capacitor element in the constant system is set to 100 fF, and the capacitance value of the capacitor element in the second measurement system is set to 1 pF. The capacitance value of the capacitive element in the third measurement system was set to 3pF.
[0270] Furthermore, between the source terminal and drain terminal of the first transistor, and the third transistor To create a potential difference between the source terminal and the drain terminal, V1 and V2 are set to 5V as appropriate. The voltage was set to 0V. Measurements were taken every 10 to 300 seconds, and the potential Vout was measured. The test was performed for a period of 100 msec. Measurements were also taken until 30,000 seconds had elapsed after the initialization was complete. The decision was made.
[0271] Figure 15 shows the off-current calculated by the current measurement described above. Note that Figure 15 is the source. -This shows the relationship between the drain voltage V and the off-current I. From Figure 15, source-drain It was found that the off-current is approximately 40 zA / μm at an input voltage of 4V. It was found that at a drain voltage of 3.1V, the off-current is 10 zA / μm or less. It was. Also, 1zA is 10 -21 It represents A.
[0272] In this embodiment, a transistor using a highly purified oxide semiconductor is It was confirmed that the current was sufficiently reduced.
[0273] (Embodiment 6) The liquid crystal display devices disclosed herein are applicable to a variety of electronic devices (including gaming machines). This can be done. As for electronic devices, for example, television equipment (television, or television) (Also called a receiver), computer monitors, digital cameras, digital video cameras Cameras such as Mera, digital photo frames, mobile phones (also known as mobile phones or mobile phone devices) (u) Portable game consoles, personal information terminals, sound playback devices, and large game machines such as pachinko machines. Examples include the above. Regarding the example of an electronic device equipped with a liquid crystal display device as described in the above embodiment, I will explain.
[0274] Figure 16(A) shows an e-book, consisting of a casing 9630 and a display unit 963 1. It may have an operation key 9632, a solar cell 9633, and a charge / discharge control circuit 9634. The e-book shown in Figure 16(A) contains various types of information (still images, videos, text images, etc.). Functions to display, such as a calendar, date or time, on the display unit, and display on the display unit Functions to manipulate or edit the information, and control processing by various software (programs). It can have functions such as controlling the system. Note that in Figure 16(A), the charge / discharge control circuit 9634 Examples include battery 9635 and DC-DC converter (hereinafter abbreviated as converter) 96 A configuration having 36 is shown. Liquid crystal display shown in any of Embodiments 1 to 5 By applying the device to the display unit 9631, a low-power e-book can be created.
[0275] By using the configuration shown in Figure 16(A), the display unit 9631 can be semi-transmissive or reflective. When using a liquid crystal display device, it is expected that it will be used in relatively bright conditions, and solar cell 963 This is suitable because it allows for efficient power generation by 3 and charging by battery 9635. The solar cell 9633 can be appropriately installed in the available space (front or back) of the housing 9630. This allows for a configuration that efficiently charges the 9635 battery. It is suitable. Furthermore, if a lithium-ion battery is used for the 9635 battery, miniaturization is possible. It has advantages such as being able to measure [something].
[0276] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 16(A) are shown in Figure 16(B). The block diagram is shown and explained below. Figure 16(B) shows the solar cell 9633 and the battery 963 5. Converter 9636, Converter 9637, Switches SW1 to SW3, Display unit 96 31 indicates battery 9635, converter 9636, converter 963 7. Switches SW1 to SW3 correspond to the charge / discharge control circuit 9634.
[0277] First, let's explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panels is converted to a voltage suitable for charging the 9635 battery. The voltage is boosted or lowered at 9636. Then, the solar cell 9 controls the operation of the display unit 9631. When power from 633 is used, switch SW1 is turned ON, and converter 9637 The voltage will be increased or decreased to the voltage required for the display unit 9631. If you do not want the display to work, turn SW1 off and SW2 on and use battery 9635 The configuration should be such that it charges the device.
[0278] Next, we will explain an example of operation when the solar cell 9633 does not generate electricity due to ambient light. The power stored in battery 9635 is converted by turning on switch SW3. The voltage is increased or decreased by the 9637. Then, the battery operates in accordance with the operation of the display unit 9631. The power will be supplied from the Lee 9635.
[0279] Note that the solar cell 9633 was shown as an example of a charging method, but other means of charging are also available. The configuration may also include charging the Terry 9635. Alternatively, it may be done in combination with other charging methods. It can also be used as a composition.
[0280] Figure 17 shows a notebook-type personal computer, consisting of the main unit 3001, the casing 3002, and the front It consists of an indicator unit 3003, a keyboard 3004, and the like. Embodiments 1 to 5 By applying the liquid crystal display device shown in any of the above to the display unit 3003, a low power consumption noise is achieved. It can be used as a mobile-type personal computer.
[0281] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case. [Explanation of symbols]
[0282] 100 LCD display device 110 Image Processing Circuit 111 Memory circuit 111b Frame memory 112 Comparison circuit 113 Display control circuit 115 Selection Circuit 116 Power supply 120 Display Panel 121 Drive circuit section 121A Gate wire side drive circuit 121B Source Line Side Drive Circuit 122 pixel section 123 pixels 124 Gate Line 125 Source Line 126 Terminal section 126A terminal 126B terminal 127 Switching elements 128 Common electrode 130 Backlight section 131 Backlight control circuit 132 Backlight 210 Capacitive elements 213 pixels 214 transistors 215 liquid crystal elements 400 circuit boards 401 Guard Layer 402 Gate Insulation Layer 403 Oxide semiconductor layer 405a Source electrode layer 405b Drain electrode layer 407 Insulating film 409 Protective insulating layer 410 transistors 411 pixel electrodes 412 Contact Holes 413 Alignment film 414 liquid crystal layer 415 Counter electrode 416 Opposing substrate 417 Capacitive wiring layer 418 Capacitive electrode layer 419 Holding capacity 420 transistors 427 Insulating layer 430 transistors 436a Wiring layer 436b wiring layer 437 Insulating layer 440 transistors 505 circuit board 506 Protective insulating layer 507 Gate Insulation Layer 510 transistors 511 Gridgate Layer 515a Source electrode layer 515b Drain electrode layer 516 Insulating layer 530 Oxide semiconductor film 531 Oxide semiconductor layer 601 period 602 period 603 period 604 period 700 cabinets 701 Display Module 702 speaker 703 Operation Keys 704 External connection terminal 705 Illuminance Sensor 710 Television receiver 711 Tuner 712 Digital Demodulation Circuit 713 Video signal processing circuit 714 Audio signal processing circuit 715 Display adjustment circuit 716 Display Control Circuit 717 Display Panel 718 Gate line side drive circuit 719 Source Line Side Drive Circuit 720 speakers 721 Antenna 722 External Input Section 723 Dotted line section 724 Image Processing Circuit 800 units 801 Display Module 802 speaker 803 External connection terminal 804 Window-type display unit 810 PC Monitor 813 Video signal processing circuit 814 Audio signal processing circuit 815 Audio signal processing circuit 816 Display Control Circuit 817 Display Panel 818 Gate line side drive circuit 819 Source Line Side Drive Circuit 820 speakers 821 External arithmetic circuit 822 External operation means 823 Dotted line section 824 Image Processing Circuit 1001 Anode 1002 Cathode 1003 EL layer 1004 Middle Class 1011 Hole injection layer 10¹² Hole transport layer 1013 Emitting layer 1014 Electron transport layer 1015 Electron injection layer 1020 circuit board 1025 EL element 1401 period 1402 period 1403 period 1404 period 3001 Main Unit 3002 enclosure 3003 Display section 3004 Keyboard 5201 Backlight section 5202 Diffuser 5203 Light guide plate 5204 Reflector 5205 Lamp Reflector 5206 Light source 5207 Display Panel 5222 Lamp Reflector 5223 Light-emitting diode (LED) 5290 Backlight section 5291 Diffuser 5292 Light-shielding part 5293 Lamp Reflector 5294 light source 5295 LCD panel 9630 cabinet 9631 Display section 9632 Operation Keys 9633 Solar Cell 9634 Charge / Discharge Control Circuit 9635 Battery 9636 converter 9637 Converter
Claims
1. A pixel section having multiple pixels arranged in a matrix, A drive circuit section electrically connected to the aforementioned pixel section, It has a display panel that includes a switching element, Each of the aforementioned plurality of pixels is The first transistor and The first transistor and a liquid crystal element electrically connected thereto The switching element has a second transistor, The first transistor is electrically connected to the second transistor via the liquid crystal element. Each of the first and second transistors includes a first oxide semiconductor film, a second oxide semiconductor film in contact with the first oxide semiconductor film and having a greater thickness than the first oxide semiconductor film, a gate insulating layer, and a gate electrode layer that overlaps with the first and second oxide semiconductor films via the gate insulating layer. Each of the first oxide semiconductor film and the second oxide semiconductor film has In, Ga, and Zn, and has a c-axis oriented crystalline region. The first oxide semiconductor film has a crystalline region in a region including the surface, and a crystalline region that serves as a seed for the second oxide semiconductor film. The off-current of the first transistor is less than 10 zaA / μm per 1 μm of channel width at room temperature. The off-current of the second transistor is less than 10 zA / μm per 1 μm of channel width at room temperature. The drive circuit unit has a first display mode in which an image signal is written sequentially to the selected pixels to display the image on the screen, and when images with different image signals in consecutive frames are displayed on the screen, an image signal is written for each frame; and a second display mode in which when images with the same image signals in consecutive frames are displayed on the screen, no new image signals are written, and the potential of the first electrode and the second electrode of the liquid crystal element become floating, thereby maintaining the voltage applied to the liquid crystal element. A display device in which the frequency of the first display mode is greater than the frequency of the second display mode.
2. A pixel section having multiple pixels arranged in a matrix, A drive circuit section electrically connected to the aforementioned pixel section, It has a display panel that includes a switching element, Each of the aforementioned plurality of pixels is The first transistor and The first transistor and a liquid crystal element electrically connected thereto The switching element has a second transistor, The first transistor is electrically connected to the second transistor via the liquid crystal element. Each of the first and second transistors includes a first oxide semiconductor film, a second oxide semiconductor film in contact with the first oxide semiconductor film and having a greater thickness than the first oxide semiconductor film, a gate insulating layer, and a gate electrode layer that overlaps with the first and second oxide semiconductor films via the gate insulating layer. Each of the first oxide semiconductor film and the second oxide semiconductor film has In, Ga, and Zn, and has a c-axis oriented crystalline region. The first oxide semiconductor film has a crystalline region in a region including the surface, and a crystalline region that serves as a seed for the second oxide semiconductor film. The off-current of the first transistor is less than 10 zaA / μm per 1 μm of channel width at room temperature. The off-current of the second transistor is less than 10 zA / μm per 1 μm of channel width at room temperature. The lower surface of the first oxide semiconductor film has a region in contact with the first insulating film having silicon oxide. The upper surface of the second oxide semiconductor film has a region in contact with the second insulating film having silicon oxide. The first insulating film has the function of the gate insulating layer, The second insulating film has a plurality of defects, The drive circuit unit has a first display mode in which an image signal is written sequentially to the selected pixels to display the image on the screen, and when images with different image signals in consecutive frames are displayed on the screen, an image signal is written for each frame; and a second display mode in which when images with the same image signals in consecutive frames are displayed on the screen, no new image signals are written, and the potential of the first electrode and the second electrode of the liquid crystal element become floating, thereby maintaining the voltage applied to the liquid crystal element. A display device in which the frequency of the first display mode is greater than the frequency of the second display mode.