Semiconductor device, method for manufacturing a semiconductor device, and power conversion device

Abstract

To provide a semiconductor device having a structure of directly bonding a lead electrode to a semiconductor element through a bonding layer, in which whether the bonding layer has a predetermined thickness can be checked through a visual inspection, a method of manufacturing the semiconductor device, and a power conversion device on which the semiconductor device is mounted.SOLUTION: A semiconductor device 10 includes: a semiconductor element 15 mounted on an insulating substrate 12 or a lead frame; a bonding layer 13a formed on the semiconductor element 15; a body plate 19a electrically connected to an external electrode 19c; and a lead electrode 19 having a cantilevered plate 19b cut from the body plate 19a while one end of the cantilevered plate is connected as a connection part with the body plate 19a. The cantilevered plate 19b is bent in a direction of the semiconductor element 15 with respect to the body plate 19a, and has the other end embedded in the bonding layer 13a, the bonding layer 13a covering at least a part of an upper surface of the cantilevered plate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a method for manufacturing a semiconductor device, and a power conversion device.

Background Art

[0002] As a technique for realizing a large current, long life, and high reliability in a semiconductor device used in a power conversion device or the like, instead of connecting a lead electrode and a semiconductor element with a metal wire, a technique of directly joining a lead electrode and a semiconductor element through a bonding layer is known. In the case of a structure in which a lead electrode and a semiconductor element are directly joined through a bonding layer, since the lead electrode and the semiconductor element are made of materials having different coefficients of thermal expansion, stress caused by the difference in the coefficient of thermal expansion is applied to the bonding layer. Therefore, it is important that the bonding layer has a certain thickness and the generation of voids is suppressed so that peeling does not occur in the bonding layer. For example, as one of the prior arts, as disclosed in Patent Document 1, a technique is disclosed in which holes for allowing gas generated during solder melting to escape to the outside are provided on the bonding surface of a lead electrode.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the prior art described in Patent Document 1, although it is possible to visually observe the bonding layer through the holes provided on the bonding surface of the lead electrode, it is not possible to confirm the thickness of the actually formed bonding layer. Therefore, there is a problem that it is impossible to confirm whether or not the bonding layer has a predetermined thickness by visual inspection.

[0005] This disclosure was made to solve the above-mentioned problems, and aims to provide a semiconductor device in which, in a structure in which a lead electrode and a semiconductor element are directly joined via a bonding layer, it is possible to confirm by visual inspection whether or not the bonding layer has a predetermined thickness. [Means for solving the problem]

[0006] A semiconductor device according to one aspect of the present disclosure comprises a semiconductor element mounted on an insulating substrate or lead frame, a bonding layer formed on the semiconductor element, a lead electrode having a main plate portion electrically connected to an external electrode, and a cantilever plate portion cut out from the main plate portion with one end connected to the main plate portion as a connection portion, wherein the cantilever plate portion is bent toward the semiconductor element relative to the main plate portion, with the other end inserted into the bonding layer, and at least a part of its upper surface is covered by the bonding layer. [Effects of the Invention]

[0007] According to this disclosure, a semiconductor device can be obtained in which, in a structure in which lead electrodes and semiconductor elements are directly joined via a bonding layer, it is possible to confirm by visual inspection whether or not the bonding layer has a predetermined thickness. [Brief explanation of the drawing]

[0008] [Figure 1] A schematic cross-sectional view of the semiconductor device 10 according to Embodiment 1. [Figure 2] This diagram shows an excerpt of the area where the lead electrodes are shown in the top view of the semiconductor device 10 according to Embodiment 1. [Figure 3] A schematic cross-sectional view of a semiconductor device 20 according to a modified example 1 of Embodiment 1. [Figure 4] This figure shows an excerpt of the area where the lead electrodes are shown in the top view of the semiconductor device 20 according to a modified example 2 of Embodiment 1. [Figure 5] A schematic cross-sectional view of the semiconductor device 30 according to Embodiment 2. [Figure 6]A schematic cross-sectional view of a semiconductor device using conventional technology, where the distance between the semiconductor element 15 and the lead electrode 41 is increased. [Figure 7] A schematic cross-sectional view of the semiconductor device according to Embodiment 2, where the distance between the semiconductor element 15 and the lead electrode 31 is increased. [Figure 8] A perspective view showing an example of the structure of a cantilever plate portion according to Embodiment 3. [Modes for carrying out the invention]

[0009] An example of a semiconductor device relating to this disclosure is shown below, but the invention is not limited to the embodiments shown below and can be modified and implemented at will without departing from the gist of this disclosure.

[0010] Embodiment 1. Figure 1 is a schematic cross-sectional view of the semiconductor device 10 according to Embodiment 1, and Figure 2 is an excerpt of the area where the lead electrodes 19 are shown in the top view of the semiconductor device 10. First, as shown in Figure 1, the semiconductor device 10 includes a base plate 11, an insulating substrate 12, bonding layers 13a, 13b, 13c, bumps 14, semiconductor elements 15, adhesive 16, encapsulating material 17, case 18, lead electrodes 19, and external electrodes 19c. The specific configuration of the semiconductor device 10 is shown below, with the side of the base plate 11 to which the insulating substrate 12 is bonded being considered upwards, and the side of the base plate 11 to which the insulating substrate 12 is not bonded being considered downwards.

[0011] The semiconductor device 10 has an insulating substrate 12 bonded to a base plate 11 by a bonding layer 13c. The insulating substrate 12 has a circuit pattern 12c formed on the lower surface of the insulating layer 12b and a circuit pattern 12a formed on the upper surface of the insulating layer 12b. Bumps 14 are formed on the upper surface of the insulating substrate 12, and a semiconductor element 15, which is placed on the insulating substrate 12 via the bumps 14, is bonded to the insulating substrate 12 by a bonding layer 13b. Lead electrodes 19 are bonded to the semiconductor element 15 by a bonding layer 13a. The lead electrodes 19 are bent in the direction of the semiconductor element 15 and embedded in the bonding layer 13a, and at least a part of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a. Here, the upper surface of the cantilever plate portion 19b is the surface opposite to the surface of the cantilever plate portion 19b that faces the semiconductor element 15. Therefore, the lower surface of the cantilever plate portion 19b is the surface of the cantilever plate portion 19b that faces the semiconductor element 15. Furthermore, a case 18 for housing the semiconductor element 15 is provided, and the case 18 is bonded to the base plate 11 by adhesive 16. The case 18 also supports an external electrode 19c that is electrically connected to the lead electrode 19. The semiconductor element 15 housed in the case 18 is sealed with a sealing material 17.

[0012] The base plate 11 is preferably made of a material with excellent thermal conductivity, specifically aluminum (Al) or copper (Cu), etc. The insulating layer 12b is preferably an insulator with excellent thermal conductivity. The insulator can be ceramic or resin. Specific examples include aluminum nitride (AlN) or silicon nitride (Si3N4). For the circuit pattern 12a on the upper surface of the insulating layer 12b and the circuit pattern 12c on the lower surface of the insulating layer 12b, materials such as aluminum (Al) or copper (Cu) are used.

[0013] Furthermore, solder is used for the bonding layers 13a, 13b, and 13c, and aluminum (Al) is used for the bumps 14. Alternatively, a paste material in which metal particles such as silver are dispersed in an organic solvent may be used instead of solder.

[0014] The semiconductor device 15 includes, in addition to semiconductor devices using Si, semiconductor devices using wide-bandgap semiconductors having a larger bandgap than Si. Specific examples of wide-bandgap semiconductors include, for example, silicon carbide (SiC), gallium nitride (GaN), diamond (C), etc. Also, the type of semiconductor device is not particularly limited, and semiconductor devices such as IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), RC-IGBT (Reverse Conducting IGBT) in which an IGBT and a diode are integrated as one semiconductor chip, or HEMT (High Electron Mobility Transistor) are applicable. For simplicity, in FIG. 1, the case where the number of semiconductor devices mounted on the insulating substrate 12 is only one of the semiconductor devices 15 is shown, but it is not limited thereto, and the necessary types and necessary numbers of semiconductor devices may be mounted according to the application.

[0015] As a representative example, a silicone-based or epoxy-based adhesive is used as the adhesive 16.

[0016] The encapsulant 17 desirably has an elastic modulus that can ensure adhesion with the semiconductor device 15, lead electrodes 19, etc. accommodated in the case 18, and a heat-resistant temperature that can ensure reliability. For example, the encapsulant 17 desirably has an elastic modulus of about 200 mPa·s or less and a heat-resistant temperature of about 150°C or higher. Specific examples of the encapsulant 17 include, but are not limited to, silicone gel or epoxy resin.

[0017] The case 18 is made of a resin that has a softening temperature at which it does not thermally deform in the operating temperature range of the semiconductor device and has insulation properties. Specific examples of the case 18 include, but are not limited to, Poly Phenylene Sulfide (PPS) whose softening temperature is 280°C or higher.

[0018] The lead electrode 19 has a main plate portion 19a and a cantilever plate portion 19b, and is a flat plate with a thickness of approximately 0.5 mm to 2.0 mm. The material is, for example, Cu or a material containing Cu. In Figure 1, the lead electrode 19 and the external electrode 19c are shown as a single electrode formed integrally, but they only need to be electrically connected. The individually formed lead electrode 19 and external electrode 19c may be electrically connected by soldering, welding, ultrasonic bonding, or via a circuit pattern within the semiconductor device. As shown in Figures 1 and 2, the lead electrode 19 has a main plate portion 19a electrically connected to the external electrode 19c, and a cantilever plate portion 19b cut from the main plate portion 19a with one end connected to the main plate portion 19a as a connection point. The cantilever plate portion 19b is bent diagonally toward the semiconductor element 15 relative to the main plate portion 19a, with the other end embedded in the bonding layer 13a, and is electrically connected to the semiconductor element 15 via the bonding layer 13a. Here, the thickness of the bonding layer 13a is greater than or equal to the thickness of the cantilever portion 19b, and is between approximately 0.5 mm and approximately 10.0 mm, with a portion of the bonding layer 13a covering at least a portion of the upper surface of the cantilever portion 19b. This is because, when the bonding layer 13a satisfies the desired thickness, the thickness, length, and bending angle of the cantilever portion 19b, as well as the distance between the lead electrode 19 and the semiconductor element, are designed such that the bonding layer 13a covers at least a portion of the upper surface of the cantilever portion 19b, and specifications can be applied according to each semiconductor device. In other words, if the bonding layer 13a satisfies the predetermined thickness, at least a portion of the upper surface of the cantilever portion 19b is covered by the bonding layer 13a, and if the bonding layer 13a does not satisfy the predetermined thickness, a specification can be applied in which the upper surface of the cantilever portion 19b is not covered by the bonding layer 13a. In other words, this structure allows for confirmation of whether the thickness of the bonding layer 13a satisfies a predetermined thickness by visually checking whether at least a portion of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a, without having to perform non-destructive testing using an inspection device that utilizes ultrasound, X-rays, or lasers.In addition, in FIG. 2, the shape of the cantilever plate portion 19b is shown as a quadrilateral obtained by punching out the other three sides including the opposite side that becomes the free end with one side connected to the main body plate portion 19a as the fixed end. However, the present invention is not limited to this. As long as it is possible to determine whether at least a part of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a, a trapezoid, a triangle, or any other shape can be applied.

[0019] In addition, in FIG. 1, the semiconductor element 15 is placed on the insulating substrate 12 via the bumps 14 and the bonding layer 13b. However, a configuration without the bumps 14 may also be used. Further, as also shown in Modification Example 1 of Embodiment 1 described later, a lead frame may be applied instead of the insulating substrate 12 on which the semiconductor element 15 is placed. Furthermore, in FIG. 1, for the purpose of explaining the present disclosure, signal lines, wires, signal terminals, etc. for electrically connecting the semiconductor element 15 and the like in the semiconductor device 10 are not shown. Also, each of the above-described materials is a representative example, and the present disclosure is not limited thereto as long as the effects of the present disclosure can be obtained.

[0020] Next, a method for manufacturing the semiconductor device 10 is shown below. First, as a semiconductor element bonding step, the lower surface of the insulating substrate 12 and the base plate 11 are bonded via the bonding layer 13c, and the upper surface of the insulating substrate 12 and the semiconductor element 15 are bonded via the bonding layer 13b. As the bonding method, the bonding materials applied to the bonding layers 13b and 13c are heated to a temperature exceeding the melting point, and the base plate 11, the insulating substrate 12, and the semiconductor element 15 are bonded via the bonding layers 13b and 13c. In addition, as the bonding materials for forming the bonding layers 13b and 13c, pre-formed plate solder or the like may be used, or solder paste or the like applied by screen printing or dispensing may also be used.

[0021] Next, as a case bonding step, the case 18 and the base plate 11 are bonded using the adhesive 16. In the bonding, the case 18 and the base plate 11 may be fixed with a clamp jig or the like, and a process of solidifying the adhesive 16 by heating may be included. Further, the case 18 and the base plate 11 may be further fixed with a tapping screw (not shown) or the like.

[0022] Next, as a bonding layer formation step, a bonding layer 13a is formed on the semiconductor element 15. The bonding layer 13a may be supplied onto the semiconductor element 15 by dispensing, screen printing, or other methods before the lead electrodes 19 are placed on the semiconductor element 15, or it may be supplied by dispensing through the opening of the lead electrodes 19 created by forming the cantilever plate portion 19b after the lead electrodes 19 have been placed. In addition, solder may be flowed onto the semiconductor element 15 in advance in other steps such as the semiconductor element bonding step and the case bonding step.

[0023] Next, as a direct bonding step, a lead electrode 19 having a cantilever portion 19b is bonded to the semiconductor element 15 via a bonding layer 13a. For simplicity, it is assumed that the cantilever portion 19b is already formed on the lead electrode 19 by press working or the like. After placing the lead electrode 19 on the semiconductor element 15 via the bonding layer 13a, the lead electrode 19 having the cantilever portion 19b is bonded to the semiconductor element 15 by heating it to a temperature exceeding the melting point of the bonding material constituting the bonding layer 13a.

[0024] Next, as a determination step, the thickness of the bonding layer 13a is determined by visual inspection of the cantilever plate portion 19b exposed from the bonding layer 13a to determine whether the thickness of the bonding layer 13a satisfies a predetermined thickness. The determination method involves visual inspection to confirm whether at least a portion of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a, thereby determining whether the thickness of the bonding layer 13a satisfies a predetermined thickness. In addition to visual inspection using an optical microscope, the visual inspection method may also be performed using images captured with a camera. Furthermore, in an automated inspection device, it is also possible to use a method that uses image recognition on the captured image and makes an automatic determination by comparing the captured image with a predetermined pattern, or a method that makes an automatic determination by comparing the captured image with a pattern learned using AI technology.

[0025] Next, as a connection process, electrical connections necessary for control are made to the semiconductor elements 15, circuit patterns 12a and 12c, and other signal circuits (not shown) within the semiconductor device. Specifically, electrical connections are made by ultrasonic bonding of wires such as aluminum (Al) and gold (Au), but are not limited to this method.

[0026] Next, as a sealing step, the inside of the case 18 is sealed with a sealing material 17. As mentioned above, silicone gel, epoxy resin, etc., are often used as the sealing material 17, but it is not limited to these, and a sealing material having the desired physical properties such as heat resistance temperature, coefficient of linear expansion, and modulus of elasticity can be applied. In addition, if necessary, a curing treatment is performed to harden the sealing material 17. As described above, the semiconductor device 10 can be manufactured. Note that electrical characteristic testing during and after the manufacturing process can be added as needed.

[0027] By applying the semiconductor device configured in this way, it is possible to determine whether the bonding layer 13a satisfies a predetermined thickness by visually confirming whether at least a portion of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a.

[0028] As described above, the semiconductor device 10 according to Embodiment 1 comprises a semiconductor element 15 placed on an insulating substrate 12 or a lead frame, a bonding layer 13a formed on the semiconductor element 15, a lead electrode 19 having a main plate portion 19a electrically connected to an external electrode 19c, and a cantilever plate portion 19b cut out from the main plate portion 19a with one end connected to the main plate portion 19a as a connection portion, wherein the cantilever plate portion 19b is bent toward the semiconductor element 15 relative to the main plate portion 19a, with the other end inserted into the bonding layer 13a, and when the bonding layer 13a exceeds a predetermined thickness, at least a part of the upper surface is covered by the bonding layer 13a, and when the bonding layer 13a is less than or equal to the predetermined thickness, the upper surface is not covered by the bonding layer 13a.

[0029] With this configuration, a semiconductor device can be obtained in which, in a structure in which the lead electrode 19 and the semiconductor element 15 are directly joined via a bonding layer 13a, it is possible to confirm by visual inspection whether or not the bonding layer 13a has a predetermined thickness. Furthermore, by applying visual inspection, it is possible to suppress the increase in manufacturing costs compared to when non-destructive testing is applied.

[0030] Furthermore, the manufacturing method for the semiconductor device 10 according to Embodiment 1 comprises a bonding layer formation step of forming a bonding layer 13a on a semiconductor element 15, a direct bonding step of inserting the other end of a cantilever plate portion 19b, which has been cut from the main plate portion 19a with one end connected as a connection portion between the lead electrode 19 and the main plate portion 19a, into the bonding layer 13a and bonding it to the semiconductor element 15, and a determination step of determining whether or not the bonding layer 13a has a predetermined thickness by visual inspection of the cantilever plate portion 19b exposed from the bonding layer 13a.

[0031] With this configuration, it is possible to provide a method for manufacturing a semiconductor device in which, in a structure in which the lead electrode 19 and the semiconductor element 15 are directly joined via a bonding layer 13a, it is possible to confirm by visual inspection whether or not the bonding layer 13a has a predetermined thickness.

[0032] Modification 1 of Embodiment 1. Figure 3 is a schematic cross-sectional view of a semiconductor device 20 according to a modified example 1 of Embodiment 1. As shown in Figure 3, the semiconductor device 20 has a lead frame 21, a bonding layer 13a, a bonding layer 13b, bumps 14, a semiconductor element 15, a sealing material 17, lead electrodes 19, and external electrodes 19c. The specific configuration of the semiconductor device 20 is shown below, with the side of the lead frame 21 to which the semiconductor element 15 is bonded being considered upwards, and the side of the lead frame 21 to which the semiconductor element 15 is not bonded being considered downwards. The semiconductor device 20 differs from the semiconductor device 10 shown in Embodiment 1 in that the semiconductor device 20 is mounted on a lead frame instead of an insulating substrate, and the entire semiconductor device is sealed with a sealing material without a case, thus taking the form of a lead frame package. Other configurations are the same as in Embodiment 1. In the semiconductor device 20, the semiconductor element 15, which is mounted on the lead frame 21 via bumps 14, is bonded by a bonding layer 13b. The semiconductor element 15, lead electrodes 19, and lead frame 21 are sealed with a sealing material 17, and the external electrodes 19c are exposed from the sealing material 17. Other configurations are the same as in Embodiment 1. In the semiconductor device 20, the back surface of the lead frame 21 on which the semiconductor element 15 is not mounted is shown to be sealed only with the sealing material 17. However, this is not the only configuration, and other configurations such as mounting a heat spreader on the back surface of the lead frame 21 via an insulating sheet may also be adopted. Furthermore, one side of the lead frame 21 may have a circuit pattern.

[0033] By applying a semiconductor device configured in this way, even if the semiconductor device is in the form of a lead frame package, it is possible to determine whether the bonding layer 13a satisfies a predetermined thickness by visually checking whether at least a part of the upper surface of the cantilever plate portion 19b is covered by the bonding layer 13a.

[0034] As described above, the semiconductor device 20 according to Modification 1 of Embodiment 1 comprises a semiconductor element 15 placed on a lead frame 21, a bonding layer 13a formed on the semiconductor element 15, and a lead electrode 19 bonded to the semiconductor element 15 via the bonding layer 13a and having a cantilever plate portion 19b that bends in the direction of the semiconductor element 15 and contacts the bonding layer 13a. The bonding layer 13a is characterized in that, if it exceeds a predetermined thickness, it covers at least a part of the upper surface of the cantilever plate portion 19b, and if it is less than or equal to the predetermined thickness, it does not ride up on the upper surface of the cantilever plate portion 19b.

[0035] With this configuration, similar to Embodiment 1, it is possible to obtain a semiconductor device in which, in a structure in which the lead electrode 19 and the semiconductor element 15 are directly joined via a bonding layer 13a, it is possible to confirm by visual inspection whether or not the bonding layer 13a has a predetermined thickness.

[0036] Modification 2 of Embodiment 1. Figure 4 is a top view of the lead electrode 22 according to a modified example 2 of Embodiment 1. As shown in Figure 4, the semiconductor device according to the modified example 2 of Embodiment 1 differs from Embodiment 1 in that a scale 23 is provided on the upper surface of the cantilever plate portion 22a. The other configurations are the same as those of Embodiment 1. Methods for forming the scale 23 include, but are not limited to, methods such as stamping, ink printing, or laser marking, and can be applied arbitrarily. Also, in Figure 4, for simplicity, the case in which the scale 23 is simply equally spaced is shown. This makes it possible to determine not only whether the bonding layer 13a satisfies a predetermined thickness, but also, for example, whether the bonding layer 13a is within the allowable range of a predetermined thickness, by visual inspection. Other examples include providing a scale that indicates the upper and lower limits of the thickness that the bonding layer 13a should accommodate, or providing a unique reference line according to the specifications of each product. This makes it possible to improve the inspection accuracy of the thickness of the bonding layer 13a by visual inspection compared to when no scale is provided.

[0037] As described above, the semiconductor device according to the modified example 2 of Embodiment 1 is characterized in that, in addition to the configuration of the semiconductor device described in Embodiment 1, the cantilever plate portion 22a is provided with a scale 23 on its upper surface.

[0038] With this configuration, in a structure in which the lead electrode 22 and the semiconductor element 15 are directly joined via a bonding layer 13a, in addition to the same effects as in Embodiment 1, the area on the upper surface of the cantilever plate portion 22a covered by the bonding layer 13a can be confirmed using the scale 23. Therefore, a semiconductor device can be obtained in which whether or not the bonding layer 13a satisfies a predetermined thickness can be confirmed more accurately by visual inspection.

[0039] Embodiment 2. Figure 5 is a schematic cross-sectional view of a semiconductor device 30 according to Embodiment 2. Figure 6 is a schematic cross-sectional view of a semiconductor device 40 to which the prior art is applied, in which the distance between the semiconductor element 15 and the lead electrode 41 is increased. Figure 7 is a schematic cross-sectional view of a semiconductor device 30 according to Embodiment 2, in which the distance between the semiconductor element 15 and the lead electrode 31 is increased. Note that in Figures 6 and 7, for simplicity, the view is enlarged, focusing on the junction between the semiconductor element and the lead electrode. As shown in Figure 5, the semiconductor device 30 according to Embodiment 2 differs from Embodiment 1 in that the flexible cantilever portion 31a contacts and deforms on the upper surface of the semiconductor element 15. The other configurations are the same as in Embodiment 1. By contacting and deforming the upper surface of the semiconductor element 15, the cantilever portion 31a can follow the upper surface of the semiconductor element 15 whether the distance between the semiconductor element 15 and the lead electrode 31 changes in a direction that shortens or lengthens. For example, in a direct bonding process, the distance between the semiconductor element 15 and the lead electrode 31 may change due to tolerances in the shape and dimensions of the components constituting the semiconductor device 30, as well as deformation due to heating. In conventional semiconductor devices, if the distance between the semiconductor element and the lead electrode changes, the bonding layer 13a may not be able to follow the change in distance, which can cause defects such as bonding failure or damage. On the other hand, in the semiconductor device according to Embodiment 2, since the lead electrode 31 including the cantilever plate portion 31a is flexible, the cantilever plate portion 31a can follow changes in the distance between the semiconductor element 15 and the lead electrode 31, thus suppressing the occurrence of malfunctions compared to the conventional device.

[0040] As a more specific example, Figures 6 and 7 illustrate the case where the distance between the semiconductor device and the lead electrode increases. As shown in Figure 6, in a semiconductor device using the conventional technology, when the distance between the semiconductor element 15 and the lead electrode 41 increases, the cross-sectional area of ​​a portion of the junction layer 13a between the semiconductor element 15 and the lead electrode 41 deforms in a direction that decreases. In the area of ​​the junction layer 13a where the cross-sectional area has decreased, the current density per unit area increases compared to before the deformation, and when a large current flows, it can cause localized heat generation and lead to failure, which can ultimately lead to a decrease in the lifespan of the semiconductor device. On the other hand, as shown in Figure 7, in the semiconductor device according to Embodiment 2, even when the distance between the semiconductor element 15 and the lead electrode 31 increases, the cantilever plate portion 31a deforms in a direction that follows the upper surface of the semiconductor element 15. By deforming the cantilever portion 31a in a direction that follows the upper surface of the semiconductor element 15, the reduction in the cross-sectional area of ​​the junction layer 13a between the semiconductor element 15 and the lead electrode 31 is suppressed, making it easier to maintain electrical connection compared to conventional designs. This is also true when the distance between the semiconductor element and the lead electrode is shortened, and in conventional semiconductor devices, stress can be generated between the semiconductor element 15 and the lead electrode 31, potentially causing damage to the semiconductor device. On the other hand, in the semiconductor device of Embodiment 2, the flexible cantilever portion 31a deforms to absorb the stress between the semiconductor element 15 and the lead electrode 31, thus preventing damage to the semiconductor element 15. In other words, by configuring the semiconductor device 30 in a deformed state where the flexible cantilever portion 31a is in contact with the upper surface of the semiconductor element 15, it is possible to prevent malfunctions between the semiconductor element 15 and the lead electrode 31, whether the distance between the semiconductor element 15 and the lead electrode 31 changes in a shortening direction or in a lengthening direction. Furthermore, if the only concern is deformation in a direction that shortens the distance between the semiconductor element 15 and the lead electrode 31, then it is sufficient to have a function that can absorb the stress caused by the shortening of the distance between the semiconductor element 15 and the lead electrode 31, and therefore the flexible cantilever plate portion 31a does not necessarily need to be in contact with the upper surface of the semiconductor element 15.

[0041] As described above, the semiconductor device 30 according to Embodiment 2 is characterized in that, in addition to the configuration of the semiconductor device described in Embodiment 1, the cantilever plate portion 31a is flexible.

[0042] With this configuration, in a structure in which the lead electrode 31 and the semiconductor element 15 are directly joined via a bonding layer 13a, it is possible to obtain a semiconductor device 30 that, in addition to the same effects as in Embodiment 1, can absorb stress caused by the shortened distance between the semiconductor element 15 and the lead electrode 31.

[0043] Furthermore, the semiconductor device 30 according to Embodiment 2 may also be characterized in that, in addition to the configuration of the semiconductor device described in Embodiment 1, the cantilever plate portion 31a is in contact with the semiconductor element 15 and is deformed.

[0044] With this configuration, in a structure in which the lead electrode 31 and the semiconductor element 15 are directly joined via a bonding layer 13a, in addition to the same effects as in Embodiment 1, it is possible to obtain a semiconductor device that can prevent malfunctions occurring between the semiconductor element 15 and the lead electrode 31, whether the distance between the semiconductor element 15 and the lead electrode 31 changes in the direction of shortening or lengthening. In Embodiment 2, the case in which the cantilever plate portion 31a is flexible is shown, but it is sufficient if the effect of absorbing stress is obtained, and the cantilever plate portion 31a may also be elastic.

[0045] Embodiment 3. Figure 8 is a perspective view showing an example of the structure of a cantilever plate portion according to Embodiment 3. Figure 8(a) is a cantilever plate portion having a stepped structure that extends from one end connected to the main plate portion toward the direction of the semiconductor element toward the other end. Figure 8(b) is a cantilever plate portion having a spiral stepped structure that extends from one end connected to the main plate portion toward the direction of the semiconductor element toward the other end. Figure 8(c) is a cantilever plate portion having a nested stepped structure that extends from one end connected to the main plate portion toward the direction of the semiconductor element toward the other end. As shown in Figures 8(a), (b), and (c), the semiconductor device according to Embodiment 3 differs from Embodiment 1 in that the cantilever plate portion has a stepped structure extending from one end connected to the main plate portion toward the semiconductor element. The other configurations are the same as those of Embodiment 1. By applying the cantilever plate portion shown in Figures 8(a), (b), and (c), the shape of the cantilever plate portion exposed from the bonding layer 13a, as viewed from above, differs depending on the extent to which the bonding layer 13a covers the cantilever plate portion. In other words, by checking the shape of the cantilever plate portion exposed from the bonding layer 13a, it is possible to determine not only whether the bonding layer 13a satisfies a predetermined thickness, but also, for example, whether the bonding layer 13a is within the allowable range of a predetermined thickness, through visual inspection. As a result, even without providing scale lines on the cantilever plate portion, the accuracy of inspecting the thickness of the bonding layer 13a by visual inspection can be improved, similar to the modified example 2 of Embodiment 1. Furthermore, in the third embodiment, the shape of the cantilever plate portion exposed from the bonding layer 13a, when viewed from above, not only changes continuously according to the thickness of the bonding layer 13a, but also shows a different shape depending on whether the thickness of the bonding layer 13a exceeds the stepped structure of the cantilever plate portion. Therefore, improvements in inspection accuracy can be expected not only in the case of visual inspection but also when using image recognition. Furthermore, the stepped structure referred to here, which extends from one end connected to the main plate portion toward the semiconductor element, is not limited to Figures 8(a), (b), and (c), but includes any other arbitrary shape, as long as the shape of the cantilevered plate portion exposed from the bonding layer 13a differs from that of the bonding layer 13a as viewed from above, depending on the thickness of the bonding layer 13a.

[0046] As described above, the semiconductor device according to Embodiment 3 has the configuration of the semiconductor device described in Embodiment 1, in addition to the fact that the cantilever plate portion is formed in a stepped structure from one end to the other.

[0047] With this configuration, the shape of the cantilever portion exposed from the bonding layer, as viewed from above, differs depending on the extent to which the bonding layer covers the cantilever portion. Therefore, in a structure in which lead electrodes and semiconductor elements are directly bonded via a bonding layer, in addition to the same effects as in Embodiment 1, it is possible to obtain a semiconductor device in which it is possible to more accurately confirm by visual inspection whether or not the bonding layer satisfies a predetermined thickness without having to provide a scale on the cantilever portion.

[0048] Embodiment 4. Embodiment 4 is a power conversion device equipped with any of the semiconductor devices shown in Embodiments 1 to 3. Note that the semiconductor devices to be equipped are not limited to just one of those shown in Embodiments 1 to 3; a power conversion device equipped with multiple such devices is also possible.

[0049] As described above, the power conversion device according to Embodiment 4 is a power conversion device equipped with the semiconductor device described in any one of Embodiments 1 to 3.

[0050] In a power conversion device configured in this way, a semiconductor device can be applied that allows visual inspection to confirm whether the junction layer has a predetermined thickness, in a structure where lead electrodes and semiconductor elements are directly joined via a junction layer. This suppresses the increase in manufacturing costs that would otherwise be incurred by applying non-destructive testing. Therefore, a power conversion device can be obtained that suppresses the increase in manufacturing costs while using a semiconductor device with a structure in which lead electrodes and semiconductor elements are directly joined via a junction layer.

[0051] The various aspects of this disclosure are summarized below as an appendix.

[0052] (Note 1) A semiconductor element mounted on an insulating substrate or lead frame, A junction layer formed on the semiconductor element, A lead electrode having a main plate portion electrically connected to an external electrode, and a cantilever plate portion cut from the main plate portion with one end connected to the main plate portion as a connection portion, Equipped with, The cantilever plate portion is bent relative to the main plate portion toward the direction of the semiconductor element, with its other end embedded in the bonding layer, and at least a portion of its upper surface is covered by the bonding layer. A semiconductor device characterized by the following. A semiconductor device as described in Appendix 1, characterized by the above. (Note 2) The cantilever plate portion is the semiconductor device described in Appendix 1, wherein a scale is provided on the upper surface. (Note 3) The cantilever plate portion is formed in a stepped structure from one end to the other end, as described in Appendix 1 or Appendix 2, for the semiconductor device. (Note 4) The cantilever portion is a flexible semiconductor device according to any one of the appendices 1 to 3. (Note 5) The cantilever plate portion is in contact with the semiconductor element and deformed, as described in any one of Appendix 1 to Appendix 4, semiconductor device according to Appendix 4. (Note 6) A case for housing the aforementioned semiconductor element, An external electrode is provided, which is partially supported by the aforementioned case and electrically connected to the lead electrode, A semiconductor device according to any one of the appendices 1 to 5, having the following characteristics. (Note 7) A junction layer formation process, which involves forming a junction layer on a semiconductor device, A direct bonding process is performed in which one end of a cantilever plate portion, which is cut from the main plate portion with one end connected to the main plate portion of the lead electrode, is inserted into the bonding layer and bonded to the semiconductor element. A determination step of determining whether the bonding layer has a predetermined thickness by visual inspection of the cantilever plate portion exposed from the bonding layer, A method for manufacturing a semiconductor device having [a certain feature]. (Note 8) The determination step is performed by performing the visual inspection using image recognition. The method for manufacturing a semiconductor device as described in Appendix 7. (Note 9) A power conversion device equipped with a semiconductor device described in any one of the appendices 1 to 6. [Explanation of Symbols]

[0053] 10 Semiconductor Devices 11 Base plate 12 Insulating substrate 12a Circuit Pattern 12b Insulating layer 12c circuit pattern 13a Bonding layer 13b Bonding layer 13c bonding layer 14 Bump 15 Semiconductor devices 16 Adhesives 17. Sealing material 18 cases 19 Lead electrodes 19a Main body plate 19b Cantilever plate section 19c external electrode 20 Semiconductor equipment 21 Lead Frame 22 Lead electrodes 22a Cantilever plate section 23 divisions 30 Semiconductor Equipment 31 Lead electrodes 31a Cantilever plate section 40 Semiconductor Equipment 41 Lead electrodes

Claims

1. A semiconductor element mounted on an insulating substrate or lead frame, A junction layer formed on the semiconductor element, A lead electrode having a main plate portion electrically connected to an external electrode, and a cantilever plate portion cut from the main plate portion with one end connected to the main plate portion as a connection portion, Equipped with, The cantilever plate portion is bent relative to the main plate portion toward the direction of the semiconductor element, with its other end embedded in the bonding layer, and at least a portion of its upper surface is covered by the bonding layer. A semiconductor device characterized by the following.

2. The semiconductor device according to claim 1, wherein the cantilever plate portion has a scale provided on its upper surface.

3. The semiconductor device according to claim 1, wherein the cantilever plate portion is formed in a stepped structure from one end to the other end.

4. The cantilever portion is flexible, as described in claim 1.

5. The semiconductor device according to claim 4, wherein the cantilever plate portion is in contact with and deformed by the semiconductor element.

6. A case for housing the aforementioned semiconductor element, An external electrode is provided, which is partially supported by the aforementioned case and electrically connected to the lead electrode, A semiconductor device according to claim 1, having the following features.

7. A junction layer formation process, which involves forming a junction layer on a semiconductor device, A direct bonding process is performed in which one end of a cantilever plate portion, which is cut from the main plate portion with one end connected to the main plate portion of the lead electrode, is inserted into the bonding layer and bonded to the semiconductor element. A determination step of determining whether the bonding layer has a predetermined thickness by visual inspection of the cantilever plate portion exposed from the bonding layer, A method for manufacturing a semiconductor device having [a certain feature].

8. The determination step is performed by using image recognition for the visual inspection. The method for manufacturing a semiconductor device according to claim 7.

9. A power conversion device equipped with the semiconductor device described in claim 1.

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