Electronic circuits, methods, computer programs and electronic systems

Abstract

To enable easy evaluation of a protection function for semiconductor switching elements.SOLUTION: An electronic circuit according to the present embodiment includes a comparison circuit that detects a first voltage of a first node associated with a first end of a semiconductor switching element and outputs a first signal when the first voltage is a predetermined voltage or more, a first filter that includes a first switch connected between the first node and a second end of the semiconductor switching element and turns on the first switch for a first time on the basis of a control signal indicating conduction of the semiconductor switching element and a second filter that generates a second signal indicating an occurrence of an overcurrent in the semiconductor switching element when the first signal is output for a second time or more, and changes at least one of a first waveform, the second time, the first time, and the predetermined voltage related to the drive of the semiconductor switching element based on the control signal, on the basis of the second signal.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This embodiment relates to an electronic circuit, a method, a computer program, and an electronic system.

Background Art

[0002] When an overcurrent flows through a power device used in an inverter circuit or the like, the power device may be damaged. Therefore, it is necessary to detect and cut off the overcurrent in a short time. A function of protecting from a short circuit by detecting an overcurrent state from the voltage between output terminals and automatically blocking the gate of the power device is called a DESAT (Desaturation) function.

[0003] As a method of configuring a circuit (DESAT protection circuit) that executes the DESAT function, there is a method of adjusting the circuit configuration while replacing external resistors and external capacitors so that appropriate protection works for various power devices and substrates. In this method, when the DESAT protection circuit is incorporated into an evaluation system and an evaluation test of the DESAT protection circuit is performed, each time adjustment is made, the evaluation system is disassembled, components are replaced, and then the evaluation system is assembled again, which is troublesome.

[0004] In addition, in a power device, ringing of the voltage between terminals may occur during switching. In order to prevent misdetection of a short circuit (overcurrent) due to the influence of ringing, it is conceivable to increase the blanking time in the DESAT protection circuit. However, in a high-speed power device, the time that can withstand a short circuit is short. Therefore, if the blanking time is increased, the time until a short circuit is detected exceeds the allowable time, and the start of protection is delayed.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

[0006] This embodiment provides an electronic circuit, method, electronic system, inverter circuit, and computer program capable of suppressing erroneous detection of overcurrent during switching of semiconductor switching elements. [Means for solving the problem]

[0007] The electronic circuit according to this embodiment includes: a comparison circuit that detects a first voltage at a first node associated with the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage; a first filter that includes a first switch connected between the first node and the second end of the semiconductor switching element and turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element; and a second filter that generates a second signal indicating the occurrence of an overcurrent in the semiconductor switching element when the first signal is output for at least a second time, and modifies at least one of the first waveform, the second time, the first time, and the predetermined voltage related to the driving of the semiconductor switching element based on the control signal based on the second signal. [Brief explanation of the drawing]

[0008] [Figure 1] Block diagram of the electronic circuit according to this embodiment. [Figure 2] A diagram showing the relationship between the control signal of a semiconductor switching element and the on / off state of a discharge switch. [Figure 3] A flowchart illustrating an example of the operation of an evaluation test performed by a control circuit. [Figure 4] This figure shows an example of a double-pulse test performed by inputting a control signal that includes two ON pulses for the semiconductor switching element, assuming no ringing of the semiconductor switching element. [Figure 5]This figure shows an example where collector voltage ringing occurs in a semiconductor switching element under the same conditions as in Figure 4. [Figure 6] This figure shows examples of various waveforms when an abnormal signal is no longer detected during turn-off due to an increase in the threshold voltage parameter. [Figure 7] Figure 6 shows examples of various waveforms when ringing is eliminated from the output signal of the noise reduction filter. [Figure 8] This figure shows examples of various waveforms when pulses disappear from the output signal of the noise reduction filter shown in Figure 7. [Figure 9] A diagram showing an example of adjusting driver parameters using a constant drive method. [Figure 10] A diagram illustrating an example of adjusting driver parameters using a random search method. [Figure 11] A diagram illustrating an example of adjusting driver parameters using a template method. [Figure 12] This diagram shows an example where an isolated signal transmitter is provided between the control circuit and the gate driver. [Figure 13] Block diagram of a power converter as an electronic system using the electronic circuit according to this embodiment. [Modes for carrying out the invention]

[0009] Embodiments of the present invention will be described below with reference to the drawings. In the drawings, identical components are given the same number, and their descriptions are omitted as appropriate.

[0010] Figure 1 is a block diagram of the electronic circuit 1 according to this embodiment. The electronic circuit 1 broadly comprises a semiconductor switching element Q, a gate driver 100 that drives the semiconductor switching element Q and protects the semiconductor switching element Q from overcurrent (abnormality), and a control circuit 110 that controls the gate driver 100. Furthermore, the electronic circuit 1 includes a resistor 150 and a diode 160 provided between the gate driver 100 and the collector (C) of the semiconductor switching element Q, and a buffer element 200 provided between the gate driver 100 and the control terminal (gate) G of the semiconductor switching element Q.

[0011] The gate driver 100 includes a protection circuit 101 that protects the semiconductor switching element Q from overcurrent, a driver circuit 180 that generates and supplies a drive signal to the control terminal G of the semiconductor switching element Q, and a memory 190. A buffer element 200 is connected between the control terminal G of the semiconductor switching element Q and the driver circuit 180. The buffer element 200 has the function of buffering the drive signal supplied from the driver circuit 180 to the control terminal of the semiconductor switching element Q. The buffer element 200 can be omitted. As an example of the buffer element 200, an amplifier that amplifies the input current by 1x or more can be used. The memory 190 stores various parameters (described later) that control the operation of the protection circuit 101. The memory 190 may be volatile memory or non-volatile memory. Examples of volatile memory include DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). Examples of non-volatile memory include NAND flash memory, NOR flash memory, ReRAM (Resistive Random Access Memory), and MRAM (Magnetoresistive Random Access Memory). The values ​​of various parameters can be adjusted by the control circuit 110.

[0012] The semiconductor switching element Q is a transistor that drives a load device (not shown) by switching operation. In this embodiment, the semiconductor switching element Q is an IGBT (Insulated Gate Bipolar Transistor). A diode 210 to prevent reverse current is connected between the emitter (E) and collector (C) of the IGBT. However, the semiconductor switching element Q may be a power MOSFET, bipolar transistor, thyristor, or other power device. Alternatively, the semiconductor switching element Q may be a SiC power transistor, GaN power transistor, or other high-speed power device. The collector corresponding to the first end of the semiconductor switching element Q is connected to a predetermined node, and the emitter corresponding to the second end is connected to a reference voltage. The emitter may be connected to a voltage other than the reference voltage. The predetermined node may be, for example, a power supply voltage or a terminal of another transistor (for example, the collector of another IGBT).

[0013] The control circuit 110 controls the electronic circuit 1. The control circuit 110 includes a microprocessor or processor that executes control software (program). However, the control circuit 110 may be composed of dedicated circuits such as digital circuits or analog circuits, or it may include both dedicated circuits and a processor. The control circuit 110 generates a control signal that includes one or more pulses (first pulses) indicating that the semiconductor switching element Q is ON, and outputs the generated control signal to the gate driver 100. The control signal is, for example, a PWM signal, which is a signal that alternates between ON time and OFF time. The control signal is input to the driver circuit 180 and the blanking filter 175 (first filter) in the protection circuit 101. Note that the circuit that generates the control signal may be provided as a separate circuit from the control circuit 110.

[0014] The gate driver 100 is connected to the control circuit 110 via a wiring. The driver circuit 180 of the gate driver 100 receives a control signal including a pulse indicating the on state of the semiconductor switching element Q from the control circuit 110. The driver circuit 180 generates a drive signal for the semiconductor switching element Q based on the control signal. The process of the driver circuit 180 generating the drive signal from the control signal is performed according to driver parameters (first parameters) stored in the memory 190. The driver parameters indicate what waveform of the drive signal is to be generated from a control signal including a pulse indicating on. In the initial value of the driver parameters, the control signal may be output as the drive signal as it is. The driver parameters in the memory 190 can be changed by the control circuit 110.

[0015] The semiconductor switching element Q receives a drive signal at the control terminal (gate) G from the driver circuit 180 of the gate driver 100 and is driven according to the drive signal. When the collector-emitter is not conducting, the collector voltage (or the collector-emitter voltage) of the semiconductor switching element Q is a high voltage and is greater than the threshold voltage (detection threshold), which is a predetermined voltage serving as a reference for starting the protection operation described later. As the gate voltage rises, the collector voltage decreases, the collector-emitter conducts upon turn-on, and the collector voltage decreases. A current (collector current) determined according to the collector voltage and parasitic inductance flows through the semiconductor switching element Q.

[0016] The protection circuit 101 includes a blanking filter 175 (first filter), a comparison circuit 130, a current source 140, and a noise removal filter 120 (second filter).

[0017] The cathode side of diode 160 is connected to the collector of semiconductor switching element Q. This prevents diode 160 from receiving current from the collector of semiconductor switching element Q. Node N1, which is related to the collector of semiconductor switching element Q, is located between comparator circuit 130 and resistor 150. Node N1 is connected to the anode terminal of diode 160 via resistor 150. A voltage correlated with the collector of semiconductor switching element Q appears at node N1 via diode 160 and resistor 150. Note that resistor 150 may be omitted. A current source 140 that supplies a constant current is connected to node N1. The current source 140 is configured, for example, using an NMOS transistor or a PMOS transistor. The current source 140 is connected to the emitter E of semiconductor switching element Q via the discharge switch 173 of blanking filter 175.

[0018] The blanking filter 175 includes a delay element 171, an AND logic circuit 172, and a discharge switch 173 (first switch). The discharge switch 173 is a switch that connects node N1 and the emitter E of the semiconductor switching element Q. The discharge switch 173 is, for example, a PMOS transistor or an NMOS transistor. However, the discharge switch 173 may be another type of transistor, such as a bipolar transistor, or a circuit other than a transistor. One end of the discharge switch 173 is electrically connected to the emitter E of the IGBT 200, the other end of the discharge switch 173 is connected to node N1, and the control terminal of the discharge switch 173 is connected to the output terminal of the AND logic circuit 172.

[0019] The control signal input from the control circuit 110 to the protection circuit 101 is input to the delay unit 171 and the AND circuit 172. The delay unit 171 delays the control signal by a set time (delay time) and outputs it to the AND circuit 172. The AND circuit 172 outputs an instruction signal (off signal) to turn off the discharge switch 173 if both the delayed control signal from the delay unit 171 and the control signal from the control circuit 110 are ON (high level). If either of the control signals is OFF (low level), it outputs an instruction signal (on signal) to turn on the discharge switch 173.

[0020] The discharge switch 173 receives an instruction signal from the AND circuit 172 and turns on or off based on the instruction signal. Therefore, when a control signal including a pulse indicating conduction (turn-on) of the semiconductor switching element Q is input from the control circuit 110 to the protection circuit 101, the discharge switch 173 will turn off after the pulse has been input, with a delay of the delay time of the delay unit 171. The discharge switch 173 connects node N1 and emitter E while an ON signal is input, and separates node N1 and emitter E while an OFF signal is input. The blanking filter 175 (first filter) suppresses the voltage input to the comparator circuit 130 or the voltage at node N1 by turning on the discharge switch 173 for the delay time of the delay unit 171 when the semiconductor switching element Q starts turning on (details will be described later).

[0021] The comparator circuit 130 includes a comparator 132 and a DAC 131. The comparator 132 detects the voltage at the collector of the semiconductor switching element Q via a resistor 150 and a diode 160. The comparator 132 compares the voltage at node N1 (detection voltage) with the threshold voltage indicated by the output signal of the DAC 131 (detection threshold) and outputs a signal (first signal) according to the comparison result. For example, when the detection voltage is greater than or equal to the threshold voltage, a high-level signal indicating the occurrence of overcurrent is output as a comparison result, and when the detection voltage is less than the threshold voltage, a low-level signal indicating that no overcurrent has occurred is output. However, the relationship between the high-level signal and the low-level signal output according to the comparison result may be reversed.

[0022] The threshold voltage output from DAC131 can be adjusted or changed by the threshold voltage parameter (third parameter) in memory 190. DAC131 reads the threshold voltage parameter from memory 190 and sets the threshold voltage according to the threshold voltage parameter. The threshold voltage parameter in memory 190 can be adjusted by the control circuit 110.

[0023] At the start of the turn-on operation of the semiconductor switching element Q, the collector voltage is high. However, the blanking filter 175 prevents the voltage at node N1 from exceeding the threshold voltage of the comparator 132 by keeping the discharge switch 173 on for the delay time of the delay unit 171 at the start of operation. This prevents false detection of overcurrent in the comparator circuit 130. In other words, since the discharge switch 173 connects node N1 and emitter E while an ON signal is input, the voltage at node N1 is the emitter voltage of the semiconductor switching element Q. Since the emitter voltage is sufficiently small compared to the threshold voltage used by the comparator 132 of the comparator circuit 130 (the value of the digital signal output from the DAC 131), no overcurrent is detected by the comparator 132 while the discharge switch 173 is ON. The collector voltage decreases according to the elapsed time since the semiconductor switching element Q was conducted (turned on). After the delay time of the delay element 171 has elapsed, the discharge switch 173 turns off, and the collector voltage appears at node N1 via the diode 160 and resistor 150. Subsequently, if an overcurrent occurs during normal operation, the voltage at node N1 will rise, and the overcurrent can be detected by the comparator circuit 130.

[0024] Figure 2 shows the relationship between the control signal for the semiconductor switching element Q and the on / off state of the discharge switch 173. The discharge switch 173 is turned off with a delay from the rising edge of the control signal. After the discharge switch 173 receives an on control signal, it remains on for a first time (the delay time of the delay element 171), and the voltage at node N1 is suppressed. This first time is, for example, the blanking time until the collector voltage drops sufficiently when the semiconductor switching element Q is turned on. As described above, when the on drive signal to the semiconductor switching element Q is first supplied, the collector voltage is high, and normally, the collector voltage is above the threshold voltage used by the comparator circuit 130. Therefore, if the collector voltage appears at node N1 when the semiconductor switching element Q starts turning on, the comparator circuit 130 will erroneously detect an overcurrent. If a signal indicating an erroneous overcurrent detection is input to the control circuit 110 via the noise reduction filter 120 described later, the protection function in the control circuit 110 will be activated. When the protection function is activated, for example, the control circuit 110 outputs an off control signal to the driver circuit 180, and the driver circuit 180 supplies an off drive signal to the semiconductor switching element Q. As a result, the semiconductor switching element Q is turned off. Alternatively, a signal indicating a false detection of overcurrent is directly input to the driver circuit 180, and the driver circuit 180 outputs an off drive signal to the gate G of the semiconductor switching element Q.

[0025] Setting a longer blanking time (first hour) can prevent false detections during turn-on, but it will delay the detection of actual overcurrents beyond the allowable time. Therefore, the blanking time needs to be set to an appropriate length that prevents false detections during turn-on while not exceeding the allowable time (first threshold time) mentioned above. During the evaluation test of this embodiment, the control circuit 110 or driver circuit 180 is configured so that the above-mentioned protection function does not activate if an overcurrent is falsely detected in the comparison circuit 130.

[0026] The delay time (blanking time or first time) of the delay unit 171 can be adjusted or changed by the delay time parameter (blanking time parameter or fourth parameter) in the memory 190. The delay unit 171 reads the blanking time parameter from the memory 190 and sets the delay time according to the blanking time parameter. The value of the blanking time parameter in the memory 190 can be adjusted by the control circuit 110.

[0027] The noise reduction filter 120 (second filter) detects that a high-level signal (first signal) is output from the comparator 132 for at least a certain time (second time) or longer, and generates an output signal (second signal) that includes a pulse (abnormal signal) indicating the occurrence of an overcurrent in the semiconductor switching element Q.

[0028] The noise reduction filter 120 includes a delay unit 121 and an AND logic circuit 122. The delay unit 121 receives the first signal from the comparator circuit 130, which is the comparison result signal (high-level signal or low-level signal). The delay unit 121 delays the comparison result signal for a predetermined time (delay time) and outputs the delayed signal. The AND logic circuit 122 receives the comparison result signal from the comparator circuit 130 and the comparison result signal delayed by the delay unit 121, and outputs the logical AND of the two signals. The AND logic circuit 122 outputs a high-level signal when both signals are high-level, and outputs a low-level signal when at least one of them is low-level. As a result, the AND logic circuit 122 outputs an abnormal signal as a high-level signal only when a high-level comparison result signal is input from the comparator circuit 130 for a certain period of time (delay time or second time) or longer. This suppresses the output of an abnormal signal from the AND logic circuit 122 even if a short-duration noise signal is temporarily added to the comparison result signal.

[0029] The delay time in the delay unit 121 of the noise reduction filter 120 can be adjusted or changed by the delay time parameter (noise reduction time parameter) in the memory 190. The delay unit 121 reads the noise reduction time parameter from the memory 190 and sets the delay time according to the noise reduction time parameter. The value of the noise reduction time parameter in the memory 190 can be adjusted by the control circuit 110.

[0030] The control circuit 110 performs a protection function that determines the occurrence of an overcurrent and controls the semiconductor switching element Q to turn off when a high-level comparison result signal (abnormal signal or second signal) is input from the noise suppression filter 120. However, during the evaluation test of this embodiment, which will be described later, the control circuit 110 may be set not to perform protection operation even if an abnormal signal is input to the control circuit 110.

[0031] The control circuit 110 adjusts or determines the blanking time parameter of the blanking filter 175, the threshold voltage parameter of the comparison circuit 130, the noise rejection time parameter of the noise rejection filter 120, and the driver parameter of the driver circuit 180 by performing the evaluation test according to this embodiment.

[0032] More specifically, the control circuit 110 adjusts these parameters to prevent the comparator circuit 130 from falsely detecting an overcurrent due to ringing of the collector voltage of the semiconductor switching element Q during turn-on, and to ensure that the allowable time from the occurrence of an overcurrent to its detection (until the start of protection operation) is not exceeded when an overcurrent occurs.

[0033] Figure 3 is a flowchart of an example of the operation of an evaluation test performed by the control circuit 110. The operation of this flowchart may also be performed by having a computer execute a program. In this evaluation test, the protection function (such as the forced shutdown of the semiconductor switching element Q) that is performed when an abnormal signal (a pulse indicating the occurrence of overcurrent) is output from the noise suppression filter 120 is turned off.

[0034] The control circuit 110 sets various parameters in the memory 190, specifically the blanking time parameter, threshold voltage parameter, noise reduction time parameter, and driver parameter, to their initial values ​​(S101). In this example, the blanking time parameter, threshold voltage parameter, and noise reduction time parameter are all set to 0. However, they may be set to any value other than 0. The driver parameter is assumed to be set to a parameter that indicates that the waveform of the control signal (PWM signal) is output directly as the drive signal.

[0035] The control circuit 110 generates a test control signal and inputs the generated signal to the gate driver 100. In this example, the test control signal is a control signal for double-pulse switching testing, and is a double-pulse signal containing two ON control signals (pulses). Note that the first pulse in the control signal is longer than the second pulse. Furthermore, the test control signal is not limited to a double-pulse signal; it may also be a signal containing only one pulse (a single-pulse signal).

[0036] The control circuit 110 monitors the output signal of the noise reduction filter 120 and checks whether an abnormal signal indicating the occurrence of an overcurrent has been detected (S103). If no abnormal signal has been detected, margins are set for the blanking time parameter, threshold voltage parameter, and noise reduction time parameter (S104), and the process is terminated. As an example of setting the margins, the value of at least one of these parameters may be increased by a predetermined percentage or by a predetermined value. The predetermined percentage and predetermined value may differ for each parameter.

[0037] If no abnormal signal is detected, the control circuit 110 checks whether an abnormal signal is detected at the time of turn-off of the semiconductor switching element Q (S105). That is, the time at the end of the first or second pulse of the double pulse signal corresponds to the turn-off time, and it checks whether an abnormal signal is detected at this time or within the range including this time. If an abnormal signal is detected, the control circuit 110 increases the value of the threshold voltage parameter (S106). That is, it increases the threshold voltage of the comparator circuit 130. The method of increase may be to add a fixed value to the current threshold voltage, or to increase the current threshold voltage by a predetermined percentage.

[0038] If no abnormal signal is detected at turn-off, the control circuit 110 determines that an abnormal signal exists at turn-on, and then checks whether the abnormal signal at turn-on is ringing. That is, the time of the beginning of the first or second pulse of the double pulse signal corresponds to the turn-on time, and it checks whether ringing of the abnormal signal occurs after the first threshold time from this time. For example, if there are pulses of a certain density or more in the time direction, it may be determined that ringing is occurring. The density may be calculated based on the number of pulses included within a certain time range. Alternatively, if there is one or more pulses after the first threshold time, and the end time of the corresponding control signal pulse is not included in those pulses (i.e., the threshold voltage is set appropriately), it may be determined or considered that ringing of the abnormal signal is occurring. If the abnormal signal is not ringing, the control circuit 110 increases the blanking time (S109). The method of increase may be to add a fixed value to the current blanking time, or to increase the current blanking time by a predetermined percentage. However, the upper limit of the blanking time is the first threshold time.

[0039] If the abnormal signal during turn-on is ringing, the control circuit 110 adjusts at least one of the driver parameter and the noise reduction time parameter (S108).

[0040] As an example, first, the noise reduction time parameter is increased, that is, the delay time of the delay element 121 in the noise reduction filter 120 is increased. The method of increase is to add a fixed value to the current noise reduction time parameter value, or to increase the current noise reduction time parameter value by a predetermined percentage. After this, if the process returns to step S102 and proceeds to step S108 again, the noise reduction time parameter is increased again. Thereafter, the value of the noise reduction time parameter is increased until the noise reduction time parameter value reaches the upper limit value (second threshold time). If the value of the noise reduction time parameter is set to be longer than the time (third time) during which a high-level signal (first signal) is output from the comparator 132 due to voltage ringing that occurs when the semiconductor switching element Q is turned on, the ringing of abnormal signals will also be eliminated. However, if the noise reduction time parameter value reaches its upper limit, adjusting the noise reduction time parameter will not eliminate the ringing of the abnormal signal. Therefore, the control circuit 110 then adjusts the driver parameter. The driver parameter is a parameter that determines the waveform of the drive signal when generating a drive signal from the control signal input to the driver circuit 180. The control circuit 110 adjusts the driver parameter so that a drive signal waveform capable of suppressing ringing during the turn-on of the semiconductor switching element Q is obtained. For example, if the control circuit 110 sets one of several candidate driver parameters and returns to step S102, and then proceeds to step S108 again, it sets another candidate driver parameter. The candidate driver parameters are switched until a driver parameter is found that suppresses or eliminates the ringing of the abnormal signal, that is, until a drive signal waveform capable of suppressing ringing during the turn-on of the semiconductor switching element Q is obtained. Details of the driver parameter will be described later.

[0041] In the example above, the denoising time parameter was changed with priority over the driver parameter, but other methods are also possible. For example, the value of the denoising time parameter can be gradually increased from its initial value for each candidate driver parameter until a denoising time parameter value is found that eliminates ringing. However, even in this case, the value of the denoising time parameter must not exceed an upper limit. Then, a pair of denoising time parameter and candidate driver parameter is identified in which the value of the denoising time parameter falls within the desired range. The values ​​of the denoising time parameter and driver parameter are determined based on the values ​​of the denoising time parameter and candidate driver parameter in the identified pair, and these parameters are adjusted to the determined values. This method is effective when a preferred range of values ​​for the denoising time parameter exists.

[0042] The operation of the evaluation test described above will be explained in detail below using specific examples. First, for the sake of explanation, we will describe the various waveforms obtained when a double pulse signal is input, assuming that there is no ringing in the collector voltage of the semiconductor switching element Q.

[0043] Figure 4 shows examples of various waveforms obtained when a double-pulse test is performed by inputting a control signal that includes two pulses indicating the ON state of the semiconductor switching element Q, assuming that there is no ringing in the collector voltage of the semiconductor switching element Q.

[0044] The threshold voltage parameter, blanking time parameter, and noise reduction time parameter are assumed to be set to their initial values ​​(0 in this example), and the driver parameter is also set to its initial value (a value indicating that the control signal is output directly as the drive signal). Examples of waveforms for the control signal (PWM signal or first signal), collector voltage and collector current (element current), and the output signal of the noise reduction filter 120 (second signal) are shown. A magnified view of a portion of the collector voltage waveform is also shown. The first pulse K1 (first pulse) in the control signal is longer than the second pulse K2 (first pulse). The horizontal axis is time (t), and the vertical axis is amplitude. Note that during the evaluation test, no devices other than the semiconductor switching element Q are operating, and there is no noise signal input.

[0045] The first abnormal signal pulse A1 in the output signal of the noise reduction filter 120 was caused by an inappropriate (e.g., too short) blanking time.

[0046] The second abnormal signal pulse A2 in the output signal was caused by an inappropriate (e.g., too low) threshold voltage.

[0047] The third abnormal signal pulse A3 in the output signal is formed by the combination of two pulses. More specifically, pulse A3 is a combination of a pulse resulting from an inappropriate blanking time and a pulse resulting from an inappropriate threshold voltage. The reason for this is as follows: After the first pulse K1 of the control signal ends, the collector voltage gradually rises. The collector current rises slowly with a slope determined by the parasitic inductor of the semiconductor switching element Q, but when the semiconductor switching element Q is completely turned off, the collector current stops. Current is stored in the parasitic inductance of the semiconductor switching element Q, and when the second pulse K2 of the control signal is input, the collector voltage decreases due to the turn-on of the semiconductor switching element Q, and the current starts to rise from the state in which the current was stored. For this reason, the voltage at node N1 rises faster (see the expanded partial waveform H2 of the collector voltage) than the voltage rise at the time of input of the first pulse K1 of the control signal (see the expanded partial waveform H1 of the collector voltage). As a result, the pulse becomes elongated to the left, so that the rising edge of the pulse when the threshold voltage is not appropriate (see pulse A2) shifts to the left. This pulse then combines with the pulse when the blanking time is not appropriate (see pulse A1) to form pulse A3.

[0048] Figure 5 shows an example where there is collector voltage ringing in the semiconductor switching element Q under the same conditions as in Figure 4. As shown in the magnified section of the collector voltage, ringing R1 and R2 occurs after the semiconductor switching element Q turns on in response to the control signal pulses K1 and K2. Due to ringing R1, an abnormal signal pulse B1 (abnormal signal ringing) is generated in the output signal of the noise reduction filter. An abnormal signal pulse (abnormal signal ringing) is also generated in the output signal of the noise reduction filter due to ringing R2, but in this example it is included in pulse A3.

[0049] The following is a specific example showing how to adjust various parameters using the flowchart in Figure 3 when the output signal of the noise reduction filter 120 shown in Figure 5 is output. As shown in Figure 5, the output signal of the noise reduction filter 120 contains an abnormal signal, so the process proceeds to step S105 via step S103. In step S105, it is checked whether an abnormal signal is detected at turn-off. An abnormal signal pulse A2 exists at turn-off, corresponding to the end of the control signal pulse K1. In this example, the end of the abnormal signal pulse A2 coincides with the end of the control signal pulse K1, but it is also possible that the end of the abnormal signal pulse A2 occurs at a later time than the end of the control signal pulse K1. The process proceeds to step S106, and the value of the threshold voltage parameter is increased. The sequence of steps S102, S103, S105, and S106 is repeated once or more times until no abnormal signal is detected at turn-off in step S105.

[0050] Figure 6 shows examples of various waveforms when the threshold voltage parameter is increased, resulting in the absence of abnormal signals during turn-off. Pulse A2 of the abnormal signal that was present in the output signal of Figure 5 has disappeared. Also, of pulse A3 of the abnormal signal that was present in the output signal of Figure 5, the portion caused by the threshold voltage has disappeared, becoming pulse A3_1. Pulse B2 of the abnormal signal (ringing of the abnormal signal) is detected in the output signal of the noise reduction filter due to ringing R2.

[0051] If the output signal of the noise reduction filter becomes as shown in Figure 6, the decision in step S105 in the flowchart of Figure 3 becomes "NO", and the process proceeds to step S107. In step S107, it is checked whether the abnormal signal at turn-on is ringing. Specifically, if a pulse exists in the interval between the start time St of the control signal pulse, after the threshold time TH1 (first threshold time), and before the end time Et of the control signal pulse, it is determined or considered that the abnormal signal at turn-on is ringing, assuming an environment without noise signal input. The threshold time TH1 is, for example, the maximum value of the time allowed as blanking time. The start time St may be the time of the pulse's start edge (here, the rising edge), or any other time that defines the start of the pulse (such as the time immediately before or after the rising edge). Similarly, the end time Et may be the time of the pulse's end edge (here, the falling edge), or any other time that defines the end of the pulse (such as the time immediately before or after the falling edge).

[0052] In the example in Figure 6, the output signal pulse B1 exists after the threshold time TH1 from the start time St of the control signal pulse K1, and the position of pulse B1 is before the end time Et of the control signal pulse K1. Therefore, it is determined that ringing of the abnormal signal occurs when the semiconductor switching element Q corresponding to pulse K1 is turned on. Similarly, the output signal pulse B2 exists after the threshold time TH1 from the start time St of the control signal pulse K2, and the position of pulse B2 is before the end time Et of the control signal pulse K1. Therefore, it is determined that ringing of the abnormal signal occurs when the semiconductor switching element Q corresponding to pulse K2 is turned on.

[0053] The control circuit 110 adjusts at least one of the driver parameter and the noise reduction time parameter. Here, the value of the noise reduction time parameter is preferentially increased. Steps S102, S103, S105, S107, and S108 are repeated once or more times until no abnormal signal is detected when the vehicle is turned off in step S107. However, if the noise reduction time parameter reaches its upper limit (second threshold time), i.e., if the delay time of the noise reduction filter delay unit 121 reaches its upper limit, the value of the noise reduction time parameter is fixed at its upper limit, and the value of the driver parameter is changed. The driver parameter indicates how to determine the waveform of the drive signal when generating the drive signal from the control signal. Steps S102, S103, S105, S107, and S108 are repeated once or more times until no abnormal signal ringing is detected when the vehicle is turned on in step S107. If no abnormal signal ringing is detected when the vehicle is turned on in step S107, the process proceeds to step S109.

[0054] Figure 7 shows examples of various waveforms when ringing is eliminated from the output signal of the noise reduction filter in Figure 6. There is no ringing of abnormal signals, and the collector voltage ringing R1_1 and R2_2 are suppressed compared to Figure 6. The suppression effect of collector voltage ringing R1_1 and R2_2 is due to the change in driver parameters. Otherwise, Figure 7 is the same as Figure 6. The output signal of the noise reduction filter contains only pulses A1 and A3_1 as abnormal signals. The start and end times of both pulses A1 and A3_1 fall within the threshold time TH1 from the start time St of the corresponding control signal pulses K1 and K2.

[0055] In step S109, the control circuit 110 decides to increase the value of the blanking time parameter. That is, if the start and end times of the output signal pulses are within the threshold time TH1 from the start time St of the control signal pulse, it decides to increase the value of the blanking time parameter. Steps S102, S103, S105, S107, and S109 are repeated once or more times until no abnormal signal is detected in step S103. As the blanking time parameter increases (as the delay time of the delay unit 171 increases), the position of the rising edge of pulses A1 and A3_1 moves in the time direction, and the pulse width narrows. When the rising edge of pulses A1 and A3_1 moves to the position of their respective falling edge, pulses A1 and A3_1 disappear.

[0056] Figure 8 shows examples of various waveforms when pulses A1 and A3_1 are removed from the output signal of the noise reduction filter in Figure 7. There are no abnormal signals in the output signal of the noise reduction filter.

[0057] If the control circuit 110 determines in step S103 that no abnormal signal has been detected from the output signal of the noise reduction filter 120, it sets a margin for the blanking time parameter, threshold voltage parameter, and noise reduction time parameter determined in steps S106, S108, and S109. The values ​​of these parameters after the margin setting are stored in memory 190. The delay unit 171, DAC 131, and delay unit 121 may read the blanking time parameter, threshold voltage parameter, and noise reduction time parameter from memory 190, respectively, and perform their respective internal settings. This completes the processing of this flowchart.

[0058] After completing the setting of various parameters in the above-described test evaluation, the double pulse test may be performed again by operating other devices connected to the semiconductor switching element Q. If the noise reduction time parameter has not reached its upper limit, the noise reduction time parameter may be set. This makes it possible to set the parameters of the noise reduction filter 120 while also considering external noise. Examples of other devices connected to the semiconductor switching element Q include load devices and other semiconductor switching elements connected to the collector or emitter of the semiconductor switching element Q.

[0059] The flow shown in Figure 3 is just one example and can be modified in various ways. For example, if the threshold voltage has already been adjusted, steps S105 and S106 may be omitted. Also, although a margin is set in the flow in Figure 3, the setting of the margin may be omitted.

[0060] Note that while the waveforms shown in Figures 4 to 8 are positive logic signal waveforms, negative logic waveforms can be processed in the same manner.

[0061] The following section will explain in detail how to adjust the driver parameters using Figures 9 to 11. Figure 9 shows an example of adjusting driver parameters using a constant drive method. The constant drive method corresponds to the first method, which generates a drive signal by increasing or decreasing the drive current (gate current) in response to pulses included in the control signal from the control circuit 110. There are multiple candidate drive currents, and one of them can be arbitrarily selected. All drive currents are currents that cause the gate voltage of the semiconductor switching element Q to be equal to or greater than the threshold voltage. The control circuit 110 adjusts the drive current of the drive signal generated by the driver circuit 180 by changing the value of the driver parameter. Note that the amplitude of the drive signal generated by the driver circuit 180 is constant.

[0062] For example, if the value of the driver parameter is "1", the drive signal may be generated using a drive current that yields an amplitude one step higher than the amplitude of the control signal; if it is "2", a drive current that yields an amplitude two steps higher; and if it is "-1", a drive current that yields an amplitude one step lower. In this case, the drive current value for each stage is predetermined and stored in advance inside the driver circuit 180 or in the memory 190. Alternatively, the driver parameter may directly indicate the value of the drive current for the drive signal. The number of drive currents that can be output from the driver circuit 180 may be arbitrary, as long as it can output multiple different drive currents. When adjusting the value of the driver parameter, the control circuit 110 may select drive currents in a predetermined order from one or more drive currents, or it may select drive currents randomly. In this method, when adjusting the value of the driver parameter in step S108, a driver parameter value that indicates a drive current different from the drive current used to generate the drive signal this time is selected each time the process of step S108 is performed. The drive signal is generated for the next control signal using the selected driver parameter value.

[0063] Figure 10 shows an example of adjusting driver parameters using a random search method. The figure shows two examples of waveform patterns created using the random search method. The random search method corresponds to the second method, which divides the pulse time of the control signal into multiple time intervals and arbitrarily sets the drive current within the upper and lower limits for each time interval. The lower limit of the drive current may be the current at which the gate voltage of the semiconductor switching element Q is equal to or greater than the threshold voltage. The control circuit 110 uses the value of the specified drive current for each time interval as the driver parameter. The drive current set for each time interval may be determined randomly or based on a predetermined search algorithm. As the search algorithm, methods such as simulated annealing or hill climbing can be used. By using a search algorithm, the waveform of the drive signal that eliminates the ringing of abnormal signals during turn-on can be efficiently determined. In this method, when adjusting the value of the driver parameter in step S108, a value of the driver parameter that shows a different combination of drive currents from the drive currents generated for each time interval so far may be selected each time step S108 is performed. The next drive signal is generated with the selected value of the driver parameter.

[0064] Figure 11 shows an example of adjusting driver parameters using the template method. A basic waveform pattern for the drive signal is predetermined as shown in the upper part of Figure 11, and this waveform pattern is stored in the driver circuit 180 or memory 190. The template method corresponds to a third method in which values ​​indicating the amount of adjustment (change) of a portion of the template waveform pattern are set as driver parameters. For example, if the basic waveform pattern includes one or more recesses, a value indicating the change in the temporal position of the recesses is set as the driver parameter. The lower part of Figure 11 shows an example where the position of the recesses in the basic waveform pattern shown in the upper part changes in the temporal direction. In addition to the temporal position of the recesses, the drive current of the recesses may also be changed. The control circuit 110 changes the amount of change in the basic waveform pattern to find a waveform pattern that eliminates the ringing of abnormal signals. For example, the control circuit 110 may determine the amount of change so that the recesses include the time of the ringing of the voltage of the semiconductor switching element Q. Furthermore, the portion of the waveform pattern to be changed is not limited to recesses. Also, the basic waveform pattern is not limited to patterns that include recesses.

[0065] The example in Figure 11 shows an example of adjusting a basic waveform pattern. However, multiple waveform patterns may be predetermined, and the control circuit 110 may select waveform patterns from these multiple waveform patterns in any or predetermined order to find a waveform pattern that can eliminate ringing. In this case, the driver circuit 180 or memory 190 stores a table that associates waveform pattern identifiers with waveform patterns. In this case, the control circuit 110 sets a value that identifies the waveform pattern as a driver parameter. The driver circuit 180 selects a waveform pattern from the table that corresponds to the identifier specified by the driver parameter and generates a drive signal having the selected waveform pattern.

[0066] As a variation, the control circuit 110 may, in a double-pulse test, set the parameters of the blanking filter 175 or the comparator circuit 130 based on the number of pulses included in the output signal of the noise reduction filter 120. If the number of pulses is 3 or more, the control circuit 110 may determine that at least the comparator circuit 130 is not appropriate and set the parameters of the comparator circuit 130 before the blanking filter 175. After the parameter setting of the comparator circuit 130 is completed, for example, after the number of pulses becomes 2 or less (the number of pulses does not need to include ringing of abnormal signals), it may then set the parameters of the blanking filter 175.

[0067] In the configuration shown in Figure 1, the control circuit 110 was connected to the gate driver 100 via a signal line, but a configuration in which it is electrically isolated from the gate driver 100 is also possible.

[0068] Figure 12 shows an example in which an isolated signal transmitter 290 is provided between the control circuit 110 and the gate driver 100. The isolated signal transmitter 290 transmits and receives signals to and from the control circuit 110 via magnetic coupling, optical coupling, or capacitive coupling. This allows operation between the control circuit 110 and the gate driver 100 even when the reference voltage (ground voltage, etc.) on the control circuit 110 side and the reference voltage on the gate driver 100 side are different. As an example of the isolated signal transmitter 290, at least one of a transformer, a photocoupler, and a capacitor can be used.

[0069] As described above, according to this embodiment, by adjusting the blanking time parameter, threshold voltage parameter, noise rejection time parameter, and driver parameter via software control, it is possible to prevent the false detection of abnormal signals caused by ringing of the semiconductor switching element Q during normal operation. There is no need for workers to adjust parameters while replacing elements each time an evaluation test is performed, and evaluation tests of the gate driver can be easily conducted.

[0070] Figure 13 is a block diagram of a power converter as an electronic system using the electronic circuit according to this embodiment. The power converter 21 in Figure 13 is a three-phase inverter that generates an AC voltage for driving a three-phase motor 22. The power converter 21 has a plurality of arms 23a to 23f, a DC power supply 24, a converter 25, a smoothing capacitor C2, and protection processing circuits 101a to 101f. The protection processing circuits 101a to 101f each include the gate driver 100, control circuit 110, resistor 150, diode 160, and buffer element 200 shown in Figure 1.

[0071] Each of the multiple arms 23a to 23f has a semiconductor switching element (IGBT) as shown in the embodiment described above. Arms 23a to 23f each perform an on or off operation at a predetermined timing.

[0072] Converter 25 is a DC-DC converter that converts the DC voltage from the DC power supply 24 into DC voltages of different voltage levels. Smoothing capacitor C2 smooths the voltage output from converter 25.

[0073] Of the arms 23a to 23f, two pairs of arms are turned on simultaneously, supplying current to the corresponding coils in the three-phase motor 22. By sequentially switching the two arms that are turned on simultaneously, the motor can be driven in three phases. In other words, by sequentially switching pairs of semiconductor switching elements that are turned on simultaneously, three-phase AC can be generated from the DC voltage of the DC power supply 24. Turning on the two arms simultaneously does not necessarily mean that the start timing of turning them on must coincide; it is sufficient that the two arms are turned on simultaneously for at least a portion of the time.

[0074] The protection circuits 101a to 101f perform evaluation tests and protective operations on the semiconductor switching elements in the multiple arms 23a to 23f. In Figure 13, a protection circuit is provided for each arm, but one protection circuit may be provided for multiple arms. For example, one protection circuit may be provided for arms 23a to 23f, one protection circuit may be provided for two arms, or one protection circuit may be provided for three arms.

[0075] It should be noted that the present invention is not limited to the embodiments described above, and the components can be modified and implemented in practice without departing from the spirit of the invention. Furthermore, various inventions can be formed by appropriately combining the multiple components disclosed in the above embodiments. For example, some components may be deleted from all the components shown in the embodiments. Moreover, components from different embodiments may be appropriately combined.

[0076] [Item 1] A comparison circuit that detects a first voltage at a first node associated with the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage, A first filter includes a first switch connected between the first node and the second end of the semiconductor switching element, which turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element, A second filter that generates a second signal indicating the occurrence of an overcurrent in the semiconductor switching element when the first signal is output for at least two hours or more, Equipped with, An electronic circuit that, based on the second signal, modifies at least one of the following: a first waveform, a second time, a first time, and a predetermined voltage, relating to the driving of the semiconductor switching element based on the control signal. [Item 2] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The first waveform is the waveform of a constant drive current selected from a plurality of constant drive currents. The driver circuit modifies the first waveform to a second waveform with a constant drive current that is different from the first waveform, based on the second signal. The driver circuit generates a drive signal having the second waveform based on the control signal. The electronic circuit described in item 1. [Item 3] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The first waveform is a waveform in which the drive current is randomly selected from a plurality of candidate drive currents for each of the plurality of time intervals. The driver circuit modifies the first waveform to a third waveform having a different combination of drive currents from the first waveform, based on the second signal. The driver circuit generates a drive signal having the third waveform based on the control signal. The electronic circuit described in item 1 or 2. [Item 4] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The aforementioned first waveform is a waveform obtained by changing a portion of the basic waveform pattern by a first modification amount. The driver circuit modifies the first waveform to a fourth waveform by changing a portion of the waveform pattern by a second modification amount different from the first modification amount, based on the second signal. The driver circuit generates a drive signal having the fourth waveform based on the control signal. An electronic circuit as described in any one of items 1 to 3. [Item 5] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The driver circuit modifies the first waveform if ringing of the second signal occurs after a first threshold time from the start time of the first pulse of the control signal. An electronic circuit as described in any one of items 1 to 4. [Item 6] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The second filter modifies the second time to a time longer than the second time if the start time of the second pulse is later than the start time of the first pulse by a first threshold time, and the end time of the second pulse does not overlap with the end time of the first pulse. An electronic circuit as described in any one of items 1 through 5. [Item 7] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The second filter changes the second time to a time longer than the second time if the start time of the second pulse is later than the first threshold time from the start time of the first pulse and the end time of the second pulse does not overlap with the end time of the first pulse. The driver circuit modifies the first waveform if, even after the second time has changed to the second threshold time, there exists a second pulse whose start time is later than the first threshold time from the start time of the first pulse and whose end time does not overlap with the end time of the first pulse. An electronic circuit as described in any one of items 1 through 6. [Item 8] The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The comparison circuit changes the predetermined voltage to a voltage higher than the predetermined voltage if the end time of the first pulse coincides with or is included in the end time of the second pulse. An electronic circuit as described in any one of items 1 through 7. [Item 9] The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The first filter changes the first time to a time longer than the first time if the start time of the second pulse falls within a first threshold time from the start time of the first pulse. An electronic circuit as described in any one of items 1 through 8. [Item 10] The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The comparison circuit changes the predetermined voltage to a voltage higher than the predetermined voltage if the end time of the first pulse coincides with or is included in the end time of the second pulse. The first filter changes the first time to a time longer than the first time if the start time of the second pulse falls within a first threshold time from the start time of the first pulse. The first filter performs the process of changing the first time after the position of the end time of the first pulse no longer coincides with the end time of the second pulse and is no longer included in the second pulse. An electronic circuit as described in any one of items 1 through 9. [Item 11] The system further comprises a driver circuit that generates a drive signal having the first waveform supplied to the control terminal of the semiconductor switching element, a memory that stores first parameters related to the first waveform, and a control circuit. The driver circuit generates a drive signal having the first waveform according to the first parameter of the memory, The control circuit changes the value of the first parameter to a value that represents the second waveform based on the second signal. The driver circuit generates a drive signal having the second waveform according to the modified first parameter. An electronic circuit described in any one of items 1 through 10. [Item 12] The control circuit changes the value of the first parameter to a value that yields a drive signal waveform that suppresses voltage ringing generated between the first and second terminals when the semiconductor switching element is turned on. The electronic circuit described in item 11. [Item 13] The system further includes a memory for storing a second parameter indicating the second time, and a control circuit. The second filter sets the second time according to the second parameter of the memory, The control circuit changes the value of the second parameter of the memory to a value that indicates a time longer than the second time, The second filter modifies the previous second time according to the modified second parameter. An electronic circuit as described in item 6, or any one of items 7-12 that references item 6. [Item 14] The system further includes a memory for storing a third parameter indicating the predetermined voltage, and a control circuit. The comparison circuit sets the predetermined voltage according to the third parameter of the memory, The control circuit changes the value of the third parameter of the memory to a value that indicates a voltage greater than the predetermined voltage. The comparison circuit modifies the predetermined voltage according to the modified third parameter. An electronic circuit as described in item 8, or any one of items 7-13 that references item 8. [Item 15] The system further includes a memory for storing a fourth parameter indicating the first time, and a control circuit. The comparison circuit sets the first time according to the fourth parameter of the memory, The control circuit changes the value of the fourth parameter of the memory to a value that indicates a time longer than the first time. The comparison circuit modifies the first time according to the modified fourth parameter. An electronic circuit as described in item 9, or any one of items 10-14 that references item 9. [Item 16] The gate driver, which includes the comparison circuit, the first filter, and the second filter, is provided with an isolated signal transmitter that isolates it from the control circuit. The isolated signal transmitter is connected to the control circuit via magnetic coupling, optical coupling, or capacitive coupling. The isolated signal transmitter is connected to the gate driver via wiring. The control circuit transmits and receives signals to and from the gate driver via the isolated signal transmitter. An electronic circuit as described in any one of items 11-15. [Item 17] The first voltage of the first node associated with the first end of the semiconductor switching element is obtained, Based on a control signal indicating the conduction of the semiconductor switching element, the first switch connected between the first node and the second end of the semiconductor switching element is turned on for a first time. When the first voltage is greater than or equal to a predetermined voltage, the first signal is output. If the first signal is output for at least two hours, a second signal is generated indicating the occurrence of an overcurrent in the semiconductor switching element. Based on the second signal, at least one of the first waveform, second time, first time, and predetermined voltage related to the driving of the semiconductor switching element based on the control signal is changed. method. [Item 18] A second filter that receives a first signal from a comparison circuit that generates a first signal by comparing a first voltage at a first node, which is associated with the first end of the semiconductor switching element and connected to the second end of the semiconductor switching element, with a predetermined voltage, based on a control signal indicating the conduction of the semiconductor switching element, and which generates a second signal from a second filter that indicates the occurrence of an overcurrent in the semiconductor switching element when the first signal has been output for at least two hours or more, A step of changing at least one of the first waveform, second time, first time, and predetermined voltage related to driving the semiconductor switching element based on the control signal, based on the second signal. A computer program for executing [something]. [Item 19] An inverter circuit including multiple pairs of semiconductor switching elements, The electronic circuit comprises an electronic circuit corresponding to at least one semiconductor switch among the plurality of pairs of semiconductor switching elements, The aforementioned electronic circuit is A comparison circuit that detects a first voltage at a first node associated with the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage, A first filter includes a first switch connected between the first node and the second end of the semiconductor switching element, which turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element, A second filter generates a second signal indicating the occurrence of an overcurrent when the first signal is output for at least two hours or longer, Equipped with, The electronic circuit modifies, based on the second signal, at least one of the first waveform, the second time, the first time, and the predetermined voltage related to driving the semiconductor switching element based on the control signal. Electronic systems. [Explanation of symbols]

[0077] 1 Electronic circuit 21 Power Converters 22 Three-phase motors 23a~23f Arm 24 DC power supply 25 Converters 100 Gate Drivers 101 Protection circuit 101a~101f Protection Processing Circuit 110 Control circuit 120 Noise Reduction Filters 121 Delay device 122. AND Logic Circuit 130 Comparison circuit 132 Comparator 140 Current source 150 resistor 160 diodes 171 Delay Element 172. AND Logic Circuit 172 AND gates 173 Discharge switch 175 Blanking Filter 180 Driver Circuit 190 memory 200 buffer elements 210 diodes 290 Isolated signal transmitter C2 Smoothing Capacitor DAC131 Delay C collector E emitter G control terminal (gate) St start time End time H1 Enlarged Partial Waveform H2 Enlarged Partial Waveform IGBT Semiconductor Switching Element N1 node Q Semiconductor switching element R1, R1_1, R2, R2_2 ringing TH1 threshold time (first threshold time)

Claims

1. A comparison circuit that detects a first voltage at a first node connected to the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage, A first filter includes a first switch connected between the first node and the second end of the semiconductor switching element, which turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element, A second filter that generates a second signal indicating the occurrence of an overcurrent in the semiconductor switching element when the first signal is output for at least two hours or more, Equipped with, An electronic circuit that changes the setting of at least one of the following: the first waveform, the second time, the first time, and the predetermined voltage of the drive signal supplied to the control terminal of the semiconductor switching element, based on the second signal output in response to the evaluation test pulse input as the control signal.

2. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The first waveform is the waveform of a constant drive current selected from a plurality of constant drive currents. The driver circuit modifies the first waveform to a second waveform with a constant drive current that is different from the first waveform, based on the second signal output in response to the evaluation test pulse input as the control signal. The driver circuit generates a drive signal having the second waveform based on the control signal. The electronic circuit according to claim 1.

3. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The first waveform is a waveform in which the drive current is randomly selected from a plurality of candidate drive currents for each of the plurality of time intervals. The driver circuit modifies the first waveform to a third waveform having a different combination of drive currents from the first waveform, based on the second signal output in response to the evaluation test pulse input as the control signal. The driver circuit generates a drive signal having the third waveform based on the control signal. The electronic circuit according to claim 1.

4. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The first waveform is a waveform obtained by changing a part of the basic waveform pattern by a first modification amount. The driver circuit modifies the first waveform to a fourth waveform by changing a portion of the waveform pattern by a second amount different from the first amount, based on the second signal output in response to the evaluation test pulse input as the control signal. The driver circuit generates a drive signal having the fourth waveform based on the control signal. The electronic circuit according to claim 1.

5. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The driver circuit modifies the first waveform if ringing of the second signal occurs after a first threshold time from the start time of the first pulse of the control signal. The electronic circuit according to claim 1.

6. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The second filter modifies the second time to a time longer than the second time if the start time of the second pulse is later than the first threshold time from the start time of the first pulse, and the end time of the second pulse does not overlap with the end time of the first pulse. The electronic circuit according to claim 1.

7. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The second filter changes the second time to a time longer than the second time if the start time of the second pulse is later than the first threshold time from the start time of the first pulse and the end time of the second pulse does not overlap with the end time of the first pulse. The driver circuit modifies the first waveform if, even after the second time has changed to the second threshold time, there exists a second pulse whose start time is later than the first threshold time from the start time of the first pulse and whose end time does not overlap with the end time of the first pulse. The electronic circuit according to claim 1.

8. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The comparison circuit changes the predetermined voltage to a voltage higher than the predetermined voltage if the end time of the first pulse coincides with or is included in the end time of the second pulse. The electronic circuit according to claim 1.

9. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The first filter changes the first time to a time longer than the first time if the start time of the second pulse falls within a first threshold time from the start time of the first pulse. The electronic circuit according to claim 1.

10. The system includes a driver circuit that generates a drive signal having the first waveform, which is supplied to the control terminal of the semiconductor switching element. The control signal includes a first pulse indicating conduction of the semiconductor switching element. The second signal includes a second pulse indicating the occurrence of the overcurrent, The comparison circuit changes the predetermined voltage to a voltage higher than the predetermined voltage if the end time of the first pulse coincides with or is included in the end time of the second pulse. The first filter changes the first time to a time longer than the first time if the start time of the second pulse falls within a first threshold time from the start time of the first pulse. The first filter performs the process of changing the first time after the position of the end time of the first pulse no longer coincides with the end time of the second pulse and is no longer included in the second pulse. The electronic circuit according to claim 1.

11. The system further comprises a driver circuit that generates a drive signal having the first waveform supplied to the control terminal of the semiconductor switching element, a memory that stores first parameters related to the first waveform, and a control circuit. The driver circuit generates a drive signal having the first waveform according to the first parameter of the memory, The control circuit outputs the evaluation test pulse as the control signal, and changes the value of the first parameter to a value representing the second waveform based on the second signal output in response to the pulse. The driver circuit generates a drive signal having the second waveform according to the modified first parameter. The electronic circuit according to claim 1.

12. The control circuit changes the value of the first parameter to a value that yields a waveform of the drive signal that suppresses voltage ringing generated between the first and second terminals when the semiconductor switching element is turned on. The electronic circuit according to claim 11.

13. The system further includes a memory for storing a second parameter indicating the second time, and a control circuit. The second filter sets the second time according to the second parameter of the memory, The control circuit outputs the evaluation test pulse as the control signal, and changes the value of the second parameter in the memory output in response to the pulse to a value indicating a time longer than the second time. The second filter modifies the previous second time according to the modified second parameter. The electronic circuit according to claim 6.

14. The system further includes a memory for storing a third parameter indicating the predetermined voltage, and a control circuit. The comparison circuit sets the predetermined voltage according to the third parameter of the memory, The control circuit outputs the evaluation test pulse as the control signal, and changes the value of the third parameter of the memory output in response to the pulse to a value that indicates a voltage greater than the predetermined voltage. The comparison circuit modifies the predetermined voltage according to the modified third parameter. The electronic circuit according to claim 8.

15. The system further includes a memory for storing a fourth parameter indicating the first time, and a control circuit. The comparison circuit sets the first time according to the fourth parameter of the memory, The control circuit outputs the evaluation test pulse as the control signal, and changes the value of the fourth parameter in the memory output in response to the pulse to a value indicating a time longer than the first time. The comparison circuit modifies the first time according to the modified fourth parameter. The electronic circuit according to claim 9.

16. The gate driver, which includes the comparison circuit, the first filter, and the second filter, is provided with an isolated signal transmitter that isolates it from the control circuit. The isolated signal transmitter is connected to the control circuit via magnetic coupling, optical coupling, or capacitive coupling. The isolated signal transmitter is connected to the gate driver via wiring. The control circuit transmits and receives signals to and from the gate driver via the isolated signal transmitter. The electronic circuit according to any one of claims 11 to 15.

17. The first voltage of the first node connected to the first end of the semiconductor switching element is acquired. Based on a control signal indicating the conduction of the semiconductor switching element, the first switch connected between the first node and the second end of the semiconductor switching element is turned on for a first time. When the first voltage is greater than or equal to a predetermined voltage, the first signal is output. If the first signal is output for at least two hours or longer, a second signal is generated indicating the occurrence of an overcurrent in the semiconductor switching element. Based on the second signal output in response to the evaluation test pulse input as the control signal, the settings of at least one of the following—the first waveform, the second time, the first time, and the predetermined voltage—of the drive signal supplied to the control terminal of the semiconductor switching element are changed. method.

18. A comparison circuit that detects a first voltage at a first node connected to the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage, A first filter includes a first switch connected between the first node and the second end of the semiconductor switching element, which turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element, A second filter that generates a second signal indicating the occurrence of an overcurrent in the semiconductor switching element when the first signal is output for at least two hours or more, A computer that controls an electronic circuit equipped with The steps include outputting a pulse for evaluation testing as the control signal to the electronic circuit, The steps include: acquiring the second signal output from the second filter in response to the pulse for the evaluation test; A step of changing the setting of at least one of the following: the first waveform of the drive signal supplied to the control terminal of the semiconductor switching element, the second time, the first time, and the predetermined voltage, based on the acquired second signal; A computer program designed to execute something.

19. An inverter circuit including multiple pairs of semiconductor switching elements, The electronic circuit comprises an electronic circuit corresponding to at least one semiconductor switch among the plurality of pairs of semiconductor switching elements, The aforementioned electronic circuit is A comparison circuit that detects a first voltage at a first node connected to the first end of a semiconductor switching element and outputs a first signal when the first voltage is greater than or equal to a predetermined voltage, A first filter includes a first switch connected between the first node and the second end of the semiconductor switching element, which turns on the first switch for a first time based on a control signal indicating conduction of the semiconductor switching element, A second filter generates a second signal indicating the occurrence of an overcurrent when the first signal is output for at least two hours or longer. Equipped with, The electronic circuit changes the setting of at least one of the following: the first waveform, the second time, the first time, and the predetermined voltage of the drive signal supplied to the control terminal of the semiconductor switching element, based on the second signal output in response to the evaluation test pulse input as the control signal. Electronic systems.

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