Display device and display system and method

Abstract

To provide displays of varying sizes.SOLUTION: Tiled or Tile-able displays and methods, in accordance with the present invention, provide displays of varying sizes, and as such, a Tiled or Tile-able display is configured to accommodate the display size needed for various wearable and mobile devices that require or incorporate displays. Displays, systems, and methods may be utilized in applications including, but not limited to, projectors, head-up displays, and augmented reality (AR), mixed reality (MR), and virtual reality (VR) systems or devices, such as headsets or other near-eye devices or systems.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This application claims the benefit of U.S. Patent Application No. 63 / 229,642, filed Aug. 5, 2021, the content of which is incorporated herein by reference.

[0002] The present disclosure relates to displays, for example, light-emitting diode (LED) displays (LED displays, organic electroluminescence (OLED) displays, etc.), and microdisplays thereof or micro versions thereof (such as micro LEDs and micro organic EL displays). In particular, the present disclosure relates to configurable LED displays.

Background Art

[0003] Typically, medium-sized displays for portable or wearable or mobile or handheld devices (i.e., devices that are not microdisplays and not monitors, TVs, etc.) for direct-viewing applications are often made of transmissive liquid crystal displays (LCDs) with TFT backplanes or organic EL technology. Organic EL displays have the disadvantages of short lifespan and limited brightness. On the other hand, LCD displays require a backlight, so power is consumed for each pixel regardless of whether the pixel is on or off. Although TFTs are inexpensive, they have excessive resistance (wasting power) and are too large to create advanced circuit elements under each pixel. Therefore, TFTs are limited to a driving scheme that drives each row of the display in order by making the duty cycle of each pixel very short, and a high current density is required to obtain appropriate brightness with TFTs. In contrast, micro LED displays have a long lifespan, but when a micro LED array is combined with a silicon backplane to form a micro LED display, a display with random defects is often manufactured.

[0004] When building microLED displays with silicon backplanes for physically large applications (i.e., not microdisplays, but for direct-view displays such as VR headsets, wearable devices like watches, smartphones, or monitors / televisions), creating displays of various shapes and sizes typically requires redesigning the display and manufacturing process for each new application. As the display size increases, the yield continues to decline, making the cost extremely high or at least uncompetitive depending on the application. [Overview of the project] [Problems that the invention aims to solve]

[0005] The displays in embodiments of this disclosure are usable in applications including, but are not limited to, augmented reality (AR), mixed reality (MR), and virtual reality (VR) systems and devices, such as projectors, head-up displays, and headsets and other near-eye devices and systems. The tiled or tileable displays and methods in embodiments of this disclosure provide displays of various sizes. Accordingly, the tiled or tileable displays are configured to adapt to the display sizes required by various wearable and mobile devices that require or incorporate a display. [Brief explanation of the drawing]

[0006] [Figure 1] This disclosure shows a tile array for displaying circular watches and other devices in an embodiment of this disclosure. [Figure 2] This disclosure shows a tile having a seam in an embodiment of this disclosure. [Figure 3]This embodiment of the disclosure shows the conversion to an operating die (such as a backplane die), which is converted to a form that enables nearly seamless contact. [Figure 4] This shows a cross-sectional view of a tile on a printed circuit board in an embodiment of the present disclosure. [Figure 5] This shows the back side of the tile in the embodiment of this disclosure. [Figure 6] This shows the connection of tiles forming an array in an embodiment of the present disclosure. [Figure 7] This disclosure shows a tile backplane circuit element in an embodiment of this disclosure. [Figure 8] Individual pixel circuit elements in embodiments of this disclosure are shown. [Figure 9] The serial stream format in embodiments of this disclosure is shown. [Modes for carrying out the invention]

[0007] Detailed embodiments are disclosed herein as necessary. It should be understood that the disclosed embodiments are merely illustrative of various and alternative forms. The term “exemplary” as used herein is used broadly to refer to embodiments that serve as explanatory, sample, model, or pattern. Drawings are not necessarily to scale, and some features may be exaggerated or minimized to illustrate details of certain elements. In other cases, well-known elements, systems, materials, and methods familiar to those skilled in the art are not described in detail to avoid obscuring this disclosure. Therefore, details of specific configurations and functions disclosed herein should not be construed as limitations, but merely as representative grounds for the claims and for teaching those skilled in the art.

[0008] This disclosure uses a display composed of "tiles" that are manufactured and tested independently of each other (each tile is smaller, tested during the manufacturing process, and repairable before the manufacturing process is complete, thus improving yield and eliminating yield limitations). Furthermore, manufacturers of various wearable and mobile devices differentiate themselves with industrial designs that offer a wide range of display sizes and shapes. This requires a new design for each customer, however, by using the tile-type or tileable displays and methods of the embodiments of this disclosure, it becomes possible to design and configure new displays by arranging tiles on a printed circuit board (PCB) (enabling faster design and manufacturing compared to creating new silicon dies and micro-LED arrays).

[0009] Figure 1 shows a pseudo-circular array of display tiles. In some embodiments of this disclosure, the tiles or array of display tiles are substantially circular and can be used as a display device for circular devices (such as an LED display device or LED panel). In some embodiments of this disclosure, any number of tiles can be arranged in any shape. In some embodiments of this disclosure, the light-emitting device (such as a tile) has a light-emitting die (such as an LED die) and an operating die (such as a backplane die).

[0010] In some embodiments of this disclosure, a light-emitting die (such as an LED die) has light-emitting elements bonded or integrated with a light-emitting substrate (such as a GaN substrate). In some embodiments of this disclosure, a plurality of light-emitting elements, for example, an array of light-emitting elements (such as LEDs of any type or size), are formed on the light-emitting substrate. The plurality of light-emitting elements (such as LEDs) or light-emitting arrays (such as arrays of light-emitting elements) and the light-emitting substrate (such as an LED substrate) are integrated with each other, bonded together, or both, thereby forming a light-emitting die (such as an LED die).

[0011] In some embodiments of the present disclosure, pixels are formed by coupling (e.g., electrically coupling) each light-emitting element of a light-emitting die to a circuit element (having at least a pixel circuit element), which is used to control or operate (e.g., to drive each of the individual light-emitting elements). In some embodiments of the present disclosure, the pixel circuit element comprises at least a driver circuit element. In some embodiments of the present disclosure, the driver circuit element comprises at least a pixel logic circuit element that determines the on / off state of the pixel as a function of time, and an input / output circuit element that supplies current to the LED. In some embodiments of the present disclosure, a set of pixel circuit elements is provided for each light-emitting element (such as an LED).

[0012] In some embodiments of this disclosure, each light-emitting die (such as an LED die) is coupled (electrically coupled, etc.) to an operating die (such as a backplane die). The operating die (such as a backplane die) comprises a backplane substrate and pixel circuit elements or pixel-related circuit elements or both.

[0013] In some embodiments of the present disclosure, the die is formed from silicon and is called a silicon operating die (such as a backplane die). In some embodiments of the present disclosure, the operating die (such as a backplane die) has circuit elements (such as pixel circuit elements) which are arranged, coupled, integrated, formed, deposited or embedded in a backplane substrate.

[0014] In some embodiments of the present disclosure, a circuit element (such as a pixel circuit element) or a drive circuit element is separated into at least a pixel logic circuit element and an input / output circuit element. In some embodiments of the present disclosure, the pixel logic circuit element operates or is located in one or more areas of a backplane substrate, which is different from one or more areas of the backplane substrate in which the input / output circuit elements operate or are located.

[0015] In some embodiments of the present disclosure, the pixel logic circuit elements operate or are located in one or more strips or strip-like areas of a backplane substrate, which are distinct from one or more strips or strip-like areas of the backplane substrate in which input / output circuit elements operate or are located.

[0016] In some embodiments of the present disclosure, each light-emitting element is associated with a pixel circuit element (i.e., associated with a drive circuit or drive circuit element that drives the light-emitting element (e.g., determining a gray level output for the light-emitting element)). In some embodiments of the present disclosure, each light-emitting element is associated with a pixel logic circuit element or pixel logic circuit and an input / output circuit element or input / output circuit. In some embodiments of the present disclosure, the combination of each light-emitting element (such as an LED) and its circuit element (such as a pixel circuit element) forms a pixel of a tile, and the circuit element of each light-emitting element (such as an LED) includes, but is not limited to, a drive circuit element. In some embodiments of the present disclosure, since the LEDs and pixel circuit elements are on different wafers before bonding, an electrical contact element exists between the LEDs and the pixel circuit elements. In some embodiments of the present disclosure, the electrical contact element is located on the wafer on which each LED is located, or on the wafer on which the pixel circuit element is located.

[0017] In one embodiment of this disclosure, tile pixels are formed by the combination of each light-emitting element (such as an LED) and its circuit element. For example, tile pixels are formed by the combination of each light-emitting element (such as an LED) and its circuit element (such as the pixel logic circuit element of the light-emitting element and the input / output circuit element of the light-emitting element).

[0018] In some embodiments of the present disclosure, the light-emitting element is a master light-emitting element. In some embodiments of the present disclosure, the master light-emitting element has two or more light-emitting elements (such as LEDs). In some embodiments of the present disclosure, the master light-emitting element has at least three light-emitting elements, for example, one set of three light-emitting elements (such as LEDs).

[0019] In some embodiments of the present disclosure, pixels are formed by coupling (e.g., electrically coupling) light-emitting elements (LEDs, etc.) to circuit elements (pixel circuit elements, etc.), and these circuit elements drive each of the light-emitting elements (LEDs, etc.). In some embodiments of the present disclosure, master pixels are formed by coupling (e.g., electrically coupling) a master light-emitting element (a group or set of, for example, three LEDs, etc.) to circuit elements (pixel circuit elements, etc.), and these circuit elements drive each of the light-emitting elements (LEDs, etc.) of the master light-emitting element. In some embodiments of the present disclosure, each light-emitting element (LED, etc.) is a group of three primary colors, and when the LEDs are grouped as a group, a perceptually seamless contact is achieved, although there are gaps between them. In some embodiments of the present disclosure, one tile has two or more master pixels, for example, an array of multiple master pixels. In some embodiments of the present disclosure, a pixel circuit element has at least a driving circuit element. In some embodiments of the present disclosure, a driving circuit element has at least a pixel logic circuit element and an input / output circuit element.

[0020] In certain embodiments of the present disclosure, each tile may be arranged, for example, on a printed circuit board in any pattern. In certain embodiments of the present disclosure, a display may be formed by arranging each tile, for example, on a printed circuit board in any pattern. To illustrate the use of each tile in embodiments of the present disclosure, a pseudo-circular array of tiles is shown in FIG. 1. For example, as shown in FIG. 1, a pseudo-circular array of each display tile is arranged on a printed circuit board (PCB) (not shown) and used for the dial display of a wristwatch. In the illustrated example, for example, according to an embodiment of the present disclosure, 88 tiles of 3.6 mm × 3.6 mm each containing 60 × 60 pixels per tile are arranged to form a dial of a wristwatch with a diameter of 36 mm. However, it will be understood by those skilled in the art that the number of tiles, the number of pixels per tile or the number of master pixels or both, the shape of the tiles or the shape of the tile array or both may be different. In certain embodiments of the present disclosure, the pattern or arrangement of tiles on the printed circuit board may be different.

[0021] In certain embodiments of the present disclosure, as shown in FIG. 2, adjacent tiles are arranged on a printed circuit board with a space, gap or joint therebetween. As shown in FIG. 2, in certain embodiments of the present disclosure, there is a space, gap or joint between the sides or edges of two adjacent tiles (each tile has one or more master pixels or has one or more aggregates composed of three light-emitting elements (such as each LED and pixel circuit elements associated therewith)). It will be understood by those skilled in the art that when referring to LEDs, it includes all kinds of LEDs (such as LEDs, organic ELs, micro LEDs or micro organic ELs, etc.). As shown in FIG. 2, in certain embodiments of the present disclosure, there is a space, gap or joint between adjacent tiles. It will be understood by those skilled in the art that the number and color of LEDs in a master light-emitting element or master pixel (such as a set of LEDs or a set of circuit elements electrically coupled to each LED or both) may be different.

[0022] In certain embodiments of the present disclosure, the pitch (i.e., the center-to-center distance between each light-emitting element of an aggregate of light-emitting elements (such as LEDs), each master pixel or each master light-emitting element, etc.) should be such that the space between each light-emitting element of an aggregate of light-emitting elements (such as LEDs), each master pixel, each master light-emitting element or each pixel, etc. allows a space, gap or joint that does not interfere with the pixel pitch (the pixel pitch is, that is, the distance between the center of one light-emitting element, which is a master pixel or a master light-emitting element, etc., and the center of another light-emitting element, which is a master pixel or a master light-emitting element, etc.). At the same time, it is necessary to allow a space, gap or joint sufficient to maintain the same or substantially / almost the same pixel pitch for all or at least a part of each light-emitting element of adjacent (each master light-emitting element or each master pixel, etc.). In certain embodiments of the present disclosure, when the tile is a single-color tile, the master pixel and the pixel are the same. [[ID= (5]]

[0023] Figure 3 shows the difference between a conventional backplane die and a tiled or tileable operating die (such as a backplane die). For example, in the operating die (such as a silicon backplane die) in the embodiments of this disclosure, the pitch between each master light-emitting element or between each master pixel is the same, so that the tiles appear to be in seamless contact. The planar arrangement of a conventional die has or is provided with 1 / 0 and logic circuit element areas (therefore, 1 / 0 buffers are provided in the input area, and these buffers are used for conversion between logic levels used externally and internal logic levels. The logic area has registers, a state machine, and pixel driving circuit elements, and is used to receive image data from the outside and distribute it to the pixels in the active area).

[0024] In conventional die arrangements, the input region and logic region are arranged or positioned around the active region of the display (i.e., the region containing pixels that generate images, etc.). In some embodiments of the operational die, the operational die in the embodiments of the present disclosure (such as a tileable backplane or a backplane die such as a silicon backplane) has strips in which pixel logic circuit elements and 1 / 0 circuit elements are arranged alternately. In some embodiments of the present disclosure, the 1 / 0 circuit elements have a 1 / 0 buffer, which is used for conversion between logic levels used externally and internal logic levels. In some embodiments of the present disclosure, the logic region has registers, a state machine, and pixel driver circuit elements, which are used to receive image data from the outside and distribute it to the pixels in the active region. Wiring is arranged in a matrix so that connections to LED pixels in the array are maintained. In some embodiments of the present disclosure, each light-emitting element, such as an LED, is located on a pixel logic circuit element or strip, on a 1 / 0 circuit element or strip, or on both a pixel logic circuit element or strip and a 1 / 0 circuit element or strip. In one embodiment of this disclosure, the circuit element strip is embedded within the operating die back plane substrate.

[0025] Conventional backplanes typically include peripheral bonding pads on the silicon die or bump / pillar connections on the silicon die to connect 1 / 0 buffers to a circuit element substrate or package. According to embodiments of this disclosure, tiled or tileable backplanes have through-silicon vias (TSVs), which distinguishes them from conventional backplanes. Through-silicon vias are used to connect or electrically couple one face or front of an operating die (such as a silicon backplane die) to a second face or back of the same operating die, or to a circuit element of a printed circuit board, or both. The operating die contains an emissive die (including an array of LEDs, light-emitting elements (such as LEDs), or a master light-emitting element that is connected to or electrically coupled to a pixel circuit element to form a master pixel).

[0026] Figure 4 shows a cross-sectional view of a tile on a printed circuit board. In one embodiment of the present disclosure, the tile comprises an operating die (such as a backplane die or wafer, such as a silicon backplane) coupled (e.g., bonded and / or electrically coupled) to a light-emitting die (such as an LED wafer or die) using known bonding and connection methods of the prior art.

[0027] In embodiments of the light-emitting die, according to embodiments of the present disclosure, each LED is formed on, integrated with, or manufactured on a substrate such as a GaN substrate. However, the substrate material may be different, and it will be understood by those skilled in the art that the substrate may be composed of any semiconductor material capable of forming a light-emitting structure. In some embodiments of the present disclosure, a metal contact for electrically coupling the light-emitting die (such as an LED die) to the operating die (such as a silicon die or a silicon operating die backplane die) is coupled to or integrated with the light-emitting die.

[0028] According to embodiments of the present disclosure, light-emitting devices (tiles, etc.) have vias (through-substrate vias or through-silicon vias, etc.). These vias are used to form connections, power supplies, and interfaces between a first or back surface and a second surface of an operating die (such as a silicon die). The formation of these connections, etc., is also configured to supply power to tile circuit elements (1 / 0 logic circuit elements, 1 / 0 logic strips, pixel circuit element logic circuit elements, pixel circuit element logic strips), or conductive circuit element portions (copper deposition or other conductive elements, etc.), or both, and these conductive circuit element portions are deposited, bonded, or integrated with a printed circuit board. In some embodiments of the present disclosure, vias (through-substrate vias or through-silicon vias (TSVs), etc.) receive data voltage inputs in a 1 / 0 buffer and are used to connect power supply and ground devices or components or sources, or combinations thereof, to a light-emitting die (LED die, etc.) or an operating die (backplane die, etc.), or both.

[0029] In one embodiment of the present disclosure, each opening in a through-via, for example, a through-silicon via (TSV), is open on the back surface of the operating die (such as a silicon die), and solder or other conductive material is applied to these openings for soldering to the underlying printed circuit board or to the circuit elements of the underlying printed circuit board.

[0030] In some embodiments of the present disclosure, tile circuit elements (such as 1 / 0 logic circuits or 1 / 0 circuit element strips and pixel circuit element logic strips or driver circuit element logic strips) are deposited, formed, embedded or integrated with an operating die (such as a backplane substrate, silicon operating die, or backplane die or silicon die). In some embodiments of the present disclosure, light-emitting dies (such as LED dies) consist of at least one of being electrically connected, coupled or bonded to an operating die, and silicon dies consist of at least one of being connected, coupled or electrically coupled or bonded to a PC. In some embodiments of the present disclosure, connections between tiles or within each tile array are configured via a printed circuit board (i.e., a substrate that houses each tile, or a substrate on which each tile is arranged, coupled, bonded or positioned).

[0031] In some embodiments of this disclosure, circuit elements or one or more conductive elements are deposited, manufactured or integrated onto a printed circuit board (such as one or more faces of a printed circuit board). The circuit elements or one or more conductive elements are, for example, (1) used to electrically connect an emitting die (such as an LED die) or an operating die (such as a backplane die) or both to a power source or power or data source or voltage source or current source or a combination thereof, or (2) used to receive data, voltage, or other inputs, or both. In some embodiments of this disclosure, the circuit elements or conductive elements or deposits on the printed circuit board are made of copper material and are also called copper traces or copper wiring. However, it will be understood by those skilled in the art that the conductive elements may be made of conductive materials other than copper. The printed circuit board also functions as a structure that provides support or rigidity to a tile array or provides a rigid surface. In some embodiments of this disclosure, the printed circuit board may comprise one or more layers of circuit elements (such as any tile-related circuit elements).

[0032] Figure 5 shows the back of the tile. In some embodiments of this disclosure, as shown in Figure 5, the back or bottom surface of the tile has an array of through-silicon via openings, which are used, for example, to receive input data or voltage, output data or voltage, or signals. In some embodiments of this disclosure, through-silicon via openings may be used to electrically connect an LED die to a circuit element of a printed circuit board (for example, such a circuit element may be (1) a circuit element for electrically connecting the LED die to a power or power or data source or a voltage source or current source or a combination thereof, or (2) a circuit element for receiving data, voltage, or other inputs, or both). In some embodiments of this disclosure, through-silicon vias may be used to output data from the tile.

[0033] As shown in Figure 5, for example, vias are present on the operating die (such as a silicon die), and these vias are used to establish a power connection between the printed circuit board (which may be connected to a voltage source or other power source) and the light-emitting die (such as an LED die). Also, Figure 5 shows one embodiment of the present disclosure, which is an example of an exemplary I-layer wiring pattern on a printed circuit board, having, for example, wiring or conductive elements deposited on or embedded within the printed circuit board. In one embodiment of the present disclosure, a through-silicon via labeled D1 is used to connect serial data input from a controller to a tile (this controller is shown in Figure 6 and is also called a tile array controller, array controller, master controller, etc.). In one embodiment of the present disclosure, the controller shown in Figure 6 is outside the tile or tile array or both. In one embodiment of the present disclosure, the controller (tile array controller or master controller, etc.) is located on or connected to a substrate such as a printed circuit board, to which the tiles are connected or located. In some embodiments of the present disclosure, the controller controls the operation of each tile in the tile array, or controls the operation of the tile array as a unit, or both. In some embodiments of the present disclosure, the controller (such as a tile array controller or master controller) distributes data to the tiles and controls the tiles when displaying new data. In some embodiments of the present disclosure, the arrows to the controller in Figure 6 and the arrows to the tiles in Figure 6 represent tapped serial data and clock transmission lines (i.e., conductive elements such as copper wire elements) shown in Figure 5 to the printed circuit board.

[0034] The through-silicon via labeled CK is used to connect the clock voltage output from the controller to each tile to sample serial data and provide a clock to the logic circuit elements of the tile. As illustrated with reference to Figure 6, the tile receives serial data (DI) and clock output (CK) from the controller.

[0035] In some embodiments of the present disclosure, at least one via is used to connect or supply power to a tile or a light-emitting die (such as an LED die) or both. In this case, power is connected or supplied, for example, via a power rail coupled to or electrically connected to an operating die (such as a backplane die or a silicon operating die) (this power rail is, for example, a conductive element, a grounding element or component, a wire, or other component, or a combination thereof, which is coupled to, deposited, embedded, integrated with, or a combination thereof on a printed circuit board). As a result, according to embodiments of the present disclosure, power is supplied to the light-emitting device (e.g., a tile or a light-emitting die (such as an LED die)).

[0036] In some embodiments of the present disclosure, an LED die is coupled to an operating die (such as a silicon operating die or a backplane die). In some embodiments of the present disclosure, through-silicon vias (such as four TSVs) are used to connect a printed circuit board to the power rails (i.e., VDD) of the LED die or tile or both, providing sufficient current capacity and low resistance. It will be understood by those skilled in the art that the number of vias used to connect the components of the operating die (such as a backplane die) to a power supply or other components of a display system or a printed circuit board or other components of a printed circuit board (or components electrically connected to a printed circuit board), or a combination thereof, may vary.

[0037] In some embodiments of the present disclosure, a controller (such as a tile array controller, array controller, master controller, or master controller chip) is used to broadcast or transmit data to all tiles, or to all tiles or at least a portion of each tile. Each tile (or at least some of each tile) recognizes which portion of the data it should hold based on its (i.e., tile's) address, or, for example, how the tile's address pins are linked. In some embodiments of the present disclosure, the controller (such as an array controller) transmits data to the first tile, and then the data is streamed or transmitted to the next tile in the tile array. In some embodiments of the present disclosure, as shown in Figure 6, each tile identifies and extracts data destined for that tile according to information in a header associated with the data transmitted from the controller (such as an array controller, master controller, or master controller chip). In some embodiments of the present disclosure, each tile may receive data (such as data represented by voltage waveforms or pulses) according to the tile's address identified in the address bits of the data received by the array from the controller (such as an array controller, master controller, or master controller chip). For example, in one embodiment of the present disclosure, each of the through-silicon vias labeled A0 to A5 identifies a location within an LED array or master pixel array and is electrically connected to a pixel or master pixel or LED within the LED array or master light-emitting array or master pixel array.

[0038] In one embodiment of the present disclosure, as shown in Figure 6, each tile is incorporated within a tile array and electrically interconnected via a serial bus (e.g., by wires) consisting of, for example, data signals and optionally clock signals. In one embodiment of the present disclosure, as shown in Figure 6, a controller (such as an array controller, master controller, or master controller chip) converts input image or video data in a certain format, for example, a standard format (such as MIPI DSI), into a custom serial format that the tiles can process.

[0039] The first side or left side of Figure 6 shows a tile array, and the second side or right side of the tile (the side indicated by the arrow) shows that the array consists of multiple tiles. These multiple tiles are connected in series and controlled by a controller (such as an array controller, master controller, or master controller chip). This controller is coupled to at least one of the tiles in the series or to each of the multiple tiles.

[0040] In some embodiments of the present disclosure, the custom format is determined according to an embodiment that allows data to be distributed to all tiles and that allows each tile to easily retrieve the portion of the data that corresponds to it. In some embodiments of the present disclosure, as illustrated in Figure 5, each tile has a predetermined location in the array and stores or displays or both data identified for that tile. In this tile, the tile is aware of or knows its own address and knows how the data on the serial data input is arranged as it moves along a bus that is associated with its address or its geographical location in the array or a portion of the array (i.e., the entire array or at least a portion of the array). In some embodiments of the present disclosure, the tile ignores data on the serial bus that is not associated with its address.

[0041] In one embodiment of the present disclosure, a tapped transmission line having termination at its end has a plurality of transmission line segments, each transmission line segment (i.e., a transmission line segment between two tiles connected in series) is adjusted by adjusting its width according to an embodiment of a transmission line matching method (i.e., a transmission line matching method that provides a transmission path free from reflections and other obstacles, and matches the impedance between the transmission line and at least one of the tiles to which the transmission line is electrically connected and other components (such as electrical components), and when combined with the input capacitance of the data input or data input pin connection of each tile, a controlled transmission line impedance is given).

[0042] In some embodiments of the present disclosure, for example, while new data is arriving from the image or video data source to a tile, data from the previous image or video frame is displayed, and the new data or data for the next frame can be transmitted over the entire duration of the video frame (i.e., the frame being displayed), thereby reducing the required data rate. For example, as shown in Figure 1, an array (such as an array of master pixels or master light-emitting elements) in one embodiment of the present disclosure provides 220,000 pixels, each having, for example, 660,000 sub-light-emitting elements (e.g., red, green, blue LED subpixels), each requiring 8 bits of data to define their brightness. In some embodiments of the present disclosure, the serial data rate required for the embodiment shown in Figure 1 is 158.4 Mb / s at a refresh rate of 60 Hz.

[0043] Figure 7 shows an embodiment of a backplane circuit element in an embodiment of the present disclosure, showing, as an example, an operating die (silicon die or tile backplane, etc.) circuit element. In an embodiment of the present disclosure, (1) the tile operating die (backplane or backplane die, etc.) circuit element has, or is connected to, a receiver for DIN (i.e., data input / signal) and CLK input / signal (serial data and clock voltage input, etc.), a logic circuit element, an algorithm or software algorithm, or a module, and the serial data received by the receiving logic circuit or circuit element or block is decoded; and (2) the tile operating die (backplane or backplane die, etc.) circuit element determines when to load such serial data into an array of pixel circuit elements and when to update the pixels that display the loaded data. In an embodiment of the present disclosure, each pixel circuit (as shown in Figure 7) is contained within the operating die (backplane, backplane die or silicon die, etc.) circuit element, and each pixel circuit includes both a receiving memory and an active memory (memory device, etc.). It will be understood by those skilled in the art that each pixel circuit may use any modulation method to drive the pixel circuit. The pixel structure in the embodiments of this disclosure is further described in Figure 8.

[0044] The tile controller's logic circuit elements, or the tile controller device, or both, extract data from a serial data stream (e.g., represented as a voltage waveform) destined for a tile transmitted via a serial bus, place that data on the DATA bus for the column of the pixel array to which the data is to be written, and then load that data into the master pixel using a ROW-WRITE strobe.

[0045] As detailed in Figure 8, the tile controller generates a LOAD output control voltage to all master pixels or master light-emitting elements within a tile (or at least a subset of tiles) and outputs a Time Varying Value (TVV) to the TVV bus. This LOAD output control voltage controls the transfer of data from the receive memory to the active memory.

[0046] The tile control logic / circuit element / software / device further comprises a time-varying value (TVV) generator, which creates a changing digital pattern for use in the pixels. In one embodiment of this disclosure, the bias control circuit / software / device includes a brightness control register that supplies a digital value to a DAC, and a current DAC that converts the register value into a current. The current is then converted into a voltage, which is suitable for biasing a current source electrically coupled to an individual pixel or a pixel circuit element electrically coupled to a pixel.

[0047] In some embodiments of the present disclosure, a configuration (Config) register can be written to or from data extracted from input serial data received by a deserializer and can be used to control a bias current set by a bias control circuit element or device. In some embodiments of the present disclosure, the Config register may, if not may, store information about the number of X and Y pixels of a tiled display (i.e., the number of pixels in each row and the number of pixels in each column) and the activity state of the tiles (e.g., sleep or wake).

[0048] As shown in Figure 8, in one embodiment of the present disclosure, each subpixel (one of a set of three subpixels for each master light-emitting element) includes a light-emitting element (e.g., an LED, micro-LED, organic EL, or micro-LED device or component). This light-emitting element is electrically connected to a memory element (e.g., two sets of memory elements), a logic function circuit element, a final latch, and a current driver. The logic function circuit element has an output that controls a latch (such as a final latch) electrically coupled to it. The current driver supplies a modulated current to the LED. It will be understood by those skilled in the art that the number of memory elements, latches, and current drivers may vary.

[0049] In one embodiment of this disclosure, image data or video data (such as grayscale data of an image or video) is loaded from a tile controller into a receiving storage device (such as a memory device or a receiving pixel memory device). The tile controller places or transmits the data to be written to the tile, extracted from the serial data stream by a deserializer and decoder, onto the data bus of the column containing the pixels or master pixels to be written. The tile controller then outputs a ROW-WRITE signal for the row of pixels to be written. It will be understood by those skilled in the art that other row-column scanning methods may be used to control the ROW-WRITE operation.

[0050] In some embodiments of the present disclosure, the tile controller outputs a LOAD output voltage or signal. This LOAD output voltage or signal initiates data transfer from a receiving storage device (such as a memory device or a receiving memory device) to an active storage device (such as a memory or an active pixel memory device). In some embodiments of the present disclosure, a display cycle is then initiated. During this cycle, the tile controller supplies a changing value or voltage to a time-varying value (TVV) bus. This changing value or voltage is a combination of a value (in the case of software) or a value represented by a voltage in an active storage device such as memory, generated by pixel logic hardware or software, or by a pixel logic hardware device or means or software function, algorithm or module, to generate a time-varying voltage such as a single-bit voltage, voltage pulse or signal used for current modulation. In some embodiments of the present disclosure, each time the time-varying value bus is modified by the tile controller, a COMPUTE signal or output generated by a counter in the tile controller is asserted or output to a logic function circuit element or a latch or both, causing a single-bit output or signal operation and latching it to a final latch. The output of the final latch directly controls the on / off state of the current source. Modulation by pixel logic hardware or software is, for example, one of various resulting digital patterns, such as PWM or binary-weighted pulse width, and is used to change the brightness of each pixel according to data loaded into a storage device (such as memory).

[0051] In some embodiments of the present disclosure, a serial data stream from a tile array controller or master controller to a tile is formatted into frames corresponding to the display's refresh rate in terms of duration and frequency. In some embodiments of the present disclosure, as shown in Figure 9, each frame has a Start-Of-Frame (SOF) marker, which contains a unique pattern that can be used by the tile controller's decoding logic circuit elements to reliably detect the start of a frame (i.e., in the data received by the tile). The Start-Of-Frame marker is followed by header information describing the content of the video data. The content of the video data is information about the number of pixels per row in the display, such as the expected number of words in the data stream and the number of bits in each word. It also includes information including global register updates (i.e., for the entire pixel array or a given part thereof), such as brightness control and sleep / wake status.

[0052] In some embodiments of this disclosure, the serial stream of data transmitted from the tile controller or display controller to the tile may be encoded, for example, in 8b / 10b or 8b / 9b encoding to provide unique symbols for robust transmission and reception, error detection, frame initiation, and other control purposes (such as controlling the power state of the tile). Each tile stores its own unique data by indexing the pixel data it receives using its own address and identifying the start and end of data destined for that tile.

[0053] According to some embodiments of the present disclosure, a display device comprises a light-emitting die and a backplane device coupled to the light-emitting die, wherein the light-emitting die has at least one light-emitting element which is coupled to, formed on, or integrated with a light-emitting substrate, and the backplane device has a backplane substrate and pixel circuit elements which are embedded in, integrated with, formed on, or coupled to the backplane substrate, and the pixel circuit elements comprise pixel logic circuit elements and input / output logic circuit elements.

[0054] According to some embodiments, the pixel circuit element comprises a driving circuit element. According to some embodiments, at least one light-emitting element comprises three light-emitting elements. The light-emitting element is an LED in some embodiments and a microLED in other embodiments. According to some embodiments, the pixel circuit element is electrically coupled to at least one light-emitting element, and the pixel circuit element drives at least one light-emitting element. According to some embodiments, the pixel circuit element is electrically coupled to at least one light-emitting element by a conductive element, and the pixel circuit element drives at least one light-emitting element.

[0055] According to some embodiments, the backplane device is manufactured from a material containing silicon or other semiconductors in which transistors can be formed. According to some embodiments, the light-emitting elements have conductive portions, and the pixel circuit elements have conductive portions for electrically coupling the light-emitting elements to their respective pixel circuits. In some embodiments, the backplane device has through-silicon vias (TSVs), and the upper side of the backplane device is connected to the back side of the backplane device by conductive material or devices at the ends of the TSVs. According to some embodiments, the printed circuit board is electrically coupled to the backplane device via conductive elements that couple the printed circuit board (PCB) and the backplane device using TSVs. According to some embodiments, at least three light-emitting elements form a first master pixel. In some embodiments, the display device further comprises a second master pixel, the second master pixel is electrically coupled to the first master pixel via electrically conductive components or wires. According to some embodiments, the first master pixel and the second master pixel form a tile.

[0056] According to several embodiments, the display device comprises a plurality of tiles, one of which comprises an emissive die. The emissive die comprises at least one emissive element, which is bonded to, formed on, or integrated with an emissive substrate. A backplane device is bonded to the emissive die. The backplane device comprises a backplane substrate and pixel circuit elements, the pixel circuit elements being embedded in, integrated on, formed on, or bonded to the backplane substrate. The pixel circuit elements comprise pixel logic circuit elements, input / output logic circuit elements, and a printed circuit board (PCB). The plurality of tiles are electrically bonded via circuit elements, which are embedded in, integrated on, formed on, or bonded to the backplane substrate, and via circuit elements, which are embedded in, integrated on, formed on, or bonded to the printed circuit board.

[0057] According to some embodiments, the pixel logic circuit elements consist of at least one of being located, embedded, integrated, formed, or coupled to a first strip region of the backplane substrate. The input / output logic circuit elements consist of at least one of being located, embedded, integrated, formed, or coupled to a second strip region of the backplane substrate in some embodiments.

[0058] According to some embodiments, the display system includes a tile controller that controls the operation of each tile or multiple tiles in an array, and is located on or integrated with the operation die of each of the multiple tiles, and each tile in the multiple tiles has a tile address. A master controller is coupled to at least one tile in the multiple tiles or tile array, the master controller transmits data to the tile to which it is coupled, the tile controller identifies tile data from the data received from the master controller, the tile data is a subset of the data transmitted from the master controller, and the tile controller associated with the tile address stores the tile data in a memory component within the tile or in a memory component associated with the tile.

[0059] According to some embodiments, data transmitted from a master controller includes a tile address in the header of the data transmitted from the master controller. According to some embodiments, the master controller receives data from a first device in a first form, and the master controller converts the data to a second form, which is suitable for, readable, or processable by a tile or a tile controller associated with a tile.

[0060] According to some embodiments, the first device is a device that generates or outputs an image or image data. According to some embodiments, the tiles in a plurality of tiles or tile arrays are electrically connected in series. According to some embodiments, image or video data is transmitted to a tile for display in the next frame while the image or video data for the current frame is displayed on the tile. According to some embodiments, each tile is equipped with a light-emitting element, and each light-emitting element is coupled to a first storage device and a second storage device.

[0061] According to some embodiments, the display system further comprises a logic function circuit element electrically coupled to a latch, the logic function circuit element performing an operation such as an equivalent function or a comparison function or a Boolean logic function, and generating an output received by the latch to which the logic function circuit element is coupled, the latch storing the output of the logic function circuit element, and a current drive circuit or component electrically coupled to a light-emitting element, the current drive circuit or component supplying a modulated current to the light-emitting element, and the current drive circuit or component supplying a modulated current to the light-emitting element according to the output generated by the logic function circuit element.

[0062] According to several embodiments, the display system comprises a pixel array of pixel elements, each light-emitting element of the pixels in the pixel array or each light-emitting element of the master pixel being electrically coupled to a pixel circuit element, the pixel circuit element comprising a first storage device or a receiving pixel memory device and a second storage device or an active pixel memory device electrically coupled to the receiving pixel memory device. A logic function circuit element is coupled to the active pixel memory device. A latch is coupled to the logic function circuit element, and a current drive device is coupled to the latch, and the current drive device drives the operation of each pixel in the pixel array or each master pixel in the pixel array. The tile controller comprises a deserializer that receives input data from the receiving storage device. A decoder is electrically coupled to the deserializer, and the deserializer extracts image or video data from the data stream received by the deserializer of the tile controller, depending on whether or not there are tile addresses in the data stream, and the deserializer controls the writing of the extracted data to the first storage device or the receiving pixel memory device.

[0063] According to some embodiments, a decoder decodes the extracted data after it has been extracted from the data stream, and a tile controller instructs a control logic block to write the extracted and subsequently decoded data to a data bus, which corresponds to or is associated with rows comprising or containing light-emitting elements, pixels, master pixels, LEDs, or sets of LEDs, and these light-emitting elements, pixels, master pixels, LEDs, or sets of LEDs are identified as destinations for writing the extracted and subsequently decoded data. According to some embodiments, a tile controller outputs a ROW / WRITE output or signal to the row of light-emitting elements, pixels, master pixels, LEDs, or sets of LEDs, and these light-emitting elements, pixels, master pixels, LEDs, or sets of LEDs are identified as destinations for receiving the extracted and subsequently decoded data.

[0064] According to some embodiments, the display system further comprises a control logic circuit element of a tile controller, which outputs a LOAD output voltage or signal to initiate data transfer from a receiving memory to a second or active memory. According to some embodiments, the display system further comprises a Time-Varying Value (TVV) generator, which, after data has been transferred to the second or active memory, initiates a display cycle, during which the Time-Varying Value generator supplies a changing value or voltage, combined with a value or voltage from the second or active memory by a pixel logic circuit or pixel logic device, to a Time-Varying Value (TVV) bus, generating a Time-Varying Voltage used to modulate a current-driven circuit or device electrically coupled to a master pixel or master light-emitting element.

[0065] According to some embodiments, a COMPUTE signal or output generated by a counter in the tile controller's time-varying value generator is transmitted to a logic function circuit element or a latch or both of the pixel array each time the time-varying value bus by the time-varying value generator changes. The logic function circuit element then performs or calculates a Boolean logic function, generates a single-bit output or signal, and outputs it to the latch. The output of the latch directly controls the on / off state of a current source, thereby controlling the on / off state of a pixel, a master pixel, an LED, or a collection of LEDs.

[0066] The embodiments described above are merely illustrative descriptions of implementations provided to clearly illustrate the principles. Modifications, alterations, and combinations of the embodiments described above are possible without departing from the claims. All such modifications, alterations, and combinations are incorporated herein by the scope of this disclosure and the claims.

Claims

1. A display device, The system comprises a plurality of tiles and a circuit element configured to electrically connect the plurality of tiles, One tile is, A light-emitting die having at least one light-emitting element, A backplane device coupled to the light-emitting die, A backplane substrate having a first region and a second region, The pixel logic circuit element formed in the first region, A backplane device comprising input / output logic circuit elements formed in the second region, Having, Display device.

2. A display device according to claim 1, The first region has a first strip region, The aforementioned second region has a second strip region, Display device.

3. A display device according to claim 1, The first region has a plurality of first strip regions, The second region has a plurality of second strip regions that are arranged alternately with the plurality of first strip regions. Display device.

4. A display device according to claim 1, The circuit element configured to electrically connect the plurality of tiles has a printed circuit board (PCB). Display device.

5. A display device according to claim 4, The PCB electrically connects the plurality of tiles in series. Display device.

6. A display device according to claim 1, Image or video data is transmitted to the input / output logic circuit element of the tile for display in the next frame while the image or video data for the current frame is being displayed on the light-emitting die of the tile. Display device.

7. A display device according to claim 1, Each of the aforementioned plurality of tiles has a corresponding tile address, The circuit element configured to electrically couple the plurality of tiles includes a master controller coupled to at least one of the plurality of tiles. The master controller sends data having a header containing a tile address identifier to the tile to which it is joined. The backplane device of the tile identifies the tile data from the data received from the master controller, The tile data is a subset of the data transmitted from the master controller. The backplane device of the tile associated with the tile address identifier stores the tile data in a memory component within the tile, or in a memory component associated with the tile. Display device.

8. A display device according to claim 7, The master controller receives data from the first device of the first type, The master controller converts the data into a second format, The second form is readable or processable by the backplane device of the tile. Display device.

9. A display device according to claim 8, The first device is a device that outputs image data. Display device.

10. A display device according to claim 8, Each light-emitting element of the light-emitting die is coupled to a first memory device and a second memory device. Display device.

11. It is a display system, A pixel array of pixels, Tile controller on backplane device and Equipped with, Each pixel has at least one light-emitting element, and each light-emitting element of the pixel is electrically coupled to a pixel circuit element in a first region of the backplane device. The aforementioned pixel circuit element is Receiving pixel memory device, An active pixel memory device electrically coupled to the receiving pixel memory device, A logic function circuit element coupled to the active pixel memory device, A latch coupled to the aforementioned logic function circuit element, A current drive device coupled to the latch, wherein the current drive device drives the operation of each pixel of the pixel array. It has, The aforementioned tile controller A control logic block having circuit elements on the first region of the backplane device, The deserializer and decoder include circuit elements on a second region different from the first region of the backplane device, The decoder is electrically coupled to the deserializer, The aforementioned deserializer is: Receive data stream, In accordance with the presence of tile addresses within the data stream, image data or video data is extracted from the data stream, and It is configured to control the writing of the aforementioned image or video data to the receiving pixel memory device, The decoder is configured to decode the extracted image or video data after it has been extracted from the data stream. The control logic block is configured to write the extracted and subsequently decoded image data or video data to the data bus. The data bus corresponds to or is associated with a column comprising or containing one or more pixels of the pixel array. The aforementioned column is identified as the destination for writing image data or video data. Display system.

12. A display system according to claim 11, The first region has a first strip region, The aforementioned second region has a second strip region, Display system.

13. A display system according to claim 11, The control logic block writes each of the extracted and subsequently decoded image data or video data to each of the multiple data buses. The aforementioned data buses correspond to or are associated with a plurality of columns, each comprising or containing one or more pixels of the pixel array. Each column is identified as a single write destination for each of the aforementioned multiple parts of image data or video data, The first region has a plurality of first strip regions, The second region has a plurality of second strip regions that are arranged alternately with the plurality of first strip regions. Display system.

14. A display system according to claim 11, The tile controller outputs a ROW / WRITE output to the row of pixels. The aforementioned pixels are identified as those that should receive the extracted and subsequently decoded data. Display system.

15. A display system according to claim 14, The control logic block outputs a LOAD output voltage or signal to initiate data transfer from the receiving pixel memory device to the active pixel memory device. Display system.

16. A display system according to claim 15, The tile controller further comprises a time-varying value (TVV) generator, After the data is transferred to the active pixel memory device, the display cycle begins. During the display cycle, the time-varying value generator, The pixel circuit element supplies a changing value or voltage, combined with the value or voltage of the active pixel memory device, to the time-varying value (TVV) bus. A time-varying voltage is generated, which is used to modulate a current-driven device electrically coupled to the pixels of the aforementioned pixel array. Display system.

17. A display system according to claim 11, The at least one light-emitting element of the pixel comprises three light-emitting elements that generate three colors of light. Display system.

18. A display system according to claim 11, The at least one light-emitting element of the pixel is at least one LED. Display system.

19. A display system according to claim 18, The aforementioned at least one LED is at least one microLED. Display system.

20. It is a method, The master controller transmits data to one or more tiles among a plurality of tiles, wherein the data has a header containing a tile address, and the tile address is associated with the first tile among the plurality of tiles. The data is received in the tile controller of the first tile, wherein the tile controller comprises a first region having a plurality of first strip regions, a second region having a plurality of second strip regions arranged alternately with the plurality of first strip regions, pixel logic circuit elements formed in the first region, and input / output logic circuit elements formed in the second region. In the tile controller of the first tile, the tile address in the header of the data is recognized, the tile data is identified as a subset of the data received from the master controller, and the tile data is stored in a memory component within the first tile, or in a memory component associated with the first tile. Having, method.

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