Semiconductor equipment

Abstract

To provide a semiconductor device in which the increase in chip area can be suppressed and the occurrence of a wrong operation due to temperature increase of an output transistor can be suppressed.SOLUTION: A semiconductor device 10 includes a P-type semiconductor substrate 101, an output transistor 140 formed on a surface of the P-type semiconductor substrate 101, a first insulating film 103 formed over the output transistor 140, metal wiring films 146 and 147 formed on the first insulating film 103, a second insulating film 104 formed on the first insulating film 103 and the metal wiring films 146 and 147, and a heat sensitive element 110a formed on the second insulating film 104. The heat sensitive element 110a is a thin film transistor including an oxide semiconductor film.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] Semiconductor devices that supply a large current of several hundred milliamperes or more to electronic devices, such as LDOs and DC-DC converters, include an output transistor for controlling the current. When such a large current flows through the output transistor, Joule heat based on the product of the current amount and the channel resistance may be generated. In such a case, the temperature of the output transistor may rise, and the semiconductor device may sometimes malfunction unintentionally. To suppress the occurrence of malfunction of the semiconductor device due to the temperature rise of the output transistor, semiconductor devices that supply a large current often include a heat-sensitive element that detects a certain temperature rise. Then, based on the detection signal of this heat-sensitive element, the occurrence of malfunction of the output transistor is suppressed by an overheat protection circuit that controls the operation of the output transistor.

[0003] As an example of a heat-sensitive element, a structure has been proposed in which an insulating film is formed on the output transistor, and a polycrystalline silicon diode is formed thereon (see, for example, Patent Document 1). This heat-sensitive element suppresses the occurrence of malfunction of the semiconductor device by detecting that the forward voltage when a certain current flows in the forward direction of the polycrystalline silicon diode changes depending on the temperature and controlling the operation of the output transistor.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] One aspect of the present invention aims to provide a semiconductor device that can suppress an increase in chip area and suppress the occurrence of malfunctions due to temperature rise of the output transistor. [Means for solving the problem]

[0006] The semiconductor device in one embodiment of the present invention is Semiconductor substrate and An output transistor formed on the aforementioned semiconductor substrate, A first insulating film formed on the output transistor, A metal layer formed on the first insulating film, The first insulating film and the second insulating film formed on the metal layer, A heat-sensitive element formed on the second insulating film, It has, The aforementioned heat-sensitive element is a thin-film transistor using an oxide semiconductor film. Furthermore, it comprises multiple thin-film transistors connected in parallel, and in a plan view, the area is larger than that of the output transistor. . [Effects of the Invention]

[0007] According to one aspect of the present invention, it is possible to provide a semiconductor device that can suppress an increase in chip area and suppress the occurrence of malfunctions due to temperature rise of the output transistor. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a schematic circuit diagram showing a semiconductor device in the first embodiment. [Figure 2] Figure 2 is a schematic cross-sectional view of the thin-film transistor and output transistor of the semiconductor device in the first embodiment. [Figure 3] Figure 3 is a schematic circuit diagram showing a semiconductor device in the second embodiment. [Figure 4] Figure 4 is a schematic cross-sectional view of the thin-film transistor and output transistor of the semiconductor device in the second embodiment. [Modes for carrying out the invention]

[0009] The semiconductor device in one embodiment of the present invention is based on the following findings. The thermal element described in Patent Document 1 uses a polycrystalline silicon diode. To prevent the heat generated during the formation of the polycrystalline silicon film from affecting the metal wiring film, which has a relatively low melting point, the polycrystalline silicon diode is often formed below the metal wiring film. In such cases, the polycrystalline silicon diode is sometimes positioned to avoid areas where the metal wiring film or contact holes connecting the output transistor to other semiconductor elements are planned to be formed. As a result, when the polycrystalline silicon diode is formed in a separate region away from the output transistor in a plan view, the temperature detection accuracy of the output transistor decreases.

[0010] Therefore, in one embodiment of the present invention, the semiconductor device is a thin-film transistor using an oxide semiconductor film that can form the heat-sensitive element at a low temperature of 400°C or less, so that the heat generated during the formation of the heat-sensitive element does not affect the metal wiring film, and the heat-sensitive element is formed on a layer above the metal wiring film. As a result, the semiconductor device can be positioned in a location that overlaps with the output transistor in a plan view, and by reducing the distance to the output transistor, the temperature detection accuracy can be improved and the occurrence of malfunctions can be suppressed.

[0011] The following describes in detail each embodiment for carrying out the present invention with reference to the drawings. In drawings, identical components are denoted by the same reference numeral, and redundant explanations may be omitted. Furthermore, the X, Y, and Z axes shown in the drawings are assumed to be orthogonal to each other. The X-axis direction may be referred to as the "width direction," the Y-axis direction as the "depth direction," and the Z-axis direction as the "height direction" or "thickness direction." The surface of each film on the +Z direction side may be referred to as the "front surface" or "top surface," and the surface on the -Z direction side as the "back surface" or "bottom surface." Furthermore, the drawings are schematic and do not show the ratios of width, depth, and thickness as indicated. The number, position, shape, structure, size, etc. of the plurality of films or layers, or the semiconductor elements obtained by structurally combining them are not limited to the embodiments shown below, and can be the preferred number, position, shape, structure, size, etc. for implementing the present invention.

[0012] (First Embodiment) FIG. 1 is a schematic circuit diagram showing a semiconductor device according to the first embodiment. The semiconductor device 10 in the first embodiment is a device that partially generates heat in order to supply a large current. This semiconductor device 10 includes an overheat protection circuit 30 and a P-type MOS transistor 140 which is an output transistor. The overheat protection circuit 30 includes a current source 150, a thin film transistor 110a, a reference voltage source 120, and a comparator 130. When the overheat protection circuit 30 detects an increase in the temperature of the P-type MOS transistor 140, it has a function of turning off the P-type MOS transistor 140 and blocking the output current.

[0013] A power supply voltage is applied between the VDD terminal and the VSS terminal of the semiconductor device 10. The current source 150 supplies current to the drain D of the thin film transistor 110a. The gate G1 of the thin film transistor 110a is connected to the drain D. The comparator 130 compares the voltage VD at the drain D of the thin film transistor 110a with the reference voltage Vref, and inputs a detection signal according to the comparison result to the gate G2 of the P-type MOS transistor 140.

[0014] Normally, the voltage VD of the drain D of the thin film transistor 110a is higher than the reference voltage Vref. However, when the P-type MOS transistor 140 generates heat and the thin film transistor 110a reaches a predetermined temperature, the voltage VD of the drain D becomes lower than the reference voltage Vref. As a result, the output of the comparator 130 is inverted and outputs a high level. Since the output of the comparator 130 is connected to the gate G2 of the P-type MOS transistor 140, the P-type MOS transistor 140 is turned off to cut off the output current.

[0015] FIG. 2 is a schematic cross-sectional view of a thin film transistor and an output transistor included in the semiconductor device according to the first embodiment. The semiconductor device 10 includes a P-type semiconductor substrate 101, an N-type well region 102, a P-type MOS transistor 140, N-type MOS transistors 121 and 151, an insulating film 103, metal wiring films 146 and 147, an insulating film 104, and a thin film transistor 110a.

[0016] The P-type semiconductor substrate 101 as the semiconductor substrate is a wafer-shaped P-type silicon semiconductor substrate. The N-type well region 102 is formed by implanting N-type impurities in a predetermined range on the surface of the P-type semiconductor substrate 101.

[0017] The P-type MOS transistor 140 as the output transistor is formed on the surface of the N-type well region 102 and in its vicinity. This P-type MOS transistor 140 generates heat to supply a large current. The P-type MOS transistor 140 is formed by a P+ source region 141a, a P+ drain region 142a, a gate insulating film 143a, and a gate electrode 144a. The P+ source region 141a and the P+ drain region 142a are formed so as to sandwich the gate electrode 144a in a plan view.

[0018] The N-type MOS transistors 121 and 151 are formed on the surface of the P-type semiconductor substrate 101. The N-type MOS transistor 121 is part of the reference voltage source 120 of the overheat protection circuit 30. The N-type MOS transistor 151 is part of the current source 150 of the overheat protection circuit 30.

[0019] The insulating film 103, which serves as the first insulating film, is formed on the upper layer of the P-type MOS transistor 140. The insulating film 103 is formed to cover the entire upper surface of the P-type semiconductor substrate 101, including the N-type well region 102, the P+ source region 141a, and the P+ drain region 142a.

[0020] The metal wiring films 146 and 147 are formed of an aluminum alloy on the insulating film 103. One end of each metal wiring film 146 and 147 is connected to the P+ source region 141a and the P+ drain region 142a, respectively, via a contact hole 145. The other ends of the metal wiring films 146 and 147 are connected from the P+ source region 141a and the P+ drain region 142a to other semiconductor elements (not shown) within the semiconductor device 10.

[0021] The second insulating film, insulating film 104, is formed over the entire upper surface of insulating film 103 so as to cover the upper and side surfaces of the metal wiring films 146 and 147. This insulating film 104 is planarized by etch-back or CMP (Chemical Mechanical Polishing) methods.

[0022] The heat-sensitive element, thin-film transistor 110a, is formed on the second insulating film 104 and is located above the P-type MOS transistor 140. The thin-film transistor 110a comprises a gate electrode 111a, an insulating film 105 as a third insulating film, an oxide semiconductor film 112a, a drain electrode 113a, and a source electrode 114a, with a passivation film 16 provided on the oxide semiconductor 112a.

[0023] The thin-film transistor 110a can detect heat generation because when the P-type MOS transistor 140 generates heat and the temperature of the oxide semiconductor 112a rises, the current flowing between the source and drain changes. Here, by positioning the thin-film transistor 110a so as to overlap with at least a portion of the P+ source region 141a, P+ drain region 142a, and gate electrode 144a of the P-type MOS transistor 140 in a plan view, the temperature detection accuracy for detecting heat generation can be improved.

[0024] By using an oxide semiconductor 112a that can be formed at a low temperature of 400°C or less in this thin-film transistor 110a, the temperature of the heat treatment during manufacturing can be lowered, thereby reducing the effect of heat treatment on various circuits, including the aluminum alloy (melting point of about 660°C) metal wiring films 146 and 147 present in the underlying layer. As a result, at least a portion of the thin-film transistor 110a can be formed on top of the output transistor, the P-type MOS transistor 140, thereby reducing the chip area.

[0025] In the semiconductor device 10 of this embodiment, since the thin-film transistor 110a, which is a heat-sensitive element, is formed on the P-type MOS transistor 140, it is possible to suppress an increase in chip area and improve the temperature detection accuracy for detecting heat generated by the output transistor that supplies a large current.

[0026] In this embodiment, a thin-film transistor using an oxide semiconductor is used as the thermal element and is positioned on top of the metal wiring and the second insulating film 104. Therefore, it is possible to position the thermal element so that it overlaps with the metal wiring and contact holes that connect the output transistor to other semiconductor elements in a plan view, thereby suppressing an increase in chip area. Furthermore, by positioning it so that it overlaps with the output transistor in a plan view, the temperature detection accuracy for detecting heat generation from the output transistor can be improved.

[0027] (Second embodiment) Figure 3 is a schematic circuit diagram showing a semiconductor device in the second embodiment. The semiconductor device 20 in the second embodiment includes an overheat protection circuit 40 and a P-type MOS transistor 240 which is an output transistor.

[0028] The overheat protection circuit 40 includes thin-film transistors 210a, 210b, and 210c. The thin-film transistors 210a, 210b, and 210c are connected in parallel, and the voltage VD is determined by the sum of the currents flowing through each thin-film transistor. Otherwise, it is the same as in the first embodiment.

[0029] Figure 4 is a schematic cross-sectional view of the thin-film transistor and output transistor of the semiconductor device in the second embodiment. In the second embodiment, the semiconductor device 20 includes a P-type MOS transistor 240, which is an output transistor, having multiple source regions 241a, drain regions 242, and gate electrodes 243a, and also includes thin-film transistors 210a, 210b, and 210c, which are thermal elements.

[0030] The overall width S of the thin-film transistor is greater than the width of the P-type MOS transistor 240 and greater than the depth of the P-type MOS transistor 240. The overall area of ​​the thin-film transistor is greater than that of the P-type MOS transistor 240 and is arranged to cover the entire top surface of the P-type MOS transistor 240. Otherwise, it is the same as in the first embodiment.

[0031] The thermal element described in Patent Document 1 merely estimates the temperature based on heat diffusion from the lateral direction adjacent to the output transistor. On the other hand, the thermal element of the second embodiment can estimate the temperature by including not only the vertical heat diffusion from the top surface of the output transistor, but also the heat diffusion from all sides of the output transistor. Therefore, the thermal element of the second embodiment has the effect of being able to detect temperature fluctuations with high accuracy even when abnormal heat generation occurs at any location.

[0032] As described above, in one embodiment of the present invention, the semiconductor device is formed in the following order above the output transistor formed on the surface of the semiconductor substrate: a first insulating film, a metal wiring film, a second insulating film, and a thermal element. This thermal element is a thin-film transistor using an oxide semiconductor film. As a result, the thermal element can be placed above the output transistor, thereby suppressing an increase in chip area and preventing malfunctions caused by temperature rise in the output transistor that supplies a large current.

[0033] In each embodiment, the metal wiring film is formed in a single layer, but it is not limited to this and may be formed in multiple layers. Furthermore, while each embodiment uses an output transistor to supply a large current as a heat source, it is not limited to this; any transistor that generates heat during operation will suffice. [Explanation of Symbols]

[0034] 10, 20 Semiconductor equipment 30, 40 Overheat protection circuit 101 P-type semiconductor substrate 102 N-type well region 103 Insulating film (first insulating film) 104 Insulating film (second insulating film) 105 Insulating film (third insulating film) 106 Passivation membrane 110a, 210a, 210b, 210c Thin-film transistors (thermal elements) 111a, 211a, 211b, 211c Thin-film transistor gate electrode 112a, 212a, 212b, 212c Oxide semiconductor film Drain electrodes of 113a and 213a thin-film transistors Source electrodes for 114a, 214a, and 214c thin-film transistors 120 Reference voltage source 130 Comparator 140, 240 P-type MOS transistors (output transistors) Source region of 141a and 241a P-type MOS transistors Drain region of 142a and 242a P-type MOS transistors Gate insulating film of 143a and 243a P-type MOS transistors 144a, 244a P-type MOS transistor gate electrode 145 Contact Holes 146, 147 Metal wiring film 150 current source Vref Reference Voltage

Claims

[Claim 1] Semiconductor substrate and An output transistor formed on the surface of the semiconductor substrate, A first insulating film formed above the output transistor, A metal wiring film formed on the first insulating film, The first insulating film and the second insulating film formed on the metal wiring film, A heat-sensitive element formed on the second insulating film, It has, The semiconductor device is characterized in that the thermal sensing element is a thin-film transistor using an oxide semiconductor film, and comprises a plurality of such thin-film transistors connected in parallel, and in a plan view, its area is larger than that of the output transistor.

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