A three-dimensional electrical integration structure utilizing connections to a two-dimensional contact array at the edge of a component carrier.

Abstract

A three-dimensional (3D) electrically integrated structure is formed by connecting the edge contact arrays of multiple component carriers, each aligned on its edge, to a two-dimensional (2D) substrate contact array (e.g., a ball grid array) on a single substrate. Components on the component carriers are integrated in 3D, achieving a much higher integration density than if they were integrated in 2D.

Description

Technical Field

[0001] The present invention relates to a 3D (three-dimensional) integrated structure of electrical components.

Background Art

[0002] A component carrier with components attached can be attached to a substrate using a ball grid array (BGA). Conventionally, this attachment has been performed in a 2D manner of bringing a 2D (two-dimensional) planar array (planar 2D contact array) consisting of contacts on the component carrier into contact with a 2D contact array on a substrate provided similarly via the ball grid array. However, in this method, damage is likely to occur, and it is not possible to easily reprocess the component carrier itself or other components. By overmolding a protective structure on the component carrier, the damage resistance can be improved. However, this is costly for assembly, lengthens the cycle time for new designs, and is not very suitable for small-scale production. Therefore, improving the integrated structure for attaching electrical components to a 2D contact array on a substrate is an advancement in the art.

Summary of the Invention

Means for Solving the Problems

[0003] The gist of the present invention is a configuration in which a plurality of component carriers are connected to one substrate by bringing connection portions, that is, edge contacts, at respective edges of the component carriers into contact with a 2D contact array (such as a ball grid array) on the substrate. The integrated structure of the components on the component carrier becomes 3D, and a much higher integration density can be achieved than in the 2D method.

[0004] The present invention offers several important advantages. First, it allows for increased component density without reducing component size. For example, 12 FETs can now be placed in an area where 8 FETs were previously located. Compared to using a single horizontal component carrier, the present invention provides a larger, more robust, and higher-performance integrated structure. It also allows the use of standard printed circuit board manufacturing and assembly processes. Furthermore, it improves configuration flexibility. For example, if the integrated components are switches, it becomes possible to use different numbers of switches, build modules, or change the switch configuration.

[0005] Important features of the present invention include, but are not limited to, the following: (1) Active circuits can be used that are formed on multiple vertical component carriers having edge contacts consisting of a ball grid array, which can be connected (coupled) to a single common substrate. (2) The number of component carriers used can be changed, and modules with different numbers of components can be created. (3) It becomes easier to change the component configuration (for example, by using a new component carrier design), (4) Within the module, various component configurations can be used to suit the design requirements. (5) Solder balls provided in recesses of the main board on which the component carrier is mounted can be used to connect the edges of the component carrier. (6) Stepped pins can be used within the module to achieve precise spacing between component carriers. (7) Within the module, a stack of active component carriers and spacer frames can be used to achieve precise spacing between active component carriers. These are some examples. [Brief explanation of the drawing]

[0006] [Figure 1] Figure 1 shows an example of a parts carrier. [Figure 2A]Figure 2A is a side view of an exemplary embodiment of the present invention. [Figure 2B] Figure 2B shows the component-side contact array in the embodiment shown in Figure 2A. [Figure 2C] Figure 2C shows the substrate contact array in the embodiment shown in Figure 2A. [Figure 3A] Figure 3A shows the use of press-fit pins to determine the spacing between component carrier stacks. [Figure 3B] Figure 3B shows the use of press-fit pins to determine the spacing between the component carrier stacks. [Figure 3C] Figure 3C shows the use of press-fit pins to determine the spacing between the component carrier stacks. [Figure 3D] Figure 3D shows the use of press-fit pins to determine the spacing between the component carrier stacks. [Figure 3E] Figure 3E shows the use of press-fit pins to determine the spacing between the component carrier stacks. [Figure 3F] Figure 3F shows the use of press-fit pins to determine the spacing between the component carrier stacks. [Figure 3G] Figure 3G shows press-fit pins that provide electrical connections between component carriers. [Figure 4A] Figure 4A shows the use of spacer frames to determine the spacing between stacks of component carriers. [Figure 4B] Figure 4B shows the use of spacer frames to determine the spacing between stacks of component carriers. [Figure 4C] Figure 4C shows the use of spacer frames to determine the spacing between stacks of component carriers. [Figure 4D] Figure 4D shows a spacer frame that provides electrical connections between component carriers. [Figure 5A] Figure 5A shows a spacer frame with a vent (exhaust passage). [Figure 5B] Figure 5B shows a spacer frame with a vent. [Modes for carrying out the invention]

[0007] Figure 1 is a front view of an exemplary component carrier 110. In the figure, reference numerals 102, 104, 106, and 108 are components (e.g., integrated circuits), and 110a is a one-dimensional array of edge contacts coupled to and connected to such components (hereinafter also referred to as the "1D edge contact array"). The present invention is configured in a way that is not affected by the method of connection between components 102, 104, 106, and 108 and the edge contacts 110a, so the configuration of those connections is not shown in the figure. Edge contacts are electrical contacts located on the edge of the component carrier, rather than on the top or bottom surface. The component carrier may be a printed circuit board, a chip carrier, etc. Preferably, the 1D edge contact array of the edge contacts 110a is an array of solder balls.

[0008] Figure 2A is a side view of an exemplary embodiment of the present invention. This embodiment is a device comprising two or more component carriers (e.g., 110, 112, 114, and 116), each component carrier of the device having one or more electrical components disposed thereon (e.g., components 102, 104, 106, and 108 on component carrier 110 shown in Figure 1), and each component carrier also comprising a 1D edge contact array connected to the electrical components (e.g., an array of edge contacts 110a on component carrier 110 shown in Figure 1).

[0009] The apparatus also includes a substrate 210, on which a two-dimensional planar array of contacts 230 (hereinafter also referred to as a "2D substrate contact array") is provided.

[0010] The two or more component carriers are stacked and arranged to form a component carrier stack 240, and their respective 1D edge contact arrays are combined to form a planar 2D component-side contact array consisting of contacts 220.

[0011] FIG. 2B shows a bottom view of a planar 2D component-side contact array consisting of contacts 220. In each of the component carriers 110, 112, 114, and 116, it is shown that groups of their respective edge contacts 110a, 112a, 114a, and 116a form a one-dimensional array. By combining these 1D edge contact arrays, a planar 2D component-side contact array consisting of contacts 220 of a plurality of component carriers is formed.

[0012] FIG. 2C shows a top view of a planar 2D substrate contact array consisting of contacts 230 on substrate 210.

[0013] The planar 2D component-side contact array consisting of contacts 220 has a component-side contact pattern, and this pattern coincides with the substrate contact pattern of the planar 2D substrate contact array consisting of contacts 230.

[0014] The planar 2D component-side contact array consisting of contacts 220 is coupled and connected to the planar 2D substrate contact array consisting of contacts 230, and an electrical connection is formed between each pair of corresponding contacts. FIG. 2A shows these connection states in a side view. To form these connections, conventional electrical connection techniques can be used.

[0015] Each of the component carriers can have a different circuit. As one application example, the configuration of an exchange module of a FET (field effect transistor) is mentioned. In this case, according to the present invention, 12 FETs can be arranged in an area where 8 FETs were provided by conventional integration techniques.

[0016] Figures 3A to 3F illustrate the use of press-fit pins to define the spacing of a stack of component carriers. In this example, the component carrier stack 240 includes component carriers 302, 304, 306, and 308, and their spacing is defined by two or more press-fit pins 310. For clarity, only one press-fit pin is shown in the side view of Figure 3A. Preferably, the press-fit pin 310 has a shape in which the diameter decreases gradually along the length of the press-fit pin, as shown in Figure 3B.

[0017] Figures 3C, 3D, 3E, and 3F show holes 312, 314, 316, and 318, respectively, which are sized such that the press-fit pins 310 determine the spacing between the component carriers 302, 304, 306, and 308, as shown in Figure 3A. Components 302a, 302b, 302c, and 302d are placed on component carrier 302. Components 304a, 304b, 304c, and 304d are placed on component carrier 304. Components 306a, 306b, 306c, and 306d are placed on component carrier 306. Components 308a, 308b, 308c, and 308d are placed on component carrier 308. The 1D edge contact arrays 302e, 304e, 306e, and 308e are provided on the component carriers 302, 304, 306, and 308, respectively.

[0018] Figure 3G shows press-fit pins that provide electrical connections between component carriers. In this example, press-fit pin 310 provides an electrical connection 324 between component 302a on component carrier 302 and component 304a on component carrier 304. Thus, press-fit pins can provide one or more electrical connections between stacked component carriers within a component carrier stack. Multiple press-fit pins can be used for each connection from one component carrier to multiple other component carriers. Furthermore, conformal coatings or edge sealants can be used to further protect the components.

[0019] Figures 4A to 4C illustrate the use of spacer frames to define the spacing between component carrier stacks. Figure 4A is a front view of component carrier 402a, Figure 4B is a front view of spacer frame 404, and Figure 4C is a side view of component carrier stack 240. Components 406, 422, 424, and 426 are placed on component carrier 402a. A 1D edge contact array 430 is also provided on component carrier 402a. In this example, component carrier stack 240 is a stack in which component carriers (402a, 402b, 402c, and 402d) and spacer frames 404 are arranged alternately. Each component is mounted in a cavity between adjacent component carriers. Ventilation holes may be required in the cavities to avoid excessive pressure rise when components are soldered in place (see the description of Figures 5A to 5B below). Furthermore, the thickness of the spacer frame and component carrier can be used to determine the pitch of the planar 2D component-side contact array of the contact 220 in one direction (i.e., the vertical direction in Figure 2B). If the outermost spacer frame is provided (for example, on the right side of Figure 4C), it can be used as a frame for applying protective potting to components that would normally be exposed.

[0020] Figure 4D shows a spacer frame that provides electrical connections between component carriers. In this example, one of the spacer frames 404 provides an electrical connection 410 between component 406 on component carrier 402a and component 408 on component carrier 402b. Thus, a spacer frame can provide one or more electrical connections between component carriers stacked in a component carrier stack.

[0021] Figures 5A and 5B show a spacer frame with vents (ventilation holes). Spacer frame 404 includes vents 502, 504, and 506. By providing such vents, it is possible to prevent excessive air pressure within the parts carrier stack.

[0022] A third method for determining the spacing between component carriers is to bring the components into contact with each other. In other words, the component carriers are stacked and arranged at intervals directly determined by the height of the components on the carriers. The aforementioned methods using spacer frames and press-fit pins have the advantage of providing component carrier spacing that is independent of the size of the components on the carriers.

Claims

1. A method for manufacturing an apparatus, A step of creating two or more component carriers, wherein one or more electrical components are placed on each component carrier, each component carrier is connected to the one or more electrical components and has a 1D edge contact array consisting of edge contacts arranged one-dimensionally at its edge, the 1D edge contact array is composed of solder balls as the edge contacts, and the step of creating two or more component carriers, A step of preparing a substrate, wherein the substrate has a planar 2D substrate contact array consisting of substrate contacts arranged two-dimensionally in a planar shape, The step of forming a component carrier stack by stacking the two or more component carriers using two or more press-fit pins configured to determine the spacing between the two or more component carriers, wherein the 1D edge contact arrays of the component carrier stack form a planar 2D component-side contact array arranged to form a two-dimensional plane. The planar 2D substrate contact array has a substrate contact pattern, and the planar 2D component-side contact array has a component carrier contact pattern that matches the substrate contact pattern. A method for manufacturing an apparatus, wherein the planar 2D component-side contact array is bonded to the planar 2D substrate contact array, and electrical connections are provided between each pair of corresponding contacts of both arrays.

2. A method for manufacturing the apparatus described in claim 1, A method for manufacturing an apparatus, wherein each of the press-fit pins has a shape in which the diameter decreases in stages along the length direction of the press-fit pin.

3. A method for manufacturing the apparatus described in claim 1, A method for manufacturing an apparatus, wherein the press-fit pin provides one or more electrical connections between two or more component carriers stacked in the component carrier stack.

4. A method for manufacturing the apparatus described in claim 1, The step of forming the component carrier stack is: The steps include preparing one or more spacer frames, A method for manufacturing an apparatus, comprising the step of alternately stacking and arranging two or more component carriers and the spacer frame.

5. A method for manufacturing the apparatus described in claim 4, A method for manufacturing an apparatus, wherein the spacer frame provides one or more electrical connections between two or more component carriers stacked in the component carrier stack.

6. A method for manufacturing the apparatus described in claim 4, A method for manufacturing an apparatus, wherein at least one of the spacer frames includes one or more vents configured to prevent excessive air pressure from being generated within the component carrier stack.

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