Void-free contact trench filling in gate-all-around FET architectures
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- APPLIED MATERIALS INC
- Filing Date
- 2022-04-25
- Publication Date
- 2026-06-23
Smart Images

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Figure 0007879164000003
Abstract
Claims
1. A method for forming a contact trench structure in a semiconductor device, Performing a first selective deposition process to form a contact on the sidewall of a trench, wherein each of the sidewalls of the trench includes a first cross-section of a first material and a second cross-section of a second material, and the first selective deposition process is Epitaxial growth of a third material on the side wall of the trench, and Performing a first selective deposition process, which includes etching a portion of the third material formed on the first cross-section of the first material to selectively form the contact on the second cross-section of the second material in the trench, A second selective deposition process is performed to form a metal silicide layer on the contact, wherein the second selective deposition process is: Growing a metal silicide material in the trench, on the contact and the first cross-section of the first material, and Performing a second selective deposition process, which includes etching a portion of the metal silicide material formed on the first cross-section of the first material in order to selectively form the metal silicide layer on the contact, Performing a first metal filling process for forming a contact plug in the trench, the first metal filling process comprising depositing a contact plug metal material in the trench, Performing an etching process to form an opening in the trench, which includes partially etching the contact plug metal material in the trench; A method comprising performing a second metal filling process, the second metal filling process comprising depositing the contact plug metal material into the opening.
2. The first material comprises silicon dioxide or silicon nitride. The method according to claim 1, wherein the second material includes a silicon-containing material.
3. The method according to claim 1, wherein the third material includes a material selected from the group consisting of silicon (Si), silicon carbide (SiC), and silicon germanium (SiGe).
4. The method according to claim 1, wherein the contact plug metal material comprises a material selected from the group consisting of tungsten (W), cobalt (Co), ruthenium (Ru), and molybdenum (Mo).
5. The method according to claim 1, wherein the metal silicide material includes a material selected from the group consisting of titanium silicide (Ti), cobalt silicide (Co), nickel silicide (Ni), molybdenum silicide (Mo), or tantalum silicide (Ta).
6. The conformal deposition process is performed prior to the first metal filling process, wherein the conformal deposition process is: The method according to claim 1, further comprising performing a conformal deposition process, which includes depositing a barrier metal material on the exposed surface of the trench.
7. The method according to claim 6, wherein the barrier metal material includes a material selected from the group consisting of titanium nitride (TiN) and tantalum nitride (TaN).
8. A method for forming a void-free trench contact plug in a semiconductor device, Performing a first metal filling process for forming a contact plug in a trench, the first metal filling process comprising depositing a contact plug metal material in the trench, wherein the sidewall of the trench includes a first cross-section of the first material and a second cross-section of the second material on which epitaxially grown contacts are formed, Performing an etching process to form an opening in the trench, which includes partially etching the contact plug metal material in the trench; A method comprising performing a second metal filling process, the second metal filling process comprising depositing the contact plug metal material into the opening.
9. The first material comprises silicon dioxide or silicon nitride. The method according to claim 8, wherein the second material includes a silicon-containing material.
10. The method according to claim 8, wherein the epitaxially grown contact comprises a material selected from the group consisting of silicon (Si), silicon carbide (SiC), and silicon germanium (SiGe).
11. The method according to claim 8, wherein the contact plug metal material includes a material selected from the group consisting of tungsten (W), cobalt (Co), ruthenium (Ru), and molybdenum (Mo).
12. The method according to claim 8, further comprising conformally depositing a barrier metal layer on the exposed surface of the trench.
13. The method according to claim 12, wherein the barrier metal layer comprises a material selected from the group consisting of titanium nitride (TiN) and tantalum nitride (TaN).
14. A stack of a first semiconductor layer and a second semiconductor layer, wherein a trench is formed through the stack, A spacer is formed at each end of the first semiconductor layer facing the trench, In each of the first cross-sections of the second semiconductor layer within the trench, epitaxially grown contacts, A metal silicide layer grown on the aforementioned contact, The barrier metal layer on the metal silicide layer in the trench, A semiconductor structure comprising a void-free metal contact plug in the trench.
15. The first semiconductor layer contains silicon germanium, The semiconductor structure according to claim 14, wherein the second semiconductor layer includes silicon.
16. The semiconductor structure according to claim 14, wherein the spacer comprises silicon dioxide or silicon nitride.
17. The semiconductor structure according to claim 14, wherein the contact comprises a material selected from the group consisting of silicon (Si), silicon carbide (SiC), and silicon germanium (SiGe).
18. The semiconductor structure according to claim 14, wherein the void-free metal contact plug comprises a material selected from the group consisting of tungsten (W), cobalt (Co), ruthenium (Ru), and molybdenum (Mo).
19. The semiconductor structure according to claim 14, wherein the metal silicide layer comprises a material selected from the group consisting of titanium silicide (Ti), cobalt silicide (Co), nickel silicide (Ni), molybdenum silicide (Mo), or tantalum silicide (Ta).
20. The semiconductor structure according to claim 14, wherein the barrier metal layer comprises a material selected from the group consisting of titanium nitride (TiN) and tantalum nitride (TaN).