Silicon compound film by selective deposition

Abstract

To provide a method for forming a silicon compound film by selectively depositing a film on the surface of silicon and processing the film, and a substrate including a fin FET structure having a surface of silicon.SOLUTION: There is provided a method for providing a substrate having a first material 20 and a second material 30, the first material including a semiconductor and a semiconductor surface 25, and the second material including a dielectric and a dielectric surface 35. The first material is essentially formed of silicon. The second material 30 is formed of SiO2. The substrate is a silicon-on-insulator substrate. The substrate having a first surface and a second surface is exposed to a blocking compound to react with the second surface. After that, a blocking layer 40 is formed in the second surface. A metal layer 50 containing Ti in the first surface is deposited by deposition of an atomic layer. The substrate is heated and is altered so that a first surface 60 including the silicon compound is formed.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a method for forming a silicon compound film. More specifically, embodiments of the present disclosure are directed to a method of selectively depositing a film on a silicon surface and further processing to form a silicon compound film.

Background Art

[0002] A fin field-effect transistor, also known as a FinFET, is a type of non-planar or three-dimensional transistor used in the design of modern processors. Similar to previous planar designs, it is typically built on a SOI (silicon-on-insulator) substrate. However, in the FinFET design, a conductive channel above the level of the insulator is also used to create a thin silicon-based structure in the shape of a fin called a gate electrode. This fin-type electrode allows multiple gates to operate on a single transistor. FinFET devices also have switching times and current densities that are significantly faster than mainstream CMOS technology.

[0003] There is a continuing need for new FinFET designs. Specifically, new materials and surface compositions that enable an extended set of design options are needed. Selective deposition has been shown to be promising because it allows for the deposition of a film on a selected surface and has the potential to simplify the integration scheme.

[0004] Selective deposition of materials can be achieved in various ways. For example, some processes, based on surface chemistry, can have surface-specific selectivity. These processes are fairly rare and usually require surfaces with significantly different surface energies, such as metals and dielectrics. In FinFETs and other examples with similar surfaces (e.g., SiO2 and SiN), it is necessary to selectively block the surface by employing surface treatments that selectively react on one surface and not on the other, effectively blocking surface reactions during the subsequent deposition process. Furthermore, some deposition precursors cannot be effectively blocked with current techniques.

[0005] Therefore, there is a continuous need in this field for methods and materials that selectively deposit films on other surfaces while suppressing deposition on specific surfaces. [Overview of the project]

[0006] One or more embodiments of this disclosure relate to a method for processing a substrate, comprising providing a substrate having a first semiconductor surface and a second dielectric surface. The substrate is exposed to a blocking compound to selectively form a blocking layer on the second surface relative to the first surface. The substrate is exposed to a titanium precursor to selectively deposit a Ti-containing layer on the first surface relative to the second surface. The substrate is heated to form a modified first surface containing titanium and silicon.

[0007] Additional embodiments of the present disclosure relate to a method for processing a substrate, comprising providing a substrate having a first semiconductor surface and a second dielectric surface. The substrate is exposed to a blocking compound to selectively form a blocking layer on the second surface. The substrate is exposed to a titanium precursor to selectively deposit a Ti-containing layer on the first surface relative to the second surface. The substrate is exposed to a germanium precursor to selectively deposit a Ge-containing layer on the first surface relative to the second surface. The substrate is heated to form a modified first surface containing titanium, germanium, and silicon.

[0008] Further embodiments of the present disclosure relate to a method for processing a substrate, comprising providing a substrate having a first silicon surface and a second silicon oxide surface. The substrate is exposed to a blocking compound to selectively form a blocking layer on the second surface. The substrate is exposed to a titanium precursor to selectively deposit a Ti-containing layer on the first surface relative to the second surface. The substrate is exposed to a silicon precursor to selectively deposit a Si-containing layer on the first surface relative to the second surface. The substrate is heated to form a modified first surface essentially composed of TiSi2.

[0009] To gain a more detailed understanding of the above-mentioned features of this disclosure, a more detailed description of this disclosure, which is briefly summarized above, can be obtained by referring to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only typical embodiments of this disclosure and should not be considered to limit the scope of this disclosure, as this disclosure may also permit other equally valid embodiments. [Brief explanation of the drawing]

[0010] [Figure 1] This figure shows a selective deposition process according to one or more embodiments of the present disclosure. [Figure 2] This figure shows an exemplary process sequence for selective deposition of a titanium-containing layer on a semiconductor surface according to one or more embodiments of the present disclosure.

[0011] In the attached drawings, similar components and / or features may have the same reference numeral. Furthermore, various components of the same type may be distinguished by following the reference numerals, by dashes and second numerals that distinguish similar components from each other. Where only the first reference numeral is used in this specification, its description is applicable to any one of the similar components having the same first reference numeral, regardless of the second reference numeral. [Modes for carrying out the invention]

[0012] Before describing some exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the configuration or process step details described below. Other embodiments of this disclosure are possible and can be implemented or performed in a variety of ways.

[0013] Embodiments of this disclosure provide a method for processing a substrate in which a TiSi film is formed on the semiconductor surface but not on the dielectric surface. Processes in various embodiments involve forming a film on a portion of the substrate using selective deposition and then further processing it.

[0014] As used herein, “substrate surface” refers to any portion of a substrate, or a portion of the material surface formed on a substrate on which a film treatment is to be performed. For example, substrate surfaces on which treatment can be performed include, depending on the application, silicon, silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. Substrates include, but are not limited to, semiconductor wafers. Substrates may be subjected to pretreatment processes for polishing, etching, reduction, oxidation, hydroxylation, annealing, UV curing, electron beam curing, and / or baking of the substrate surface. In addition to direct film treatment on the surface of the substrate itself, the present invention may also perform any of the disclosed film treatment steps on an underlying layer formed on the substrate, as more specifically disclosed below, and the term “substrate surface” is intended to include such underlying layers, as the context indicates. Thus, for example, if a film / layer or partial film / layer is deposited on the substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. The substrate can have various dimensions, such as a wafer with a diameter of 200 mm or 300 mm, and rectangular or square panes. In some embodiments, the substrate includes a rigid discrete material.

[0015] As used herein, “atomic layer deposition” refers to the continuous exposure of a substrate to two or more deposition gases for depositing a layer of material onto the substrate surface. As used herein and in the appended claims, terms such as “reactive compound,” “reactive gas,” “reactive species,” “precursor,” “process gas,” and “deposit gas” are used interchangeably to mean a substance having a species that can react with the substrate surface or the material on the substrate surface in a chemical reaction (e.g., substitution, elimination, addition, oxidation, reduction). The substrate or a portion of the substrate is sequentially exposed to two or more reactive compounds introduced into the reaction zone of a processing chamber. In a time-domain process, exposure to each reactive compound is separated by a time delay, allowing each compound to react with the substrate surface and then be purged from the processing chamber. In a spatial process, different portions of the substrate surface or the material on the substrate surface are simultaneously exposed to two or more reactive compounds such that no given point on the substrate is substantially exposed to more than one reactive compound at the same time. As used herein and in the appended claims, the term “substantially” in this regard means, as understood by those skilled in the art, that a small portion of the substrate may be simultaneously exposed to multiple reactive gases by diffusion, but simultaneous exposure is not intended.

[0016] In one aspect of the time-domain process, a first reactive gas (i.e., a first precursor or compound A) is pulsed into the reaction zone, followed by a first time delay. Next, a second precursor or compound B is pulsed into the reaction zone, followed by a second delay. During each time delay, a purge gas, such as argon, is introduced into the processing chamber to purge the reaction zone or to remove any residual reactive compounds or reaction byproducts from the reaction zone by other means. Alternatively, the purge gas can be continuously flowed throughout the entire deposition process so that only the purge gas flows during the time delays between pulses of the reactive compound. Alternatively, the reactive compound is pulsed until a desired molecular layer or layer thickness is formed on the substrate surface. In either scenario, one cycle consists of the process of pulsing compound A, purge gas, compound B, and the purge gas. A cycle can be initiated with either compound A or compound B, and each sequence of cycles can be continued until a film of a predetermined thickness is achieved.

[0017] In the spatial process embodiment, a first reactive gas and a second reactive gas are simultaneously supplied to the reaction zone but separated by an inert gas curtain and / or a vacuum curtain. The substrate is moved relative to the gas supply device such that any given point on the substrate is exposed to the first and second reactive gases, though not simultaneously.

[0018] One or more embodiments of the present disclosure advantageously provide a method for processing a substrate, comprising selectively depositing a film on a semiconductor surface (e.g., silicon) without substantially depositing on a dielectric surface (e.g., silicon oxide). In some embodiments, selective deposition is advantageously achieved by combining a selective surface blocking step that utilizes a blocking compound that selectively reacts with the dielectric surface to form a blocked surface. Deposition proceeds on other substrate surfaces that remain unblocked.

[0019] A common surface mechanism in one or more embodiments of this disclosure may be designed to block a dielectric surface and then deposit these films on a semiconductor surface, while stopping or minimizing film deposition on the dielectric surface. Although not bound by a specific operating theory, when used with the precursors described herein, the blocking compounds described herein are thought to prevent reactions between the precursors and the dielectric surface.

[0020] In some embodiments, dielectric surface groups can react with blocking molecules that are reactive with -OH terminations rather than -H terminations. These molecules can be introduced to the substrate via vapor phase delivery, either in solution or in their raw form. After selective surface blocking, a film can be selectively grown on the semiconductor surface using ALD or CVD processes.

[0021] Referring to Figures 1 and 2, one or more embodiments of this disclosure relate to a method 200 for processing a substrate. The method comprises providing a substrate comprising a first material 20 and a second material 30. As used in this embodiment, the term “providing a substrate” means that the substrate is placed in a location for processing (e.g., in a processing chamber). In some embodiments, the first material 20 comprises a semiconductor, and the first material 20 has a semiconductor surface 25. In some embodiments, the second material 30 comprises a dielectric, and the second material 30 has a dielectric surface 35. In this regard, the semiconductor surface 25 may be referred to as the first semiconductor surface. Similarly, the dielectric surface 35 may be referred to as the second dielectric surface. This disclosure should not be understood to require multiple dielectric surfaces.

[0022] The first material 20 may be any suitable semiconductor material. In some embodiments, the first material 20 is essentially silicon. As used herein and in the appended claims, a material "essentially made from" the described composition means that about 95% or more, 98% or more, or 99% or more of the material is the described composition.

[0023] The second material 30 can be any suitable dielectric material. In some embodiments, the second material 30 includes silicon oxide. In some embodiments, the second material 30 consists essentially of SiO2. When used in this context, silicon oxide is any suitable material that includes silicon and oxygen. In some embodiments, the second surface 35 consists essentially of silicon and oxygen. In some embodiments, the material of the second surface 35 is stoichiometric silicon oxide. In some embodiments, the ratio of silicon to oxygen in the second surface 35 is about 1:2. In some embodiments, the ratio of silicon to oxygen atoms is a non-stoichiometric ratio. In some embodiments, the ratio of silicon to oxygen in the second surface 35 is less than 1:2. In some embodiments, the ratio of silicon to oxygen in the second surface 35 is greater than 1:2.

[0024] FIG. 1 shows a schematic cross-sectional view of a substrate 10 having a three-dimensional (3D) structure formed on a substrate, according to one or more embodiments described herein. In some embodiments, the substrate 10 includes a 3D structure extending from a base layer. In some embodiments, the base layer can be a dielectric material such as an oxide, nitride, etc. For example, the substrate 10 can be a silicon-on-insulator substrate. The embodiments described herein are generally performed with reference to a 300 mm circular substrate, however, it is contemplated that various other substrate dimensions can benefit from the embodiments described herein.

[0025] The 3D structure of the substrate can be formed on the substrate layer by various patterning and etching processes. In some embodiments, the 3D structure can be formed in dimensions suitable for implementation as fin-type field effect transistors (FinFETs) of complementary metal oxide semiconductor (CMOS) transistors. However, other transistor types, substrate features, and featureless substrate surfaces can also benefit from the embodiments described herein. In some embodiments, the 3D structure may be suitable for use at current technology nodes and advanced technology nodes, such as nodes less than 10 nm, and may have corresponding dimensions.

[0026] The 3D structure may be of the same material as the substrate layer or a different material from the substrate layer (see FIG. 1). In some embodiments, the 3D structure can be formed from silicon. In some embodiments, the 3D structure extends from the substrate layer and is separated by trenches.

[0027] At 202, a substrate 10 having a first surface 25 and a second surface 35 is exposed to a blocking compound. The blocking compound can be any suitable compound that can react with the second surface 35 but cannot react with the first surface 25. The blocking compound reacts with the second surface 35 to form a blocking layer 40 on the second surface 35.

[0028] In some embodiments, the blocking compound includes a compound of the general formula R3Si-X, where each R is independently a C1-C4 alkyl and X is a leaving group. As used in this context, C1-C4 alkyl means a saturated carbon chain having 1 to 4 carbon atoms. In some embodiments, these carbon chains are linear. In some embodiments, these carbon chains are branched. In some embodiments, each R is methyl. In some embodiments, X is selected from a halide, azide, amino, hydrazide, cyanide, or isocyanate group.

[0029] In some embodiments, X comprises a primary, secondary, or tertiary amine having a linear C1-6 alkyl or branched C1-4 alkyl group. In some embodiments, X is a cyclic amine with up to 6 membered rings. In some embodiments, X comprises a cyclic pyrrolyl group (-N(CH2)4). In some embodiments, X comprises a cyclic pyrrolidine group (-N(CH)4). In some embodiments, the blocking compound comprises trimethylsilylpyrrolidine (CH3)3SiN(CH2)4. In some embodiments, the blocking compound consists essentially of trimethylsilylpyrrolidine. Trimethylsilylpyrrolidine is a compound of the following formula I: TIFF0007879899000001.tif20170

[0030] When used in this embodiment, the term "essentially consisting of" means that the reactive components of the blocking compound (excluding inerts, diluents, or carrier species) constitute, on a molar basis, approximately 95%, 98%, or 99% or more of the species described above.

[0031] The blocking layer can be formed at any suitable temperature. In some embodiments, the substrate is maintained at a temperature in the range of about 200°C to about 500°C, about 250°C to about 450°C, about 250°C to about 400°C, or about 300°C to about 450°C. In some embodiments, the substrate is maintained at a temperature of about 450°C or less, about 400°C or less, about 375°C or less, about 350°C or less, about 300°C or less, or about 250°C or less. In some embodiments, the substrate is maintained at a temperature of about 200°C or more, about 225°C or more, about 250°C or more, about 300°C or more, or about 350°C or more.

[0032] In 204, after the formation of the blocking layer 40, selective deposition of the metal layer 50 onto the first surface 25 can be performed. The metal layer 50 can be deposited by any suitable deposition technique known to those skilled in the art. Suitable techniques include, but are not limited to, chemical vapor deposition, atomic layer deposition, or physical vapor deposition. In some embodiments, the metal layer 50 contains titanium, and the metal layer 50 is deposited by atomic layer deposition.

[0033] The following description discloses a general process for depositing a metal layer on a substrate 10. In some embodiments, the metal is titanium, and the metal layer is a titanium-containing layer 50. In some embodiments, the metal layer further comprises an additional metal alloyed with titanium.

[0034] In some embodiments, germanium is alloyed with titanium. In some embodiments, germanium is deposited separately from titanium to form a bilayer film.

[0035] A substrate 10 comprising a first surface 25 and a blocking layer 40 is exposed to a metal precursor. In some embodiments, the metal precursor is chemically adsorbed onto the first surface 25 to deposit a layer of metal species on the first surface 25. In these embodiments, the layer of metal species on the first surface 25 reacts with a reagent to form a metal film. In some embodiments, the metal precursor and the reagent are exposed to the substrate 10 simultaneously and react to form a metal film on the first surface 25. In some embodiments, the metal precursor and the reagent are exposed to the substrate 10 separately. In some embodiments, the metal precursor and the reagent are exposed to the substrate 10 simultaneously. In some embodiments, the metal film 50 is deposited via a time-domain ALD process. In some embodiments, the metal film 50 is deposited via a spatial ALD process.

[0036] A metal film is a general term used to describe a metal-containing material. In some embodiments, the metal film is a pure metal film. When used in this context, "pure metal film" means that metal atoms, on an atom-by-atom basis excluding hydrogen, make up about 98%, 99%, or 99.5% or more of the metal film. In some embodiments, the metal film contains other atoms. In some embodiments, the metal film contains one or more of oxygen, nitrogen, carbon, silicon, boron, or germanium.

[0037] The metal precursor can be any suitable compound that can react with the reagent to form a metal film 50. In some embodiments, the metal precursor comprises at least one amine ligand. In some embodiments, the metal precursor is of formula M(NR'2) a The compound comprises the following, where each R' is independently H, C1-C4 alkyl, or trimethylsilyl, and a is 1 or more. When used in this context, C1-C4 alkyl means a saturated carbon chain having 1 to 4 carbon atoms. In some embodiments, these carbon chains are linear. In some embodiments, these carbon chains are branched.

[0038] In some embodiments, R' essentially consists of an ethyl group. In some embodiments, R' essentially consists of a methyl group. In some embodiments, the R' groups within a single ligand are identical (e.g., N(CH3)2). In some embodiments, the R' groups within a single ligand are different (e.g., N(CH3)(C2H5)). In some embodiments, the metal precursor essentially consists of tetrakis(ethylmethylamide)titanium. As used in this embodiment, the term “essentially consists of” means that the reactive components of the metal precursor (excluding inerts, diluents, or carrier species) constitute, on a molar basis, about 95% or more, 98% or more, or 99% or more of the species described above.

[0039] In some embodiments, the metal precursor includes at least one halogen ligand. In some embodiments, the metal precursor does not contain a metal halide. In some embodiments, the film contains titanium, and the metal precursor does not contain TiCl4.

[0040] In some embodiments, the metal precursor comprises at least one oxo ligand. In some embodiments, the oxo ligand is of the general formula -OR * It is of the form, and in the formula, R * is a C1-C8 alkyl group. In some embodiments, at least one oxo ligand is selected from the group consisting of methoxy, ethoxy, propoxy, isopropoxy, butoxy, t-butoxy, and ethylhexyloxy.

[0041] The metal of the metal precursor can be any suitable metal. In some embodiments, the metal of the metal precursor is selected from Ti, Zr, Hf, or Ta. In some embodiments, the metal precursor consists of a compound that essentially contains Ti. In this regard, the metal precursor is sometimes called a titanium precursor. In some embodiments, the metal precursor consists of a compound that essentially contains Zr. In some embodiments, the metal precursor consists of a compound that essentially contains Hf. In some embodiments, the metal precursor consists of a compound that essentially contains Ta.

[0042] The reagent can be any suitable compound that can react with a metal precursor to form a metal film 50. In some embodiments, the reagent is exposed to a substrate separate from the metal precursor. Suitable reagents include, but are not limited to, hydrogen, ammonia, hydrazine, hydrazine derivatives, silane, halosilane, polysilane, borane, haloborane, and other co-reagents for forming metal, metal nitride, metal silicon compound, and / or metal boride films. Suitable reagents may also include, but are not limited to, oxygen, ozone, water, and other oxygen-based reagents for forming metal or metal oxide films. In some embodiments, a plasma of the reagent is used to form the metal film 50. In some embodiments, the plasma of the reagent is generated remotely. In some embodiments, the reagent includes one or more of hydrogen, ammonia, or water.

[0043] In some embodiments, the reagent consists essentially of hydrogen and the metal film is a pure metal film. In some embodiments, the reagent consists essentially of ammonia and the metal film is a metal nitride film. In some embodiments, the reagent consists essentially of water and the metal film is a metal oxide film. As used in this embodiment, the term “essentially consisting of” means that the reagent (without inerts, diluents, or carrier species) makes up about 95%, 98%, or 99% or more of the above components on a molar basis. As used in this context, a pure metal film is any film consisting essentially of metal atoms. As used in this context, a metal nitride film is any film containing metal atoms and nitrogen atoms. As used in this context, a metal oxide film is any film containing metal atoms and oxygen atoms. Films containing non-metallic atoms (e.g., metal nitrides or metal oxides) may or may not consist of atoms in stoichiometric ratios.

[0044] In 206, a germanium-containing layer is deposited on the first surface. The deposition of the germanium-containing layer is an optional process. In some embodiments, a titanium-containing layer is deposited on the first surface, and the germanium-containing layer is also deposited on the first surface. In some embodiments, the titanium-containing layer is deposited first. In some embodiments, the germanium-containing layer is deposited first.

[0045] The germanium-containing layer can be deposited by any suitable process. In some embodiments, the germanium-containing layer is deposited by a process similar to the process described above for the metallic layer in which germanium is a metal.

[0046] In 208, a silicon-containing layer is deposited on the first surface. The deposition of the silicon-containing layer is an optional process. In some embodiments, a titanium-containing layer is deposited on the first surface, and a silicon-containing layer is also deposited on the first surface. In some embodiments, the titanium-containing layer is deposited first. In some embodiments, the silicon-containing layer is deposited first.

[0047] The silicon-containing layer can be deposited by any suitable process. In some embodiments, the silicon-containing layer is deposited by a process similar to the process described above for the metallic layer in which silicon is a metal. In some embodiments, the silicon-containing layer is deposited by exposing the substrate to a silicon precursor. In some embodiments, the substrate is also exposed to reactants. In some embodiments, the silicon-containing layer is deposited on both the first surface and the blocking layer. In some embodiments, the silicon-containing layer can be deposited by PVD and / or CVD. In some embodiments, the silicon-containing layer is amorphous. In some embodiments, the silicon-containing layer is polycrystalline. In some embodiments, the silicon-containing layer is deposited epitaxially.

[0048] In 210, after the formation of the metal film 50, the substrate is heated to form a modified first surface 60. While not bound by theory, it is thought that heating the substrate incorporates the metal layer into the surface of the semiconductor material (i.e., the first surface 25). In some embodiments, the modified first surface 60 contains a silicon compound. In some embodiments, the modified first surface 60 contains titanium and silicon. In some embodiments, the modified first surface 60 consists essentially of TiSi2.

[0049] In some embodiments, process 210 includes an annealing process. In some embodiments, the modified first surface 60 includes TiSi-C49. In some embodiments, forming the modified first surface 60 includes annealing the substrate at a temperature in the range of about 500°C to about 700°C to form TiSi-C49. In some embodiments, the annealing process is performed for more than about 1 minute. In some embodiments, forming the modified first surface 60 includes laser annealing the substrate at a temperature in the range of about 800°C to about 1000°C to form TiSi-C49. In some embodiments, the laser annealing process is millisecond laser annealing.

[0050] In some embodiments, the modified first surface 60 includes TiSi-C54. In some embodiments, forming the modified first surface 60 includes annealing the substrate at a temperature in the range of about 700°C to about 900°C to form TiSi-C54. In some embodiments, the annealing process is carried out for more than about 1 minute. In some embodiments, forming the modified first surface 60 includes laser annealing the substrate at a temperature in the range of about 1000°C to about 1200°C to form TiSi-C54. In some embodiments, the laser annealing process is millisecond laser annealing.

[0051] While the disclosures herein are described with reference to specific embodiments, these embodiments should be understood as merely illustrative examples of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Accordingly, the disclosure is intended to include modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A selective deposition method, A substrate including a finFET structure having a fin having a first semiconductor surface and a substrate portion having a second dielectric surface is exposed to a blocking compound to selectively form a blocking layer on the second dielectric surface. The substrate is exposed to a titanium precursor to selectively deposit a Ti-containing layer on the first semiconductor surface relative to the second dielectric surface. The substrate is exposed to a silicon precursor to selectively deposit a Si-containing layer on the first semiconductor surface relative to the second dielectric surface, and The substrate is annealed to form a modified first surface containing titanium and silicon. A method that includes this.

2. The method according to claim 1, wherein the Si-containing layer is amorphous.

3. The method according to claim 1, wherein the modified first surface contains TiSi-C49.

4. The method according to claim 1, wherein the modified first surface contains TiSi-C54.

5. A selective deposition method, A substrate including a finFET structure comprising a fin having a first semiconductor surface and a substrate portion having a second dielectric surface is exposed to a blocking compound to selectively form a blocking layer on the second dielectric surface relative to the first semiconductor surface. The substrate is exposed to a titanium precursor to selectively deposit a Ti-containing film on the first semiconductor surface relative to the second dielectric surface, and The substrate is annealed to form a modified first surface containing titanium and silicon. A method that includes this.

6. The method according to claim 5, wherein the substrate is annealed at a temperature in the range of approximately 500°C to approximately 900°C for a period of time exceeding approximately 1 minute.

7. The method according to claim 5, wherein the substrate is annealed by millisecond laser annealing at a temperature in the range of about 800°C to about 1200°C.

8. A selective deposition method, A substrate including a finFET structure comprising a fin having a first semiconductor surface and a substrate portion having a second dielectric surface is exposed to a blocking compound to selectively form a blocking layer on the second dielectric surface relative to the first semiconductor surface. The substrate is exposed to a metal precursor containing one or more of Ti, Zr, Hf, or Ta to selectively deposit a metal film on the first semiconductor surface relative to the second dielectric surface, and The substrate is heated to form a modified first surface containing metal and silicon. A method that includes this.

9. Blocking compound is general formula R ３ The method according to claim 8, comprising a Si-X blocking agent, wherein each R is independently a C1-C4 alkyl group and X is any leaving group.

10. The method according to claim 9, wherein X is a leaving group selected from a halide, azide, amino, hydrazide, cyanide, or isocyanate group.

11. The method according to claim 8, wherein the substrate is exposed to the blocking compound at a temperature in the range of about 200°C to about 500°C.

12. The method according to claim 8, wherein the metal precursor comprises a species containing at least one halogen ligand.

13. The method according to claim 8, wherein the metal precursor does not contain a metal halide.

14. The aforementioned metal precursor is of the general formula -OR ＊ Includes a species containing at least one oxo ligand, R ＊ The method according to claim 8, wherein is a C1-C8 alkyl group.

15. The method according to claim 14, wherein the at least one oxo ligand is selected from the group consisting of methoxy, ethoxy, propoxy, isopropoxy, butoxy, t-butoxy, and ethylhexyloxy.

16. The method according to claim 8, wherein exposing the substrate to a metal precursor further comprises exposing the substrate to a reagent containing one or more of hydrogen, ammonia, or water.

17. The method according to claim 16, wherein the reagent consists of hydrogen and the metal film is a pure metal film.

18. The method according to claim 16, wherein the reagent is ammonia and the metal film is a metal nitride film.

19. The method according to claim 16, wherein the reagent is water and the metal film is a metal oxide film.

20. The method according to claim 19, wherein the modified first surface contains a silicon compound.

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