Semiconductor memory device and method for manufacturing a semiconductor memory device

The semiconductor memory device addresses electrical interference issues by employing a laminate structure with convexly curved insulating interfaces, enhancing electron density and reducing field concentration to improve writing efficiency and prevent malfunctions.

JP7882701B2Active Publication Date: 2026-06-30KIOXIA CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
KIOXIA CORP
Filing Date
2022-06-22
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Existing semiconductor memory devices face issues with malfunction due to electrical interference between adjacent memory cells, which can be exacerbated by the concentration of electric fields at the interfaces of the memory cell structures.

Method used

The semiconductor memory device incorporates a laminate structure with insulating and conductive layers alternately stacked, featuring an insulating portion extending towards the semiconductor layer, forming interfaces that curve convexly towards the semiconductor layer, thereby reducing electric field concentration and minimizing electrical interference.

Benefits of technology

This design effectively suppresses electrical interference between adjacent memory cells, improving writing efficiency and reducing the risk of malfunctions by enhancing the trapped electron density and reducing fringe capacitance.

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Patent Text Reader

Abstract

To suppress malfunctions of memory cells.SOLUTION: A semiconductor storage device comprises: a laminate that has insulating layers and conductive layers alternately laminated in a first direction; a semiconductor layer penetrating through the insulating layers and the conductive layers; a memory layer provided between the laminate and the semiconductor layer in a second direction crossing the first direction; and an insulation part extended from the insulating layers toward the semiconductor layer in the second direction. The semiconductor storage device has: a first portion that includes the laminate, the semiconductor layer, the memory layer, and the insulation part, an interface between the insulation part and the memory layer being overlapped with the central part in the first direction of the insulating layers in a cross section along the first direction; and a second portion overlapped with an end part in the first direction of the insulating layers. The second portion is closer to the insulating layers in the second direction than the first portion. The interface is curved in a convex shape toward the semiconductor layer side from the first portion to the second portion.SELECTED DRAWING: Figure 19
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