Three-dimensional memory device and method for forming the same

The 3D memory device uses a nonconductive layer formed from undoped amorphous silicon to insulate TSCs, addressing manufacturing challenges and reducing costs by eliminating etching and patterning processes, thus enhancing the efficiency of 3D memory production.

JP7893820B2Inactive Publication Date: 2026-07-22YANGTZE MEMORY TECH CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
YANGTZE MEMORY TECH CO LTD
Filing Date
2021-08-31
Publication Date
2026-07-22
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The manufacturing of planar memory cells becomes difficult and costly as they approach the lower size limit, leading to density limitations, and existing 3D memory architectures face challenges in insulation and alignment of through-silicon contacts (TSCs) due to complex and expensive photolithography and etching processes.

Method used

A 3D memory device with a nonconductive layer formed from undoped amorphous silicon, which is converted to doped polysilicon, insulates through-silicon contacts (TSCs) from the semiconductor layer without requiring separate insulating spacers, reducing the need for etching and patterning processes.

Benefits of technology

This approach simplifies the manufacturing process, reduces costs, and decreases parasitic capacitance while maintaining effective insulation, allowing for more efficient production of 3D memory devices.

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Abstract

In a particular embodiment, a three-dimensional (3D) memory device includes a first semiconductor structure and a second semiconductor structure bonded to the first semiconductor structure. The first semiconductor structure includes an array of NAND memory strings, a semiconductor layer contacting a source end of the array of NAND memory strings, a non-conductive layer aligned to the semiconductor layer, and a contact structure in the non-conductive layer. The non-conductive layer electrically insulates the contact structure from the semiconductor layer. The second semiconductor structure includes a transistor.
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