Quantum algorithms using the lattice Boltzmann method

Abstract

A method for configuring a quantum circuit (300, 400) using the Lattice Boltzmann Method is disclosed. An initialization step (302, 402) is performed by configuring a quantum circuit, a first quantum register (f1), a second quantum register (f2), and at least a first ancillary register (a, a1). The quantum circuit is applied to the first quantum register (f1), the second quantum register (f2), and the first ancillary register (a, a1). The quantum circuit has, in order, (i) a collision step (304, 404) constructed using a first set of quantum gates, (ii) a propagation step (306, 406) constructed using a second set of quantum gates, and (iii) a macroscopic variable calculation step (308, 408) constructed using a third set of quantum gates.

Description

[Technical Field]

[0001] The present disclosure (hereinafter referred to as "the Disclosure") relates to a method for setting up a quantum circuit using the Lattice Boltzmann Method (LBM). The Disclosure also relates to a quantum computer or quantum simulator configured to perform the aforementioned method. Furthermore, the Disclosure relates to a non-volatile computer-readable medium storing computer program instructions executable by at least one processor of a classical computer for controlling the quantum computer or quantum simulator to perform the aforementioned method. Background

[0002] Currently available quantum algorithms for solving multiphysics problems are designed for application on fault-tolerant quantum devices (perfect devices with error correction capabilities and very low noise). This is primarily due to the complexity of the quantum circuits, which are too large to be applied to currently available NISQ devices (noisy intermediate-scale quantum devices). Therefore, further redesign and optimization of quantum algorithms are needed. Overview

[0003] This disclosure aims to provide an improved method for setting up quantum circuits using the lattice Boltzmann method. Furthermore, this disclosure aims to provide a quantum computer or quantum simulator configured to perform the aforementioned method. Moreover, this disclosure aims to provide a non-volatile computer-readable medium storing computer program instructions executable by at least one processor of a classical computer in order to control the quantum computer or quantum simulator and perform the aforementioned method.

[0004] According to the first interpretation, one embodiment of the present disclosure provides a method for setting up a quantum circuit using the lattice Boltzmann method. This method is The initial step involves setting up a quantum circuit with a first quantum register (f1), a second quantum register (f2), and at least one ancilla register (a, a1), wherein the first quantum register (f1) has four qubits (f10, f11, f12, f13), and the second quantum register (f2) has N-4 qubits (f20, ... f2 N-5 The method further has, and the first ancilla register (a, a1) has an ancilla qubit, This includes applying the quantum circuit to the first quantum register (f1), the second quantum register (f2), and the first ancilla register (a, a1), wherein the quantum circuit is (i) A collision step constructed using the first set of quantum gates; (ii) A propagation step constructed using a second set of quantum gates; (iii) A macroscopic variable computation step constructed using a third set of quantum gates; Prepare them in this order.

[0005] According to the second interpretation, certain embodiments of the present disclosure provide a quantum computer or quantum simulator configured to perform the method described above according to the first interpretation.

[0006] According to a third interpretation, one embodiment of the present disclosure seeks to provide a non-volatile computer-readable medium storing computer program instructions executable by at least one processor of a classical computer in order to control a quantum computer or quantum simulator and perform the aforementioned method according to the first interpretation.

[0007] Embodiments of this disclosure substantially resolve, or at least partially resolve, the aforementioned problems of the prior art, and realize efficient and error-resistant quantum circuits.

[0008] Further aspects, advantages, features, and objectives of what is disclosed herein will be revealed by the accompanying drawings and the detailed description of exemplary embodiments, which shall be interpreted together with the accompanying claims.

[0009] It will also be understood that a feature of this disclosure is that it can be combined in various ways without departing from the scope defined by the attached claims. [Brief explanation of the drawing]

[0010] The above summary and the following detailed description of exemplary embodiments will be better understood in conjunction with the accompanying drawings. For illustrative purposes of this disclosure, exemplary configurations of this disclosure are shown in the drawings. However, this disclosure is not limited to the specific methods and apparatus disclosed herein. The scale of the drawings is not accurate. Similar elements are indicated by the same number whenever possible. Hereinafter, embodiments of the present disclosure will be described with reference to the following drawings as an example. [Figure 1A] This is a schematic diagram of a quantum computer. [Figure 1B] This is a schematic diagram of a quantum computer's quantum circuit. [Figure 2] This is a schematic diagram of a quantum circuit that utilizes the lattice Boltzmann method (LBM) but has not been optimized. [Figure 3] This is a schematic diagram of an optimized quantum circuit, which utilizes LBM, according to one embodiment of the present disclosure. [Figure 4A] This is a schematic diagram of a further optimized quantum circuit utilizing LBM according to one embodiment of the present disclosure. [Figure 4B] This is another schematic diagram of a further optimized LBM-utilizing quantum circuit according to one embodiment of the present disclosure. [Figure 5] This graph shows a comparison of experimental results using the Quantinuum H-series device H1-1 emulator. [Figure 6]This is a graph showing a comparison of experimental results using the Quantinuum H-series device H1-2 emulator. Detailed Description of Embodiments

[0011] The following detailed description illustrates embodiments of the present disclosure and methods by which they may be implemented. Although several forms for carrying out the present disclosure have been disclosed, those skilled in the art will recognize that other forms for carrying out the present disclosure are also possible.

[0012] According to a first approach, an embodiment of the present disclosure provides a method for setting up a quantum circuit using the lattice Boltzmann method. This method includes performing an initial step by setting up, for the quantum circuit, a first quantum register (f1), a second quantum register (f2), and at least a first ancilla register (a, a1), where the first quantum register (f1) has four qubits (f10, f11, f12, f13), the second quantum register (f2) has N - 4 qubits (f20,... f2 N-5 ), and the first ancilla register (a, a1) has ancilla qubits, and the method further includes applying the quantum circuit to the first quantum register (f1), the second quantum register (f2), and the first ancilla register (a, a1), where the quantum circuit (i) includes a collision step constructed using a first set of quantum gates; (ii) includes a propagation step constructed using a second set of quantum gates; (iii) includes a macroscopic variable calculation step constructed using a third set of quantum gates; and comprises them in this order.

[0013] According to a second approach, an embodiment of the present disclosure provides a quantum computer or quantum simulator configured to execute the aforementioned method according to the first approach.

[0014] According to a third interpretation, one embodiment of the present disclosure seeks to provide a non-volatile computer-readable medium storing computer program instructions executable by at least one processor of a classical computer in order to control a quantum computer or quantum simulator and perform the aforementioned method according to the first interpretation.

[0015] One of the main advantages of using the lattice Boltzmann method (LBM) is that it allows for the simple and efficient implementation of equations governing various physical processes. This will become clear from the comparative examples described later.

[0016] In some embodiments, the method described above further includes simulating a physical process by performing the collision step, the propagation step, and the macroscopic variable calculation step. This method is suitable for simulating physical processes in the realm of lattice Boltzmann applications. Simulating physical processes on a quantum computer requires mapping between a classical system (represented using a classical computer) and a quantum system (represented using a quantum computer). For this purpose, in some embodiments, the method further includes • To generate mathematical formulas corresponding to the aforementioned physical processes; • Numerically discretizing the above formula using the lattice Boltzmann method; Based on the numerically discretized mathematical formula, construct the collision step, the propagation step, and the macroscopic variable calculation step; Includes.

[0017] The physical process is described by a corresponding mathematical equation, which is a partial differential equation. In some embodiments, the equation is a one-dimensional advection-diffusion equation. In this sense, the physical process is an advection-diffusion process, that is, a process in which both advection and diffusion occur simultaneously, and both advection and diffusion are governed by the advection-diffusion equation. As an example, the equation (i.e., the advection-diffusion equation) can be expressed as follows: TIFF0007912154000001.tif86140

[0018] The above equation is generally valid for advection and diffusion phenomena, and is valid for both steady and transient states.

[0019] After generating the mathematical formula (corresponding to the aforementioned physical process), the formula is numerically discretized using the lattice Boltzmann method (LBM). Due to the high similarity between LBM and quantum systems, LBM can be used as the basis for multiphysics quantum algorithms, in contrast to other standard numerical computation methods (e.g., finite volume method and finite difference method).

[0020] After discretization, the corresponding quantum circuit is constructed. In this process, a set of quantum gates and corresponding procedures are created to establish a mapping between the classical and quantum systems. For this purpose, IBM's open-source SDK platform, Qiskit, can be used. It should be understood that the above method is not limited to a single platform, and any of the various SDKs available for handling quantum computers can be used. For the purposes of this disclosure, the simulation of the quantum circuit is preferably performed on a quantum computer with some degree of error correction capabilities.

[0021] The similarity between LBMs and quantum systems makes it possible to directly map discretized mathematical formulas (corresponding to physical processes) to the framework of a quantum computer. This methodology is called "quantum native." In other words, physical processes can be simulated on a quantum computer simply by applying the evolution of quantum states that encode various physical variables. Put another way, there is no need to perform additional steps (e.g., switching between different types, or switching between information encoding and classical computation (hybrid)) between the various time steps of the quantum simulation.

[0022] In some embodiments, the above method further includes obtaining initialization parameters, which are used during the initialization step. During the initialization step, the initialization parameters (corresponding to a physical process) and one or more input vectors having initial states in the LBM framework are set. In this regard, in some embodiments, the initialization of any vector to a corresponding quantum state is achieved by using a reverse iterative procedure, which is part of the Qiskit framework. The reverse iterative procedure is described, for example, in "Synthesis of Quantum-Logic Circuits" by VV Shende et al., published in IEEE Trans. on Computer-Aided Design, vol. 25, no. 6, June 2006, pp. 1000 - 1010, and its contents are incorporated herein by reference.

[0023] LBM can be divided into three main steps. (i) Collision step (this is constructed using the first set of quantum gates). (ii) The propagation step (which is constructed using a second set of quantum gates). (iii) Macroscopic variables computation step (which is constructed using a third set of quantum gates).

[0024] Combining these three steps together leads to the formation of a quantum circuit. This quantum circuit is suitable for one-time simulations; that is, after a specific cycle of one time step of the simulation is completed, it is necessary to measure and reinitialize the quantum state for the input of the next time step. Alternatively, another method of connecting two time steps is required.

[0025] A quantum circuit has a total of N qubits, and one or more ancilla registers are introduced solely for computation. When new qubits are introduced into the quantum circuit, they are added to the second quantum register (f2). The first quantum register (f1) is fixed and consists of four qubits.

[0026] In some embodiments, in the above method, the first set of quantum gates (which corresponds to the collision step) proceeds in order: • The last working qubit of the second quantum register f2 (f2 N-5 The first SWAP gate is applied between ) and the ancila qubit of the first ancila register (a, a1); • The rotation axis is the Y-axis, and the control corresponding to the |0> state uses the anscira qubit of the first anscira register (a, a1), and the target is the last working qubit (f2) of the second quantum register (f2) N-5 The first rotation operator (Ry) gate uses ); • The Y-axis is used as the axis of rotation, the ancilla qubit of the first ancilla register (a, a1) is used as control corresponding to the state |1>, and the last working qubit (f2) of the second quantum register (f2) is used as the target. N-5 A second rotation operator (Ry) gate using ); · As control for the state |1>, the ancilla qubit of the first ancilla register (a, a1) is used, and the last working qubit (f2) of the second quantum register (f2) is used as the target. N-5 ) use the first CX gate; • The last working qubit (f2) of the second quantum register (f2) N-5 A second SWAP gate is applied between ) and the ancila qubit of the first ancila register (a, a1); It holds.

[0027] The first set of quantum gates is illustrated in relation to Figures 3 and 4A-4B. The first and second rotation angles (used for the first and second rotation operator gates, respectively) depend on parameters provided during the initialization step. Such parameters may be part of the simulated physical process. The first and second rotation angles may be provided in radians, for example, as defined in Qiskit.

[0028] Throughout this disclosure, the term “SWAP gate” refers to an operator for swapping quantum states between two qubits. Throughout this specification, expressions such as “using a qubit as a control” and “using a qubit as a target” mean that the value of the qubit “used as a control” is considered in determining whether a change is required in the value of the qubit “used as a target.” The term “use” in expressions such as “use a qubit” should be understood as using a qubit for a particular purpose, namely as a control or as a target.

[0029] In some embodiments, the propagation step implements a computational basis state shift in the above method. In other words, a second gate set (corresponding to the propagation step) implements a computational basis state shift. The propagation step is performed in two possible directions. Computational basis state shifts can be implemented in various ways. Several examples of the second gate set are shown in Figures 3 and 4A-4B.

[0030] In some embodiments, in the above method, the third set of quantum gates (which corresponds to the macroscopic variable computation step) is performed in order: • The last working qubit (f2) of the second quantum register (f2) N-5 A SWAP gate is applied between ) and the ancila qubit of the first ancila register (a, a1); • A Hadamard gate applied to the ancila qubit of the first ancila register (a, a1); It holds.

[0031] In the macroscopic variable computation step, the SWAP gate is used for state preparation, and the Hadamard gate is used to perform pointwise addition procedures. A third set of gates is shown in relation to Figures 2, 3, and 4A-4B.

[0032] Referring to the drawing, Figure 1A is a schematic diagram of the quantum computer 100. The quantum computer 100 has N qubits, which are depicted as the first qubit 110a, the second qubit 110b, ..., the Nth qubit 110c, respectively. The quantum computer 100 also has a first anscira qubit 110d. Each of the qubits 110a, 110b, and 110c is in a superposition state of the ground state |0> and the excited state |1>. The quantum computer 100 further includes state preparation means 102 which are employed to initialize the quantum computer 100. The quantum computer 100 also optionally includes implementation means 104 which are employed to set up gates for implementing quantum algorithms. Each gate uses one or more of the N qubits. Furthermore, the quantum computer 100 includes measurement means 106 which are employed to measure the state of one or more of the N qubits after the execution of a quantum algorithm.

[0033] Figure 1B is a schematic diagram of a quantum circuit 100B. The quantum circuit 100B can be illustrated using a first quantum register 112, a second quantum register 114, and a first ancilla register 116. Further, a classical register 160 is also illustrated. The number of bits of the classical register 160 is equal to the number of quantum bits of all other registers. That is, it is equal to the number of quantum bits of the first quantum register 112, the second quantum register 114, and the first ancilla register 116. The term "classical register" refers to a line that provides an interface between a quantum computer and a classical computer.

[0034] The mapping of the quantum registers to the quantum computer 100 in FIG. 1A is as follows. f10 corresponds to the first quantum bit 110a. f11 corresponds to the second quantum bit 110b, and so on. f2 N-5 corresponds to the Nth quantum bit 110c.

[0035] These N quantum bits are called working qubits. The naming of the above registers is arbitrary. In the present disclosure, the first quantum register 112 has four working qubits, and the second quantum register 114 has N - 4 working qubits. However, N is greater than 4. As an example, when N = 6, the first quantum register 112 is composed of working qubits f10, f11, f12, f13, and the second quantum register 114 is composed of working qubits f20, f21.

[0036] Referring to FIG. 1B, the quantum circuit 100B has an initialization phase 170 in which one or more quantum bits are set to an initial state, an implementation phase 172 in which gates constituting corresponding phases are sequentially set (i.e., set in a time-varying quantum system), and a measurement phase 174 following the implementation phase 172.

[0037] For comparison, we will explain an unoptimized quantum circuit (representing the prior art) and the two optimized quantum circuits according to this disclosure, using the case where the number of qubits is 5 (N=5). Figure 2 represents the unoptimized quantum circuit, and Figures 3 and 4A-B represent the optimized quantum circuits according to this disclosure.

[0038] Figure 2 is a schematic diagram of an unoptimized quantum circuit 200 with 5 qubits, utilizing the lattice Boltzmann method (LBM). Figure 2 represents prior art. This 5-qubit unoptimized quantum circuit 200 is configured using a first quantum register f1 and a second quantum register f2. In this diagram, the total number of working qubits N is 5. The number of bits in the classical register c corresponds to the total number of qubits (including both working qubits and ancilla qubits). The 5-qubit unoptimized quantum circuit 200 has an unoptimized collision step 204, an unoptimized propagation step 206, and a macroscopic variable calculation step 208. Both the unoptimized collision step 204 and the unoptimized propagation step 206 have multiple multi-control gates. These gates are implemented sequentially, i.e., from left to right, as shown in Figure 2A (and all figures of this application illustrating various quantum circuits). In Figure 2, the quantum circuit shown in the second row is actually a continuation of the quantum circuit shown in the first row. Similarly, the quantum circuit shown in the third row is a continuation of the second row.

[0039] The unoptimized quantum circuit 200 simulates a one-dimensional physical process of concentration transport along a channel using a LBM. An example of how such a quantum circuit can be set up is described in "Quantum algorithm for the advection-diffusion equation simulated with the lattice Boltzmann method" (author: Ljubomir Budinski), published in Quantum Information Processing, Vol. 20, article number 57 (2021). In the unoptimized quantum circuit 200, a similar one-dimensional advection-diffusion (ADE) model including 16 computational lattice sites was considered. This example was used to highlight in detail the technical advantages of the optimized quantum circuit of this disclosure (shown in Figures 3 and 4A-4B). It should be understood that the aforementioned example of a one-dimensional physical problem with 16 computational lattice sites (i.e., a one-dimensional ADE model) is considered for convenience only, and the optimization principles provided in this disclosure are general and not limited to the aforementioned example.

[0040] In order for the unoptimized quantum circuit 200 to operate correctly and efficiently on the NISQ device, it needs to be optimized. With the exception of the initialization step 202, the three steps (i.e., the unoptimized collision step 204, the unoptimized propagation step 206, and the macroscopic variable calculation step 208) are separated by gray barriers to indicate their start and end.

[0041] The problematic parts of the unoptimized quantum circuit 200 are the collision step 204 and the propagation step 206. This is due to the large number of multi-controlled gates (conditionally). Before being applied to an actual quantum computer, each of these multi-controlled gates is required to be decomposed from a given basis set into a sequence of two-qubit CX gates and other one-qubit gates. Each multi-controlled gate (having two or more controls) is decomposed using a decomposition algorithm. Such decomposition algorithms are well known in the art.

[0042] Decomposition depends on the device-specific set of basis gates and the device's qubit connectivity. For example, an unoptimized quantum circuit 200 can be decomposed using the IBM Qiskit transpiler with the IBM set of basis gates (I, SX, X, RZ, CX). Transpilation transforms the general form of the unoptimized quantum circuit 200 (as shown in Figure 2) into a device-specific set of operations executable on quantum hardware.

[0043] For the unoptimized quantum circuit 200, decomposition using IBM's basis gate set (as shown in Figure 2) results in gate counts of RZ=312, CX=244, SX=77, X=9. These results indicate that the resulting circuit (the circuit obtained after decomposition) is too deep for real-world device applications, even assuming perfect qubit connectivity. Specifically, the circuit has too many single-qubit gates (i.e., RZ, SX, X) and two-qubit gates (CX). In particular, the number of two-qubit CX gates is unacceptably high. In this form, even with some error correction and mitigation measures, it is impossible to operate the unoptimized quantum circuit 200 on a real device. Therefore, further optimization is necessary.

[0044] This disclosure provides two optimized quantum circuits, which are described with reference to Figures 3 and 4A-4B.

[0045] Figure 3 is a schematic diagram of the setup of an optimized quantum circuit 300 utilizing an LBM, according to one embodiment of the present disclosure. For comparison, the total number of working qubits N is 5 in this figure as well. The optimized quantum circuit 300 is set up using a first quantum register f1, a second quantum register f2, and a first ancilla register a. The first quantum register f1 has four working qubits (f10, f11, f12, f13), and the second quantum register f2 has N-4 working qubits (f20, ... f2 N-5 The first ancilla register a has a fixed number of qubits, equal to 1. The number of bits in classical register c corresponds to the total number of qubits (including both working qubits and ancilla qubits).

[0046] The first step described is the initialization step 302. The optimized quantum circuit 300 has an optimized collision step 304, an unoptimized propagation step 306 (similar to Figure 2), and a macroscopic variable calculation step 308. In other words, in the optimized quantum circuit 300, only the collision step 304 is optimized compared to the unoptimized collision step 204 in Figure 2 by reducing the number of quantum gates within it. The number of quantum gates in the collision step is reduced from 16 multi-control gates to 2 SWAP gates (xx), 2 rotation operator (Ry) gates, and 1 CX gate (see Figure 3).

[0047] Referring to Figure 3, the first set of quantum gates (which corresponds to collision step 304) are, in order, • The last working qubit of the second quantum register f2 (f2 N-5 The first SWAP gate is applied between ) and the ancila qubit of the first ancila register a; • It has the Y-axis as the axis of rotation, uses the anscira qubit of the first anscira register a as control corresponding to the |0> state, and the last working qubit (f2) of the second quantum register f2 as the target. N-5 The first rotation operator (Ry) gate uses ); • The Y-axis has rotational axis, and the anscira qubit of the first anscira register a is used as control corresponding to the state |1>, and the last working qubit (f2) of the second quantum register f2 is used as the target. N-5 A second rotation operator (Ry) gate using ); · As control corresponding to the state |1>, use the ancila qubit of the first ancila register a, and target the last working qubit (f2) of the second quantum register f2. N-5 ) use the first CX gate; • The last working qubit of the second quantum register f2 (f2 N-5 A second SWAP gate is applied between ) and the ancila qubit of the first ancila register a; It holds.

[0048] In the case of the optimized quantum circuit 300, (as shown in Figure 3), the number of gates, decomposition using IBM's basis gate set, is RZ=189, CX=145, SX=68, X=4. It can be seen that a significant reduction in the number of quantum gates is achieved by optimizing only the collision step. In particular, the number of CX gates (the most problematic part of the quantum circuit in terms of actual device implementation) has been reduced by 41%.

[0049] Figures 4A and 4B are schematic diagrams of a setup of a quantum circuit 400 utilizing a LBM, representing a further optimized quantum circuit according to one embodiment of the present disclosure. For comparison, the total number of working qubits N is 5 in Figure 4A as well. In Figure 4B, the total number of working qubits N is 7 to show an optional module section of the propagation step of the further optimized quantum circuit 400.

[0050] The further optimized quantum circuit 400 is configured using a first quantum register f1, a second quantum register f2, and two ancilla registers a1 and a2. However, the first quantum register f1 has four working qubits (f10, f11, f12, f13), and the second quantum register f2 has N-4 working qubits (f20, ... f2 N-5 The classical register c has the following characteristics: The number of qubits in ancilla registers a1 and a2 is fixed and equal to 1. The number of bits in classical register c corresponds to the total number of qubits (including both working qubits and ancilla qubits).

[0051] The first step described is the initialization step 402. The further optimized quantum circuit 400 has an optimized collision step 404 (similar to that in Figure 3), an optimized propagation step 406, and a macroscopic variable calculation step 408. In other words, in the further optimized quantum circuit 400, both the collision step 404 and the propagation step 406 are optimized by having fewer quantum gates compared to the unoptimized collision step 204 and unoptimized propagation step 206 in Figure 2.

[0052] Referring to Figures 4A and 4B, the first set of quantum gates (corresponding to collision step 404) are, in order, • The last working qubit of the second quantum register f2 (f2 N-5 The first SWAP gate is applied between ) and the ancila qubit of the first ancila register a1; • The Y-axis is used as the axis of rotation, the ancila qubit of the first ancila register a1 is used as the control corresponding to the |0> state, and the last working qubit (f2) of the second quantum register f2 is used as the target. N-5 The first rotation operator (Ry) gate uses ); • The Y-axis is used as the axis of rotation, the ancilla qubit of the first ancilla register a1 is used as the control corresponding to the state |1>, and the last working qubit (f2) of the second quantum register f2 is used as the target. N-5A second rotation operator (Ry) gate using ); · As control corresponding to the state |1>, the ancila qubit of the first ancila register a1 is used, and the last working qubit (f2) of the second quantum register f2 is used as the target. N-5 ) use the first CX gate; • The last working qubit of the second quantum register f2 (f2 N-5 A second SWAP gate is applied between the first ancilla register a1 and the ancilla qubit; It holds.

[0053] The propagation step 206 in Figure 2 (representing the spatial evolution of the distribution function in the left-right direction) is replaced by the evolution of a single general vector of states encoding the distribution function. This leads to an additional reduction in the depth of the circuit. In this regard, in some embodiments, a second set of quantum gates (corresponding to propagation step 406) is used. (i) The first step 420 includes four CX gates and the first X gate; (Ii) The first segment 424 includes seven multi-control gates; (III) If N > 5, a second segment 426 containing a first set of CX gates 4262, a second set of CX gates 4264, and an array of gates 4266 positioned between the first set 4262 and the second set 4264; (Iv) The third segment 428, which includes two CX gates and a second X gate; It has them in this order.

[0054] Referring to Figure 4A, N=5, and therefore the further optimized quantum circuit 400 in Figure 4A does not include the second segment 426 of the propagation step. In other words, if N is not greater than 5, the second segment 426 is completely omitted. Referring to Figure 4B, N=7, and therefore the further optimized quantum circuit 400 in Figure 4B has the second segment 426 of the propagation step.

[0055] Depending on the embodiment, the four CX gates of the first step 420 are operated sequentially in the following order: The first step 420 CX gate uses the ancila qubit in the first ancila register a1 as the control corresponding to the state |1>, and the ancila qubit in the second ancila register a2 as the target; The first step is the second CX gate of step 420, using the first working qubit (f10) of the first quantum register f1 as the control corresponding to the state |1>, and the anscira qubit of the first anscira register a1 as the target; • The last working qubit (f2) of the second quantum register f2 is used as the control corresponding to state |1>. N-5 The first step is the third CX gate of step 420, using the anscira qubit of the first anscira register a1 as the target; The first step is the fourth CX gate of step 420, using the anscira qubit of the first anscira register a1 as the control corresponding to state |1>, and the second working qubit (f11) of the first quantum register f1 as the target.

[0056] The first X gate in the first step 420 is applied to the first working qubit (f10) of the first quantum register f1.

[0057] Depending on the embodiment, the seven multi-control gates of the first segment 424 are used in the order of the first multi-control gate, the second multi-control gate, the third multi-control gate, the fourth multi-control gate, the fifth multi-control gate, the sixth multi-control gate, and the seventh multi-control gate. However, The first and fifth multi-control gates use the last working qubit (f2) of the second quantum register f2 as the first control corresponding to the state |0>. N-5Using ), the ancilla qubit of the first ancilla register a1 is used as the second control corresponding to the |1> state, and the second working qubit (f11) of the first quantum register f1 is used as the target; The second and fourth multi-control gates control the last working qubit (f2) of the second quantum register f2 as the control corresponding to the state |1>. N-5 ) and the ancila qubit of the first ancila register a1 are used, and the third working qubit (f12) of the first quantum register f1 is used as the target; The third multi-control gate uses the second working qubit (f11) of the first quantum register f1, the third working qubit (f12) of the first quantum register f1, and the anscira qubit of the first anscira register a1 as control corresponding to the |1> state, and uses the fourth working qubit (f13) of the first quantum register f1 as the target; The sixth multi-control gate controls the second working qubit (f11) of the first quantum register f1 and the last working qubit (f2) of the second quantum register f2 as the control corresponding to the |0> state. N-5 Using ) and ||1>, the ancilla qubit of the first ancilla register a1 is used as the control corresponding to the state ||1>, and the third working qubit (f12) of the first quantum register f1 is used as the target; The seventh multi-control gate controls the second working qubit (f11) of the first quantum register f1 and the last working qubit (f2) of the second quantum register f2 as the control corresponding to the state |1>. N-5 ) and the ancila qubit of the first ancila register a1 are used, and the third working qubit (f12) of the first quantum register f1 is used as the target.

[0058] Furthermore, depending on the embodiment, the two CX gates of the third segment 428 and the second X gate are used sequentially in the following order. • The last working qubit (f2) of the second quantum register f2 is the control corresponding to the state |1>. N-5 The first CX gate of the third segment 428 uses the anscira qubit of the first anscira register a1 as the target; The second CX gate of the third segment 428 uses the first working qubit (f10) of the first quantum register f1 as the control corresponding to the state |1>, and the anscira qubit of the first anscira register a1 as the target; Here, the second X gate of the third segment 428 is used for the ancilla qubit of the first ancilla register a1.

[0059] The optimization of the propagation step described above brings further technical advantages. One of these advantages is that when the number of working qubits increases, only the second segment 426 of the propagation step needs to be modified. That is, it only needs to be modified by adding additional gates to the second set of CX gates 4264 and the gate array 4266. Even when additional qubits are introduced into the quantum circuit, the first step 420, the first segment 424, and the third segment 428 remain unchanged. In particular, the number of controls for the seven multi-control gates in the first segment 424 remains unchanged. As a result, the further optimized quantum circuit 400 can be easily scaled up. Furthermore, scaling up the further optimized quantum circuit 400 is far less expensive than scaling up the unoptimized quantum circuit 200.

[0060] For the further optimized quantum circuit 400, (as shown in Figure 4A) decomposition using IBM's basis gate set results in gate numbers of RZ=129, CNOT=86, SX=50, X=12. It can be seen that a significant reduction in the number of quantum gates is achieved by optimizing both the collision step and the propagation step. For the CX gate, it is reduced by a further 41% compared to the unoptimized quantum circuit 200 in Figure 2, for a total reduction of 65%. For the Z-axis rotation gate RZ, this total reduction is 59 percent. These results demonstrate that a significant optimization has been achieved over the unoptimized quantum circuit 200 (in Figure 2). This optimization makes the further optimized quantum circuit 400 fully applicable to execution on actual quantum devices. In other words, by thus significantly reducing the number of multi-control gates, the further optimized quantum circuit 400 becomes shorter, more efficient, and therefore more error-resistant.

[0061] The table below shows a comparison of the number of gates. Note that the exact number of gates always depends on the device. Here, IBM's basis gate set {RZ, SX, X, CX} is used, assuming perfect qubit connectivity. TIFF0007912154000002.tif76170

[0062] Referring to Figure 4B, in some embodiments, the first CX gate set 4262 of the second segment 426 has four CX gates that use the first working qubit (f10), second working qubit (f11), third working qubit (f12), and fourth working qubit (f13) of the first quantum register f1 as their respective targets, in this order. Each of the four CX gates of the first CX gate set 4262 controls the last working qubit (f2) of the second quantum register f2 as a control corresponding to the state |0>. N-5 Use ).

[0063] Furthermore, in some embodiments, the second CX gate set 4264 of the second segment 426 has N-2 CX gates that use the first working qubit (f10), the second working qubit (f11), the third working qubit (f12), and up to the (N-2)th working qubit as their respective targets in this order. Each of the N-2 CX gates of the second CX gate set 4264 controls the last working qubit (f2) of the second quantum register f2 as a control corresponding to the state |0> N-5 ) is used. Here, the (N-2)th working qubit can be the working qubit of the first quantum register (f1) or the second quantum register (f2), depending on the value of N. For example, when N=6, the second CX gate set 4264 may have four CX gates. Also, the (N-2)th working qubit is the fourth working qubit in the quantum circuit, which is the fourth working qubit (f13) of the first quantum register (f1). This working qubit (f13) is used as the last of the four CX gates, as shown in Figure 3A. When N>6, the (N-2)th working qubit is the working qubit (f2N-7) of the second quantum register f2. Referring to Figure 4B, when N=7, the second set CX gate 4264 has five CX gates, and the (N-2)th working qubit is the first working qubit (f20) of the second quantum register f2. This working qubit (f20) is used as the last target of the five CX gates.

[0064] Furthermore, in some embodiments, the gate array 4266 is positioned after the first CX gate set 4262 and before the second CX gate set 4264. The number of gates in the array is a function of the total number of working qubits (N). The second CX gate set 4264 and the gate array 4266 depend on the value of N, and it will be understood that this facilitates scaling up to a more optimized quantum circuit.

[0065] Depending on the embodiment, the gate array 4266 includes the following: • N-5 multi-control gates, indexed from 1 to N-5. These are arranged as an array of gates. Within this array, the multi-control gate indexed "M" uses all the working qubits of the first quantum register f1 and the first M-1 working qubits of the second quantum register f2 as control corresponding to the |1> state, and uses the Mth working qubit of the second quantum register f2 as the target. If N is greater than 6, then N-6 CX gates are used.

[0066] Here, N-5 multi-control gates and N-6 CX gates are arranged alternately. The gate array 4266 starts with the first multi-control gate among the N-5 multi-control gates. Each CX gate controls the last working qubit (f2) of the second quantum register f2 as the control corresponding to the |0> state. N-5 Using this, the Lth CX gate uses the same working qubit that is used as the target by the Lth multi-control gate as its target.

[0067] It will be understood that the second segment 426 in the propagation step is a modular segment. The addition of individual new qubits to the quantum circuit introduces one multi-control gate and two CX gates, where the multi-control gate has N-2 controls (starting with the first working qubit (f10)) and the two CX gates control the last working qubit (f2 N-5 It has a working qubit (f2N-7) as its target. This relationship is maintained for each new qubit added to the quantum circuit.

[0068] [Experimental Results] Optimizing quantum circuits using LBMs (e.g., the further optimized quantum circuit 400) opens up the possibility of performing simulations of physical processes on actual quantum devices. This is illustrated with the Quantinuum H-series device H1-1, and a comparison of the results in the form of a lattice Boltzmann probability distribution function for ideal and emulated values ​​is shown in Figure 5. In this regard, the one-dimensional advection-diffusion equation was solved on the Quantinuum H1-1 device and compared with the H1-1 emulation and a low-noise "ideal" simulation provided by Qiskit Aer. The desired solution to the physical problem can be obtained from the measured distribution with a simple post-processing step. Physically relevant states are shown in the left half of the distribution graph. The number of shots was set to 1024 in all runs. Figure 6 shows two different run results on the Quantinuum H-series device H1-2 emulator, again compared with ideal values. Here again, the one-dimensional advection-diffusion equation was solved on the Quantinuum H1-2 emulator with two different numbers of shots and compared with a low-noise "ideal" simulation provided by Qiskit Aer.

[0069] As these results clearly show, a high level of overlap is achieved both between measured and emulated values, and between measured and ideal values. This supports the high efficiency of the optimization mentioned earlier. Since the Quantinuum emulator can reproduce real quantum devices with reasonable accuracy, it is an excellent indicator of how optimized quantum circuits function on real quantum devices.

[0070] This disclosure also relates to a quantum computer or quantum simulator configured to perform the above-described method to set up the above-described quantum circuit utilizing LBM. Furthermore, this disclosure relates to a non-volatile computer-readable medium storing computer program instructions executable by at least one processor of a classical computer to control the quantum computer or quantum simulator and perform the above-described method. Various embodiments and modifications disclosed above relating to the above-described method are applicable mutatis mutandis to the quantum computer or quantum simulator and the non-volatile computer-readable medium.

Claims

1. A method for setting up a quantum circuit using the lattice Boltzmann method, which is executed by a quantum computer or quantum simulator, The method includes performing an initial step by setting up a first quantum register, a second quantum register, and at least one anscira register for the quantum circuit, wherein the first quantum register has four qubits, the second quantum register has N-4 qubits, where N is the total number of working qubits, and the first anscira register has an anscira qubit. The method further includes applying the quantum circuit to the first quantum register, the second quantum register, and the first ancilla register, wherein the quantum circuit is (i) A collision step constructed using the first set of quantum gates; (ii) A propagation step constructed using a second set of quantum gates; (iii) A macroscopic variable computation step constructed using a third set of quantum gates; These should be provided in this order. The first set of quantum gates is, in order, - A first SWAP gate applied between the last working qubit of the second quantum register and the ancilla qubit of the first ancilla register; A first rotation operator gate having the Y-axis as the axis of rotation, using the ancila qubit of the first ancila register as control corresponding to the |0> state, and using the last working qubit of the second quantum register as the target; A second rotation operator gate having the Y-axis as the rotation axis, using the anscira qubit of the first anscira register as the control corresponding to the |1> state, and using the last working qubit of the second quantum register as the target; - A first CX gate that uses the ancilla qubit of the first ancilla register as control corresponding to the state |1>, and the last working qubit of the second quantum register as the target; A second SWAP gate applied between the last working qubit of the second quantum register and the ancilla qubit of the first ancilla register; It has, The second set of quantum gates is, in order, - The first step involves four CX gates and the first X gate; • The first segment includes seven multi-control gates; A second segment comprising a first CX gate set, a second CX gate set, and an array of gates positioned between the first and second sets; • The third segment includes two CX gates and a second X gate; It has, The third set of quantum gates is, in order, - A SWAP gate applied between the last working qubit of the second quantum register and the ancila qubit of the first ancila register; - The Hadamard gate applied to the ancila qubit of the first ancila register; It has, The method further includes simulating the physical process by performing the collision step, the propagation step, and the macroscopic variable calculation step. method.

2. The method according to claim 1, wherein the propagation step performs a computational ground state shift.

3. The four CX gates in the first step are in the following order: - The first CX gate of the first step, using the ancila qubit of the first ancila register as the control corresponding to the state |1>, and using the ancila qubit of the second ancila register as the target; - The second CX gate of the first step, using the first working qubit of the first quantum register as the control corresponding to the state |1>, and using the ancila qubit of the first ancila register as the target; - The third CX gate of the first step, using the last working qubit of the second quantum register as control corresponding to the state |1>, and using the ancila qubit of the first ancila register as the target; - The fourth CX gate of the first step, using the ancilla qubit of the first ancilla register as the control corresponding to the state |1>, and using the second working qubit of the first quantum register as the target; - The first X gate of the first step, used for the first working qubit of the first quantum register; The method according to claim 1, used in...

4. The seven multi-control gates of the first segment are used in the order of the first multi-control gate, the second multi-control gate, the third multi-control gate, the fourth multi-control gate, the fifth multi-control gate, the sixth multi-control gate, and the seventh multi-control gate. The first and fifth multi-control gates use the last working qubit of the second quantum register as the first control corresponding to the |0> state, the ancilla qubit of the first ancilla register as the second control corresponding to the |1> state, and the second working qubit of the first quantum register as the target; The second and fourth multi-control gates use the last working qubit of the second quantum register and the ancilla qubit of the first ancilla register as control corresponding to the |1> state, and use the third working qubit of the first quantum register as the target; The third multi-control gate uses the second working qubit of the first quantum register, the third working qubit of the first quantum register, and the ancilla qubit of the first ancilla register as control corresponding to the |1> state, and uses the fourth working qubit of the first quantum register as the target; The sixth multi-control gate uses the second working qubit of the first quantum register and the last working qubit of the second quantum register as control for the |0> state, the ancilla qubit of the first ancilla register as control for the |1> state, and the third working qubit of the first quantum register as the target; The seventh multi-control gate uses the second working qubit of the first quantum register, the last working qubit of the second quantum register, and the ancilla qubit of the first ancilla register as control corresponding to the |1> state, and uses the third working qubit of the first quantum register as the target; The method according to claim 1.

5. The first CX gate set of the second segment has four CX gates that use the first working qubit, the second working qubit, the third working qubit, and the fourth working qubit of the first quantum register as their respective targets, in that order; Each of the four CX gates in the first set of CX gates uses the last working qubit of the second quantum register as control corresponding to the |0> state; The second set of CX gates in the second segment has N-2 CX gates that use the first working qubit, the second working qubit, the third working qubit, and up to the N-2 working qubit as their respective targets in this order; Each of the N-2 CX gates in the second set of CX gates uses the last working qubit of the second quantum register as control corresponding to the |0> state; The array of gates is arranged after the first set of CX gates and before the second set of CX gates, and the number of gates in the array of gates is a function of the total number of working qubits; The method according to claim 4.

6. The aforementioned gate arrangement is, - N-5 multi-control gates indexed from 1 to N-5; If N is greater than 6, then N-6 CX gates; It has, The N-5 multi-control gates are arranged as an array of gates, and the multi-control gate with index "M" in the array uses all the working qubits of the first quantum register and the first M-1 working qubits of the second quantum register as controls corresponding to the |1> state, and uses the M-th working qubit of the second quantum register as the target. The N-5 multi-control gates and the N-6 CX gates are arranged alternately, the gate arrangement starting with the first multi-control gate among the N-5 multi-control gates, each CX gate using the last working qubit of the second quantum register as control corresponding to the |0> state, and the L-th CX gate using the same working qubit as the target used by the L-th multi-control gate as its target. The method according to claim 5.

7. The two CX gates and the second X gate of the third segment are - The first CX gate of the third segment, using the last working qubit of the second quantum register as control corresponding to the state |1>, and using the ancila qubit of the first ancila register as the target; - The second CX gate of the third segment, using the first working qubit of the first quantum register as control for the state |1> and the ancilla qubit of the first ancilla register as the target; The method according to claim 1, wherein the gates are used sequentially in the order of the second X gate of the third segment, the second X gate of the first ancilla register being used for the ancilla qubit.

8. A quantum computer or quantum simulator configured to perform the method described in any one of claims 1 to 7.

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