Semiconductor device, display device and electronic apparatus

Abstract

Provided is a semiconductor device having redundancy. The semiconductor device includes a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit. An output terminal of the first drive circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switching circuit. An output terminal of the second drive circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switching circuit.

Description

Semiconductor device, display device, and electronic device

[0001] One embodiment of the present invention relates to a semiconductor device, a display device, and an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a driving method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Therefore, specific examples of the technical field of one embodiment of the present invention disclosed in this specification include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, power storage devices, imaging devices, memory devices, signal processing devices, processors, electronic devices, systems, driving methods thereof, manufacturing methods thereof, and testing methods thereof.

[0003] For example, there is a demand for display devices applicable to XR such as VR (virtual reality) or AR (augmented reality). Specifically, for example, in order to enhance the sense of reality and immersion, the display device is desired to have high definition and high color reproducibility.

[0004] Examples of the display device that can be applied include a liquid crystal display device, an organic electroluminescence (EL) display device, a light-emitting device including a light-emitting device such as a light-emitting diode (LED: Light Emitting Diode), etc. Patent Document 1 discloses a display device with a high pixel count and high resolution that includes a light-emitting device including an organic EL display device.

[0005] International Publication No. 2019 / 220278

[0006] As described above, devices for XR require display devices with high display quality. Display devices for XR devices require high resolution to enhance realism and immersion. In this case, the display device can increase the number of pixels within a given size by, for example, reducing the pitch between pixels or between wirings, or by reducing the pixel size. However, as the number of pixels in a display device increases, the amount of data per frame increases, and therefore, there is a demand for faster drive circuits (e.g., source driver circuits or gate driver circuits) that drive the display device.

[0007] Furthermore, when the resolution of a display device is increased, the number of pixels included in the display device increases, resulting in a larger drive circuit for driving the display device. Therefore, it is preferable to reduce the circuit area of ​​the drive circuit in a display device included in an XR device. One way to reduce the circuit area of ​​the drive circuit is to reduce the size of circuit elements such as transistors. However, reducing the size of circuit elements can result in variations in the characteristics of the circuit elements. This can cause the drive circuit to not operate properly (i.e., malfunctions in the drive circuit).

[0008] An object of one embodiment of the present invention is to provide a semiconductor device with reduced power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device in which a driver circuit has redundancy. Another object of one embodiment of the present invention is to provide a semiconductor device with a high yield. Another object of one embodiment of the present invention is to provide a novel semiconductor device. Another object of one embodiment of the present invention is to provide a display device including any one or more of the above-described semiconductor devices. Another object of one embodiment of the present invention is to provide a display device with high display quality. Another object of one embodiment of the present invention is to provide an electronic device including any of the above-described display devices.

[0009] Note that the problems of one embodiment of the present invention are not limited to the problems listed above. The problems listed above do not preclude the existence of other problems. Note that the other problems are problems not mentioned in this section, which will be described below. Problems not mentioned in this section can be derived by a person skilled in the art from the description in the specification or drawings, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention solves at least one of the problems listed above and other problems. Note that one embodiment of the present invention does not necessarily solve all of the problems listed above and other problems.

[0010] (1) One aspect of the present invention is a circuit configuration including a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit, wherein the first drive circuit has a first output terminal, the second drive circuit has a second output terminal, the first selection circuit has an input terminal and an output terminal, the second selection circuit has an input terminal and an output terminal, the switching circuit has a first terminal and a second terminal, the first output terminal is electrically connected to the input terminal and the first terminal of the first selection circuit, and the second output terminal is electrically connected to the input terminal and the second terminal of the second selection circuit, and the first drive circuit has a function of generating a first data signal; a first driver circuit having a function of generating a second data signal and a function of outputting the second data signal to a second output terminal; a first selection circuit having a function of bringing an input terminal of the first selection circuit and an output terminal of the first selection circuit into one of a conductive state and a non-conductive state; a second selection circuit having a function of bringing an input terminal of the second selection circuit and an output terminal of the second selection circuit into one of a conductive state and a non-conductive state; and a switching circuit having a function of bringing the first terminal and the second terminal into one of a conductive state and a non-conductive state.

[0011] (2) Also, in the above (1), the circuit has a function of operating in a first mode, a second mode, and a third mode, and the first mode is to establish a conductive state or a non-conductive state between the input terminal of the first selection circuit and the output terminal of the first selection circuit, establish a conductive state or a non-conductive state between the input terminal of the second selection circuit and the output terminal of the second selection circuit, establish a conductive state between the first terminal and the second terminal, output a first data signal via the output terminal of the first drive circuit and to either the output terminal of the first selection circuit or the output terminal of the second selection circuit, and not output a second data signal to the output terminal of the second drive circuit, and the second mode is to establish a conductive state or a non-conductive state between the input terminal of the first selection circuit and the output terminal of the first selection circuit, establish a conductive state between the input terminal of the second selection circuit and the output terminal of the second selection circuit, , the other of the conductive state and the non-conductive state between the first terminal and the second terminal, the conductive state between the first terminal and the second terminal, so that the first data signal is not output to the output terminal of the first drive circuit, and the second data signal is output via the output terminal of the second drive circuit and to either the output terminal of the first selection circuit or the output terminal of the second selection circuit; and the third mode is a conductive state between the input terminal of the first selection circuit and the output terminal of the first selection circuit, a conductive state between the input terminal of the second selection circuit and the output terminal of the second selection circuit, and a non-conductive state between the first terminal and the second terminal, so that the first data signal is output via the output terminal of the first drive circuit and to the output terminal of the first selection circuit, and the second data signal is output via the output terminal of the second drive circuit and to the output terminal of the second selection circuit.

[0012] (3) In addition, in the semiconductor device described in (1) or (2), the first drive circuit has a first signal generation circuit and a first switch, the second drive circuit has a second signal generation circuit and a second switch, the switching circuit has a third switch, an output terminal of the first signal generation circuit is electrically connected to a first terminal of the first switch, a second terminal of the first switch is electrically connected to an output terminal of the first drive circuit, an output terminal of the second signal generation circuit is electrically connected to a first terminal of the second switch, a second terminal of the second switch is electrically connected to an output terminal of the second drive circuit, a first terminal of the third switch is electrically connected to the first terminal, and a second terminal of the third switch is electrically connected to the second terminal, the first signal generation circuit has a function of generating a first data signal, and the second signal generation circuit has a function of generating a second data signal.

[0013] (4) In the semiconductor device described above in (3), the first switch, the second switch, and the third switch are preferably analog switches.

[0014] (5) Also, there is provided a display device having the semiconductor device of any one of (1) to (4), a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to an output terminal of a first selection circuit, and the second pixel circuit is electrically connected to an output terminal of a second selection circuit.

[0015] (6) Another aspect of the present invention is a semiconductor device comprising a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit, wherein the first drive circuit has a first output terminal, the second drive circuit has a second output terminal, the first selection circuit has an input terminal and a plurality of output terminals, the second selection circuit has an input terminal and a plurality of output terminals, the switching circuit has a first terminal and a second terminal, the first output terminal is electrically connected to the input terminal and the first terminal of the first selection circuit, and the second output terminal is electrically connected to the input terminal and the second terminal of the second selection circuit, the first drive circuit has a function of generating a first data signal and a function of outputting the first data signal to the first output terminal, and the second drive circuit has a function of generating a second data signal. a first selection circuit having a function of establishing a conductive state between the input terminal of the first selection circuit and at least one of the plurality of output terminals of the first selection circuit, and a non-conductive state between the input terminal of the first selection circuit and each of the remaining plurality of output terminals of the first selection circuit; a second selection circuit having a function of establishing a conductive state between the input terminal of the second selection circuit and at least one of the plurality of output terminals of the second selection circuit, and a non-conductive state between the input terminal of the second selection circuit and each of the remaining plurality of output terminals of the second selection circuit; and a switching circuit having a function of establishing either a conductive state or a non-conductive state between the first terminal and the second terminal.

[0016] (7) Also, in the above (6), the circuit has a function of operating in a first mode, a second mode, and a third mode, and in the first mode, a conductive state is established between the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit, or between the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit, a non-conductive state is established between the input terminal of the first selection circuit and each of the remaining plurality of output terminals of the first selection circuit, and between the input terminal of the second selection circuit and each of the remaining plurality of output terminals of the second selection circuit, and a conductive state is established between the first terminal and the second terminal, and the first data is the first data signal is output via the output terminal of the first driving circuit and to any one of the plurality of output terminals of the first selection circuit or any one of the plurality of output terminals of the second selection circuit, and the second data signal is not output to the output terminal of the second driving circuit; the second mode is to establish a conductive state between the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit, or between the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit, and to establish a conductive state between the input terminal of the first selection circuit and each of the remaining plurality of output terminals of the first selection circuit, and between the input terminal of the second selection circuit and one of the remaining a third mode in which a non-conductive state is established between the remaining of the plurality of output terminals and a conductive state is established between the first terminal and the second terminal, preventing the first data signal from being output to the output terminal of the first driving circuit and outputting the second data signal via the output terminal of the second driving circuit to any one of the plurality of output terminals of the first selection circuit or any one of the plurality of output terminals of the second selection circuit; and a third mode in which a conductive state is established between the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit and preventing the input terminal of the first selection circuit from being a non-conductive state between the first terminal and the second terminal, a conductive state between the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit, a conductive state between the input terminal of the second selection circuit and one of the remaining plurality of output terminals of the second selection circuit, a non-conductive state between the first terminal and the second terminal, and a semiconductor device that outputs a first data signal via the output terminal of the first drive circuit and to any one of the plurality of output terminals of the first selection circuit, and a second data signal via the output terminal of the second drive circuit and to any one of the plurality of output terminals of the second selection circuit.

[0017] (8) In addition, in the semiconductor device of (6) or (7), the first drive circuit has a first signal generation circuit and a first switch, the second drive circuit has a second signal generation circuit and a second switch, the switching circuit has a third switch, an output terminal of the first signal generation circuit is electrically connected to a first terminal of the first switch, a second terminal of the first switch is electrically connected to an output terminal of the first drive circuit, an output terminal of the second signal generation circuit is electrically connected to a first terminal of the second switch, a second terminal of the second switch is electrically connected to an output terminal of the second drive circuit, a first terminal of the third switch is electrically connected to the first terminal, and a second terminal of the third switch is electrically connected to the second terminal, the first signal generation circuit has a function of generating a first data signal, and the second signal generation circuit has a function of generating a second data signal.

[0018] (9) In the semiconductor device described above in (8), the first switch, the second switch, and the third switch are preferably analog switches.

[0019] (10) Also, there is provided a display device having the semiconductor device of any one of (6) to (9), a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to at least one of a plurality of output terminals of a first selection circuit, and the second pixel circuit is electrically connected to at least one of a plurality of output terminals of a second selection circuit.

[0020] (11) Also, there is provided a display device having the semiconductor device of any one of (6) to (9), a first pixel circuit, and a second pixel circuit, wherein the first pixel circuit is electrically connected to all of a plurality of output terminals of a first selection circuit, and the second pixel circuit is electrically connected to all of a plurality of output terminals of a second selection circuit.

[0021] (12) An electronic device includes the display device according to (5), (10), or (11) above, and a housing.

[0022] In this specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, such as a circuit including a semiconductor element (e.g., a transistor, a diode, or a photodiode), or a device having such a circuit. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, or an electronic component that houses a chip in a package or the like are examples of semiconductor devices. Furthermore, for example, a memory device, a display device, a light-emitting device, a lighting device, or an electronic device may be a semiconductor device itself or may include a semiconductor device.

[0023] Furthermore, when it is stated in this specification that X and Y are connected, it is understood that the following cases are disclosed in this specification: when X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, a connection relationship shown in a figure or text, and it is understood that connections other than those shown in a figure or text are also disclosed in a figure or text. X and Y are each an object (e.g., a device, an element, a circuit, wiring, an electrode, a terminal, a conductive film, or a layer, etc.).

[0024] As an example of a case where X and Y are electrically connected, one or more elements (for example, a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display device, a light-emitting device, or a load) that enable the electrical connection between X and Y can be connected between X and Y. The switch has a function of controlling its on or off state. In other words, the switch has a function of being in a conductive state (on state) or a non-conductive state (off state) and controls whether or not a current flows.

[0025] As an example of a case where X and Y are functionally connected, one or more circuits that enable the functional connection between X and Y (for example, a logic circuit (for example, an inverter, a NAND circuit, or a NOR circuit), a signal conversion circuit (for example, a digital-to-analog conversion circuit, an analog-to-digital conversion circuit, or a gamma correction circuit), a potential level conversion circuit (for example, a power supply circuit (for example, a step-up circuit or a step-down circuit), or a level shifter circuit that changes the potential level of a signal), a voltage source, a current source, a switching circuit, an amplifier circuit (for example, a circuit that can increase the signal amplitude or current amount, an operational amplifier, a differential amplifier circuit, a source follower circuit, or a buffer circuit), a signal generation circuit, a memory circuit, or a control circuit) can be connected between X and Y. As an example, even if another circuit is sandwiched between X and Y, if a signal output from X is transmitted to Y, X and Y are considered to be functionally connected.

[0026] It should be noted that when it is explicitly stated that X and Y are electrically connected, this includes the case where X and Y are electrically connected (i.e., the case where X and Y are connected with another element or another circuit sandwiched between them) and the case where X and Y are directly connected (i.e., the case where X and Y are connected without another element or another circuit sandwiched between them).

[0027] Furthermore, for example, it can be expressed as follows: "X, Y, and the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Or, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as follows: "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using expressions similar to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and the technical scope can be determined. Note that these expressions are merely examples and are not limited to these. Here, X and Y are assumed to be objects (e.g., a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, or a layer, etc.).

[0028] Note that even when independent components are shown electrically connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both components, that of a wiring and that of an electrode. Therefore, the term "electrically connected" in this specification also includes such cases where one conductive film has the functions of multiple components.

[0029] Furthermore, in this specification, a "resistance element" can be, for example, a circuit element or wiring having a resistance value higher than 0Ω. Therefore, in this specification, a "resistance element" includes, for example, a wiring having a resistance value, a transistor in which a current flows between a source and a drain, a diode, or a coil. Therefore, the term "resistance element" can sometimes be rephrased as, for example, a "resistance," a "load," or a "region having a resistance value." Conversely, the terms "resistance," "load," or a "region having a resistance value" can sometimes be rephrased as, for example, a "resistance element." The resistance value can be, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and even more preferably 10 mΩ or more and 1 Ω or less. Furthermore, for example, a resistance value can be, for example, 1 Ω or more and 1×10 ９ It may be set to Ω or less.

[0030] Furthermore, in this specification and the like, a "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0 F, a region of wiring having a capacitance value higher than 0 F, a parasitic capacitance, or a gate capacitance of a transistor. Furthermore, for example, terms such as "capacitive element," "parasitic capacitance," or "gate capacitance" can sometimes be replaced with terms such as "capacitance." Conversely, the term "capacitance" can sometimes be replaced with terms such as "capacitive element," "parasitic capacitance," or "gate capacitance." Furthermore, the term "pair of electrodes" in "capacitance" can be replaced with, for example, "pair of conductors," "pair of conductive regions," or "pair of regions." The capacitance value can be, for example, 0.05 fF or more and 10 pF or less. It may also be, for example, 1 pF or more and 10 μF or less.

[0031] In this specification, a transistor has three terminals called a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as a source or a drain are input / output terminals of the transistor. One of the two input / output terminals serves as a source and the other as a drain depending on the conductivity type (n-channel or p-channel) of the transistor and the level of the potential applied to the three terminals of the transistor. Therefore, in this specification, the terms "source" and "drain" may be interchangeable. In addition, in this specification, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. Note that, depending on the structure of a transistor, a backgate may be included in addition to the three terminals described above. In this case, in this specification, one of the gate or backgate of the transistor may be referred to as a first gate, and the other of the gate or backgate of the transistor may be referred to as a second gate. Furthermore, for the same transistor, the terms "gate" and "backgate" may be interchangeable. Furthermore, when a transistor has three or more gates, in this specification and the like, the respective gates may be referred to as, for example, a first gate, a second gate, a third gate, or the like.

[0032] For example, in this specification, a transistor having a multi-gate structure with two or more gate electrodes can be used. A multi-gate transistor has channel formation regions connected in series, resulting in a structure in which multiple transistors are connected in series. Therefore, a multi-gate transistor can reduce off-state current and improve the transistor's breakdown voltage (improved reliability). Furthermore, when a multi-gate transistor operates in the saturation region, even if the voltage between the drain and source changes, the current between the drain and source does not change significantly, resulting in a voltage-current characteristic with a flat slope. A transistor having a voltage-current characteristic with a flat slope can realize an ideal current source circuit or an active load with a very high resistance value. As a result, a transistor having a voltage-current characteristic with a flat slope can realize, for example, a differential circuit or a current mirror circuit with good characteristics.

[0033] Furthermore, in this specification, when a single circuit element is illustrated on a circuit diagram, the circuit element may include multiple circuit elements. For example, when a single resistor is illustrated on a circuit diagram, the resistor is considered to include two or more resistors electrically connected in series. For example, when a single capacitor is illustrated on a circuit diagram, the capacitor is considered to include two or more capacitors electrically connected in parallel. For example, when a single transistor is illustrated on a circuit diagram, the transistor is considered to include two or more transistors electrically connected in series, with the gates of the respective transistors electrically connected to each other. Similarly, when a single switch is illustrated on a circuit diagram, the switch is considered to include two or more transistors, with the two or more transistors electrically connected in series or in parallel, and with the gates of the respective transistors electrically connected to each other.

[0034] Furthermore, in this specification and the like, a node can be rephrased as, for example, a terminal, a wiring, an electrode, a conductive layer, a conductor, or an impurity region, depending on, for example, a circuit configuration, a device structure, etc. Furthermore, for example, a terminal or a wiring can be rephrased as a node.

[0035] Furthermore, in this specification, "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be interchanged with "potential." Note that ground potential does not necessarily mean 0 V. Furthermore, potential is relative. In other words, as the reference potential changes, for example, the potential applied to wiring, the potential applied to a circuit, or the potential output from a circuit also changes.

[0036] Furthermore, in this specification and the like, the terms "high-level potential" and "low-level potential" do not mean a specific potential. For example, when two wirings are both described as "functioning as wirings that supply a high-level potential," the high-level potentials provided by both wirings do not have to be equal to each other. Similarly, when two wirings are both described as "functioning as wirings that supply a low-level potential," the low-level potentials provided by both wirings do not have to be equal to each other.

[0037] Furthermore, in this specification, "current" refers to the phenomenon of charge transfer (electrical conduction). For example, the statement "electrical conduction of positively charged bodies is occurring" can be rephrased as "electrical conduction of negatively charged bodies is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "current" refers to the phenomenon of charge transfer (electrical conduction) associated with the movement of carriers. Examples of carriers include electrons, holes, anions, cations, and complex ions. Note that carriers vary depending on the system through which the current flows (e.g., semiconductor, metal, electrolyte, vacuum, etc.). Furthermore, the "direction of current" in, for example, wiring, is the direction in which positively charged carriers move, and is expressed as a positive current amount. In other words, the direction in which negatively charged carriers move is opposite to the direction of current and is expressed as a negative current amount. Therefore, in this specification and the like, unless otherwise specified regarding the positive or negative sign (or direction) of a current, a statement such as "current flows from element A to element B" can be rephrased as "current flows from element B to element A," etc. Furthermore, a statement such as "current is input to element A" can be rephrased as "current is output from element A," etc.

[0038] Furthermore, in this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion between components. Therefore, they do not limit the number of components. Furthermore, they do not limit the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be a component referred to as "second" in another embodiment or in the claims. Furthermore, for example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0039] Furthermore, in this specification, terms indicating arrangement, such as "above" or "below," may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, terms indicating arrangement described in this specification are not limited to these terms and can be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing by 180 degrees.

[0040] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not necessarily mean that electrode B is formed on insulating layer A in direct contact with it, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0041] Furthermore, in this specification, terms such as "row" or "column" may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, terms such as "row" or "column" described in this specification are not limited to these terms and can be rephrased appropriately depending on the situation. For example, the expression "row direction" can sometimes be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.

[0042] Furthermore, in this specification and the like, terms such as "film" or "layer" may be interchangeable depending on the situation. For example, the term "conductive layer" may be interchangeable with the term "conductive film". For example, the term "insulating film" may be interchangeable with the term "insulating layer". Furthermore, terms such as "film" or "layer" may be interchangeable with other terms depending on the situation without using those terms. For example, the terms "conductive layer" or "conductive film" may be interchangeable with the term "conductor". For example, the terms "insulating layer" or "insulating film" may be interchangeable with the term "insulator".

[0043] Furthermore, in this specification and the like, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" or "wiring" include, for example, cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes, for example, cases where multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal." Furthermore, for example, a "terminal" can be part of a "wiring" or "electrode." Furthermore, for example, terms such as "electrode," "wiring," or "terminal" may be replaced with, for example, a term such as "region."

[0044] Furthermore, in this specification and the like, terms such as "wiring," "signal line," or "power line" may be interchangeable depending on the situation. For example, the term "wiring" may be changed to the term "signal line." For example, the term "wiring" may be changed to the term "power line." The reverse is also true, for example, terms such as "signal line" and "power line" may be changed to the term "wiring." The term "power line" may be changed to the term "signal line." The reverse is also true, for example, terms such as "signal line" may be changed to the term "power line." The term "potential" applied to wiring may be changed to the term "signal" depending on the situation. The reverse is also true, for example, terms such as "signal" may be changed to the term "potential."

[0045] In this specification and the like, the term "impurities" in a semiconductor refers to, for example, elements other than the main component constituting the semiconductor layer. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities in a semiconductor may result in, for example, an increase in the defect level density of the semiconductor, a decrease in carrier mobility, or a decrease in crystallinity. When the semiconductor is an oxide semiconductor, examples of impurities that change the semiconductor characteristics include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, or transition metals other than the main component. In particular, examples of impurities include hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Furthermore, when the semiconductor is a silicon layer, examples of impurities that change the semiconductor characteristics include, for example, Group 1 elements, Group 2 elements, Group 13 elements, or Group 15 elements (excluding oxygen and hydrogen).

[0046] In this specification, a switch refers to a device that can be in a conductive state (on state) or a non-conductive state (off state) and has the function of controlling whether or not a current flows. Alternatively, a switch refers to a device that has the function of selecting and switching a path through which a current flows. Therefore, a switch may have two or more terminals through which a current flows, in addition to a control terminal. As an example, an electrical switch or a mechanical switch may be used. In other words, the switch is not limited to a specific type as long as it can control a current.

[0047] Examples of electrical switches include transistors (e.g., bipolar transistors or MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, or diode-connected transistors), or logic circuits combining these. When a transistor is used as a switch, the "conductive state" of the transistor refers to, for example, a state in which the source electrode and drain electrode of the transistor can be considered to be electrically short-circuited, or a state in which current can flow between the source electrode and drain electrode. The "non-conductive state" of the transistor refers to a state in which the source electrode and drain electrode of the transistor can be considered to be electrically disconnected. When a transistor is operated simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0048] An example of a mechanical switch is a switch that uses MEMS (microelectromechanical systems) technology. This switch has an electrode that can be mechanically moved, and operates by controlling the conductive state and non-conductive state by the movement of the electrode.

[0049] In this specification and the like, a structure in which a separate light-emitting layer is formed for each color light-emitting device (here, blue (B), green (G), and red (R)), or a structure in which the light-emitting layers are painted separately, may be referred to as an SBS (Side By Side) structure. In this specification and the like, a light-emitting device that can emit white light may be referred to as a white light-emitting device. In addition, a white light-emitting device can be combined with a colored layer (e.g., a color filter) to realize a full-color display device.

[0050] Light-emitting devices can be broadly divided into single structures and tandem structures. A single-structure device has one light-emitting unit between a pair of electrodes. The light-emitting unit preferably includes one or more light-emitting layers. When two light-emitting layers are used to obtain white light emission, the light-emitting layers may be selected so that the colors of light emitted by the two light-emitting layers are complementary to each other. For example, the light-emitting device may be configured to emit white light as a whole by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other. When three or more light-emitting layers are used to obtain white light emission, the light-emitting device may be configured so that the colors of light emitted by the three or more light-emitting layers are combined to emit white light as a whole.

[0051] A device with a tandem structure has two or more light-emitting units between a pair of electrodes. Each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, a device with a tandem structure may be configured to obtain white light emission by combining the colors of light emitted by the light-emitting layers of the multiple light-emitting units. The configuration for obtaining white light emission is the same as that of a single structure. It is preferable that a device with a tandem structure has an intermediate layer, such as a charge generation layer, between the multiple light-emitting units.

[0052] Furthermore, when the above-described white light-emitting device (single structure or tandem structure) is compared with a light-emitting device having an SBS structure, the light-emitting device having an SBS structure can reduce power consumption compared to the white light-emitting device. Therefore, when it is desired to reduce power consumption, a display device according to one embodiment of the present invention is preferably provided with a light-emitting device having an SBS structure. On the other hand, the manufacturing process of a white light-emitting device is simpler than that of a light-emitting device having an SBS structure. Therefore, by preferably using a white light-emitting device, the display device according to one embodiment of the present invention can reduce manufacturing costs or increase manufacturing yields.

[0053] In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it also includes cases where the angle is -5° or more and 5° or less. Furthermore, "substantially parallel" or "roughly parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is 85° or more and 95° or less. Furthermore, "substantially perpendicular" or "approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0054] According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device having redundant driver circuits can be provided. According to one embodiment of the present invention, a semiconductor device with high yield can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a display device including any one or more of the above-described semiconductor devices can be provided. According to one embodiment of the present invention, a display device with high display quality can be provided. According to one embodiment of the present invention, an electronic device including any one of the above-described display devices can be provided.

[0055] The effects of one embodiment of the present invention are not limited to the effects listed above. The effects listed above do not preclude the existence of other effects. The other effects are described below and are not mentioned in this section. Effects not mentioned in this section can be derived by a person skilled in the art from the description in the specification or drawings, and can be extracted as appropriate from these descriptions. One embodiment of the present invention has at least one of the effects listed above and other effects. Therefore, one embodiment of the present invention may not have the effects listed above in some cases.

[0056] FIGS. 1A to 1C are diagrams illustrating a configuration example of a semiconductor device. FIGS. 2A and 2B are diagrams illustrating an operation example of a semiconductor device. FIG. 3 is a diagram illustrating an operation example of a semiconductor device. FIGS. 4A and 4B are diagrams illustrating an operation example of a semiconductor device. FIG. 5 is a diagram illustrating an operation example of a semiconductor device. FIGS. 6A and 6B are diagrams illustrating an operation example of a semiconductor device. FIGS. 7A and 7B are diagrams illustrating an operation example of a semiconductor device. FIG. 8 is a diagram illustrating a configuration example of a semiconductor device. FIG. 9 is a diagram illustrating a configuration example of a semiconductor device. FIG. 10 is a diagram illustrating a configuration example of a semiconductor device. FIG. 11 is a diagram illustrating an operation example of a semiconductor device. FIG. 12 is a diagram illustrating an operation example of a semiconductor device. FIG. 13 is a diagram illustrating an operation example of a semiconductor device. FIG. 14 is a diagram illustrating an operation example of a semiconductor device. FIG. 15 is a diagram illustrating a configuration example of a semiconductor device. FIGS. 16A to 16H are diagrams illustrating a configuration example of a display device. FIGS. 17A to 17D are diagrams illustrating a circuit configuration example of a pixel 230. FIGS. 18A to 18D are diagrams illustrating a configuration example of a light-emitting element. FIGS. 19A to 19D are diagrams illustrating a configuration example of a display device. 20A to 20D are diagrams illustrating an example of a configuration of a display device. FIGS. 21A and 21B are perspective views of a display device. FIG. 22 is a cross-sectional view illustrating an example of a display device. FIG. 23 is a cross-sectional view illustrating an example of a display device. FIG. 24 is a cross-sectional view illustrating an example of a display device. FIG. 25 is a cross-sectional view illustrating an example of a display device. FIG. 26A is a top view illustrating an example of a configuration of a transistor. FIGS. 26B and 26C are cross-sectional views illustrating an example of a transistor. FIG. 27A is a diagram illustrating classification of IGZO crystal structures. FIG. 27B is a diagram illustrating an XRD spectrum of a CAAC-IGZO film. FIG. 27C is a diagram illustrating a microelectron beam diffraction pattern of a CAAC-IGZO film. FIGS. 28A to 28F are diagrams illustrating an example of an electronic device. FIGS. 29A to 29F are diagrams illustrating an example of an electronic device. FIGS. 30A and 30B are diagrams illustrating an example of an electronic device. FIG. 31 is a diagram illustrating an example of an electronic device.

[0057] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into, for example, oxide insulators, oxide conductors (including transparent oxide conductors), and oxide semiconductors (also referred to as oxide semiconductors or simply as OSs). For example, when a channel formation region of a transistor contains a metal oxide, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide is used to form a channel formation region of a transistor having at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor. Furthermore, the term "OS transistor" can be rephrased as a transistor including a metal oxide or an oxide semiconductor.

[0058] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0059] In this specification and the like, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Furthermore, when multiple configuration examples are shown in one embodiment, these configuration examples can be appropriately combined with each other.

[0060] In addition, the content (or even a part of the content) described in one embodiment can be applied, combined, or replaced, for example, with at least one of another content (or even a part of the content) described in that embodiment and another content (or even a part of the content) described in one or more other embodiments.

[0061] The contents described in the embodiments refer to the contents described in each embodiment using various figures or the contents described using text in the specification.

[0062] Furthermore, a figure (or even a part thereof) described in one embodiment can be combined with at least one of another part of that figure, another figure (or even a part thereof) described in that embodiment, and one or more figures (or even a part thereof) described in other embodiments to form even more figures.

[0063] The embodiments described in this specification are described with reference to the drawings. However, the embodiments can be implemented in many different ways. Therefore, those skilled in the art will readily understand that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments. Note that in the configuration of the invention of the embodiments, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated description thereof may be omitted. Furthermore, for example, in perspective views, the description of some components may be omitted to ensure clarity of the drawings.

[0064] In this specification, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, an identification symbol such as "_1", "[n]", or "[m, n]" may be added to the reference numeral. Also, for example, in drawings, when an identification symbol such as "_1", "[n]", or "[m, n]" is added to the reference numeral, the identification symbol may not be added if it is not necessary to distinguish between them in this specification.

[0065] In addition, in the drawings of this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. Note that the drawings are merely schematic illustrations of ideal examples, and are not limited to, for example, the shapes or values ​​shown in the drawings. For example, variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences, may be included.

[0066] Furthermore, in this specification and the like, terms such as "electrode," "wiring," or "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" or "wiring" include, for example, cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes, for example, cases where multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal." Furthermore, for example, a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," or "terminal" may be replaced with, for example, a term such as "region."

[0067] Embodiment 1 In this embodiment, a semiconductor device of one embodiment of the present invention will be described.

[0068] 1A is a block diagram illustrating a semiconductor device of one embodiment of the present invention. A circuit 100A illustrated in FIG. 1A includes a driver circuit 111, a driver circuit 112, a switching circuit 121, a selection circuit 131A, and a selection circuit 132A. An output terminal 111-O of the driver circuit 111 is electrically connected to an input terminal 131A-I of the selection circuit 131A. An output terminal 112-O of the driver circuit 112 is electrically connected to an input terminal 132A-I of the selection circuit 132A. A first terminal 121-1 of the switching circuit 121 is electrically connected to the input terminal 131A-I of the selection circuit 131A. A second terminal 121-2 of the switching circuit 121 is electrically connected to the input terminal 132A-I of the selection circuit 132A.

[0069] The drive circuit 111 includes a signal generation circuit SG1 and a switch SW1. An output terminal of the signal generation circuit SG1 is electrically connected to a first terminal of the switch SW1. A second terminal of the switch SW1 is electrically connected to an output terminal 111-O of the drive circuit 111. A control terminal of the switch SW1 is electrically connected to an output terminal of INV0 (described later). The signal generation circuit SG1 has a function of generating a first data signal.

[0070] The drive circuit 112 includes a signal generation circuit SG2 and a switch SW2. An output terminal of the signal generation circuit SG2 is electrically connected to a first terminal of the switch SW2. A second terminal of the switch SW2 is electrically connected to an output terminal 112-O of the drive circuit 112. A control terminal of the switch SW2 is electrically connected to an output terminal of INV1, which will be described later. The signal generation circuit SG2 has a function of generating a second data signal.

[0071] The switching circuit 121 includes a switch SC1. A first terminal of the switch SC1 is electrically connected to a first terminal 121-1 of the switching circuit 121. A second terminal of the switch SC1 is electrically connected to a second terminal 121-2 of the switching circuit 121. In addition, in FIG. 1A , a control terminal of the switch SC1 is electrically connected to a terminal CHG1.

[0072] Each of the switches SW1, SW2, and SC1 may be, for example, an analog switch. Alternatively, each of the switches SW1, SW2, and SC1 may be a transistor or transistors. Each of the switches SW1, SW2, and SC1 may be a mechanical switch such as a MEMS. In this operation example, each of the switches SW1, SW2, and SC1 is an analog switch. Each of the switches SW1, SW2, and SC1 is turned on when a high-level potential is applied to its control terminal, and turned off when a low-level potential is applied to its control terminal.

[0073] Note that a semiconductor device according to one embodiment of the present invention can use transistors including various semiconductors. For example, a semiconductor device according to one embodiment of the present invention can use a transistor including a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in a channel formation region. Note that the semiconductor is not limited to a simple semiconductor whose main component is a single element (e.g., silicon (Si) or germanium (Ge)). For example, a compound semiconductor (e.g., silicon germanium (SiGe) or gallium arsenide (GaAs)), an oxide semiconductor, or the like can be used as the semiconductor.

[0074] FIG. 1B is a circuit diagram of an analog switch applicable to the switches SW1, SW2, and SC1. Each of the analog switches shown in FIG. 1B includes an n-channel transistor Trnsw, a p-channel transistor Trpsw, and an inverter INVsw. For example, by supplying a high-level potential to the terminal 143, the analog switch establishes a conductive state between the terminals 141 and 142. For example, by supplying a low-level potential to the terminal 143, the analog switch establishes a non-conductive state between the terminals 141 and 142. For example, the first terminals of the switches SW1, SW2, and SC1 correspond to the terminal 141 shown in FIG. 1B. For example, the second terminals of the switches SW1, SW2, and SC1 correspond to the terminal 142 shown in FIG. 1B. For example, the control terminals of the switches SW1, SW2, and SC1 correspond to the terminal 143 shown in FIG. 1B.

[0075] It is preferable that the values ​​of the high-level potential and the low-level potential are set so that the potential difference between the high-level potential and the low-level potential is greater than the threshold voltages of the n-channel transistor Trnsw and the p-channel transistor Trpsw.

[0076] The potential of the terminal STB0 is input to the drive circuit 111 via the inverter INV0. For example, by supplying a high-level potential to the terminal STB0, the signal generation circuit SG1 enters a standby state and the switch SW1 enters an off state. Also, for example, by supplying a low-level potential to the terminal STB0, the signal generation circuit SG1 enters an active state and the switch SW1 enters an on state.

[0077] The potential of the terminal STB1 is input to the drive circuit 112 via the inverter INV1. For example, by supplying a high-level potential to the terminal STB1, the signal generation circuit SG2 enters a standby state and the switch SW2 enters an off state. Also, for example, by supplying a low-level potential to the terminal STB1, the signal generation circuit SG2 enters an active state and the switch SW2 enters an on state.

[0078] The potential of the terminal CHG1 is input to the switching circuit 121. For example, supplying a high-level potential to the terminal CHG1 turns the switch SC1 on. Also, for example, supplying a low-level potential to the terminal CHG1 turns the switch SC1 off.

[0079] The potential of the terminal CHG1 can be a potential based on the potentials of the terminals STB0 and STB1. For example, the signal supplied to the terminal CHG1 can be a signal generated by the exclusive OR of the signal supplied to the terminal STB0 and the signal supplied to the terminal STB1. Therefore, a circuit that performs the exclusive OR operation may be provided inside or outside the circuit 100A. FIG. 1A shows an example in which the circuit XOR that performs the exclusive OR operation is provided outside the circuit 100A.

[0080] 1C is a block diagram showing an example configuration of each of the signal generation circuits SG1 and SG2. The signal generation circuits shown in FIG. 1C include a pass transistor logic circuit PTL and an amplifier AMP. The amplifier AMP includes a terminal 152 as an output terminal and a terminal 154 as a terminal for inputting a signal for controlling the operating state.

[0081] The output terminal of the pass transistor logic circuit PTL is electrically connected to the input terminal of the amplifier AMP.

[0082] The pass transistor logic circuit PTL has a function of converting, for example, a digital video data signal into an analog video data signal and outputting it to an output terminal of the pass transistor logic circuit PTL.

[0083] The amplifier AMP has a function of amplifying an analog video data signal input to an input terminal of the amplifier AMP, for example, and outputting the amplified signal to a terminal 152 .

[0084] The amplifier AMP has a function of controlling its operating state in accordance with a signal input to the terminal 154. For example, by supplying a high-level potential to the terminal 154, the amplifier AMP operates, enabling the function of outputting an analog video data signal amplified within the amplifier AMP to the terminal 152. Furthermore, by supplying a low-level potential to the terminal 154, for example, the amplifier AMP stops operating, disabling the function of outputting a signal to the terminal 152. This makes it possible to stop the steady-state current flowing through the amplifier AMP.

[0085] Note that when the driver circuits 111 and 112 are operating, each of the signal generation circuits SG1 and SG2 is in either an active state or a standby state, for example, depending on the potential input to the terminal 154. The active state refers to a state in which, for example, a high-level potential is input to the terminal 154, causing the amplifier AMP to supply an analog video data signal to the terminal 152. The standby state refers to a state in which, for example, a low-level potential is input to the terminal 154, causing the amplifier AMP to stop operating and cutting off the supply of the analog video data signal to the terminal 152.

[0086] 1A illustrates an example in which each of the selection circuits 131A and 132A includes one switch.

[0087] The selection circuit 131A includes a switch SE1. A first terminal of the switch SE1 is electrically connected to an input terminal 131A-I of the selection circuit 131A. A second terminal of the switch SE1 is electrically connected to a terminal SL1. Also, in FIG. 1A, a control terminal of the switch SE1 is electrically connected to the terminal SEL1.

[0088] The selection circuit 132A includes a switch SE2. A first terminal of the switch SE2 is electrically connected to the input terminal 132A-I of the selection circuit 132A. A second terminal of the switch SE2 is electrically connected to the terminal SL2. Also, in FIG. 1A , a control terminal of the switch SE2 is electrically connected to the terminal SEL2.

[0089] The potential of the terminal SEL1 is input to the selection circuit 131A. For example, supplying a high-level potential to the terminal SEL1 brings the input terminal 131A-I of the selection circuit 131A and the terminal SL1 into a conductive state. Also, for example, supplying a low-level potential to the terminal SEL1 brings the input terminal 131A-I of the selection circuit 131A and the terminal SL1 into a non-conductive state.

[0090] The potential of the terminal SEL2 is input to the selection circuit 132A. For example, supplying a high-level potential to the terminal SEL2 brings the input terminal 132A-I of the selection circuit 132A and the terminal SL2 into a conductive state. Also, for example, supplying a low-level potential to the terminal SEL2 brings the input terminal 132A-I of the selection circuit 132A and the terminal SL2 into a non-conductive state.

[0091] The switches SE1 and SE2 can be the same as the switches SW1, SW2, and SC1 described above.

[0092] The circuit 100A may be electrically connected to a pixel circuit. FIG. 1A shows an example in which the circuit 100A is electrically connected to a pixel circuit PX1 and a pixel circuit PX2. The pixel circuit PX1 is electrically connected to the circuit 100A via a terminal SL1. The pixel circuit PX2 is electrically connected to the circuit 100A via a terminal SL2.

[0093] <Configuration Example 1 of Operation Mode> The circuit 100A can operate by switching between a plurality of modes depending on the situation. The plurality of modes include, for example, a normal operation mode, a redundant operation mode, and a high-speed operation mode.

[0094] The normal operation mode is a mode in which a first data signal generated by the signal generation circuit SG1 is supplied to either the terminal SL1 or the terminal SL2. The redundant operation mode is a mode in which a second data signal generated by the signal generation circuit SG2 is supplied to either the terminal SL1 or the terminal SL2. The high-speed operation mode is a mode in which the first data signal generated by the signal generation circuit SG1 is supplied to the terminal SL1, and the second data signal generated by the signal generation circuit SG2 is supplied to the terminal SL2.

[0095] 1A, a logic circuit may be provided outside the circuit 100A to supply signals generated by the logic circuit to the terminals STB0 and STB1. The logic circuit preferably has a function of supplying potentials corresponding to the normal operation mode, the redundant operation mode, and the high-speed operation mode to the terminals STB0, STB1, and CHG1. The logic circuit may be switched between the normal operation mode, the redundant operation mode, and the high-speed operation mode depending on the situation by changing a setting parameter within the logic circuit.

[0096] Next, the normal operation mode, the redundant operation mode, and the high-speed operation mode will be described in detail.

[0097] [Operation Example 1 in Normal Operation Mode] Figures 2A and 2B are block diagrams for explaining the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in the normal operation mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 2A shows the driving state of circuit 100A in the first period. Figure 2B shows the driving state of circuit 100A in the second period.

[0098] In the normal operation mode, a low-level potential is supplied to the terminal STB0, and a high-level potential is supplied to the terminal STB1. This causes the switch SW1 to be in the on state, the switch SW2 to be in the off state, and the switch SC1 to be in the on state. Furthermore, when the signal generation circuit SG1 is in the active state, a first data signal is supplied to the output terminal of the signal generation circuit SG1. Furthermore, when the signal generation circuit SG2 is in the standby state, the supply of the data signal to the output terminal of the signal generation circuit SG2 is cut off.

[0099] 3 is an example of a timing chart illustrating the states of potentials supplied to the terminals SL1 and SL2 in the normal operation mode. In the timing chart of FIG. 3, the state of potentials in the first period shown in FIG. 2A is shown in period T1, and the state of potentials in the second period shown in FIG. 2B is shown in period T2. Furthermore, the states of potentials at the output terminals of the signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0100] 2A, 2B, and 3, the first data signal generated by the signal generation circuit SG1 in the first period is indicated as a data signal D1_1, and the first data signal generated by the signal generation circuit SG1 in the second period is indicated as a data signal D1_2. In addition, in Fig. 3, in the normal operation mode, the supply of data signals to the output terminal of the signal generation circuit SG2 is cut off, and therefore the potential state SG2_O at the output terminal of the signal generation circuit SG2 is indicated by a dashed line.

[0101] In the normal operation mode, a first data signal generated by the signal generating circuit SG1 is supplied to either the terminal SL1 or the terminal SL2. For example, in a first period indicated by the period T1 in FIGS. 2A and 3, a high-level potential is supplied to the terminal SEL1, and a low-level potential is supplied to the terminal SEL2. As a result, the potential of the terminal SL2 is maintained at the potential of the immediately preceding period, and a data signal D1_1 is supplied to the terminal SL1. Furthermore, in a second period indicated by the period T2 in FIGS. 2B and 3, a low-level potential is supplied to the terminal SEL1, and a high-level potential is supplied to the terminal SEL2. As a result, the potential of the terminal SL1 is maintained at the potential of the immediately preceding period, and a data signal D1_2 is supplied to the terminal SL2.

[0102] The circuit 100A in the normal operation mode can stop the operation of the amplifier AMP of the signal generation circuit SG2 by putting the signal generation circuit SG2 into a standby state. This allows the circuit 100A to stop the steady-state current of the amplifier AMP. Therefore, the power consumption of the semiconductor device of one embodiment of the present invention can be reduced.

[0103] [Operation Example 1 in Redundant Operation Mode] Figures 4A and 4B are block diagrams for explaining the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in redundant operation mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 4A shows the driving state of circuit 100A in the first period. Figure 4B shows the driving state of circuit 100A in the second period.

[0104] In the redundant operation mode, a high-level potential is supplied to the terminal STB0, and a low-level potential is supplied to the terminal STB1. This causes the switch SW1 to be turned off, the switch SW2 to be turned on, and the switch SC1 to be turned on. Furthermore, the signal generation circuit SG1 is in a standby state, which cuts off the supply of the data signal to the output terminal of the signal generation circuit SG1. Furthermore, the signal generation circuit SG2 is in an active state, which supplies the second data signal to the output terminal of the signal generation circuit SG2.

[0105] 5 is an example of a timing chart illustrating the states of potentials supplied to the terminals SL1 and SL2 in the redundant operation mode. In the timing chart of FIG. 5, the state of potentials in the first period shown in FIG. 4A is shown in period T1, and the state of potentials in the second period shown in FIG. 4B is shown in period T2. Furthermore, the states of potentials at the output terminals of the signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0106] 4A, 4B, and 5, the second data signal generated by the signal generation circuit SG2 in the first period is indicated as a data signal D2_1, and the second data signal generated by the signal generation circuit SG2 in the second period is indicated as a data signal D2_2. In addition, in Fig. 5, since the supply of the data signal to the output terminal of the signal generation circuit SG1 is cut off in the redundant operation mode, the potential state SG1_O at the output terminal of the signal generation circuit SG1 is indicated by a dashed line.

[0107] In the redundant operation mode, a second data signal generated by the signal generating circuit SG2 is supplied to either the terminal SL1 or the terminal SL2. For example, in a first period indicated by the period T1 in FIGS. 4A and 5, a high-level potential is supplied to the terminal SEL1, and a low-level potential is supplied to the terminal SEL2. As a result, the potential of the terminal SL2 is maintained at the potential of the immediately preceding period, and a data signal D2_1 is supplied to the terminal SL1. Also, in a second period indicated by the period T2 in FIGS. 4B and 5, a low-level potential is supplied to the terminal SEL1, and a high-level potential is supplied to the terminal SEL2. As a result, the potential of the terminal SL1 is maintained at the potential of the immediately preceding period, and a data signal D2_2 is supplied to the terminal SL2.

[0108] The circuit 100A in the redundant operation mode can provide redundancy to the circuit 100A. That is, the circuit 100A can be switched to the redundant operation mode when, for example, a characteristic defect or a process defect occurs in some circuit elements of the circuit 100A and the signal generation circuit SG1 is unable to properly output the first data signal in the normal operation mode. This allows the circuit 100A to use the second data signal generated by the signal generation circuit SG2. This improves the reliability of the circuit 100A. Therefore, the semiconductor device of one embodiment of the present invention can improve the yield in manufacturing the circuit 100A.

[0109] In the present embodiment, the normal mode is shown in Fig. 2A, Fig. 2B, and Fig. 3, and the redundant mode is shown in Fig. 4A, Fig. 4B, and Fig. 5. However, the present invention is not limited to this. In one aspect of the present invention, the redundant mode may be shown in Fig. 2A, Fig. 2B, and Fig. 3, and the normal mode may be shown in Fig. 4A, Fig. 4B, and Fig. 5.

[0110] [Operation Example 1 in High-Speed ​​Operation Mode] Figures 6A and 6B are block diagrams illustrating the states of switches SW1, SW2, and SC1, the states of switches SE1 and SE2, and the flow of data signals generated by the signal generation circuit in the high-speed operation mode. The flow of data signals is indicated by dashed arrows. In particular, Figure 6A illustrates the driving state of circuit 100A in the first period. Figure 6B illustrates the driving state of circuit 100A in the second period.

[0111] In the high-speed operating mode, a low-level potential is supplied to each of the terminals STB0 and STB1. This causes the switch SW1 to be turned on, the switch SW2 to be turned on, and the switch SC1 to be turned off. Furthermore, when the signal generating circuit SG1 is activated, a first data signal is supplied to the output terminal of the signal generating circuit SG1. Furthermore, when the signal generating circuit SG2 is activated, a second data signal is supplied to the output terminal of the signal generating circuit SG2.

[0112] 7A is an example of a timing chart illustrating the states of potentials supplied to the terminals SL1 and SL2 in the high-speed operation mode. In the timing chart of FIG. 7A, the state of potentials in the first period shown in FIG. 6A is shown in period T1, and the state of potentials in the second period shown in FIG. 6B is shown in period T2. Furthermore, the states of potentials at the output terminals of the signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0113] 6A, 6B, and 7A, the first data signal generated by the signal generation circuit SG1 in the first period is indicated as a data signal D1_1, the second data signal generated by the signal generation circuit SG2 is indicated as a data signal D2_1, and the first data signal generated by the signal generation circuit SG1 in the second period is indicated as a data signal D1_2, and the second data signal generated by the signal generation circuit SG2 is indicated as a data signal D2_2.

[0114] In the high-speed operation mode, a first data signal generated by the signal generation circuit SG1 is supplied to the terminal SL1, and a second data signal generated by the signal generation circuit SG2 is supplied to the terminal SL2. For example, during a first period indicated by a period T1 in FIGS. 6A and 7A, a high-level potential is supplied to the terminals SEL1 and SEL2. As a result, a data signal D1_1 is supplied to the terminal SL1, and a data signal D2_1 is supplied to the terminal SL2. Furthermore, during a second period indicated by a period T2 in FIGS. 6B and 7A, a high-level potential is supplied to the terminals SEL1 and SEL2. As a result, a data signal D1_2 is supplied to the terminal SL1, and a data signal D2_2 is supplied to the terminal SL2.

[0115] The circuit 100A in the high-speed operation mode can supply different data signals to the terminal SL1 and the terminal SL2 at the same time. Therefore, the circuit 100A in the high-speed operation mode can supply data signals at a higher speed than in the normal operation mode. Therefore, a display device using the circuit 100A in the high-speed operation mode can improve the frame rate. That is, a display device using the semiconductor device of one embodiment of the present invention can improve circuit performance. As a result, a display device using the semiconductor device of one embodiment of the present invention can improve display quality.

[0116] [Example of Operation in the High-Performance Write Mode] The circuit 100A can also operate in the high-performance write mode, which is a variation of the high-speed operation mode. The timing charts for the circuit 100A are different between the high-performance write mode and the high-speed operation mode. The states of the switches and the flow of data signals in the circuit 100A are the same as those in the high-speed operation mode, so the above description of the high-speed operation mode can be used as appropriate.

[0117] 7B is an example of a timing chart illustrating the states of potentials supplied to terminals SL1 and SL2 in the write rate improvement mode. In the timing chart of FIG. 7B, the state of potentials in the first period is shown in period T1, and the state of potentials in the second period is shown in period T2. Furthermore, the states of potentials at the output terminals of signal generation circuits SG1 and SG2 are shown as SG1_O and SG2_O, respectively.

[0118] In the write rate improvement mode, for example, in the first period (period T1) and the second period (period T2) of Figure 7B, a high-level potential is supplied to the terminal SEL1, and a high-level potential is supplied to the terminal SEL2. As a result, a data signal D1_1 is supplied to the terminal SL1, and a data signal D2_1 is supplied to the terminal SL2. Note that in the write rate improvement mode described above, the states of the switches and the flow of the data signals in the circuit 100A during the periods T1 and T2 correspond to those shown in Figure 6A.

[0119] The circuit 100A in the write-rate improvement mode can supply a data signal over both the period T1 and the period T2. Therefore, the circuit 100A in the write-rate improvement mode can have a longer data signal writing period than the normal operation mode. Therefore, a display device using the circuit 100A in the write-rate improvement mode can improve the data signal writing rate. That is, a display device using the semiconductor device of one embodiment of the present invention can improve circuit performance. As a result, a display device using the semiconductor device of one embodiment of the present invention can improve display quality.

[0120] <Modification 1> Note that the semiconductor device of one embodiment of the present invention is not limited to the configuration example illustrated in the block diagram in Fig. 1A. The semiconductor device of one embodiment of the present invention may be modified as appropriate within the scope of solving the problems.

[0121] 1A illustrates a configuration in which the circuit 100A includes the driver circuit 111, the driver circuit 112, the switching circuit 121, the selection circuit 131A, and the selection circuit 132A, but is not limited to this. The semiconductor device of one embodiment of the present invention may include three or more driver circuits, two or more switching circuits, and three or more selection circuits.

[0122] 8 is a block diagram showing an example of a semiconductor device of one embodiment of the present invention. A circuit 100B shown in FIG. 8 includes driver circuits 111 to 113, switching circuits 121 and 122, and selection circuits 131A to 133A. The output terminal 111-O of the driver circuit 111 is electrically connected to an input terminal 131A-I of the selection circuit 131A. The output terminal 112-O of the driver circuit 112 is electrically connected to an input terminal 132A-I of the selection circuit 132A. The output terminal 113-O of the driver circuit 113 is electrically connected to an input terminal 133A-I of the selection circuit 133A. The first terminal 121-1 of the switching circuit 121 is electrically connected to the input terminal 131A-I of the selection circuit 131A. The second terminal 121-2 of the switching circuit 121 is electrically connected to the input terminal 132A-I of the selection circuit 132A. A first terminal 122-1 of the switching circuit 122 is electrically connected to an input terminal 132A-I of the selection circuit 132A. A second terminal 122-2 of the switching circuit 122 is electrically connected to an input terminal 133A-I of the selection circuit 133A.

[0123] The configuration of the drive circuit 113 can be the same as the configurations of the drive circuits 111 and 112 described in Fig. 1A. The configuration of the switching circuit 122 can be the same as the configuration of the switching circuit 121 described in Fig. 1A. The configuration of the selection circuit 133A can be the same as the configurations of the selection circuit 131A and 132A described in Fig. 1A.

[0124] The configuration of the circuit 100B shown in FIG. 8 can further reduce power consumption compared to the circuit 100A shown in FIG. 1A. Furthermore, the configuration of the circuit 100B can have more redundancy than the circuit 100A. Therefore, the semiconductor device of one embodiment of the present invention can improve the yield in manufacturing the circuit 100B by the configuration of the circuit 100B. Furthermore, the display device using the semiconductor device of one embodiment of the present invention can improve circuit performance, such as an improved frame rate or an improved writing rate, by the configuration of the circuit 100B. Thus, the display device using the semiconductor device of one embodiment of the present invention can improve display quality.

[0125] 1A, each of the selection circuits 131A and 132A includes one switch. However, this is not limiting. Here, a configuration example of a circuit 100C will be described in which the selection circuit includes multiple switches.

[0126] 9 is a block diagram showing an example configuration of a circuit 100C. The circuit 100C shown in FIG. 9 includes a drive circuit 111, a drive circuit 112, a switching circuit 121, a selection circuit 131C, and a selection circuit 132C. The output terminal 111-O of the drive circuit 111 is electrically connected to the input terminal 131C-I of the selection circuit 131C. The output terminal 112-O of the drive circuit 112 is electrically connected to the input terminal 132C-I of the selection circuit 132C. The first terminal 121-1 of the switching circuit 121 is electrically connected to the input terminal 131C-I of the selection circuit 131C. The second terminal 121-2 of the switching circuit 121 is electrically connected to the input terminal 132C-I of the selection circuit 132C.

[0127] Note that, as an example, the case where each of the selection circuits 131C and 132C includes six switches will be described here. However, the number of switches is not limited to six and may be an integer of two or more. For example, the number of switches may be determined depending on the resolution of a display device using the semiconductor device of one embodiment of the present invention. Specifically, the number of switches is preferably a number that is divisible by the resolution of the display device divided by the number of switches. The number of switches included in the selection circuits 131C and 132C may be the same or different.

[0128] The selection circuit 131C includes switches SE1_1 to SE1_6. First terminals of the switches SE1_1 to SE1_6 are electrically connected to an input terminal 131C-I of the selection circuit 131C. Second terminals of the switches SE1_1 to SE1_6 are electrically connected to terminals SL_1 to SL_6, respectively.

[0129] The selection circuit 132C includes switches SE2_1 to SE2_6. First terminals of the switches SE2_1 to SE2_6 are electrically connected to an input terminal 132C-I of the selection circuit 132C. Second terminals of the switches SE2_1 to SE2_6 are electrically connected to terminals SL_7 to SL_12, respectively.

[0130] For example, the selection circuit 131C has a function of turning on at least one of the switches SE1_1 to SE1_6 and turning off the remaining switches. Specifically, for example, a demultiplexer circuit can be used as the selection circuit 131C.

[0131] For example, the selection circuit 132C has a function of turning on at least one of the switches SE2_1 to SE2_6 and turning off the remaining switches. Specifically, for example, a demultiplexer circuit can be applied to the selection circuit 132C.

[0132] The switches SE1_1 to SE1_6 and the switches SE2_1 to SE2_6 can be the same as the switches SW1, SW2, and SC1 described above.

[0133] The circuit 100C may be electrically connected to a pixel circuit. Figure 9 shows an example in which the circuit 100C is electrically connected to pixel circuits PX_1 to PX_6. The pixel circuits PX_1 to PX_6 are electrically connected to the circuit 100C through the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12, respectively.

[0134] 9 illustrates an example in which the terminals SL_2, SL_4, SL_6, SL_7, SL_9, and SL_11 are not connected to the pixel circuit, but this is not limiting. In one embodiment of the present invention, the terminals SL_2, SL_4, SL_6, SL_7, SL_9, and SL_11 may be connected to the pixel circuit.

[0135] 10 is a block diagram illustrating a semiconductor device of one embodiment of the present invention. In FIG. 10, an example is shown in which a circuit 100C is electrically connected to pixel circuits PX_1 to PX_12. The pixel circuits PX_1 to PX_12 are electrically connected to the circuit 100C through terminals SL_1 to SL_12, respectively.

[0136] 9 and 10 , in one embodiment of the present invention, the number of pixel circuits connected to the circuit 100C is not limited. Therefore, in one embodiment of the present invention, the number of pixel circuits connected to the circuit 100C can be increased or decreased depending on the resolution of the display device without changing the configuration of the circuit 100C. In this case, the circuit 100C can be operated in a high-resolution mode, which will be described later.

[0137] 9 and 10, in order to control the operation mode of the circuit 100C, for example, inverters INV0, INV1, and a circuit XOR may be provided outside the circuit 100C, similar to the circuit 100A in Fig. 1A. For example, the connection configuration of the inverters INV0, INV1, and the circuit XOR may refer to the description of the circuit 100A in Fig. 1A.

[0138] <Configuration Example 2 of Operation Mode> The circuit 100C can operate by switching between a plurality of modes depending on the situation. The plurality of modes include, for example, a normal operation mode, a redundant operation mode, a high-speed operation mode, and a high-resolution mode.

[0139] 9, the normal operation mode is a mode in which the first data signal generated by the signal generation circuit SG1 is supplied to any one of terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. The redundant operation mode is a mode in which the second data signal generated by the signal generation circuit SG2 is supplied to any one of terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. The high-speed operation mode is a mode in which the first data signal generated by the signal generation circuit SG1 is supplied to any one of terminals SL_1, SL_3, and SL_5, and the second data signal generated by the signal generation circuit SG2 is supplied to any one of terminals SL_8, SL_10, and SL_12. The high resolution mode is a mode in which, in Figure 10, the first data signal generated by the signal generation circuit SG1 is supplied to any one of the terminals SL_1 to SL_6, and the second data signal generated by the signal generation circuit SG2 is supplied to any one of the terminals SL_7 to SL_12.

[0140] Next, the normal operation mode, redundant operation mode, high-speed operation mode, and high-resolution mode will be described in detail.

[0141] [Operation Example 2 of Normal Operation Mode] In the normal operation mode, a low-level potential is supplied to the terminal STB0, and a high-level potential is supplied to the terminal STB1. This causes the switch SW1 to be in the on state, the switch SW2 to be in the off state, and the switch SC1 to be in the on state. Furthermore, the signal generation circuit SG1 is in the active state, and a first data signal is supplied to the output terminal of the signal generation circuit SG1. Furthermore, the signal generation circuit SG2 is in the standby state, and the supply of the data signal to the output terminal of the signal generation circuit SG2 is cut off.

[0142] 11 is an example of a timing chart illustrating states of potentials supplied to the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in the normal operation mode. Note that the timing chart in FIG. 11 illustrates states of potentials in the first to sixth periods in periods T1 to T6, respectively. Furthermore, SG1_O and SG2_O illustrate states of potentials at the output terminals of the signal generation circuits SG1 and SG2, respectively.

[0143] 11, the first data signals generated by the signal generation circuit SG1 in the first to sixth periods are indicated as data signals D1_1 to D1_6, respectively. In the normal operation mode, the supply of data signals to the output terminal of the signal generation circuit SG2 is cut off, and therefore the potential state SG2_O at the output terminal of the signal generation circuit SG2 is indicated by a dashed line.

[0144] In the normal operation mode, a first data signal generated by the signal generation circuit SG1 is sequentially supplied to one of the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. For example, in FIG. 11 , during a period T1, the selection circuit 131C selects the terminal SL_1, and thus a data signal D1_1 is supplied to the terminal SL_1. During a period T2, the selection circuit 132C selects the terminal SL_8, and thus a data signal D1_2 is supplied to the terminal SL_8. During a period T3, the selection circuit 131C selects the terminal SL_3, and thus a data signal D1_3 is supplied to the terminal SL_3. During a period T4, the selection circuit 132C selects the terminal SL_10, and thus a data signal D1_4 is supplied to the terminal SL_10. In the period T5, the selection circuit 131C selects the terminal SL_5, and thus the data signal D1_5 is supplied to the terminal SL_5. In the period T6, the selection circuit 132C selects the terminal SL_12, and thus the data signal D1_6 is supplied to the terminal SL_12. Note that in the normal operation mode described above, in each of the periods T1 to T6, the potentials of terminals other than the terminal selected by the selection circuit 131C are maintained at the potentials of the immediately preceding period.

[0145] In the circuit 100C in the normal operation mode, the signal generation circuit SG2 is put into a standby state, so that the operation of the amplifier AMP of the signal generation circuit SG2 can be stopped. Therefore, the power consumption of the semiconductor device of one embodiment of the present invention can be reduced.

[0146] [Operation Example 2 in Redundant Operation Mode] In the redundant operation mode, a high-level potential is supplied to the terminal STB0, and a low-level potential is supplied to the terminal STB1. This causes the switch SW1 to be in the off state, the switch SW2 to be in the on state, and the switch SC1 to be in the on state. Furthermore, the signal generation circuit SG1 is in the standby state, which blocks the supply of the data signal to the output terminal of the signal generation circuit SG1. Furthermore, the signal generation circuit SG2 is in the active state, which causes the second data signal to be supplied to the output terminal of the signal generation circuit SG2.

[0147] 12 is an example of a timing chart illustrating states of potentials supplied to the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in the redundant operation mode. Note that the timing chart in FIG. 12 illustrates states of potentials in the first to sixth periods in periods T1 to T6, respectively. Furthermore, SG1_O and SG2_O illustrate states of potentials at the output terminals of the signal generation circuits SG1 and SG2, respectively.

[0148] 12, the second data signals generated by the signal generation circuit SG2 in the first to sixth periods are indicated as data signals D2_1 to D2_6, respectively. In the redundant operation mode, the supply of data signals to the output terminal of the signal generation circuit SG1 is cut off, and therefore the potential state SG1_O at the output terminal of the signal generation circuit SG1 is indicated by a dashed line.

[0149] In the redundant operation mode, the second data signal generated by the signal generation circuit SG2 is sequentially supplied to one of the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12. For example, in FIG. 12, during the period T1, the selection circuit 131C selects the terminal SL_1, and thus the data signal D2_1 is supplied to the terminal SL_1. During the period T2, the selection circuit 132C selects the terminal SL_8, and thus the data signal D2_2 is supplied to the terminal SL_8. During the period T3, the selection circuit 131C selects the terminal SL_3, and thus the data signal D2_3 is supplied to the terminal SL_3. During the period T4, the selection circuit 132C selects the terminal SL_10, and thus the data signal D2_4 is supplied to the terminal SL_10. In the period T5, the selection circuit 131C selects the terminal SL_5, and thus a data signal D2_5 is supplied to the terminal SL_5. In the period T6, the selection circuit 132C selects the terminal SL_12, and thus a data signal D2_6 is supplied to the terminal SL_12. Note that in the redundant operation mode described above, in each of the periods T1 to T6, the potentials of terminals other than the terminal selected by the selection circuit 131C are maintained at the potentials of the immediately preceding period.

[0150] The circuit 100C in the redundant operation mode can provide redundancy to the circuit 100C. That is, the circuit 100C can be switched to the redundant operation mode when, for example, a characteristic defect or a process defect occurs in some circuit elements of the circuit 100A and the signal generation circuit SG1 is unable to properly output the first data signal in the normal operation mode. This allows the circuit 100C to use the second data signal generated by the signal generation circuit SG2. Therefore, the semiconductor device of one embodiment of the present invention can improve the yield in manufacturing the circuit 100C.

[0151] Note that although the present embodiment has been described assuming that the normal mode is shown in Fig. 11 and the redundant mode is shown in Fig. 12, the present invention is not limited to this. In one embodiment of the present invention, the redundant mode may be shown in Fig. 11 and the normal mode may be shown in Fig. 12.

[0152] [Operation Example 2 in High-Speed ​​Operation Mode] In the high-speed operation mode, a low-level potential is supplied to each of the terminals STB0 and STB1. This causes the switch SW1 to be turned on, the switch SW2 to be turned on, and the switch SC1 to be turned off. Furthermore, the signal generation circuit SG1 is activated, and a first data signal is supplied to the output terminal of the signal generation circuit SG1. Furthermore, the signal generation circuit SG2 is activated, and a second data signal is supplied to the output terminal of the signal generation circuit SG2.

[0153] 13 is an example of a timing chart illustrating states of potentials supplied to the terminals SL_1, SL_3, SL_5, SL_8, SL_10, and SL_12 in the high-speed operation mode. Note that the timing chart in FIG. 13 illustrates states of potentials in the first to sixth periods in periods T1 to T6, respectively. Furthermore, SG1_O and SG2_O illustrate states of potentials at the output terminals of the signal generation circuits SG1 and SG2, respectively.

[0154] In Figure 13, in each of the first to sixth periods, the first data signals generated by the signal generation circuit SG1 are shown as data signals D1_1 to D1_6, respectively, and the second data signals generated by the signal generation circuit SG2 are shown as data signals D2_1 to D2_6, respectively.

[0155] In the high-speed operation mode, a first data signal generated by the signal generation circuit SG1 is supplied to one of the terminals SL_1, SL_3, and SL_5, and a second data signal generated by the signal generation circuit SG2 is supplied to one of the terminals SL_8, SL_10, and SL_12. For example, in FIG. 13 , during a period T1, the selection circuit 131C selects the terminal SL_1, so that a data signal D1_1 is supplied to the terminal SL_1, and the selection circuit 132C selects the terminal SL_8, so that a data signal D2_1 is supplied to the terminal SL_8. During a period T2, the selection circuit 131C selects the terminal SL_3, so that a data signal D1_2 is supplied to the terminal SL_3, and the selection circuit 132C selects the terminal SL_10, so that a data signal D2_2 is supplied to the terminal SL_10. In a period T3, the selection circuit 131C selects the terminal SL_5, so that the data signal D1_3 is supplied to the terminal SL_5, and the selection circuit 132C selects the terminal SL_12, so that the data signal D2_3 is supplied to the terminal SL_12. In a period T4, the selection circuit 131C selects the terminal SL_1, so that the data signal D1_4 is supplied to the terminal SL_1, and the selection circuit 132C selects the terminal SL_8, so that the data signal D2_4 is supplied to the terminal SL_8. In a period T5, the selection circuit 131C selects the terminal SL_3, so that the data signal D1_5 is supplied to the terminal SL_3, and the selection circuit 132C selects the terminal SL_10, so that the data signal D2_5 is supplied to the terminal SL_10. In the period T6, the selection circuit 131C selects the terminal SL_5, so that the data signal D1_6 is supplied to the terminal SL_5, and the selection circuit 132C selects the terminal SL_12, so that the data signal D2_6 is supplied to the terminal SL_12. Note that in the high-speed operation mode described above, in each of the periods T1 to T6, the potentials of terminals other than the terminal selected by the selection circuit 131C are maintained at the potentials of the immediately preceding period.

[0156] The circuit 100C in the high-speed operation mode can simultaneously supply different data signals to the terminals SL_1 and SL_8, can simultaneously supply different data signals to the terminals SL_3 and SL_10, and can simultaneously supply different data signals to the terminals SL_5 and SL_12. That is, the circuit 100C in the high-speed operation mode can simultaneously supply data signals to the same number of terminals as in the normal operation mode in half the period of the normal operation mode. Therefore, a display device using the semiconductor device of one embodiment of the present invention can improve circuit performance, such as an improved frame rate or a higher writing rate. This allows the display device using the semiconductor device of one embodiment of the present invention to have improved display quality.

[0157] [Example of High-Resolution Mode Operation] In the high-resolution mode, a low-level potential is supplied to each of the terminals STB0 and STB1. This causes the switch SW1 to be turned on, the switch SW2 to be turned on, and the switch SC1 to be turned off. Furthermore, when the signal generation circuit SG1 is activated, a first data signal is supplied to the output terminal of the signal generation circuit SG1. Furthermore, when the signal generation circuit SG2 is activated, a second data signal is supplied to the output terminal of the signal generation circuit SG2.

[0158] 14 is an example of a timing chart illustrating the states of potentials supplied to the terminals SL_1 to SL_12 in the high-resolution mode. Note that the timing chart in FIG. 14 shows the states of potentials in the first to sixth periods in periods T1 to T6, respectively. Furthermore, SG1_O and SG2_O show the states of potentials of the output terminals of the signal generation circuits SG1 and SG2, respectively.

[0159] In Figure 14, in each of the first to sixth periods, the first data signals generated by the signal generation circuit SG1 are shown as data signals D1_1 to D1_6, respectively, and the second data signals generated by the signal generation circuit SG2 are shown as data signals D2_1 to D2_6, respectively.

[0160] In the high-resolution mode, a first data signal generated by the signal generation circuit SG1 is supplied to one of the terminals SL_1 to SL_6, and a second data signal generated by the signal generation circuit SG2 is supplied to one of the terminals SL_7 to SL_12. For example, in FIG. 14 , during a period T1, the selection circuit 131C selects the terminal SL_1, thereby supplying a data signal D1_1 to the terminal SL_1, and the selection circuit 132C selects the terminal SL_7, thereby supplying a data signal D2_1 to the terminal SL_7. During a period T2, the selection circuit 131C selects the terminal SL_2, thereby supplying a data signal D1_2 to the terminal SL_2, and the selection circuit 132C selects the terminal SL_8, thereby supplying a data signal D2_2 to the terminal SL_8. In a period T3, the selection circuit 131C selects the terminal SL_3, so that the data signal D1_3 is supplied to the terminal SL_3, and the selection circuit 132C selects the terminal SL_9, so that the data signal D2_3 is supplied to the terminal SL_9. In a period T4, the selection circuit 131C selects the terminal SL_4, so that the data signal D1_4 is supplied to the terminal SL_4, and the selection circuit 132C selects the terminal SL_10, so that the data signal D2_4 is supplied to the terminal SL_10. In a period T5, the selection circuit 131C selects the terminal SL_5, so that the data signal D1_5 is supplied to the terminal SL_5, and the selection circuit 132C selects the terminal SL_11, so that the data signal D2_5 is supplied to the terminal SL_11. In the period T6, the selection circuit 131C selects the terminal SL_6, so that the data signal D1_6 is supplied to the terminal SL_6, and the selection circuit 132C selects the terminal SL_12, so that the data signal D2_6 is supplied to the terminal SL_12. Note that in the high-resolution mode described above, in each of the periods T1 to T6, the potentials of terminals other than the terminal selected by the selection circuit 131C are maintained at the potentials of the immediately preceding period.

[0161] In the circuit 100C in the high-resolution mode, different data signals can be supplied to the terminals SL_1 and SL_7 at the same time, different data signals can be supplied to the terminals SL_2 and SL_8 at the same time, different data signals can be supplied to the terminals SL_3 and SL_9 at the same time, different data signals can be supplied to the terminals SL_4 and SL_10 at the same time, different data signals can be supplied to the terminals SL_5 and SL_11 at the same time, and different data signals can be supplied to the terminals SL_6 and SL_12 at the same time. That is, the circuit 100C in the high-resolution mode can supply data signals to twice as many terminals as in the normal operation mode during the same period as in the normal operation mode. Therefore, a display device using the semiconductor device of one embodiment of the present invention can drive a display device with 8K resolution in the high-resolution mode, for example, if it can drive a display device with 4K resolution in the normal operation mode. Therefore, a display device using the semiconductor device of one embodiment of the present invention can have improved display quality.

[0162] <Modification 2> Note that the semiconductor device of one embodiment of the present invention is not limited to the configuration examples shown in the block diagrams of Figures 9 and 10. The semiconductor device of one embodiment of the present invention may be modified as appropriate within the scope of solving the problems.

[0163] 15 is a block diagram showing an example of a semiconductor device of one embodiment of the present invention. As an example, a circuit 100D shown in FIG. 15 is a circuit for supplying video data signals to red, green, and blue pixel circuits, and a circuit 100C is provided for each color. For example, the circuit 100D includes a driver circuit 111R, a driver circuit 112R, a switching circuit 121R, a selection circuit 131R, and a selection circuit 132R as circuits for supplying red video data signals. An output terminal of the driver circuit 111R is electrically connected to an input terminal of the selection circuit 131R. An output terminal of the driver circuit 112R is electrically connected to an input terminal of the selection circuit 132R. A first terminal of the switching circuit 121R is electrically connected to an input terminal of the selection circuit 131R. A second terminal of the switching circuit 121R is electrically connected to an input terminal of the selection circuit 132R. For example, the circuit 100D includes a driver circuit 111G, a driver circuit 112G, a switching circuit 121G, a selection circuit 131G, and a selection circuit 132G as circuits related to the supply of a green video data signal. The output terminal of the driver circuit 111G is electrically connected to the input terminal of the selection circuit 131G. The output terminal of the driver circuit 112G is electrically connected to the input terminal of the selection circuit 132G. The first terminal of the switching circuit 121G is electrically connected to the input terminal of the selection circuit 131G. The second terminal of the switching circuit 121G is electrically connected to the input terminal of the selection circuit 132G. For example, the circuit 100D includes a driver circuit 111B, a driver circuit 112B, a switching circuit 121B, a selection circuit 131B, and a selection circuit 132B as circuits related to the supply of a blue video data signal. The output terminal of the driver circuit 111B is electrically connected to the input terminal of the selection circuit 131B. An output terminal of the drive circuit 112B is electrically connected to an input terminal of the selection circuit 132B. A first terminal of the switching circuit 121B is electrically connected to an input terminal of the selection circuit 131B. A second terminal of the switching circuit 121B is electrically connected to an input terminal of the selection circuit 132B.

[0164] Note that the pixel circuits may be provided outside the circuit 100D. FIG. 15 shows an example in which pixel circuits PX_1R to PX_6R, pixel circuits PX_1G to PX_6G, and pixel circuits PX_1B to PX_6B are provided outside the circuit 100D. The pixel circuits PX_1R to PX_6R are, for example, pixel circuits that emit red light. The pixel circuits PX_1G to PX_6G are, for example, pixel circuits that emit green light, and the pixel circuits PX_1B to PX_6B are, for example, pixel circuits that emit blue light. Each of the pixel circuits PX_1R to PX_3R is electrically connected to one of a plurality of output terminals of the selection circuit 131R. Each of the pixel circuits PX_4R to PX_6R is electrically connected to one of a plurality of output terminals of the selection circuit 132R. Each of the pixel circuits PX_1G to PX_3G is electrically connected to one of a plurality of output terminals of the selection circuit 131G. Each of the pixel circuits PX_4G to PX_6G is electrically connected to one of a plurality of output terminals of the selection circuit 132G. Each of the pixel circuits PX_1B to PX_3B is electrically connected to one of a plurality of output terminals of the selection circuit 131B. Each of the pixel circuits PX_4B to PX_6B is electrically connected to one of a plurality of output terminals of the selection circuit 132B.

[0165] 15 can be regarded as a circuit 100D having the structure of the circuit 100C shown in FIG. 9 being provided for each of the red, green, and blue pixel circuits. That is, gamma correction can be performed for each of the red, green, and blue data signals. Therefore, a display device using the semiconductor device of one embodiment of the present invention can have improved display quality.

[0166] Although the circuit 100D in FIG. 15 has a circuit configuration in which video data signals are supplied to pixel circuits of three colors, i.e., red, green, and blue, one embodiment of the present invention is not limited thereto. The number of colors of the pixel circuits may be, for example, two or four or more. In one embodiment of the present invention, even when the number of colors of the pixel circuits is two or four or more, a circuit 100C may be provided in the circuit 100D for each pixel circuit of each color. Furthermore, although the circuit 100D in FIG. 15 has a circuit configuration in which video data signals are supplied to pixel circuits of three colors, i.e., red, green, and blue, one embodiment of the present invention is not limited thereto. In one embodiment of the present invention, the circuit 100D may have a circuit configuration in which video data signals are supplied to pixel circuits of three colors, i.e., magenta, cyan, and yellow. Furthermore, in one embodiment of the present invention, the circuit 100D may be configured to correspond to one or more pixel circuits selected from red, green, blue, magenta, cyan, and yellow.

[0167] Embodiment 2 In this embodiment, a configuration example of a display device 10 using a semiconductor device of one embodiment of the present invention will be described. FIG. 16A is a block diagram illustrating the display device 10. The display device 10 includes a display region 235, a first driver circuit portion 231, and a second driver circuit portion 232. The display region 235 includes a plurality of pixels 230 arranged in a matrix. The semiconductor device of one embodiment of the present invention described in Embodiment 1 can be used for the second driver circuit portion 232. Alternatively, the semiconductor device of one embodiment of the present invention described in Embodiment 1 can be used for either or both of the first driver circuit portion 231 and the second driver circuit portion 232. For example, a plurality of circuits 100D illustrated in FIG. 15 can be used for the second driver circuit portion 232 illustrated in FIG. 16A.

[0168] The circuit included in the first drive circuit unit 231 functions as, for example, a scanning line drive circuit. The circuit included in the second drive circuit unit 232 functions as, for example, a signal line drive circuit. Note that the display device 10 may have some circuitry located opposite the first drive circuit unit 231 across the display area 235. Note that the display device 10 may have some circuitry located opposite the second drive circuit unit 232 across the display area 235. Note that in this specification and the like, the circuits included in the first drive circuit unit 231 and the second drive circuit unit 232 may be collectively referred to as a "peripheral drive circuit."

[0169] The peripheral driver circuit can be, for example, a shift register, a level shifter, an inverter, a latch, an analog switch, a logic circuit, or any of various other circuits. The peripheral driver circuit can be, for example, a transistor, a capacitor, or the like.

[0170] For example, the display device 10 may use OS transistors as transistors constituting the pixel 230 and Si transistors (transistors containing silicon in a semiconductor layer in which a channel is formed) as transistors constituting the peripheral driver circuit. OS transistors have low off-state current, which allows for reduced power consumption. Si transistors have faster operating speeds than OS transistors, which makes them suitable for use in the peripheral driver circuit. The display device 10 may use OS transistors as both the transistors constituting the pixel 230 and the transistors constituting the peripheral driver circuit. The display device 10 may use Si transistors as both the transistors constituting the pixel 230 and the transistors constituting the peripheral driver circuit. The display device 10 may use Si transistors as transistors constituting the pixel 230 and the transistors constituting the peripheral driver circuit.

[0171] Both Si transistors and OS transistors may be used as transistors forming the pixel 230. Both Si transistors and OS transistors may be used as transistors forming the peripheral driver circuits.

[0172] In the display device of one embodiment of the present invention, examples of materials used for the Si transistor include single crystal silicon, polycrystalline silicon, and amorphous silicon. Furthermore, the display device of one embodiment of the present invention can include a transistor including low temperature polysilicon (LTPS) in a semiconductor layer (hereinafter also referred to as an LTPS transistor). The LTPS transistor has high field-effect mobility and favorable frequency characteristics.

[0173] In the display device of one embodiment of the present invention, by using a Si transistor such as an LTPS transistor, a circuit that needs to be driven at high frequency (for example, a source driver circuit) can be formed on the same substrate as the display portion, which can simplify external circuits mounted on the display device and reduce component costs and mounting costs.

[0174] An OS transistor has significantly higher field-effect mobility than a transistor using amorphous silicon. Furthermore, an OS transistor has significantly lower source-drain leakage current in an off state (hereinafter also referred to as off-state current). Therefore, a capacitor connected in series to the OS transistor can hold charge accumulated in the capacitor for a long period of time. Furthermore, by using an OS transistor in a display device according to one embodiment of the present invention, the power consumption of the display device can be reduced.

[0175] The off-state current of the OS transistor per 1 μm of channel width at room temperature is 1 aA (1×10 −１８ A) Below, 1zA (1×10 −２１ A) or less, or 1 yA (1 x 10 −２４ Note that the off-state current of a Si transistor per 1 μm of channel width at room temperature can be 1 fA (1×10 −１５ A) or more and 1 pA (1 × 10 −１２ Therefore, it can be said that the off-state current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0176] The display device 10 also has m (m is an integer of 1 or more) wires 236 that are arranged substantially parallel to one another and whose potentials are controlled by circuits included in the first drive circuit unit 231. The display device 10 also has n (n is an integer of 1 or more) wires 237 that are arranged substantially parallel to one another and whose potentials are controlled by circuits included in the second drive circuit unit 232.

[0177] 16A shows an example in which the wiring 236 and the wiring 237 are connected to the pixel 230. However, this is just an example, and the wirings connected to the pixel 230 are not limited to the wiring 236 and the wiring 237.

[0178] The display device 10 can achieve full-color display by combining a pixel 230 that controls red light, a pixel 230 that controls green light, and a pixel 230 that controls blue light to function as a single pixel 240 and controlling the light emission amount (light emission brightness) of each pixel 230. Thus, each of the three pixels 230 functions as a subpixel. That is, each of the three subpixels controls, for example, the amount of light emitted by red light, green light, or blue light (see FIG. 16B ). The color of light controlled by each of the three subpixels is not limited to a combination of red (R), green (G), and blue (B), but may also be a combination of cyan (C), magenta (M), and yellow (Y) (see FIG. 16C ).

[0179] Furthermore, the three pixels 230 constituting one pixel 240 may be arranged in a delta arrangement (see FIG. 16D ). Specifically, the three pixels 230 constituting one pixel 240 may be arranged so that the lines connecting the center points of each pixel form a triangle.

[0180] Furthermore, the areas of the three sub-pixels (pixels 230) do not have to be the same. For example, if the light-emitting efficiency and reliability differ depending on the emitted color, the areas of the three sub-pixels may be different for each emitted color (see FIG. 16E ). The sub-pixel arrangement shown in FIG. 16E may be referred to as an "S-Stripe RGB arrangement" or an "S-stripe arrangement."

[0181] The pixel 240 may also include four subpixels that function as a single pixel. For example, a subpixel that controls white light may be added to three subpixels that control red, green, and blue light, respectively (see FIG. 16F). The display device 10 can increase the brightness of the display area by adding a subpixel that controls white light. The pixel 240 may also include three subpixels that control red, green, and blue light, respectively, and a subpixel that controls yellow light (see FIG. 16G). The pixel 240 may also include three subpixels that control cyan, magenta, and yellow light, respectively, and a subpixel that controls white light (see FIG. 16H).

[0182] Furthermore, the pixel 240 can improve reproducibility of intermediate tones by increasing the number of subpixels that function as one pixel and by appropriately combining subpixels that control light of, for example, red, green, blue, cyan, magenta, and yellow. Therefore, the display device of one embodiment of the present invention can improve display quality.

[0183] The display device of one embodiment of the present invention can reproduce color gamuts of various standards, such as the Phase Alternating Line (PAL) standard or the National Television System Committee (NTSC) standard used in television broadcasting, the standard RGB (sRGB) standard or the Adobe RGB standard widely used in display devices for electronic devices such as personal computers, digital cameras, and printers, and the ITU-R BT.2000 standard used in HDTV (High Definition Television, also called Hi-Vision). It is possible to reproduce color gamuts such as those of the International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard, the Digital Cinema Initiatives P3 (DCI-P3) standard used in digital cinema projection, and the ITU-R BT. 2020 (REC. 2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television, also known as Super Hi-Vision).

[0184] Furthermore, in one embodiment of the present invention, for example, by arranging the pixels 240 in a 1920 × 1080 matrix, the display device 10 capable of full-color display at a resolution of so-called full high-definition (also referred to as "2K resolution," "2K1K," or "2K") can be realized. In another embodiment of the present invention, for example, by arranging the pixels 240 in a 3840 × 2160 matrix, the display device 10 capable of full-color display at a resolution of so-called ultra high-definition (also referred to as "4K resolution," "4K2K," or "4K") can be realized. In another embodiment of the present invention, for example, by arranging the pixels 240 in a 7680 × 4320 matrix, the display device 10 capable of full-color display at a resolution of so-called super high-definition (also referred to as "8K resolution," "8K4K," or "8K") can be realized. In another embodiment of the present invention, by increasing the number of pixels 240, the display device 10 capable of full-color display at a resolution of 16K or 32K can also be realized.

[0185] The pixel density of the display area 235 is preferably 100 ppi or more and 10,000 ppi or less, and more preferably 1,000 ppi or more and 10,000 ppi or less. For example, the pixel density of the display area 235 may be 2,000 ppi or more and 6,000 ppi or less, or 3,000 ppi or more and 5,000 ppi or less.

[0186] Furthermore, there is no particular limitation on the aspect ratio of the display area 235. The display area 235 of the display device 10 can accommodate various aspect ratios, such as 1:1 (square), 4:3, 16:9, or 16:10.

[0187] The diagonal size of the display area 235 may be 0.1 inches or more and 100 inches or less, and may be 100 inches or more.

[0188] When the display device 10 is used as a display device for virtual reality (VR) or augmented reality (AR), the diagonal size of the display area 235 can be set to 0.1 inches or more and 5.0 inches or less, preferably 0.5 inches or more and 2.0 inches or less, and more preferably 1 inch or more and 1.7 inches or less. For example, the diagonal size of the display area 235 may be 1.5 inches or approximately 1.5 inches. By setting the diagonal size of the display area 235 to 2.0 inches or less, preferably approximately 1.5 inches, the display device 10 can be processed in a single exposure process using an exposure device (typically a scanner device), thereby improving the productivity of the manufacturing process.

[0189] 17A is a diagram showing an example of a circuit configuration of the pixel 230. The pixel 230 includes a pixel circuit 431 and a display element 432.

[0190] Therefore, each wiring 236 is electrically connected to q pixel circuits 431 arranged in any row among the pixel circuits 431 arranged in p rows and q columns in the display region 235. Furthermore, each wiring 237 is electrically connected to p pixel circuits 431 arranged in any column among the pixel circuits 431 arranged in p rows and q columns.

[0191] The pixel circuit 431 includes a transistor 436, a capacitor 433, a transistor 451, and a transistor 434. The pixel circuit 431 is electrically connected to a display element 432.

[0192] One of the source electrode and the drain electrode of the transistor 436 is electrically connected to a wiring (hereinafter referred to as a signal line DL) to which a data signal (also referred to as a "video signal") is applied. Furthermore, a gate electrode of the transistor 436 is electrically connected to a wiring (hereinafter referred to as a scan line GL) to which a gate signal is applied. The signal line DL and the scan line GL correspond to the wiring 237 and the wiring 236, respectively. The transistor 436 has a function of controlling writing of the data signal to the node 435.

[0193] One of a pair of electrodes of the capacitor 433 is electrically connected to a node 435, and the other is electrically connected to a node 437. The other of the source electrode and the drain electrode of the transistor 436 is electrically connected to the node 435.

[0194] The capacitor 433 functions as a storage capacitor for holding data written to the node 435 .

[0195] One of a source electrode and a drain electrode of the transistor 451 is electrically connected to the potential supply line VL_a, and the other is electrically connected to a node 437. Furthermore, a gate electrode of the transistor 451 is electrically connected to a node 435.

[0196] One of a source electrode and a drain electrode of the transistor 434 is electrically connected to the potential supply line V0, and the other is electrically connected to a node 437. Furthermore, a gate electrode of the transistor 434 is electrically connected to the scan line GL.

[0197] One of the anode and the cathode of the display element 432 is electrically connected to the potential supply line VL_b, and the other is electrically connected to a node 437 .

[0198] The display element 432 may be a light-emitting element (also called a "light-emitting device") such as an organic electroluminescence element (also called an "organic EL element"). However, the display element 432 is not limited to this. The display element 432 may also be an inorganic EL element made of an inorganic material. Note that the "organic EL element" and the "inorganic EL element" may be collectively referred to as an "EL element."

[0199] The luminescent color of the EL element can be, for example, white, red, green, blue, cyan, magenta, or yellow, depending on the material that constitutes the EL element.

[0200] There are two methods for achieving color display: one is to combine a display element 432 that emits white light with a colored layer, and the other is to provide a display element 432 that emits a different color for each pixel. The former method has higher productivity than the latter method. On the other hand, the latter method is less productive than the former method because it requires creating a different display element 432 for each pixel. However, the latter method can obtain an emitted color with higher color purity than the former method. The latter method can further improve color purity by providing a microcavity structure to the display element 432.

[0201] The display element 432 may be made of either a low molecular weight compound or a high molecular weight compound. The display element 432 may also contain an inorganic compound. Each of the layers constituting the display element 432 may be formed by a method such as vapor deposition (including vacuum vapor deposition), a transfer method, a printing method, an inkjet method, or a coating method.

[0202] The display element 432 may include an inorganic compound such as quantum dots. For example, quantum dots can be used in a light-emitting layer to function as a light-emitting material.

[0203] The power supply potential can be, for example, a relatively high potential or a relatively low potential. The high potential power supply potential is called a high power supply potential (also called "VDD"). The low potential power supply potential is called a low power supply potential (also called "VSS"). The ground potential can also be used as a high power supply potential or a low power supply potential. For example, if the high power supply potential is a ground potential, the low power supply potential is a potential lower than the ground potential. For example, if the low power supply potential is a ground potential, the high power supply potential is a potential higher than the ground potential.

[0204] For example, a high power supply potential VDD is applied to one of the potential supply line VL_a or VL_b, and a low power supply potential VSS is applied to the other of the potential supply line VL_a or VL_b.

[0205] A display device having the pixel circuits 431 sequentially selects the pixel circuits 431 in each row by a circuit included in a peripheral driver circuit, turns on the transistors 436 and 434 , and writes a data signal to the node 435 .

[0206] The pixel circuit 431, in which data is written to the node 435, is brought into a holding state by turning off the transistor 436 and the transistor 434. Furthermore, the amount of current flowing between the source electrode and the drain electrode of the transistor 451 is controlled according to the potential of the data written to the node 435. Then, the display element 432 emits light with a luminance according to the amount of current. By performing this process sequentially for each row, a display device including the pixel circuit 431 can display an image. Note that the transistor 451 is also called a "driving transistor."

[0207] To increase the light emission luminance of the light-emitting device included in the pixel 230, it is necessary to increase the amount of current flowing through the light-emitting device. Therefore, the source-drain voltage of the driving transistor included in the pixel circuit 431 needs to be increased. An OS transistor has a higher source-drain withstand voltage than a Si transistor. Therefore, a high voltage can be applied between the source and drain of the OS transistor. Thus, by using an OS transistor as the driving transistor in the pixel circuit 431, the light-emitting device included in the pixel 230 can increase the amount of current flowing through the light-emitting device and increase the light emission luminance.

[0208] When operating in the saturation region, an OS transistor exhibits a smaller change in source-drain current with respect to a change in gate-source voltage than a Si transistor. Therefore, the pixel 230 in which an OS transistor is used as the driving transistor included in the pixel circuit 431 can precisely determine the current flowing between the source and drain by changing the gate-source voltage of the driving transistor, thereby enabling precise control of the amount of current flowing through the light-emitting device included in the pixel 230. Therefore, a display device using the pixel 230 can increase the number of gray levels in the pixel 230.

[0209] Furthermore, in terms of the saturation characteristics of the current flowing when operating in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, when used as a driving transistor, an OS transistor can pass a stable current through a light-emitting device, for example, even when the current-voltage characteristics of the light-emitting device containing an EL material vary. In other words, when operating in the saturation region, the source-drain current of the OS transistor remains almost unchanged even when the source-drain voltage increases. Therefore, a display device using an OS transistor can stabilize the light-emitting luminance of the light-emitting device.

[0210] As described above, by using an OS transistor for a driving transistor included in a pixel circuit, the display device of one embodiment of the present invention can achieve, for example, "suppression of black floating," "increase in light-emitting luminance," "multiple gradations," and "suppression of variations in light-emitting devices."

[0211] Fig. 17B is a diagram showing a modification of the circuit configuration of pixel 230 shown in Fig. 17A. As shown in Fig. 17B, the gate electrode of transistor 436 is electrically connected to a line (hereinafter referred to as scanning line GL1) to which a first scanning signal is applied. The gate electrode of transistor 434 is electrically connected to a line (hereinafter referred to as scanning line GL2) to which a second scanning signal is applied.

[0212] 17B includes a transistor 438 in addition to the circuit configuration shown in Fig. 17A. One of a source electrode and a drain electrode of the transistor 438 is electrically connected to a potential supply line V0, and the other is electrically connected to a node 435. Furthermore, a gate electrode of the transistor 438 is electrically connected to a line to which a third scan signal is supplied (hereinafter referred to as a scan line GL3).

[0213] The scanning line GL1 corresponds to the wiring 236 shown in Fig. 16A. Although wiring corresponding to the scanning line GL2 and the scanning line GL3 is not shown in Fig. 16A, the scanning line GL2 and the scanning line GL3 are electrically connected to the first drive circuit unit 231.

[0214] 17B , for example, when the pixel 230 is to be displayed in black, both the transistor 434 and the transistor 438 are turned on. As a result, the potentials of the source electrode and gate electrode of the transistor 451 become equal. Therefore, in the pixel 230, the gate voltage of the transistor 451 becomes 0 V, and the current flowing to the display element 432 can be cut off.

[0215] 17B uses transistors having back gates. For example, the gate and back gate of each of the transistors 434, 436, and 438 are electrically connected. The back gate of the transistor 451 is electrically connected to the node 437.

[0216] 17C is a diagram showing a modified example of the circuit configuration of the pixel 230 shown in FIG. 17A. The circuit configuration shown in FIG. 17C has a configuration in which the transistor 434 and the potential supply line V0 are removed from the circuit configuration shown in FIG. 17A. The other components can be understood by referring to the description of the circuit configuration shown in FIG. 17A. Therefore, in order to reduce repetition of the description, a detailed description of the circuit configuration shown in FIG. 17C will be omitted.

[0217] As described above, some or all of the transistors included in the pixel circuit 431 may be transistors having back gates. For example, in the pixel 230 shown in FIG. 17D , a transistor having a back gate may be used as the transistor 436, and the back gate and the gate of the transistor may be electrically connected. Alternatively, a transistor having a back gate may be used as the transistor 451, and the back gate and one of the source and the drain of the transistor may be electrically connected.

[0218] <Structure Example of Light-Emitting Element> A light-emitting element (also referred to as a light-emitting device) that can be used for a semiconductor device according to one embodiment of the present invention will be described.

[0219] 18A , the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (conductive layers 171 and 173). The EL layer 172 can be composed of a plurality of layers, such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can include, for example, a layer containing a substance with high electron injection properties (electron injection layer) and a layer containing a substance with high electron transport properties (electron transport layer). The light-emitting layer 4411 includes, for example, a light-emitting compound. The layer 4430 can include, for example, a layer containing a substance with high hole injection properties (hole injection layer) and a layer containing a substance with high hole transport properties (hole transport layer).

[0220] A structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can function as a single light-emitting unit. In this specification and the like, the structure of FIG.

[0221] 18B shows a modified example of the EL layer 172 included in the light-emitting element 61 shown in Fig. 18A. Specifically, the light-emitting element 61 shown in Fig. 18B includes a layer 4430-1 on the conductive layer 171, a layer 4430-2 on the layer 4430-1, a light-emitting layer 4411 on the layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on the layer 4420-1, and a conductive layer 173 on the layer 4420-2. For example, when the conductive layer 171 is an anode and the conductive layer 173 is a cathode, the layer 4430-1 functions as a hole injection layer, the layer 4430-2 functions as a hole transport layer, the layer 4420-1 functions as an electron transport layer, and the layer 4420-2 functions as an electron injection layer. Alternatively, when the conductive layer 171 is used as a cathode and the conductive layer 173 is used as an anode, the layer 4430-1 functions as an electron injection layer, the layer 4430-2 functions as an electron transport layer, the layer 4420-1 functions as a hole transport layer, and the layer 4420-2 functions as a hole injection layer. By having such a layer structure, the light-emitting element 61 can efficiently inject carriers into the light-emitting layer 4411 and increase the efficiency of carrier recombination in the light-emitting layer 4411.

[0222] Note that a structure in which a plurality of light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, and light-emitting layer 4413) are provided between the layer 4420 and the layer 4430 as shown in FIG. 18C is also an example of a single structure.

[0223] 18D , a configuration in which a plurality of light-emitting units (EL layers 172 a and 172 b) are connected in series via an intermediate layer (charge generating layer) 4440 is referred to as a tandem structure or a stack structure in this specification and elsewhere. Note that by using a tandem structure for the light-emitting element 61, a light-emitting element capable of emitting light with high brightness can be realized.

[0224] Furthermore, when the light-emitting element 61 has a tandem structure as shown in FIG. 18D , the EL layers 172a and 172b may emit the same light. For example, the EL layers 172a and 172b may both emit green light. When the display region 235 includes three subpixels, R, G, and B, each of which includes a light-emitting element, the light-emitting elements of the subpixels may be arranged in a tandem structure. Specifically, the EL layers 172a and 172b of the R subpixel each contain a material capable of emitting red light. The EL layers 172a and 172b of the G subpixel each contain a material capable of emitting green light. The EL layers 172a and 172b of the B subpixel each contain a material capable of emitting blue light. In other words, the light-emitting layers 4411 and 4412 may be made of the same material. 18D, the current density per unit luminance can be reduced by making the EL layers 172a and 172b emit light of the same color, thereby improving the reliability of the light-emitting element 61.

[0225] The light-emitting color of the light-emitting element can be, for example, red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 172. Furthermore, the color purity of the light-emitting element can be further improved by providing it with a microcavity structure.

[0226] The light-emitting layer may contain two or more light-emitting materials that emit light of, for example, R (red), G (green), B (blue), Y (yellow), or O (orange). A light-emitting element that emits white light preferably has a configuration in which the light-emitting layer contains two or more light-emitting materials. When a light-emitting element according to one embodiment of the present invention obtains white light emission using two light-emitting materials, light-emitting materials may be selected such that the colors of light emitted by the two light-emitting materials are complementary to each other. For example, a light-emitting element according to one embodiment of the present invention can emit white light as a whole by making the emission color of the first light-emitting material and the emission color of the second light-emitting material complementary to each other. Furthermore, when a light-emitting element according to one embodiment of the present invention obtains white light emission using three or more light-emitting materials, the colors of light emitted by the three or more light-emitting materials may be combined to form a light-emitting element that can emit white light as a whole.

[0227] The light-emitting layer preferably contains two or more light-emitting materials that emit light of, for example, R (red), G (green), B (blue), Y (yellow), or O (orange). It is also preferable that the light-emitting layer contains two or more light-emitting materials, and that the light emitted by each of the light-emitting materials contains spectral components of two or more colors of R, G, and B.

[0228] Examples of the light-emitting substance include a fluorescent substance (fluorescent material), a phosphorescent substance (phosphorescent material), an inorganic compound (e.g., quantum dot material), or a substance that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) material). Note that the TADF material may be a material that is in thermal equilibrium between a singlet excited state and a triplet excited state. Such a TADF material has a short emission lifetime (excitation lifetime), and therefore can suppress a decrease in efficiency in a high-brightness region of a light-emitting element.

[0229] <Method of Forming Light-Emitting Element> An example of a method of forming the light-emitting element 61 will be described below.

[0230] FIG. 19A is a schematic top view of a light-emitting element 61. Note that in this specification and the like, a red light-emitting element 61R, a green light-emitting element 61G, and a blue light-emitting element 61B may be collectively referred to as the light-emitting element 61. In FIG. 19A , the symbols R, G, and B are assigned within the light-emitting region of each light-emitting element to easily distinguish between the light-emitting elements. Note that the structure of the light-emitting element 61 shown in FIG. 19A may be referred to as a side-by-side (SBS) structure. Although FIG. 19A illustrates a structure including light-emitting elements 61 of three colors, red (R), green (G), and blue (B), the present invention is not limited thereto. One embodiment of the present invention may include, for example, a structure including light-emitting elements 61 of four or more colors.

[0231] The light-emitting elements 61R, 61G, and 61B are arranged in a matrix. Fig. 19A shows a so-called stripe arrangement in which light-emitting elements of the same color are arranged in one direction. However, the arrangement of the light-emitting elements is not limited to this. For example, the light-emitting elements may be arranged in a delta arrangement or a zigzag arrangement. Furthermore, the light-emitting elements may also be arranged in a pentile arrangement, for example.

[0232] The light-emitting elements 61R, 61G, and 61B preferably use organic EL devices such as organic light-emitting diodes (OLEDs) or quantum-dot organic light-emitting diodes (QLEDs). Examples of the light-emitting material contained in the light-emitting elements include fluorescent materials, phosphorescent materials, inorganic compounds (e.g., quantum dot materials), and thermally activated delayed fluorescence (TADF) materials.

[0233] FIG. 19B is a schematic cross-sectional view corresponding to the dashed-dotted line A1-A2 in FIG. 19A . FIG. 19B shows cross sections of the light-emitting elements 61R, 61G, and 61B. The light-emitting elements 61R, 61G, and 61B are each provided on an insulating layer 363. The light-emitting elements 61R, 61G, and 61B each have a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode. The insulating layer 363 can be formed using either or both of an inorganic insulating film and an organic insulating film. The insulating layer 363 is preferably formed using an inorganic insulating film. Examples of the inorganic insulating film include oxide insulating films or nitride insulating films, such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film.

[0234] In this specification, a compound having a higher oxygen content than nitrogen is called an oxynitride. A compound having a higher nitrogen content than oxygen is called a nitride oxide. For example, silicon oxynitride refers to a compound having a higher oxygen content than nitrogen. For example, silicon nitride oxide refers to a compound having a higher nitrogen content than oxygen. The content of each element can be measured using, for example, Rutherford backscattering spectrometry (RBS).

[0235] The light-emitting element 61R has an EL layer 172R between a conductive layer 171 functioning as a pixel electrode and a conductive layer 173 functioning as a common electrode. The EL layer 172R contains a light-emitting organic compound that emits light having an intensity at least in the red wavelength range. The EL layer 172G included in the light-emitting element 61G contains a light-emitting organic compound that emits light having an intensity at least in the green wavelength range. The EL layer 172B included in the light-emitting element 61B contains a light-emitting organic compound that emits light having an intensity at least in the blue wavelength range.

[0236] Each of the EL layer 172R, the EL layer 172G, and the EL layer 172B may have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer in addition to a layer containing a light-emitting organic compound (light-emitting layer).

[0237] The conductive layer 171 functioning as a pixel electrode is provided for each light-emitting element. The conductive layer 173 functioning as a common electrode is provided as a continuous layer common to each light-emitting element. Either the conductive layer 171 functioning as a pixel electrode or the conductive layer 173 functioning as a common electrode is formed using a conductive film that is transparent to visible light, and the other is formed using a conductive film that is reflective. The display device according to one embodiment of the present invention can be a bottom-emission display device by making the conductive layer 171 functioning as a pixel electrode light-transmitting and the conductive layer 173 functioning as a common electrode light-transmitting. Alternatively, the display device according to one embodiment of the present invention can be a top-emission display device by making the conductive layer 171 functioning as a pixel electrode reflective and the conductive layer 173 functioning as a common electrode light-transmitting. Note that the display device according to one embodiment of the present invention can also be a dual-emission display device by making both the conductive layer 171 functioning as a pixel electrode and the conductive layer 173 functioning as a common electrode light-transmitting.

[0238] For example, when the light-emitting element 61R is a top-emission type, the light 175R emitted from the light-emitting element 61R is emitted toward the conductive layer 173. When the light-emitting element 61G is a top-emission type, the light 175G emitted from the light-emitting element 61G is emitted toward the conductive layer 173. When the light-emitting element 61B is a top-emission type, the light 175B emitted from the light-emitting element 61B is emitted toward the conductive layer 173.

[0239] An insulating layer 272 is provided to cover an edge portion of the conductive layer 171 which functions as a pixel electrode. The edge portion of the insulating layer 272 is preferably tapered. The insulating layer 272 can be formed using a material similar to that of the insulating layer 363.

[0240] The insulating layer 272 is provided to prevent the light-emitting elements 61R, 61G, and 61B of adjacent pixels from being unintentionally electrically short-circuited and erroneously emitting light. The insulating layer 272 also functions to prevent the metal mask from coming into contact with the conductive layer 171 when the metal mask is used to form the EL layers 172R, 172G, and 172B.

[0241] The EL layer 172R, the EL layer 172G, and the EL layer 172B each have a region in contact with the top surface of the conductive layer 171 that functions as a pixel electrode, and a region in contact with the surface of the insulating layer 272. Ends of the EL layer 172R, the EL layer 172G, and the EL layer 172B are located on the insulating layer 272.

[0242] 19B , a gap is provided between the EL layers of the light-emitting elements that emit two different colors. In this manner, the EL layers 172R, 172G, and 172B are preferably provided so as not to be in contact with one another. This configuration can effectively prevent unintended light emission (also known as crosstalk) caused by current flowing through two adjacent EL layers. Therefore, one embodiment of the present invention can improve contrast and realize a display device with high display quality.

[0243] The EL layers 172R, 172G, and 172B can be separately formed by, for example, a vacuum evaporation method using a shadow mask such as a metal mask. Alternatively, they may be separately formed by a photolithography method. In one embodiment of the present invention, by using a photolithography method, a high-definition display device can be realized, which is difficult to achieve by using a metal mask.

[0244] In this specification, etc., a device fabricated using a metal mask or an FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. In addition, in this specification, etc., a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure. Because a display device with an MML structure is fabricated without using a metal mask, it has a higher degree of design freedom in terms of pixel arrangement, pixel shape, and the like than a display device with an MM structure.

[0245] A protective layer 271 is provided on the conductive layer 173, which functions as a common electrode, to cover the light-emitting elements 61R, 61G, and 61B. The protective layer 271 has a function of preventing impurities such as water from diffusing into each light-emitting element from above.

[0246] The protective layer 271 can have, for example, a single-layer structure or a stacked structure including at least an inorganic insulating film. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, or a hafnium oxide film. The protective layer 271 may also be made of a semiconductor material such as indium gallium oxide or indium gallium zinc oxide (IGZO). The protective layer 271 may be formed by, for example, an ALD method, a CVD method, or a sputtering method. While the protective layer 271 includes an inorganic insulating film, the present invention is not limited to this. For example, the protective layer 271 may have a stacked structure of an inorganic insulating film and an organic insulating film.

[0247] When indium gallium zinc oxide is used, the protective layer 271 can be processed using a wet etching method or a dry etching method. For example, when IGZO is used, the protective layer 271 can be processed using a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (e.g., a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed acid aluminum etchant)). Note that the mixed acid aluminum etchant can have a volume ratio of phosphoric acid:acetic acid:nitric acid:water of approximately 53.3:6.7:3.3:36.7.

[0248] 19C shows a different example. Specifically, Fig. 19C shows a light-emitting element 61W that emits white light. The light-emitting element 61W includes an EL layer 172W that emits white light between a conductive layer 171 that functions as a pixel electrode and a conductive layer 173 that functions as a common electrode.

[0249] The EL layer 172W may be configured by stacking two light-emitting layers, each of which is selected so that the emitted light has a complementary color relationship. Alternatively, a stacked EL layer may be used in which a charge generating layer is sandwiched between the light-emitting layers.

[0250] 19C shows three light-emitting elements 61W lined up. A coloring layer 264R is provided on top of the left light-emitting element 61W. The coloring layer 264R functions as a bandpass filter that transmits red light. Similarly, a coloring layer 264G that transmits green light is provided on top of the center light-emitting element 61W. Similarly, a coloring layer 264B that transmits blue light is provided on top of the right light-emitting element 61W. This allows the display device to display color images.

[0251] Here, the EL layer 172W and the conductive layer 173 functioning as a common electrode are separated between two adjacent light-emitting elements 61W. This prevents unintended light emission due to current flowing through the EL layer 172W between the two adjacent light-emitting elements 61W. In particular, when a stacked EL layer in which a charge generation layer is provided between two light-emitting layers is used as the EL layer 172W, a display device using such an EL element has a problem that the higher the resolution, i.e., the smaller the distance between adjacent pixels, the more significant the influence of crosstalk becomes, resulting in a decrease in contrast. Therefore, one embodiment of the present invention can realize a display device that combines high resolution and high contrast by adopting such a structure.

[0252] The EL layer 172W and the conductive layer 173 functioning as a common electrode are preferably separated by photolithography, which allows the distance between light-emitting elements to be narrowed, thereby realizing a display device with a higher aperture ratio than when a shadow mask such as a metal mask is used.

[0253] Note that in the case of a bottom-emission light-emitting element in the display device according to one embodiment of the present invention, a colored layer may be provided between the conductive layer 171 functioning as a pixel electrode and the insulating layer 363 .

[0254] FIG. 19D illustrates an example different from the above. Specifically, FIG. 19D illustrates a configuration in which an insulating layer 272 is not provided between the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. This configuration allows a display device according to one embodiment of the present invention to have a high aperture ratio. Furthermore, in the display device according to one embodiment of the present invention, the insulating layer 272 is not provided, thereby reducing the unevenness of the light-emitting element 61, thereby improving the viewing angle of the display device. Specifically, the viewing angle of the display device can be set to 150° or more and less than 180°, preferably 160° or more and less than 180°, and more preferably 160° or more and less than 180°.

[0255] The protective layer 271 covers the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. The protective layer 271 has such a structure, which can suppress impurities (typically, water) that may enter from the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. Furthermore, the display device according to one embodiment of the present invention has such a structure, which reduces leakage current between adjacent light-emitting elements 61, thereby improving color saturation and contrast ratio and reducing power consumption.

[0256] 19D , the top surfaces of the conductive layer 171, the EL layer 172R, and the conductive layer 173 are generally the same. This structure can be formed all at once, for example, by using a resist mask after the conductive layer 171, the EL layer 172R, and the conductive layer 173 are formed. This process can also be called self-aligned patterning, since the EL layer 172R and the conductive layer 173 are processed using the conductive layer 173 as a mask. While the EL layer 172R has been described here, the EL layer 172G and the EL layer 172B can also have a similar structure.

[0257] 19D , a protective layer 273 is further provided on the protective layer 271. For example, the protective layer 271 can be formed using an apparatus (typically, an ALD apparatus) capable of depositing a film with high coverage, and the protective layer 273 can be formed using an apparatus (typically, a sputtering apparatus) capable of depositing a film with lower coverage than the protective layer 271. This allows a region 275 to be provided between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 172R and the EL layer 172G, and between the EL layer 172G and the EL layer 172B.

[0258] The region 275 may contain, for example, one or more elements selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically, helium, neon, argon, xenon, krypton, etc.). The region 275 may also contain, for example, a gas used when forming the protective layer 273. For example, when the protective layer 273 is formed by sputtering, the region 275 may contain one or more of the above Group 18 elements. When the region 275 contains a gas, the gas can be identified by, for example, gas chromatography. When the protective layer 273 is formed by sputtering, the gas used during sputtering may also be contained in the protective layer 273. In this case, when the protective layer 273 is analyzed by, for example, energy dispersive X-ray analysis (EDX analysis), elements such as argon may be detected.

[0259] Furthermore, if the refractive index of region 275 is lower than that of protective layer 271, light emitted from EL layer 172R, EL layer 172G, or EL layer 172B is reflected at the interface between protective layer 271 and region 275. As a result, region 275 may be able to prevent light emitted from EL layer 172R, EL layer 172G, or EL layer 172B from entering adjacent pixels. As a result, region 275 can prevent different emitted colors from being mixed in with neighboring pixels, thereby improving the display quality of the display device.

[0260] 19D , the area between light-emitting element 61R and light-emitting element 61G or the area between light-emitting element 61G and light-emitting element 61B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements can be 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, in this configuration, the distance between the side surface of EL layer 172R and the side surface of EL layer 172G or the distance between the side surface of EL layer 172G and the side surface of EL layer 172B has an area of ​​1 μm or less, preferably an area of ​​0.5 μm (500 nm) or less, and more preferably an area of ​​100 nm or less.

[0261] Furthermore, in this configuration, for example, when the region 275 contains gas, it is possible to isolate the light emitting elements while suppressing, for example, color mixing or crosstalk of light from each light emitting element.

[0262] The region 275 may be filled with a filler. Examples of the filler include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Alternatively, a photoresist may be used as the filler. The photoresist used as the filler may be a positive photoresist or a negative photoresist.

[0263] Furthermore, when the above-described white light-emitting device (single structure or tandem structure) is compared with a light-emitting device having an SBS structure, the light-emitting device having an SBS structure can reduce power consumption compared to the white light-emitting device. Therefore, when it is desired to reduce power consumption, a display device according to one embodiment of the present invention is preferably provided with a light-emitting device having an SBS structure. On the other hand, the manufacturing process for a white light-emitting device is simpler than that for a light-emitting device having an SBS structure. Therefore, by preferably using a white light-emitting device, the display device according to one embodiment of the present invention can reduce manufacturing costs or increase manufacturing yields.

[0264] FIG. 20A illustrates a different example from the above. Specifically, the configuration illustrated in FIG. 20A differs from the configuration illustrated in FIG. 19D in the configuration of the insulating layer 363. The insulating layer 363 has a recess formed by a portion of its upper surface being removed during processing of the light-emitting elements 61R, 61G, and 61B. Furthermore, the protective layer 271 is formed in the recess. In other words, the insulating layer 363 has a region in which the lower surface of the protective layer 271 is located lower than the lower surface of the conductive layer 171 in a cross-sectional view. By having this region, the insulating layer 363 can effectively suppress impurities (typically, water, etc.) that may enter the light-emitting elements 61R, 61G, and 61B from below. The recess can be formed when impurities (also referred to as residue) that may adhere to the side surfaces of the light-emitting elements 61R, 61G, and 61B are removed by, for example, wet etching during processing of the light-emitting elements 61R, 61G, and 61B. The display device according to one embodiment of the present invention can be made highly reliable by covering the side surfaces of each light-emitting element with a protective layer 271 after removing the residue.

[0265] FIG. 20B illustrates a different example. Specifically, the configuration illustrated in FIG. 20B includes an insulating layer 276 and a microlens array 277 in addition to the configuration illustrated in FIG. 20A . The insulating layer 276 functions as an adhesive layer. When the refractive index of the insulating layer 276 is lower than that of the microlens array 277, the microlens array 277 can focus the light emitted from the light-emitting elements 61R, 61G, and 61B. This configuration can improve the light extraction efficiency of the display device. This is particularly advantageous because it allows a user to view a bright image when viewing the display surface from directly in front of the display device. The insulating layer 276 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet-curable adhesive), a reactive-curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of these adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Two-component resins may also be used. Alternatively, adhesive sheets may also be used.

[0266] FIG. 20C illustrates a different example. Specifically, the configuration illustrated in FIG. 20C includes three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration illustrated in FIG. 20A . This configuration also includes an insulating layer 276 above the three light-emitting elements 61W. This configuration also includes colored layers 264R, 264G, and 264B above the insulating layer 276. Specifically, the colored layer 264R that transmits red light is positioned so as to overlap the left light-emitting element 61W. The colored layer 264G that transmits green light is positioned so as to overlap the center light-emitting element 61W. The colored layer 264B that transmits blue light is positioned so as to overlap the right light-emitting element 61W. This allows the display device to display color images. The configuration illustrated in FIG. 20C is also a modified example of the configuration illustrated in FIG. 19C .

[0267] Fig. 20D shows an example different from the above. Specifically, in the structure shown in Fig. 20D, a protective layer 271 is provided adjacent to the side surfaces of the conductive layer 171 and the EL layer 172. Furthermore, the conductive layer 173 is provided as a continuous layer common to each light-emitting element. Furthermore, in the structure shown in Fig. 20D, it is preferable that the region 275 is filled with a filler material.

[0268] The light-emitting element 61 according to one embodiment of the present invention can enhance the color purity of the emitted light by providing it with a micro-optical resonator (microcavity) structure. When providing the light-emitting element 61 with a microcavity structure, the light-emitting element can be configured so that the product (optical path length) of the distance d between the conductive layer 171 and the conductive layer 173 and the refractive index n of the EL layer 172 is m times half the wavelength λ (m is an integer of 1 or greater). The distance d can be calculated using Equation 1:

[0269] d=m×λ / (2×n) (Equation 1).

[0270] According to Equation 1, the distance d of the light-emitting element 61 having the microcavity structure is determined according to the wavelength of the emitted light (emission color). The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G may be provided thicker than the EL layer 172B, and the EL layer 172R may be provided thicker than the EL layer 172G.

[0271] Strictly speaking, the distance d is the distance from the reflective region of the conductive layer 171, which functions as a reflective electrode, to the reflective region of the conductive layer 173, which functions as a semi-transmissive and semi-reflective electrode. For example, if the conductive layer 171 is a laminate of silver and a transparent conductive film, ITO, and the ITO is located on the EL layer 172 side, the distance d can be set according to the emitted color by adjusting the film thickness of the ITO. In other words, the distance d appropriate for the emitted color can be obtained by changing the thickness of the ITO, even if the thicknesses of the EL layers 172R, 172G, and 172B are the same.

[0272] However, it may be difficult to precisely determine the positions of the reflective regions in the conductive layers 171 and 173. In this case, the light-emitting element can fully obtain the effect of the microcavity by assuming that any position in the conductive layers 171 and 173 is the reflective region.

[0273] The light-emitting element 61 is configured by, for example, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, or an electron injection layer. Detailed configuration examples of the light-emitting element 61 will be described in other embodiments. In order to increase the light extraction efficiency in the microcavity structure, the light-emitting element 61 preferably has an optical distance from the conductive layer 171, which functions as a reflective electrode, to the light-emitting layer that is an odd multiple of λ / 4. In order to achieve this optical distance, it is preferable to appropriately adjust the thickness of each layer that configures the light-emitting element 61.

[0274] Furthermore, when light is emitted from the conductive layer 173 side, it is preferable that the light reflectance of the conductive layer 173 is greater than the light transmittance. The light transmittance of the conductive layer 173 is preferably 2% or more and 50% or less, more preferably 2% or more and 30% or less, and even more preferably 2% or more and 10% or less. The light-emitting element 61 can enhance the effect of the microcavity by reducing the light transmittance of the conductive layer 173 (increasing the light reflectance).

[0275] Fig. 21A is a perspective view of display device 10. Display device 10 shown in Fig. 21A includes layer 60 stacked on layer 50. Layer 50 includes a plurality of pixel circuits 51 arranged in a matrix, a first drive circuit unit 231, a second drive circuit unit 232, and an input / output terminal unit 29. Layer 60 includes a plurality of light-emitting elements 61 arranged in a matrix.

[0276] One pixel circuit 51 and one light-emitting element 61 are electrically connected to each other, and function as one pixel 230. Therefore, the area where the plurality of pixel circuits 51 included in the layer 50 and the plurality of light-emitting elements 61 included in the layer 60 overlap functions as a display area 235.

[0277] Power, signals, and the like necessary for the operation of the display device 10 are supplied to the display device 10 via an input / output terminal unit 29. In the display device 10 shown in Fig. 21A, the transistors included in the peripheral driving circuit and the transistors included in the pixels 230 can be formed in the same process.

[0278] 21B , the display device 10 may be configured to include a layer 40, a layer 50, and a layer 60 stacked one on top of the other. The display device 10 shown in FIG. 21B includes a plurality of pixel circuits 51 arranged in a matrix on the layer 50, and a first drive circuit unit 231 and a second drive circuit unit 232 on the layer 40. By providing the first drive circuit unit 231 and the second drive circuit unit 232 on a different layer from the pixel circuits 51, the display device 10 can narrow the width of the frame around the display area 235, thereby expanding the area occupied by the display area 235.

[0279] The display region 235 with an expanded occupied area can improve the resolution. Alternatively, when the resolution is constant, the display region 235 with an expanded occupied area can increase the occupied area per pixel, thereby improving the light-emitting luminance. Furthermore, by increasing the occupied area per pixel, the ratio of the light-emitting area to the occupied area of ​​one pixel (also referred to as the "aperture ratio") can be increased. For example, the aperture ratio of the pixel can be set to 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, by increasing the occupied area per pixel, the current density supplied to the light-emitting element 61 can be reduced. Therefore, the load applied to the light-emitting element 61 is reduced. Therefore, the reliability of the semiconductor device of one embodiment of the present invention can be improved. Therefore, the reliability of the display device 10 including the semiconductor device of one embodiment of the present invention can be improved.

[0280] By stacking the display region 235 and peripheral driver circuits, etc., the wiring electrically connecting them can be shortened. Therefore, wiring resistance and parasitic capacitance are reduced. Therefore, the operating speed of the semiconductor device of one embodiment of the present invention can be increased. Furthermore, the power consumption of the semiconductor device of one embodiment of the present invention is reduced.

[0281] Furthermore, the layer 40 may include not only the peripheral drive circuits but also a CPU 23 (Central Processing Unit), a GPU 24 (Graphics Processing Unit), and a memory circuit unit 25. In the present embodiment and the like, the peripheral drive circuits, the CPU 23, the GPU 24, and the memory circuit unit 25 may be collectively referred to as a "functional circuit."

[0282] For example, the CPU 23 has a function of controlling the operation of the GPU 24 and circuits provided in the layer 40 in accordance with a program stored in the memory circuit unit 25. The GPU 24 has a function of performing arithmetic processing to form image data. Furthermore, the GPU 24 can perform many matrix operations (product-sum operations) in parallel, and therefore can perform arithmetic processing using, for example, a neural network at high speed. The GPU 24 has a function of correcting image data using correction data stored in the memory circuit unit 25. For example, the GPU 24 has a function of generating image data in which one or more of brightness, hue, and contrast have been corrected.

[0283] The display device 10 may use the GPU 24 to upconvert or downconvert image data. The display device 10 may also include a super-resolution circuit in the layer 40. The super-resolution circuit has a function of determining the potential of any pixel in the display area 235 by performing a product-sum operation on the potentials and weights of the pixels surrounding the pixel. The super-resolution circuit has a function of upconverting image data with a resolution lower than that of the display area 235. The super-resolution circuit also has a function of downconverting image data with a resolution higher than that of the display area 235.

[0284] By including a super-resolution circuit, the display device 10 can reduce the load on the GPU 24. For example, the GPU 24 can process up to 2K resolution (or 4K resolution), and then the super-resolution circuit can upconvert to 4K resolution (or 8K resolution), thereby reducing the load on the GPU 24. Downconversion can be performed in a similar manner.

[0285] The functional circuit included in layer 40 does not need to include all of these components, or may include other components. For example, the functional circuit may include one or more of a potential generating circuit that generates a plurality of different potentials, a power management circuit that controls the supply or stop of power to each circuit included in display device 10, and the like.

[0286] The supply or stop of power may be performed for each circuit constituting the CPU 23. For example, the CPU 23 can reduce power consumption by stopping the supply of power to a circuit that is determined not to be used for a while and restarting the power supply when necessary. Data required when the power supply is restarted can be stored, for example, in a memory circuit or memory circuit unit 25 within the CPU 23 before the circuit is stopped. By storing data required when the circuit is restored, the CPU 23 can quickly restore the stopped circuit. Note that the CPU 23 may stop the circuit operation by stopping the supply of a clock signal.

[0287] The functional circuit may include, for example, one or more of a DSP circuit, a sensor circuit, a communication circuit, and an FPGA (Field Programmable Gate Array).

[0288] Some of the transistors constituting the functional circuits in the layer 40 may be provided in the layer 50. Some of the transistors constituting the pixel circuits 51 in the layer 50 may be provided in the layer 40. Therefore, the functional circuits may include Si transistors and OS transistors. Furthermore, the pixel circuits 51 may include Si transistors and OS transistors.

[0289] Fig. 22 is a cross-sectional view of a portion of the display device 10 shown in Fig. 21A. The display device 10 shown in Fig. 22 includes a layer 50 including a substrate 301, a capacitor 246, and a transistor 310, and a layer 60 including light-emitting elements 61R, 61G, and 61B. The layer 60 is provided on an insulating layer 363 included in the layer 50.

[0290] The transistor 310 is a transistor including a channel formation region in a substrate 301. The substrate 301 can be a semiconductor substrate such as a single crystal silicon substrate. The transistor 310 includes a part of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region in which the substrate 301 is doped with impurities and functions as one of a source and a drain. The insulating layer 314 is provided to cover a side surface of the conductive layer 311 and functions as an insulating layer.

[0291] An isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

[0292] An insulating layer 261 is provided to cover the transistor 310. A capacitor 246 is provided on the insulating layer 261.

[0293] The capacitor 246 includes a conductive layer 241, a conductive layer 245, and an insulating layer 243 located therebetween. The conductive layer 241 functions as one electrode of the capacitor 246. The conductive layer 245 functions as the other electrode of the capacitor 246, and the insulating layer 243 functions as a dielectric of the capacitor 246.

[0294] The conductive layer 241 is provided over the insulating layer 261 and is buried in the insulating layer 254. The conductive layer 241 is electrically connected to one of the source and the drain of the transistor 310 by a plug 266 buried in the insulating layer 261. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 245 is provided in a region overlapping with the conductive layer 241 with the insulating layer 243 interposed therebetween.

[0295] An insulating layer 255 is provided to cover the capacitor 246. An insulating layer 363 is provided on the insulating layer 255. The light-emitting elements 61R, 61G, and 61B are provided on the insulating layer 363. A protective layer 415 is provided on the light-emitting elements 61R, 61G, and 61B. A substrate 420 is provided on the upper surface of the protective layer 415 with a resin layer 419 interposed therebetween.

[0296] The pixel electrode of the light-emitting element is electrically connected to one of the source or drain of the transistor 310 by a plug 256 embedded in the insulating layer 255 and the insulating layer 363, a conductive layer 241 embedded in the insulating layer 254, and a plug 266 embedded in the insulating layer 261.

[0297] Fig. 23 is a modified example of the cross-sectional configuration example shown in Fig. 22. The cross-sectional configuration example of the display device 10 shown in Fig. 23 differs from the cross-sectional configuration example shown in Fig. 22 mainly in that a transistor 320 is provided instead of the transistor 310. Note that descriptions of parts that are the same as those in Fig. 22 may be omitted.

[0298] The transistor 320 is a transistor in which a metal oxide (also referred to as an oxide semiconductor) is used for a semiconductor layer in which a channel is formed.

[0299] The transistor 320 includes a semiconductor layer 321 , an insulating layer 323 , a conductive layer 324 , a pair of conductive layers 325 , an insulating layer 326 , and a conductive layer 327 .

[0300] The substrate 331 can be an insulating substrate or a semiconductor substrate.

[0301] An insulating layer 332 is provided over a substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from being released from the semiconductor layer 321 toward the insulating layer 332. The insulating layer 332 can be a film through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film. For example, the insulating layer 332 can be an aluminum oxide film, a hafnium oxide film, a silicon nitride film, or the like.

[0302] A conductive layer 327 is provided over the insulating layer 332. An insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 functions as a first gate electrode of the transistor 320. A part of the insulating layer 326 functions as a first gate insulating layer. At least a portion of the insulating layer 326 that is in contact with the semiconductor layer 321 is preferably formed using an oxide insulating film such as a silicon oxide film. The top surface of the insulating layer 326 is preferably planarized.

[0303] The semiconductor layer 321 is provided over the insulating layer 326. The semiconductor layer 321 preferably includes a metal oxide (also referred to as an oxide semiconductor) film having semiconductor characteristics. Materials that can be suitably used for the semiconductor layer 321 will be described in detail later.

[0304] The pair of conductive layers 325 are provided over and in contact with the semiconductor layer 321 and function as a source electrode and a drain electrode.

[0305] An insulating layer 328 is provided to cover, for example, top surfaces and side surfaces of the pair of conductive layers 325 and side surfaces of the semiconductor layer 321. An insulating layer 264 is provided over the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents, for example, impurities such as water or hydrogen from diffusing from the insulating layer 264 or the like to the semiconductor layer 321 and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be formed using an insulating film similar to the insulating layer 332.

[0306] The insulating layer 328 and the insulating layer 264 have openings that reach the semiconductor layer 321. The insulating layer 323 and the conductive layer 324, which are in contact with the side surfaces of the insulating layer 264, the insulating layer 328, and the conductive layer 325 and the top surface of the semiconductor layer 321, are embedded in the openings. The conductive layer 324 functions as a second gate electrode. The insulating layer 323 functions as a second gate insulating layer.

[0307] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are planarized so that they are at approximately the same height. Insulating layers 329 and 265 are provided to cover these layers.

[0308] The insulating layer 264 and the insulating layer 265 function as interlayer insulating layers. The insulating layer 329 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 265 or the like to the transistor 320. The insulating layer 329 can be formed using an insulating film similar to the insulating layers 328 and 332.

[0309] A plug 274 electrically connected to one of the pair of conductive layers 325 is provided so as to be embedded in the insulating layer 265, the insulating layer 329, and the insulating layer 264. Here, the plug 274 preferably includes a conductive layer 274a covering the side surfaces of the openings of the insulating layer 265, the insulating layer 329, the insulating layer 264, and the insulating layer 328 and a part of the upper surface of the conductive layer 325, and a conductive layer 274b in contact with the upper surface of the conductive layer 274a. In this case, the conductive layer 274a is preferably made of a conductive material that is difficult for hydrogen and oxygen to diffuse into.

[0310] Fig. 24 is a cross-sectional view of a portion of the display device 10 shown in Fig. 21B. The display device 10 shown in Fig. 24 has a stacked structure of a transistor 310A having a channel formed in a substrate 301A included in the layer 40 and a transistor 310B having a channel formed in a substrate 301B included in the layer 50. The substrate 301A can be made of the same material as the substrate 301.

[0311] The display device 10 shown in Figure 24 has a configuration in which a layer 60 in which a light-emitting element 61 is provided, a layer 50 in which a substrate 301B, a transistor 310B, and a capacitor 246 are provided, and a layer 40 in which a substrate 301A and a transistor 310A are provided are bonded together.

[0312] A plug 343 penetrating the substrate 301B is provided in the substrate 301B. The plug 343 functions as a through silicon electrode (TSV: Through Silicon Via). The plug 343 is electrically connected to a conductive layer 342 provided on the back surface of the substrate 301B (the surface opposite to the substrate 420 side). A conductive layer 341 is provided on the insulating layer 261 of the substrate 301A.

[0313] The conductive layer 341 and the conductive layer 342 are joined together, thereby electrically connecting the layer 40 and the layer 50 .

[0314] The conductive layers 341 and 342 are preferably made of the same conductive material. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Sn, Zn, Au, Ag, Pt, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, or tungsten nitride film) can be used. In particular, copper is preferably used for the conductive layers 341 and 342. This allows the conductive layers 341 and 342 to be bonded using Cu-Cu (copper-copper) direct bonding technology (a technology that achieves electrical conductivity by connecting Cu (copper) pads together). The conductive layers 341 and 342 may also be bonded via bumps.

[0315] Fig. 25 is a modification of the cross-sectional configuration example shown in Fig. 24. The cross-sectional configuration example of the display device 10 shown in Fig. 25 includes a stacked structure of a transistor 310A in which a channel is formed in a substrate 301A and a transistor 320 in which a channel is formed and a semiconductor layer containing metal oxide. Note that descriptions of the same parts as those in Figs. 22 to 24 may be omitted.

[0316] The layer 50 shown in FIG. 25 has a configuration in which the substrate 331 is removed from the layer 50 shown in FIG. 23 . In the layer 40 shown in FIG. 25 , an insulating layer 261 is provided to cover the transistor 310A. A conductive layer 251 is provided on the insulating layer 261. An insulating layer 262 is provided to cover the conductive layer 251. The conductive layer 252 is provided on the insulating layer 262. The conductive layers 251 and 252 each function as wiring. An insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252. The transistor 320 is provided on the insulating layer 332. An insulating layer 265 is provided to cover the transistor 320. A capacitor 246 is provided on the insulating layer 265. The capacitor 246 and the transistor 320 are electrically connected by a plug 274. The layer 50 is provided to overlap the insulating layer 263 included in the layer 40.

[0317] The transistor 320 can be used as a transistor that constitutes the pixel circuit 51. The transistor 310 can be used as a transistor that constitutes the pixel circuit 51 or a transistor that constitutes a peripheral driver circuit. The transistors 310 and 320 can be used as transistors that constitute a functional circuit such as an arithmetic circuit or a memory circuit, for example.

[0318] 25 has such a configuration, it is possible to form not only the pixel circuits 51 but also, for example, a peripheral driving circuit directly below the layer 60 including the light-emitting elements 61. Therefore, it is possible to make the display device 10 shown in FIG. 25 smaller than when the driving circuit is provided on the periphery of the display area.

[0319] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes and examples.

[0320] Embodiment 3 In this embodiment, a transistor that can be used for a semiconductor device according to one embodiment of the present invention will be described.

[0321] 26A, 26B, and 26C are a top view and a cross-sectional view of a transistor 500 that can be used in a semiconductor device according to one embodiment of the present invention. The transistor 500 can be used in a semiconductor device according to one embodiment of the present invention.

[0322] FIG. 26A is a top view of the transistor 500. Also, FIGS. 26B and 26C are cross-sectional views of the transistor 500. Here, FIG. 26B is a cross-sectional view of a portion indicated by the dashed dotted line A1-A2 in FIG. 26A . This is also a cross-sectional view of the transistor 500 in the channel length direction. Also, FIG. 26C is a cross-sectional view of a portion indicated by the dashed dotted line A3-A4 in FIG. 26A . This is also a cross-sectional view of the transistor 500 in the channel width direction. Note that some elements are omitted from the top view of FIG. 26A for clarity.

[0323] As shown in FIG. 26 , the transistor 500 includes a metal oxide 531a disposed on a substrate (not shown). The transistor also includes a metal oxide 531b disposed on the metal oxide 531a. The transistor also includes conductors 542a and 542b spaced apart from each other on the metal oxide 531b. The transistor also includes an insulator 580 disposed on the conductors 542a and 542b, with an opening formed between the conductors 542a and 542b. The transistor also includes a conductor 560 disposed in the opening. The transistor also includes the metal oxide 531b, the conductors 542a and 542b, and an insulator 550 disposed between the insulator 580 and the conductor 560. The transistor also includes the metal oxide 531b, the conductors 542a and 542b, and a metal oxide 531c disposed between the insulator 580 and the insulator 550. 26B and 26C , it is preferable that the top surface of conductor 560 substantially coincides with the top surfaces of insulators 550, 554, metal oxide 531c, and insulator 580. Note that, hereinafter, metal oxides 531a, 531b, and 531c may be collectively referred to as metal oxide 531. Furthermore, conductors 542a and 542b may be collectively referred to as conductor 542.

[0324] 26 , the side surfaces of the conductors 542a and 542b facing the conductor 560 have a substantially vertical shape. Note that the transistor 500 is not limited to this. In the transistor 500, the angle formed between the side surface and the bottom surface of the conductors 542a and 542b may be 10° to 80°, preferably 30° to 60°. Furthermore, the opposing side surfaces of the conductors 542a and 542b may have multiple surfaces.

[0325] 26 , in the transistor 500, an insulator 554 is preferably disposed between the insulator 524, the metal oxide 531a, the metal oxide 531b, the conductor 542a, the conductor 542b, and the metal oxide 531c and the insulator 580. Here, the insulator 554 is preferably in contact with the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and the metal oxide 531b, and the top surface of the insulator 524, as shown in FIGS.

[0326] In the transistor 500 illustrated in FIG. 26 , the metal oxide 531 has a three-layer structure of a metal oxide 531a, a metal oxide 531b, and a metal oxide 531c in and around a region where a channel is formed (hereinafter also referred to as a channel formation region). However, one embodiment of the present invention is not limited to this structure. For example, the metal oxide 531 may have a two-layer structure of a metal oxide 531b and a metal oxide 531c or a stacked structure of four or more layers. Although the conductor 560 has a two-layer structure in the transistor 500 illustrated in FIG. 26 , one embodiment of the present invention is not limited to this structure. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers. Furthermore, for example, the metal oxide 531 may have a stacked structure of two or more layers each of the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c.

[0327] For example, when the metal oxide 531c has a layered structure consisting of a first metal oxide and a second metal oxide provided on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of the metal oxide 531b, and the second metal oxide has a composition similar to that of the metal oxide 531a.

[0328] Here, the conductor 560 functions as a gate electrode of the transistor. The conductors 542a and 542b function as source and drain electrodes of the transistor, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and in a region sandwiched between the conductors 542a and 542b. The conductors 560, 542a, and 542b are arranged in a self-aligned manner with respect to the opening of the insulator 580. That is, in one embodiment of the present invention, the gate electrode of the transistor 500 can be arranged between the source and drain electrodes in a self-aligned manner. Therefore, the conductor 560 can be formed without providing a margin for alignment. Therefore, the area occupied by the transistor 500 can be reduced. This enables a display device to have high resolution. Furthermore, the display device can have a narrow frame.

[0329] As shown in FIG. 26, the conductor 560 preferably has a conductor 560a provided inside the insulator 550 and a conductor 560b provided so as to be embedded inside the conductor 560a.

[0330] The transistor 500 preferably includes an insulator 514 disposed on a substrate (not shown), an insulator 516 disposed on the insulator 514, a conductor 505 disposed so as to be embedded in the insulator 516, an insulator 522 disposed on the insulator 516 and the conductor 505, and an insulator 524 disposed on the insulator 522. Furthermore, a metal oxide 531a is preferably disposed on the insulator 524.

[0331] The insulator 574 and the insulator 581, which function as interlayer films, are preferably disposed over the transistor 500. Here, the insulator 574 is preferably disposed in contact with top surfaces of the conductor 560, the insulator 550, the insulator 554, the metal oxide 531c, and the insulator 580.

[0332] The insulators 522, 554, and 574 preferably have the function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules). For example, the insulators 522, 554, and 574 preferably have lower hydrogen permeability than the insulators 524, 550, and 580. The insulators 522 and 554 preferably have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules). For example, the insulators 522 and 554 preferably have lower oxygen permeability than the insulators 524, 550, and 580.

[0333] Here, insulator 524, metal oxide 531, and insulator 550 are separated from insulator 580 and insulator 581 by insulator 554 and insulator 574. Therefore, insulator 554 and insulator 574 can prevent impurities such as hydrogen and excess oxygen contained in insulator 580 and insulator 581 from mixing into insulator 524, metal oxide 531, and insulator 550.

[0334] A conductor 545 (conductor 545a and conductor 545b) electrically connected to the transistor 500 and functioning as a plug is preferably provided. Note that the insulator 541 (insulator 541a and insulator 541b) is provided in contact with the side surface of the conductor 545 functioning as a plug. That is, the insulator 541 is provided in contact with the inner walls of the openings of the insulators 554, 580, 574, and 581. Alternatively, a first conductor of the conductor 545 may be provided in contact with the side surface of the insulator 541, and a second conductor of the conductor 545 may be provided inside the first conductor of the conductor 545. Here, the height of the top surface of the conductor 545 and the height of the top surface of the insulator 581 can be approximately the same. 26 has a structure in which the first conductor of the conductor 545 and the second conductor of the conductor 545 are stacked, but one embodiment of the present invention is not limited to this. For example, the conductor 545 may have a single layer or a stacked structure of three or more layers. Note that when the structure has a stacked structure, the structures may be distinguished by assigning ordinal numbers to the order of formation.

[0335] In the transistor 500, a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used for the metal oxide 531 (the metal oxide 531a, the metal oxide 531b, and the metal oxide 531c) including the channel formation region. For example, the metal oxide that serves as the channel formation region of the metal oxide 531 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more.

[0336] The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). Furthermore, it is preferable that it contains an element M in addition to these. The element M can be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co). In particular, it is preferable that the element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Furthermore, it is more preferable that the element M contains either or both of Ga and Sn.

[0337] 26B , the thickness of the metal oxide 531b in a region that does not overlap with the conductor 542 may be thinner than the thickness of the region that overlaps with the conductor 542. This is achieved by removing part of the region of the top surface of the metal oxide 531b that does not overlap with the conductors 542a and 542b when forming the conductors 542a and 542b. Here, when a conductive film that becomes the conductor 542 is formed on the top surface of the metal oxide 531b, a low-resistance region may be formed in the metal oxide 531b near the interface with the conductive film. Therefore, by removing the low-resistance region located between the conductors 542a and 542b on the top surface of the metal oxide 531b, the transistor 500 can prevent a channel from being formed in the region.

[0338] According to one embodiment of the present invention, a display device with high definition can be provided by using a small-sized transistor. Alternatively, a display device with high luminance can be provided by using a transistor with high on-state current. Alternatively, a display device with high speed operation can be provided by using a transistor with stable electrical characteristics. Alternatively, a display device with high reliability can be provided by using a transistor with low off-state current.

[0339] A detailed structure of a transistor 500 that can be used in a display device according to one embodiment of the present invention will be described.

[0340] The conductor 505 is arranged to have a region overlapping with the metal oxide 531 and the conductor 560. The conductor 505 is preferably embedded in the insulator 516.

[0341] The conductor 505 includes a conductor 505a, a conductor 505b, and a conductor 505c. The conductor 505a is provided in contact with the bottom surface and sidewall of an opening provided in the insulator 516. The conductor 505b is provided so as to be embedded in a recess formed in the conductor 505a. Here, the top surface of the conductor 505b is lower than the top surface of the conductor 505a and the top surface of the insulator 516. The conductor 505c is provided in contact with the top surface of the conductor 505b and the side surface of the conductor 505a. Here, the height of the top surface of the conductor 505c is approximately the same as the height of the top surface of the conductor 505a and the height of the top surface of the insulator 516. In other words, the conductor 505b is configured to be enclosed by the conductors 505a and 505c.

[0342] The conductors 505a and 505c may be, for example, hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, or nitrogen oxide molecules (e.g., N ２ O, NO, or NO ２ It is preferable to use a conductive material that has a function of suppressing the diffusion of impurities such as copper atoms, copper atoms, etc. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0343] The conductors 505a and 505c are made of a conductive material that can reduce hydrogen diffusion, thereby preventing impurities such as hydrogen contained in the conductor 505b from diffusing into the metal oxide 531 via the insulator 524 or the like. Furthermore, the conductors 505a and 505c are made of a conductive material that can suppress oxygen diffusion, thereby preventing the conductor 505b from being oxidized and its conductivity from decreasing. Examples of conductive materials that can suppress oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 505a may be made of a single layer or a multilayer of the above conductive materials. For example, the conductor 505a may be made of titanium nitride.

[0344] The conductor 505b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0345] Here, the conductor 560 may function as a first gate (also referred to as a top gate) electrode. The conductor 505 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the Vth of the transistor 500 can be controlled by changing the potential applied to the conductor 505 independently of the potential applied to the conductor 560. In particular, applying a negative potential to the conductor 505 can increase the Vth of the transistor 500 to more than 0 V, thereby reducing the off-state current. Therefore, applying a negative potential to the conductor 505 can reduce the drain current when the potential applied to the conductor 560 is 0 V, compared to not applying a negative potential.

[0346] The conductor 505 is preferably larger than the channel formation region of the metal oxide 531. In particular, as shown in Fig. 26C, the conductor 505 preferably extends also in a region outside the end portion intersecting with the channel width direction of the metal oxide 531. In other words, the conductor 505 and the conductor 560 preferably overlap with each other with an insulator interposed therebetween on the outside of the side surface of the metal oxide 531 in the channel width direction.

[0347] Because the transistor 500 has the above structure, the channel formation region of the metal oxide 531 can be electrically surrounded by the electric field of the conductor 560 that functions as a first gate electrode and the electric field of the conductor 505 that functions as a second gate electrode.

[0348] 26C , the conductor 505 is extended to function as a wiring. However, the present invention is not limited thereto, and a conductor functioning as a wiring may be provided under the conductor 505 in one embodiment.

[0349] The insulator 514 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 500 from the substrate side. Therefore, the insulator 514 preferably prevents impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (e.g., N ２ O, NO, or NO ２ It is preferable to use an insulating material that has a function of suppressing the diffusion of impurities such as copper atoms (e.g., copper atoms, copper molecules, etc.) or copper atoms (the impurities are less likely to permeate). Alternatively, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules, etc.) (the oxygen is less likely to permeate).

[0350] For example, aluminum oxide, silicon nitride, or the like is preferably used as the insulator 514. This enables the insulator 514 to suppress diffusion of impurities such as water or hydrogen from the substrate side of the insulator 514 toward the transistor 500. Alternatively, the insulator 514 can suppress diffusion of oxygen contained in the insulator 524 or the like toward the substrate side of the insulator 514.

[0351] The insulators 516, 580, and 581, which function as interlayer films, preferably have a lower dielectric constant than the insulator 514. In one embodiment of the present invention, parasitic capacitance between wirings can be reduced by using a material with a low dielectric constant as an interlayer film. For example, the insulators 516, 580, and 581 can be formed using silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like as appropriate.

[0352] The insulators 522 and 524 function as gate insulators.

[0353] Here, the insulator 524 in contact with the metal oxide 531 preferably releases oxygen by heating. In this specification, oxygen released by heating is sometimes referred to as excess oxygen. For example, the insulator 524 may be made of silicon oxide, silicon oxynitride, or the like as appropriate. By providing the insulator 524 containing oxygen in contact with the metal oxide 531, the transistor 500 can reduce oxygen vacancies in the metal oxide 531 and improve the reliability of the transistor 500.

[0354] Specifically, the insulator 524 is preferably formed using an oxide material from which some oxygen is released by heating. The oxide from which oxygen is released by heating is an oxide having an oxygen atom content of 1.0×10 or more as determined by thermal desorption spectroscopy (TDS). １８ atoms / cm ３ or more, preferably 1.0 × 10 １９ atoms / cm ３ More preferably, 2.0 × 10 １９ atoms / cm ３ or more, or 3.0 x 10 ２０ atoms / cm ３ The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0355] 26C , the thickness of the insulator 524 in a region that does not overlap with the insulator 554 and the metal oxide 531b may be thinner than the thickness of the other regions. The thickness of the insulator 524 in a region that does not overlap with the insulator 554 and the metal oxide 531b is preferably a thickness that allows sufficient diffusion of the oxygen.

[0356] The insulator 522 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 500 from the substrate side, similar to the insulator 514. For example, the insulator 522 preferably has lower hydrogen permeability than the insulator 524. In one embodiment of the present invention, the insulator 524, the metal oxide 531, the insulator 550, and the like are surrounded by the insulators 522, 554, and 574, which can prevent impurities such as water or hydrogen from entering the transistor 500 from the outside.

[0357] Furthermore, the insulator 522 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (i.e., the oxygen is less likely to permeate). For example, the insulator 522 preferably has lower oxygen permeability than the insulator 524. The insulator 522 has a function of suppressing the diffusion of oxygen and impurities, thereby reducing the diffusion of oxygen contained in the metal oxide 531 toward the substrate. Furthermore, the insulator 522 can suppress the reaction of the conductor 505 with oxygen contained in the insulator 524 and the metal oxide 531.

[0358] The insulator 522 may be an insulating material containing oxide of one or both of aluminum and hafnium. Examples of the insulator containing oxide of one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, and oxide containing aluminum and hafnium (hafnium aluminate). When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses oxygen release from the metal oxide 531 and the intrusion of impurities such as hydrogen from the periphery of the transistor 500 into the metal oxide 531.

[0359] Alternatively, the insulator 522 may be formed by adding, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide to any of these insulators. Alternatively, any of these insulators may be nitrided. Alternatively, silicon oxide, silicon oxynitride, or silicon nitride may be stacked on any of the above insulators.

[0360] The insulator 522 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), or strontium titanate (SrTiO ３ ) or (Ba,Sr)TiO ３ An insulator containing a so-called high-k material such as BST may be used in a single layer or a stacked layer. As transistors become smaller and more highly integrated, problems such as leakage current may occur due to thinner gate insulators. By using a high-k material as the insulator that functions as the gate insulator, the transistor 500 can reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0361] The insulator 522 and the insulator 524 may have a stacked structure of two or more layers. In this case, the insulators are not limited to a stacked structure made of the same material, and may have a stacked structure made of different materials. For example, an insulator similar to the insulator 524 may be provided under the insulator 522.

[0362] The metal oxide 531 includes a metal oxide 531a, a metal oxide 531b on the metal oxide 531a, and a metal oxide 531c on the metal oxide 531b. By including the metal oxide 531a below the metal oxide 531b, the metal oxide 531 can suppress the diffusion of impurities from structures formed below the metal oxide 531a to the metal oxide 531b. Furthermore, by including the metal oxide 531c on the metal oxide 531b, the metal oxide 531 can suppress the diffusion of impurities from structures formed above the metal oxide 531c to the metal oxide 531b.

[0363] Note that the metal oxide 531 preferably has a stacked structure of multiple oxide layers with different atomic ratios of the metal atoms. For example, when the metal oxide 531 contains at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the metal oxide 531a to the number of atoms of all elements constituting the metal oxide 531a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 531b to the number of atoms of all elements constituting the metal oxide 531b. Furthermore, the atomic ratio of the element M contained in the metal oxide 531a to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 531b to In. Here, the metal oxide 531c can be the same as the metal oxide 531a or the metal oxide 531b.

[0364] The energy of the conduction band minimum of the metal oxide 531a and the metal oxide 531c is preferably higher than the energy of the conduction band minimum of the metal oxide 531b. In other words, the electron affinity of the metal oxide 531a and the metal oxide 531c is preferably lower than the electron affinity of the metal oxide 531b. In this case, the metal oxide 531c is preferably a metal oxide that can be used for the metal oxide 531a. Specifically, the ratio of the number of atoms of the element M contained in the metal oxide 531c to the number of atoms of all elements constituting the metal oxide 531c is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 531b to the number of atoms of all elements constituting the metal oxide 531b. Furthermore, the atomic ratio of the element M contained in the metal oxide 531c to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 531b to In.

[0365] Here, the energy level of the conduction band minimum at the junction between the metal oxides 531a, 531b, and 531c changes smoothly. In other words, the energy level of the conduction band minimum at the junction between the metal oxides 531a, 531b, and 531c changes continuously or forms a continuous junction. To achieve this, it is advisable to reduce the defect level density of the mixed layers formed at the interface between the metal oxides 531a and 531b and at the interface between the metal oxides 531b and 531c.

[0366] Specifically, the metal oxide 531a and the metal oxide 531b, and the metal oxide 531b and the metal oxide 531c, have a common element other than oxygen (as a main component), thereby forming a mixed layer with a low density of defect levels. For example, when the metal oxide 531b is an In—Ga—Zn oxide, the metal oxide 531a and the metal oxide 531c may be, for example, an In—Ga—Zn oxide, a Ga—Zn oxide, or gallium oxide. The metal oxide 531c may also have a stacked structure. For example, a stacked structure of an In—Ga—Zn oxide and a Ga—Zn oxide on the In—Ga—Zn oxide, or a stacked structure of an In—Ga—Zn oxide and a gallium oxide on the In—Ga—Zn oxide, may be used. In other words, the metal oxide 531c may have a stacked structure of an In—Ga—Zn oxide and an oxide not containing In.

[0367] Specifically, the metal oxide 531a may have an atomic ratio of In:Ga:Zn=1:3:4 or 1:1:0.5. The metal oxide 531b may have an atomic ratio of In:Ga:Zn=4:2:3 or 3:1:2. The metal oxide 531c may have an atomic ratio of In:Ga:Zn=1:3:4, In:Ga:Zn=4:2:3, Ga:Zn=2:1, or Ga:Zn=2:5. Specific examples of the metal oxide 531c having a stacked structure include a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio], and a stacked structure of In:Ga:Zn=4:2:3 [atomic ratio] and gallium oxide.

[0368] In this case, the main carrier path in the metal oxide 531 is the metal oxide 531b. By configuring the metal oxide 531a and the metal oxide 531c as described above, the metal oxide 531b can reduce the density of defect states at the interface between the metal oxide 531a and the metal oxide 531b and at the interface between the metal oxide 531b and the metal oxide 531c. Therefore, the metal oxide 531b reduces the effect of interface scattering on carrier conduction. Therefore, the transistor 500 can achieve a high on-state current and high frequency characteristics. When the metal oxide 531c has a stacked structure, the metal oxide 531c not only reduces the density of defect states at the interface between the metal oxide 531b and the metal oxide 531c, but also prevents the constituent elements of the metal oxide 531c from diffusing toward the insulator 550. More specifically, when an oxide not containing In is stacked above the metal oxide 531c, the metal oxide 531c can suppress diffusion of In toward the insulator 550. The insulator 550 functions as a gate insulator. Therefore, when In diffuses into the insulator 550, the transistor 500 exhibits poor characteristics. Therefore, in one embodiment of the present invention, a highly reliable display device can be provided by using the metal oxide 531c in a stacked structure.

[0369] Conductors 542 (conductors 542a and 542b) functioning as a source electrode and a drain electrode are provided on the metal oxide 531b. The conductor 542 is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing any of the above metal elements, or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain conductivity even when they absorb oxygen.

[0370] By providing the conductor 542 so as to be in contact with the metal oxide 531, the oxygen concentration may be reduced in the vicinity of the conductor 542. Furthermore, the metal oxide 531 may form a metal compound layer containing the metal contained in the conductor 542 and components of the metal oxide 531 in the vicinity of the conductor 542. In such a case, the carrier density increases in the region of the metal oxide 531 in the vicinity of the conductor 542, resulting in a low-resistance region.

[0371] Here, the region between the conductor 542a and the conductor 542b is formed to overlap with the opening of the insulator 580. This allows the transistor 500 to arrange the conductor 560 between the conductor 542a and the conductor 542b in a self-aligned manner.

[0372] The insulator 550 functions as a gate insulator. The insulator 550 is preferably disposed in contact with the top surface of the metal oxide 531c. The insulator 550 can be silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, or silicon oxide having vacancies. In particular, silicon oxide and silicon oxynitride are preferable because they are stable to heat.

[0373] The insulator 550 preferably has a reduced concentration of impurities such as water or hydrogen, similar to the insulator 524. The thickness of the insulator 550 is preferably greater than or equal to 1 nm and less than or equal to 20 nm.

[0374] The transistor 500 may include a metal oxide between the insulator 550 and the conductor 560. The metal oxide preferably suppresses oxygen diffusion from the insulator 550 to the conductor 560. Thus, the metal oxide can suppress oxidation of the conductor 560 by oxygen in the insulator 550.

[0375] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator 550, the metal oxide is preferably a high-k material with a high dielectric constant. The gate insulator can have a thermally stable layer structure with a high dielectric constant by having a stacked structure of the insulator 550 and the metal oxide. Therefore, the transistor 500 can reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. Furthermore, the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator can be reduced.

[0376] Specifically, the metal oxide may be, for example, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. In particular, it is preferable to use, for example, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), which is an insulator containing an oxide of one or both of aluminum and hafnium.

[0377] Although the conductor 560 is shown as having a two-layer structure in FIG. 26, it may have a single-layer structure or a stacked structure of three or more layers.

[0378] The conductor 560a is made of the above-mentioned hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N ２ O, NO, NO ２ It is preferable to use a conductor having a function of suppressing the diffusion of impurities such as copper atoms or copper atoms, or a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0379] The conductor 560a has a function of suppressing oxygen diffusion, and thus can suppress a decrease in conductivity due to oxidation of the conductor 560b caused by oxygen contained in the insulator 550. The conductive material having a function of suppressing oxygen diffusion is preferably, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide.

[0380] The conductor 560b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since the conductor 560 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Furthermore, the conductor 560b may have a layered structure. For example, it may have a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0381] 26A and 26C , in a region of the metal oxide 531b that does not overlap with the conductor 542, in other words, in the channel formation region of the metal oxide 531, the side surface of the metal oxide 531 is arranged to be covered with the conductor 560. This makes it easier for the electric field of the conductor 560, which functions as the first gate electrode, to act on the side surface of the metal oxide 531. This increases the on-state current of the transistor 500 and improves its frequency characteristics.

[0382] The insulator 554 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 500 from the insulator 580 side, similar to the insulator 514. For example, the insulator 554 preferably has lower hydrogen permeability than the insulator 524. Furthermore, as shown in FIGS. 26B and 26C , the insulator 554 preferably contacts the side surface of the metal oxide 531c, the top and side surfaces of the conductor 542a, the top and side surfaces of the conductor 542b, the side surfaces of the metal oxide 531a and the metal oxide 531b, and the top surface of the insulator 524. With this structure, the insulator 554 can prevent hydrogen contained in the insulator 580 from entering the metal oxide 531 from the top or side surfaces of the conductor 542a, the conductor 542b, the metal oxide 531a, the metal oxide 531b, and the insulator 524.

[0383] Furthermore, the insulator 554 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (i.e., the oxygen is less likely to permeate). For example, the insulator 554 preferably has lower oxygen permeability than the insulator 580 or the insulator 524.

[0384] The insulator 554 is preferably formed by a sputtering method. By forming the insulator 554 by a sputtering method in an oxygen-containing atmosphere, oxygen can be added to the insulator 524 near a region in contact with the insulator 554. This allows the insulator 554 to supply oxygen from the region into the metal oxide 531 through the insulator 524. The insulator 554 has a function of suppressing upward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 to the insulator 580. The insulator 522 has a function of suppressing downward diffusion of oxygen, thereby preventing oxygen from diffusing from the metal oxide 531 toward the substrate. In this way, oxygen is supplied to the channel formation region of the metal oxide 531 in the transistor 500. This reduces oxygen vacancies in the metal oxide 531, and suppresses the transistor from becoming normally on.

[0385] For example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as the insulator 554. Note that the insulator containing an oxide of one or both of aluminum and hafnium is preferably, for example, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0386] The insulator 554, which has a barrier property against hydrogen, covers the insulator 524, the insulator 550, and the metal oxide 531, thereby separating the insulator 580 from the insulator 524, the metal oxide 531, and the insulator 550. As a result, the insulator 554 can prevent impurities such as hydrogen from penetrating from the outside of the transistor 500. This allows the transistor 500 to have good electrical characteristics and reliability.

[0387] The insulator 580 is provided over the insulator 524, the metal oxide 531, and the conductor 542 with the insulator 554 interposed therebetween. For example, the insulator 580 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are preferable because they can easily form a region containing oxygen that is released by heating.

[0388] The insulator 580 preferably has a reduced concentration of impurities such as water or hydrogen. The top surface of the insulator 580 may be planarized.

[0389] Similar to the insulator 514, the insulator 574 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulator 580 from above. The insulator 574 can be, for example, an insulator that can be used for the insulator 514, the insulator 554, or the like.

[0390] An insulator 581 functioning as an interlayer film is preferably provided over the insulator 574. Like the insulator 524, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen.

[0391] The conductors 545a and 545b are arranged in openings formed in the insulators 581, 574, 580, and 554. The conductors 545a and 545b are arranged opposite each other with the conductor 560 interposed therebetween. The upper surfaces of the conductors 545a and 545b may be flush with the upper surface of the insulator 581.

[0392] Note that insulator 541a is provided in contact with the inner walls of the openings of insulators 581, 574, 580, and 554. Furthermore, a first conductor of conductor 545a is formed in contact with the side surface of insulator 541a. Conductor 542a is located on at least a portion of the bottom of the opening and is in contact with conductor 545a. Similarly, insulator 541b is provided in contact with the inner walls of the openings of insulators 581, 574, 580, and 554. Furthermore, a first conductor of conductor 545b is formed in contact with the side surface of insulator 541b. Conductor 542b is located on at least a portion of the bottom of the opening and is in contact with conductor 545b.

[0393] The conductors 545a and 545b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductors 545a and 545b may have a layered structure.

[0394] When the conductor 545 has a layered structure, the conductors in contact with the metal oxide 531a, the metal oxide 531b, the conductor 542, the insulator 554, the insulator 580, the insulator 574, and the insulator 581 preferably use the above-mentioned conductors having the function of suppressing the diffusion of impurities such as water or hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide is preferably used. Furthermore, the conductive material having the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a layered structure. By using the conductive material for the conductors 545a and 545b, it is possible to suppress the absorption of oxygen added to the insulator 580 by the conductors 545a and 545b. Furthermore, it is possible to suppress the intrusion of impurities such as water or hydrogen from layers above the insulator 581 into the metal oxide 531 through the conductors 545a and 545b.

[0395] The insulators 541a and 541b may be, for example, an insulator that can be used for the insulator 554. The insulators 541a and 541b are provided in contact with the insulator 554 and can therefore prevent impurities such as water or hydrogen from the insulator 580 or the like from being mixed into the metal oxide 531 through the conductors 545a and 545b. Furthermore, the insulators 541a and 541b can prevent oxygen contained in the insulator 580 from being absorbed by the conductors 545a and 545b.

[0396] Although not shown, a conductor functioning as wiring may be disposed in contact with the upper surface of the conductor 545a and the upper surface of the conductor 545b. The conductor functioning as wiring is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may also have a layered structure. For example, it may be a layered structure of titanium or titanium nitride and the above-mentioned conductive material. The conductor may be formed so as to be embedded in an opening provided in the insulator.

[0397] <Constituent Materials of Transistor> Constituent materials that can be used for the transistor will be described.

[0398] [Substrate] The substrate on which the transistor 500 is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of the insulating substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (e.g., an yttria-stabilized zirconia substrate), or a resin substrate. Examples of the semiconductor substrate include a semiconductor substrate such as silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Examples of the substrate include a semiconductor substrate having an insulating region inside the semiconductor substrate (e.g., an SOI (Silicon On Insulator) substrate). Examples of the conductive substrate include a graphite substrate, a metal substrate, an alloy substrate, or a conductive resin substrate. Examples of the substrate include a substrate having a metal nitride or a substrate having a metal oxide. Furthermore, the substrate may be, for example, a substrate in which a conductor or a semiconductor is provided on an insulating substrate, a substrate in which a conductor or an insulator is provided on a semiconductor substrate, or a substrate in which a semiconductor or an insulator is provided on a conductive substrate. Furthermore, the substrate may be any of these substrates on which elements are provided. The elements provided on the substrate may be, for example, a capacitance element, a resistance element, a switch element, a light-emitting element, or a memory element.

[0399] [Insulator] Examples of the insulator include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, each having insulating properties.

[0400] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current may occur due to thinner gate insulators. By using a high-k material for the insulator that functions as the gate insulator, it is possible to reduce the voltage required for transistor operation while maintaining the physical film thickness. On the other hand, by using a material with a low dielectric constant for the insulator that functions as the interlayer film, it is possible to reduce the parasitic capacitance that occurs between wiring. Therefore, it is advisable to select the material for the insulator depending on its function.

[0401] Examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0402] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin.

[0403] The electrical characteristics of a transistor including an oxide semiconductor can be stabilized by surrounding the transistor with an insulator (e.g., the insulator 514, the insulator 522, the insulator 554, the insulator 574, etc.) that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. For example, the insulator that has a function of suppressing the permeation of impurities such as hydrogen and oxygen may be a single layer or a stack of insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum. Specifically, the insulator that has a function of suppressing the permeation of impurities such as hydrogen and oxygen may be, for example, a metal oxide such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide; or a metal nitride such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride oxide, or silicon nitride.

[0404] The insulator functioning as the gate insulator is preferably an insulator having a region containing oxygen that is released by heating. For example, silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating can compensate for oxygen vacancies in the metal oxide 531 by being in contact with the metal oxide 531.

[0405] [Conductor] The conductor is preferably a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above metal elements, or an alloy combining the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are preferably used. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. The conductor may be a semiconductor with high electrical conductivity, such as polycrystalline silicon containing an impurity element such as phosphorus, or a silicide such as nickel silicide.

[0406] The conductor may be a laminate of multiple conductors made of the above-mentioned materials. For example, a laminate structure may be used in which the material containing the metal element described above and a conductive material containing oxygen are combined. Alternatively, a laminate structure may be used in which the material containing the metal element described above and a conductive material containing nitrogen are combined. Alternatively, a laminate structure may be used in which the material containing the metal element described above and a conductive material containing oxygen and a conductive material containing nitrogen are combined.

[0407] When a metal oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure of a combination of a material containing the metal element and a conductive material containing oxygen. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side of the conductor. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0408] In particular, the conductor functioning as the gate electrode preferably uses a conductive material containing oxygen and the metal element contained in the metal oxide in which the channel is formed. The conductor may also use a conductive material containing the aforementioned metal element and nitrogen. For example, titanium nitride or tantalum nitride may be used as the conductor. Alternatively, a conductive material containing nitrogen, such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide doped with silicon, may also be used. Nitrogen-containing indium gallium zinc oxide may also be used. By using such a material, the conductor may be able to capture hydrogen contained in the metal oxide in which the channel is formed. Furthermore, it may be able to capture hydrogen introduced from, for example, an external insulator.

[0409] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0410] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes and examples.

[0411] Embodiment 4 In this embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0412] <Classification of Crystal Structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 27A. Fig. 27A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (metal oxide containing In, Ga, and Zn).

[0413] As shown in FIG. 27A , oxide semiconductors are broadly classified into "amorphous," "crystalline," and "crystal." Furthermore, "amorphous" includes completely amorphous. Furthermore, "crystalline" includes c-axis-aligned crystalline line (CAAC), nanocrystalline line (nc), and cloud-aligned composite (CAC) (excluding single crystal and polycrystal). The "Crystalline" category excludes single crystal, poly crystal, and completely amorphous. The "Crystal" category includes single crystal and poly crystal.

[0414] The structure within the bold frame shown in Figure 27A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure can be said to be different from "Crystal" or the energetically unstable "Amorphous."

[0415] The crystalline structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Figure 27B shows an XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline" (the horizontal axis represents 2θ [deg.], and the vertical axis represents intensity in arbitrary units (a.u.)). The GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 27B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 27B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 27B is 500 nm.

[0416] As shown in Figure 27B, a peak indicating clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected near 2θ = 31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 27B, the peak near 2θ = 31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0417] The crystalline structure of the film or substrate can be evaluated by a diffraction pattern (also referred to as a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). FIG. 27C shows a diffraction pattern of a CAAC-IGZO film. Note that FIG. 27C shows a diffraction pattern observed by NBED, in which an electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in FIG. 27C is near In:Ga:Zn = 4:2:3 [atomic ratio]. In addition, in nanobeam electron diffraction, electron beam diffraction is performed using a probe diameter of 1 nm.

[0418] As shown in FIG. 27C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0419] [Structure of Oxide Semiconductor] Note that oxide semiconductors may be classified differently from those shown in FIG. 27A when focusing on their structures. For example, oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include, for example, polycrystalline oxide semiconductors, pseudo-amorphous-like oxide semiconductors (a-like OSs), and amorphous oxide semiconductors.

[0420] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0421] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction refers to the thickness direction of the CAAC-OS film, the normal direction to the surface where the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. Considering an atomic arrangement as a lattice arrangement, a crystalline region is also a region with a uniform lattice arrangement. Furthermore, the CAAC-OS has a region where multiple crystalline regions are connected in the a-b plane direction. The region may have distortion. The distortion refers to a point where the lattice arrangement changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in a region where multiple crystalline regions are connected. That is, the CAAC-OS is an oxide semiconductor with a c-axis aligned but no clear orientation in the a-b plane direction.

[0422] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of multiple minute crystals, the maximum diameter of the crystalline region may be several tens of nanometers.

[0423] In an In-M-Zn oxide (wherein the element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, and the like), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing the element M, zinc (Zn), and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Note that indium and the element M are mutually substituted. Therefore, the (M, Zn) layer may contain indium. The In layer may contain the element M. The In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution transmission electron microscope (TEM) image, for example.

[0424] When a CAAC-OS film is subjected to structural analysis using an XRD apparatus, for example, a peak indicating c-axis orientation is detected at or near 2θ = 31° in out-of-plane XRD measurement using θ / 2θ scanning. Note that the position of the peak indicating c-axis orientation (the value of 2θ) may vary depending on the type or composition of the metal elements constituting the CAAC-OS.

[0425] For example, in the electron diffraction pattern of a CAAC-OS film, multiple bright points (spots) are observed, and the observed spots are at positions that are point-symmetric with respect to a spot of an incident electron beam that has transmitted through the sample (also referred to as a direct spot).

[0426] When a crystalline region of a CAAC-OS is observed from the specific direction, the lattice arrangement in the crystalline region is basically a hexagonal lattice. However, the unit cell of the lattice arrangement is not necessarily a regular hexagon and may be a non-regular hexagon. Furthermore, the CAAC-OS may have a pentagonal, heptagonal, or other lattice arrangement due to the distortion. It is difficult to identify clear grain boundaries in the CAAC-OS even near the distortion. That is, it can be seen that the formation of grain boundaries is suppressed in the CAAC-OS due to the distortion of the lattice arrangement. This may be because the CAAC-OS can tolerate distortion due to the lack of a dense arrangement of oxygen atoms in the a-b plane direction or the change in the interatomic bond distance caused by the substitution of metal atoms.

[0427] Note that a crystal structure in which clear grain boundaries are observed is called polycrystalline. The grain boundaries serve as recombination centers and trap carriers. This is likely to cause a decrease in the on-state current of a transistor or a decrease in field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides having a crystal structure suitable for a semiconductor layer of a transistor. Note that a CAAC-OS preferably contains Zn. For example, In—Zn oxide and In—Ga—Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0428] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear crystal grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to crystal grain boundaries. The crystallinity of an oxide semiconductor may be reduced by one or more of impurity contamination, defect formation, and the like. Therefore, the CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (e.g., oxygen vacancies). Therefore, an oxide semiconductor having the CAAC-OS has stable physical properties. Therefore, an oxide semiconductor having the CAAC-OS is heat-resistant and highly reliable. Furthermore, the CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, when the CAAC-OS is used in an OS transistor, the manufacturing process of the OS transistor can be more flexible.

[0429] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystals. Note that the size of the microcrystals is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm. For this reason, the microcrystals are also called nanocrystals. Furthermore, in the nc-OS, no regularity is observed in the crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, the nc-OS may be indistinguishable from an a-like OS and an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD apparatus, no peak indicating crystallinity is detected in out-of-plane XRD measurement using θ / 2θ scanning. When an nc-OS film is subjected to electron diffraction (also referred to as selected area electron diffraction) using an electron beam with a probe diameter larger than that of a nanocrystal (e.g., 50 nm or more), a diffraction pattern resembling a halo pattern is observed. On the other hand, when an nc-OS film is subjected to electron diffraction (also referred to as nanobeam electron diffraction) using an electron beam with a probe diameter close to or smaller than that of a nanocrystal (e.g., 1 nm to 30 nm), an electron diffraction pattern in which multiple spots are observed within a ring-shaped region centered on a direct spot may be obtained.

[0430] [a-Like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and an amorphous oxide semiconductor. The a-like OS has pores or low-density regions. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0431] [Structure of Oxide Semiconductor] Next, the above-described CAC-OS will be described in detail. Note that the CAC-OS relates to a material structure.

[0432] [CAC-OS] CAC-OS is a material in which, for example, elements constituting a metal oxide are unevenly distributed in a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof. Note that hereinafter, a state in which one or more metal elements are unevenly distributed in a metal oxide and regions containing the metal elements are mixed in a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.

[0433] Furthermore, the CAC-OS has a mosaic structure in which a material is separated into a first region and a second region, and the first region is distributed throughout the film (hereinafter also referred to as a cloud structure). That is, the CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0434] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In—Ga—Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In—Ga—Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0435] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0436] It may be difficult to observe a clear boundary between the first region and the second region.

[0437] For example, in the case of CAC-OS in an In—Ga—Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) can confirm that the CAC-OS has a structure in which a region containing In as a main component (first region) and a region containing Ga as a main component (second region) are unevenly distributed and mixed.

[0438] Therefore, when a CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act complementarily to impart a switching function (on / off function). That is, a CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and the whole material functions as a semiconductor. In other words, by separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using a CAC-OS in a transistor, the transistor can achieve high on-state current (Ion), high field-effect mobility (μ), and good switching operation.

[0439] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0440] <Transistor Having Oxide Semiconductor> Next, a case where the oxide semiconductor is used for a transistor will be described.

[0441] By using the oxide semiconductor for a transistor, the transistor can have high field-effect mobility and high reliability.

[0442] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO") as a semiconductor layer in which a channel is formed in a transistor. Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0443] For the transistor, an oxide semiconductor having a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 １７ cm −３ Below 1 × 10, preferably １５ cm −３ More preferably, 1×10 １３ cm −３ Less than 1×10, more preferably 1×10 １１ cm −３ More preferably, 1×10 １０ cm −３ is less than 1×10 −９ cm −３ The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor, the density of defect states may be reduced by reducing the impurity concentration in the oxide semiconductor film. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0444] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states may also be low.

[0445] Charges trapped in the trap states of an oxide semiconductor take a long time to dissipate and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0446] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0447] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0448] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) is 2×10 １８ atoms / cm ３ Below 2 × 10, preferably １７ atoms / cm ３ The following applies.

[0449] When an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. Therefore, the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor measured by SIMS is 1×10 １８ atoms / cm ３ Below 2 × 10, preferably １６ atoms / cm ３ Do the following:

[0450] When an oxide semiconductor contains nitrogen, electrons serving as carriers are generated, increasing the carrier concentration and making it more likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen is likely to have normally-on characteristics. Alternatively, when an oxide semiconductor contains nitrogen, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. Therefore, the nitrogen concentration in an oxide semiconductor measured by SIMS is 5×10 １９ atoms / cm ３ Less than 5×10 １８ atoms / cm ３ Less than 1×10, more preferably 1×10 １８ atoms / cm ３ or less, more preferably 5 × 10 １７ atoms / cm ３ Do the following:

[0451] When an oxide semiconductor contains hydrogen, it may react with oxygen bonded to a metal atom to form water, forming oxygen vacancies. Furthermore, hydrogen entering the oxygen vacancies may generate electrons as carriers. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. Therefore, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, the hydrogen concentration in the oxide semiconductor measured by SIMS is 1×10 ２０ atoms / cm ３ less than 1×10 １９ atoms / cm ３ less than 5×10 １８ atoms / cm ３ less than 1×10 １８ atoms / cm ３ Make it less than.

[0452] When an oxide semiconductor in which impurities are sufficiently reduced is used for a channel formation region of a transistor, the transistor can have stable electrical characteristics.

[0453] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes and examples.

[0454] Embodiment 5 In this embodiment, electronic devices to which a semiconductor device according to one embodiment of the present invention can be applied will be described.

[0455] A semiconductor device according to one embodiment of the present invention can be applied to a display portion of an electronic device. Therefore, one embodiment of the present invention can realize an electronic device with high display quality. Alternatively, one embodiment of the present invention can realize an electronic device with extremely high resolution. Alternatively, one embodiment of the present invention can realize an electronic device with high reliability.

[0456] Examples of electronic devices using a semiconductor device or the like according to one embodiment of the present invention include display devices such as televisions and monitors, lighting devices, desktop or notebook personal computers, word processors, and DVD (Digital Versatile Examples of the equipment include image playback devices that play back still images or videos stored on recording media such as a portable CD player, a radio, a tape recorder, a headphone stereo, a stereo, a table clock, a wall clock, a cordless telephone handset, a transceiver, a car telephone, a mobile phone, a personal digital assistant, a tablet terminal, a portable game machine, a fixed game machine such as a pachinko machine, a calculator, an electronic organizer, an electronic book terminal, an electronic translator, a voice input device, a video camera, a digital still camera, an electric shaver, a high-frequency heating device such as a microwave oven, an electric rice cooker, an electric washing machine, an electric vacuum cleaner, a water heater, an electric fan, a hair dryer, an air conditioning equipment such as an air conditioner, a humidifier, a dehumidifier, a dishwasher, a dish dryer, a clothes dryer, a futon dryer, an electric refrigerator, an electric freezer, an electric refrigerator-freezer, a DNA storage freezer, a flashlight, a tool such as a chainsaw, a smoke detector, and a medical device such as a dialysis machine. Further examples include industrial equipment such as emergency lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, power storage systems, and power storage devices for power leveling and smart grids. Furthermore, mobile objects propelled by fuel-powered engines or electric motors powered by power from power storage devices may also be included in the category of electronic devices. Examples of such mobile objects include electric vehicles (EVs), hybrid vehicles (HVs) equipped with both internal combustion engines and electric motors, plug-in hybrid vehicles (PHVs), tracked vehicles in which the tires and wheels of these vehicles are replaced with tracks, mopeds including electrically assisted bicycles, motorcycles, electric wheelchairs, golf carts, small or large ships, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary probes, and spaceships.

[0457] An electronic device according to one embodiment of the present invention may include a secondary battery. Preferably, the secondary battery can be charged using contactless power transmission.

[0458] Examples of secondary batteries include lithium ion secondary batteries, nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, and silver-zinc batteries.

[0459] An electronic device according to one embodiment of the present invention may include an antenna. By receiving a signal through the antenna, images, information, and the like can be displayed on a display portion. When the electronic device includes an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0460] An electronic device according to one embodiment of the present invention may have a sensor (e.g., a sensor having the function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light, etc.).

[0461] An electronic device according to one embodiment of the present invention can have various functions, such as a function to display various information (e.g., still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, time, etc., a function to execute various software (programs), a wireless communication function, or a function to read out programs or data recorded on a recording medium.

[0462] Furthermore, electronic devices having multiple display units can have a function of mainly displaying image information on some of the display units and mainly displaying text information on other display units, or a function of displaying a stereoscopic image by displaying images taking parallax into account on the multiple display units. Furthermore, electronic devices having an image receiving unit can have a function of capturing still images or videos, a function of automatically or manually correcting the captured images, a function of saving the captured images in a recording medium (external or built into the electronic device), or a function of displaying the captured images on the display unit. Note that the functions of the electronic device according to one embodiment of the present invention are not limited to these. The electronic device according to one embodiment of the present invention can have various functions.

[0463] The semiconductor device according to one embodiment of the present invention can display high-resolution images. Therefore, the semiconductor device can be suitably used in portable electronic devices, wearable electronic devices, e-book readers, and the like. For example, the semiconductor device can be suitably used in XR devices such as VR devices and AR devices.

[0464] FIG. 28A is a diagram showing the appearance of the camera 8000 with the viewfinder 8100 attached.

[0465] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button 8004, and the like. A detachable lens 8006 is attached to the camera 8000. Note that the lens 8006 and the housing of the camera 8000 may be integrated together.

[0466] The camera 8000 can capture an image by pressing a shutter button 8004 or touching a display portion 8002 that functions as a touch panel.

[0467] The housing 8001 has a mount with electrodes, and can be connected to a finder 8100 as well as, for example, a strobe device.

[0468] The finder 8100 includes a housing 8101, a display portion 8102, a button 8103, and the like.

[0469] The housing 8101 is attached to the camera 8000 by a mount that engages with the mount of the camera 8000. The viewfinder 8100 can display, for example, an image received from the camera 8000 on a display portion 8102.

[0470] The button 8103 has a function as, for example, a power button.

[0471] A semiconductor device according to one embodiment of the present invention can be applied to a display portion 8002 of a camera 8000 and a display portion 8102 of a finder 8100. Note that the finder 8100 may be built in the camera 8000.

[0472] FIG. 28B is a diagram showing the appearance of the head-mounted display 8200.

[0473] The head-mounted display 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, and a cable 8205. The mounting portion 8201 has a built-in battery 8206.

[0474] The cable 8205 has a function of supplying power from a battery 8206 to the main body 8203. The main body 8203 includes, for example, a wireless receiver or the like and can display received video information on a display portion 8204. The main body 8203 also includes, for example, a camera and can use information on the movement of the user's eyeballs or eyelids as an input means.

[0475] The wearing unit 8201 may have a function of recognizing the line of sight by providing a plurality of electrodes at positions that come into contact with the user, the electrodes being capable of detecting a current that flows in association with the movement of the user's eyeballs. The wearing unit 8201 may also have a function of monitoring the user's pulse rate based on the current that flows through the electrodes. The wearing unit 8201 may also have various sensors, such as a temperature sensor, a pressure sensor, or an acceleration sensor. The head-mounted display 8200 may have a function of displaying biometric information of the user on the display unit 8204 or a function of changing an image displayed on the display unit 8204 in accordance with the movement of the user's head.

[0476] The semiconductor device according to one embodiment of the present invention can be applied to the display portion 8204.

[0477] 28C to 28E are diagrams showing the appearance of a head mounted display 8300. The head mounted display 8300 includes a housing 8301, a display portion 8302, a band-shaped fixture 8304, and a pair of lenses 8305.

[0478] The user can view the display on the display portion 8302 through the lens 8305. Note that the head-mounted display 8300 is preferably configured such that the display portion 8302 is curved, for example, because the user can feel a high sense of presence. Furthermore, for example, by viewing different images displayed in different regions of the display portion 8302 through the lens 8305, it is possible to perform, for example, three-dimensional display using parallax. Note that the present invention is not limited to a configuration in which one display portion 8302 is provided, and for example, two display portions 8302 may be provided, with one display portion being provided for each eye of the user.

[0479] The semiconductor device according to one embodiment of the present invention can be applied to the display portion 8302. The semiconductor device according to one embodiment of the present invention can also achieve extremely high definition. For example, even when the display is enlarged and viewed using the lens 8305 as shown in FIG. 28E , the pixels are difficult for the user to view. That is, the display portion 8302 can be used to allow the user to view a highly realistic image.

[0480] 28F is a diagram showing the appearance of a goggle-type head-mounted display 8400. The head-mounted display 8400 includes a pair of housings 8401, an attachment portion 8402, and a cushioning member 8403. A display portion 8404 and a lens 8405 are provided in each of the pair of housings 8401. The pair of display portions 8404 can display different images from each other, thereby enabling three-dimensional display using parallax.

[0481] A user can view the display on the display portion 8404 through the lens 8405. The lens 8405 has a focus adjustment mechanism, and the position of the lens 8405 can be adjusted according to the user's eyesight. The display portion 8404 is preferably a square or a horizontally long rectangle. This can enhance the sense of realism.

[0482] The wearing portion 8402 preferably has plasticity and elasticity so that it can be adjusted according to the size of the user's face and does not slip off. Furthermore, a portion of the wearing portion 8402 preferably has a vibration mechanism that functions as a bone conduction earphone, for example. This allows the user to enjoy video and audio simply by wearing the device, without the need for separate earphones or audio equipment such as a speaker. The housing 8401 may also have a function for outputting audio data via wireless communication, for example.

[0483] The mounting portion 8402 and the buffer member 8403 are portions that come into contact with the user's face (forehead, cheek, etc.). The close contact of the buffer member 8403 with the user's face can prevent light leakage and enhance the sense of immersion. The buffer member 8403 is preferably made of a soft material so that it can be in close contact with the user's face when the user wears the head-mounted display 8400. For example, materials such as rubber, silicone rubber, urethane, or sponge can be used. Furthermore, for example, using a sponge or the like with a surface covered with cloth or leather (natural leather or synthetic leather) can prevent gaps from forming between the user's face and the buffer member 8403, thereby effectively preventing light leakage. Furthermore, using such materials is preferable because they are pleasant to the touch and do not cause the user to feel cold when worn, for example, in cold seasons. It is preferable that components that come into contact with the user's skin, such as the buffer member 8403 or the mounting portion 8402, be removable for easy cleaning or replacement.

[0484] 29A is a diagram showing an example of a television device. A television device 7100 has a display unit 7000 built into a housing 7101. Here, the housing 7101 is supported by a stand 7103.

[0485] In FIG. 29A , the semiconductor device according to one embodiment of the present invention can be applied to the display portion 7000 .

[0486] 29A can be operated using an operation switch provided on the housing 7101 or a separate remote control 7111. Alternatively, a touch sensor may be provided on the display portion 7000, so that the television set 7100 can be operated by touching the display portion 7000 with a finger or the like. The remote control 7111 may have a display portion that displays information output from the remote control 7111. The television set 7100 can be operated to change channels or volume using operation keys or a touch panel provided on the remote control 7111. Furthermore, an image displayed on the display portion 7000 can be operated.

[0487] The television device 7100 may be configured to include, for example, a receiver and a modem. The receiver can receive general television broadcasts. By connecting to a wired or wireless communication network via the modem, information communication can be performed in one direction (from a sender to a receiver) or two directions (for example, between a sender and a receiver, or between receivers).

[0488] 29B shows an example of a laptop personal computer 7200. The laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214. The housing 7211 includes a display portion 7000.

[0489] In FIG. 29B , the semiconductor device according to one embodiment of the present invention can be applied to the display portion 7000 .

[0490] 29C and 29D are diagrams showing an example of digital signage.

[0491] 29C includes a housing 7301, a display portion 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, or the like.

[0492] 29D is a diagram showing a digital signage device attached to a cylindrical pole. The digital signage device 7400 has a display unit 7000 provided along the curved surface of the pole 7401.

[0493] 29C and 29D, the semiconductor device according to one embodiment of the present invention can be applied to the display portion 7000.

[0494] The larger the display unit 7000 of the digital signage 7300 or the digital signage 7400, the more information can be provided at one time. Furthermore, the larger the display unit 7000, the more easily it attracts people's attention, which can increase the advertising effectiveness of, for example, advertisements.

[0495] Furthermore, it is preferable that the digital signage 7300 or the digital signage 7400 has a touch panel applied to the display unit 7000. This not only allows images or videos to be displayed on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used to provide information such as route information or traffic information, intuitive operation can improve usability.

[0496] 29C and 29D , the digital signage 7300 or the digital signage 7400 is preferably capable of wirelessly linking with, for example, an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Furthermore, the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.

[0497] Furthermore, the digital signage 7300 or the digital signage 7400 can also run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller), thereby allowing an unspecified number of users to simultaneously participate in and enjoy the game.

[0498] 29E illustrates an example of an information terminal. The information terminal 7550 includes a housing 7551, a display portion 7552, a microphone 7557, a speaker portion 7554, a camera 7553, an operation switch 7555, and the like. A semiconductor device according to one embodiment of the present invention can be applied to the display portion 7552. The display portion 7552 can function as a touch panel. The information terminal 7550 can include an antenna, a battery, and the like inside the housing 7551. The information terminal 7550 can be used as, for example, a smartphone, a mobile phone, a tablet information terminal, a tablet personal computer, an e-book reader, or the like.

[0499] 29F is a diagram showing an example of a wristwatch-type information terminal. The information terminal 7660 includes a housing 7661, a display portion 7662, a band 7663, a buckle 7664, operation switches 7665, and an input / output terminal 7666. The information terminal 7660 may also include, for example, an antenna and a battery inside the housing 7661. The information terminal 7660 can execute various applications such as mobile phone calls, e-mail, text browsing and creation, music playback, internet communication, and computer games.

[0500] The information terminal 7660 also includes a touch sensor on the display portion 7662, allowing it to be operated by touching the screen with a finger or a stylus, for example. For example, an application can be started by touching an icon 7667 displayed on the display portion 7662. The operation switch 7665 can have various functions, such as time setting, power on / off operation, wireless communication on / off operation, silent mode activation / deactivation, or power saving mode activation / deactivation. For example, the functions of the operation switch 7665 can be set by an operating system incorporated in the information terminal 7660.

[0501] The information terminal 7660 can also perform short-range wireless communication according to a communication standard. For example, hands-free conversation is also possible by mutual communication with a wireless headset. The information terminal 7660 can also transmit and receive data to and from other information terminals via the input / output terminal 7666. Charging can also be performed via the input / output terminal 7666. Note that charging may also be performed by wireless power supply without using the input / output terminal 7666.

[0502] 30A is a diagram illustrating the appearance of an automobile 9700. FIG. 30B is a diagram illustrating a driver's seat of the automobile 9700. The automobile 9700 includes a body 9701, wheels 9702, a dashboard 9703, and lights 9704. A display device according to one embodiment of the present invention can be used for the display portion of the automobile 9700, for example. For example, the display device according to one embodiment of the present invention can be used for each of display portions 9710 to 9715 illustrated in FIG. 30B.

[0503] The display portion 9710 and the display portion 9711 are display devices provided on a windshield of an automobile. The display device according to one embodiment of the present invention can be a so-called see-through display device, in which the other side can be seen through, by forming electrodes of the display device using a light-transmitting conductive material. A see-through display device does not obstruct visibility even when driving the automobile 9700. Therefore, the display device according to one embodiment of the present invention can be installed on the windshield of the automobile 9700. Note that when the display device includes a transistor for driving the display device, for example, the transistor may be a light-transmitting transistor, such as an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor.

[0504] The display portion 9712 is a display device provided at a pillar portion. For example, by displaying an image from an imaging means provided in the vehicle body 9701 on the display portion 9712, the view blocked by the pillar can be complemented. The display portion 9713 is a display device provided at the dashboard 9703. For example, by displaying an image from an imaging means provided in the vehicle body 9701 on the display portion 9713, the view blocked by the dashboard 9703 can be complemented. That is, the automobile 9700 can complement blind spots and improve safety by displaying images from an imaging means provided in the vehicle body 9701 on the display portions 9712 and 9713. Furthermore, by displaying an image that complements the invisible parts, safety can be confirmed more naturally and without discomfort.

[0505] 31 is a diagram showing the interior of an automobile 9700 that employs bench seats for the driver's seat and passenger seat. The display unit 9721 is a display device provided in the door. For example, by displaying an image from an imaging means provided in the vehicle body 9701 on the display unit 9721, it is possible to complement the view blocked by the door. The display unit 9722 is a display device provided in the steering wheel. The display unit 9723 is a display device provided in the center of the seat surface of the bench seat.

[0506] The display unit 9714, the display unit 9715, or the display unit 9722 can provide the user with various information by displaying, for example, navigation information, driving speed, engine RPM, mileage, remaining fuel, gear status, or air conditioning settings. The display items and layout displayed on the display unit can be changed as appropriate to suit the user's preferences. The information can also be displayed on one or more of the display units 9710 to 9713, the display unit 9721, and the display unit 9723. One or more of the display units 9710 to 9715 and the display units 9721 to 9723 can also be used as lighting devices.

[0507] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiment modes and examples.

[0508] 100A: circuit, 111: drive circuit, 112: drive circuit, 121: switching circuit, 131A: selection circuit, 132A: selection circuit, 111-O: terminal, 112-O: terminal, 121-1: terminal, 121-2: terminal, 131A-I: terminal, 132A-I: terminal, SG1: signal generation circuit, SG2: signal generation circuit, SW1: switch, SW2: switch, SC1: switch, 141: terminal, 142: terminal, 143: terminal, Trnsw: n-channel transistor transistor, Trpsw: p-type channel transistor, INVsw: inverter, STB0: terminal, STB1: terminal, CHG1: terminal, INV0: inverter, INV1: inverter, XOR: circuit, 152: terminal, 154: terminal, PTL: pass transistor logic circuit, AMP: amplifier, SE1: switch, SE2: switch, SL1: terminal, SL2: terminal, SEL1: terminal, SEL2: terminal, PX1: pixel circuit, PX2: pixel circuit

Claims

1. a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit; the first driving circuit has a function of generating an analog first data signal and a function of outputting the first data signal from an output terminal of the first driving circuit; the second driving circuit has a function of generating an analog second data signal and a function of outputting the second data signal from the output terminal; an output terminal of the first driving circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switching circuit; an output terminal of the first driving circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switching circuit; the first selection circuit has a function of establishing a conductive state or a non-conductive state between an input terminal of the first selection circuit and an output terminal of the first selection circuit; the second selection circuit has a function of establishing a conductive state or a non-conductive state between an input terminal of the second selection circuit and an output terminal of the second selection circuit; the switching circuit has a function of bringing a state between a first terminal of the switching circuit and a second terminal of the switching circuit into one of a conductive state and a non-conductive state; Semiconductor device.

2. In claim 1, The device has a function of operating in a first mode, a second mode, and a third mode; In the first mode, either one of an input terminal of the first selection circuit and an output terminal of the first selection circuit or an input terminal of the second selection circuit and an output terminal of the second selection circuit is in a conductive state, and the other is in a non-conductive state; In the first mode, a state in which a first terminal of the switching circuit and a second terminal of the switching circuit are electrically connected to each other, In the first mode, the first data signal is output from an output terminal of the first driving circuit; In the first mode, the second data signal is not output from the output terminal of the second driving circuit; In the second mode, either one of an input terminal of the first selection circuit and an output terminal of the first selection circuit or an input terminal of the second selection circuit and an output terminal of the second selection circuit is in a conductive state, and the other is in a non-conductive state; In the second mode, a state in which a first terminal of the switching circuit and a second terminal of the switching circuit are electrically connected to each other, In the second mode, the first data signal is not output from the output terminal of the first driving circuit, In the second mode, the second data signal is output from an output terminal of the second driving circuit; In the third mode, a conductive state is established between the input terminal of the first selection circuit and the output terminal of the first selection circuit; In the third mode, a conductive state is established between the input terminal of the second selection circuit and the output terminal of the second selection circuit; In the third mode, a non-conductive state is established between the first terminal of the switching circuit and the second terminal of the switching circuit; In the third mode, the first data signal is output from an output terminal of the first driving circuit; In the third mode, the second data signal is output from an output terminal of the second driving circuit. Semiconductor device.

3. A semiconductor device comprising: the semiconductor device according to claim 1; a first pixel circuit; and a second pixel circuit, the first pixel circuit is electrically connected to an output terminal of the first selection circuit; the second pixel circuit is electrically connected to an output terminal of the second selection circuit; Display device.

4. a first drive circuit, a second drive circuit, a first selection circuit, a second selection circuit, and a switching circuit; the first driving circuit has a function of generating an analog first data signal and a function of outputting the first data signal from an output terminal of the first driving circuit; the second driving circuit has a function of generating an analog second data signal and a function of outputting the second data signal from the output terminal; an output terminal of the first driving circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switching circuit; an output terminal of the first driving circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switching circuit; the first selection circuit has a function of bringing an input terminal of the first selection circuit and one of a plurality of output terminals of the first selection circuit into a conductive state, and bringing an input terminal of the first selection circuit and each of the remaining output terminals of the first selection circuit into a non-conductive state; the second selection circuit has a function of bringing an input terminal of the second selection circuit and one of a plurality of output terminals of the second selection circuit into a conductive state, and bringing an input terminal of the second selection circuit and each of the remaining output terminals of the second selection circuit into a non-conductive state; the switching circuit has a function of bringing a state between a first terminal of the switching circuit and a second terminal of the switching circuit into one of a conductive state and a non-conductive state; Semiconductor device.

5. In claim 4, The device has a function of operating in a first mode, a second mode, and a third mode; In the first mode, either one of the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit or the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit is in a conductive state, and the other is in a non-conductive state; in the first mode, a non-conductive state is established between the input terminal of the first selection circuit and each of the remaining output terminals of the first selection circuit, and between the input terminal of the second selection circuit and each of the remaining output terminals of the second selection circuit; In the first mode, a state in which a first terminal of the switching circuit and a second terminal of the switching circuit are electrically connected to each other, In the first mode, the first data signal is output from an output terminal of the first driving circuit; In the first mode, the second data signal is not output from the output terminal of the second driving circuit; In the second mode, either one of the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit or the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit is in a conductive state, and the other is in a non-conductive state; in the second mode, a non-conductive state is established between the input terminal of the first selection circuit and each of the remaining output terminals of the first selection circuit, and between the input terminal of the second selection circuit and each of the remaining output terminals of the second selection circuit; In the second mode, a state in which a first terminal of the switching circuit and a second terminal of the switching circuit are electrically connected to each other, In the second mode, the first data signal is not output from the output terminal of the first driving circuit, In the second mode, the second data signal is output from an output terminal of the second driving circuit; in the third mode, a conductive state is established between the input terminal of the first selection circuit and one of the plurality of output terminals of the first selection circuit, and a non-conductive state is established between the input terminal of the first selection circuit and each of the remaining plurality of output terminals of the first selection circuit; in the third mode, a conductive state is established between the input terminal of the second selection circuit and one of the plurality of output terminals of the second selection circuit, and a non-conductive state is established between the input terminal of the second selection circuit and each of the remaining plurality of output terminals of the second selection circuit; In the third mode, a non-conductive state is established between the first terminal of the switching circuit and the second terminal of the switching circuit; In the third mode, the first data signal is output from an output terminal of the first driving circuit; In the third mode, the second data signal is output from an output terminal of the second driving circuit. Semiconductor device.

6. A semiconductor device comprising: the semiconductor device according to claim 4; a first pixel circuit; and a second pixel circuit, the first pixel circuit is electrically connected to at least one of a plurality of output terminals of the first selection circuit; the second pixel circuit is electrically connected to at least one of a plurality of output terminals of the second selection circuit; Display device.

7. A semiconductor device comprising: the semiconductor device according to claim 4; a first pixel circuit; and a second pixel circuit, the first pixel circuit is electrically connected to all of the plurality of output terminals of the first selection circuit; the second pixel circuit is electrically connected to all of the plurality of output terminals of the second selection circuit; Display device.

8. A display device comprising the display device according to claim 3 and a housing. electronic equipment.

9. A display device comprising the display device according to claim 6 and a housing. electronic equipment.

10. A display device comprising the display device according to claim 7 and a housing. electronic equipment.