Encoding device and encoding method

Abstract

An encoding device comprising: a quantization circuit that generates a quantization parameter that includes information about a vector quantization codebook; and a control circuit that sets the number of available bits according to conditions for encoding based on the difference between the number of bits available for encoding of the target sub-vector and the number of bits for the quantization parameter of the target sub-vector.

Description

Encoding device, decoding device, encoding method, and decoding method

[0001] The present disclosure relates to an encoding device, a decoding device, an encoding method, and a decoding method.

[0002] One of the quantization methods used in audio or speech coding (e.g., excitation signal coding) is multi-rate lattice vector quantization (see, for example, Non-Patent Document 1). Multi-rate lattice vector quantization may be applied to split vector quantization (e.g., called split multi-rate lattice vector quantization or split multi-rate lattice vector quantization). Split multi-rate lattice vector quantization may also be applied to algebraic vector quantization (AVQ).

[0003] International Publication No. 2013 / 061531

[0004] 3GPP TS 26.445 V16.0.0, "Codec for Enhanced Voice Services (EVS); Detailed Algorithmic Description (Release 16)", 2019-06.

[0005] However, there is room for further study on how to reduce the number of coding bits in multi-rate lattice vector quantization.

[0006] Non-limiting embodiments of the present disclosure contribute to providing an encoding device, a decoding device, an encoding method, and a decoding method that reduce the number of coding bits in vector quantization.

[0007] An encoding device according to one embodiment of the present disclosure includes a quantization circuit that generates a quantization parameter including information about a vector quantization codebook, and a control circuit that sets the number of bits available for encoding a target subvector according to conditions in encoding based on the difference between the number of bits available for encoding the target subvector and the number of bits of the quantization parameter for the target subvector.

[0008] These comprehensive or specific aspects may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a recording medium, or may be realized as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0009] According to an embodiment of the present disclosure, the number of coding bits can be reduced in multi-rate lattice vector quantization.

[0010] Further advantages and benefits of one embodiment of the present disclosure will become apparent from the specification and drawings. Such advantages and / or benefits may be provided by some embodiments and features described in the specification and drawings, respectively, but not necessarily all of them may be provided to obtain one or more identical features.

[0011] Diagram showing an example of a codebook list in split multi-rate lattice vector quantization. Block diagram showing an example of the configuration of part of the Algebraic Code Excited Linear Prediction (ACELP) encoding unit in the Enhanced Voice Services (EVS) codec. Algebraic Vector Quantization in the EVS codec. Quantizer (AVQ) encoding related example block diagram Block diagram showing an example of a configuration related to AVQ encoding Block diagram showing an example of a configuration of an encoding device according to embodiment 1 Diagram showing an example of a sub-vector selection process Diagram showing an example of a code conversion process Diagram showing an example of a code conversion process Diagram showing an example of a code conversion process Diagram showing an example of a code conversion process Diagram showing an example of a process for encoding the number of unused bits Diagram showing an example of a correspondence relationship between the number of unused bits and the number of unused bits encoded code Block diagram showing an example of a configuration of a decoding device according to embodiment 1 Block diagram showing an example of a configuration of an encoding device according to embodiment 2 Diagram showing an example of a code conversion process ... another example of a code conversion process Diagram showing an example of a process for encoding the number of unused bits Diagram showing an example of a process for updating the number of bits available for encoding the sub-vector to be code converted Block diagram showing an example of a configuration of a decoding device according to embodiment 2 Diagram showing an example of a decoding process Diagram showing an example of a decoding process Diagram showing an example of a decoding process Diagram showing an example of a decoding process Diagram showing another example of a decoding process Diagram showing an example of a decoding process based on the number of unused bits Diagram showing an example of a process for updating the number of bits available for encoding the sub-vector to be code converted

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0013] For example, in split multi-rate lattice vector quantization, a signal in the time domain or frequency domain (or spectral domain) may be divided into multiple sub-vectors (SVs, also called sub-bands or sub-blocks), and multi-rate lattice vector quantization may be performed on each of the multiple divided sub-vectors.

[0014] FIG. 1 is a diagram showing an example of a list of codebooks (also called codebooks) in multi-rate lattice vector quantization for subvectors (see, for example, Patent Document 1 or Non-Patent Document 1).

[0015] For example, as shown in FIG. 1 , the quantization parameters in split multi-rate lattice vector quantization may include information identifying a codebook used for quantization (e.g., referred to as a “codebook indicator” or a codebook index) and information identifying a codevector to be selected from among multiple codevectors included in the codebook (e.g., referred to as a “code vector index”).

[0016] For example, in each of the codebooks Q0, Q2, Q3, Q4, Q5, ..., Qn shown in Figure 1, 1, 10, 15, 20, 25, ..., 5n bits (n is an integer greater than or equal to 2) may be used to encode (or quantize) one subvector (SV). Of the number of bits used for encoding using each codebook (e.g., the total number of bits used), 1, 2, 3, 4, 5, ..., n bits (n is an integer greater than or equal to 2) may be used for the codebook indicator value. In other words, in Figure 1, the ratio of the number of bits allocated to encoding the codebook indicator value to the total number of bits used for encoding using each codebook (e.g., 5n, where n is an integer greater than 1) may be 1 / 5.

[0017] Note that the codebook Q0 may include one vector (e.g., a zero vector or a null vector). The zero vector means, for example, that the quantized value of the vector is 0. Therefore, the codebook Q0 does not need to define a code vector index, and the number of bits used for the code vector index may be 0. For example, the codebook Q0 may use 1 bit for the codebook indicator value.

[0018] For example, an encoder may collectively encode multiple subvectors (e.g., eight SVs in Non-Patent Document 1) using the codebook shown in Fig. 1. Note that the number of bits available for encoding multiple subvectors (e.g., referred to as the "total number of bits") may be known between the encoder and decoder.

[0019] For example, Patent Document 1 proposes a bit reduction method for split multi-rate lattice vector quantization for eight SVs. For example, based on the number of bits used for seven of the eight SVs, a codebook indication value (codebook index) used for the remaining one SV may be estimated according to the following equation (1) (see, for example, Patent Document 1):

[0020] In equation (1), cb'fix indicates an estimated number of bits used for the codebook indication value for one SV (e.g., subvector number i=Pfix), Bitsavailable indicates the total number of bits available for encoding eight SVs, and ΣBitscbvi indicates the sum of the number of bits used for encoding the other seven subvectors vi (i≠Pfix) that are different from subvector number i=Pfix (e.g., the total number of bits used in Figure 1).

[0021] In Patent Document 1, for example, for one SV (e.g., i=Pfix), the encoding device quantizes (or encodes) the difference between the estimated value cb'fix of the number of bits used for the codebook indicated value shown in Equation (1) and the number of bits of the actual codebook indicated value, and transmits the difference information to the decoding device. For example, the larger the codebook number n used for one SV, the smaller the amount of information (e.g., the number of bits) of the difference information becomes than the codebook indicated value, and the number of encoding bits can be reduced.

[0022] However, in Patent Document 1, for example, there are cases where the difference information (in other words, the object to be coded) becomes a negative number (for example, -1), and since a quantization level or code corresponding to the negative number is used, the complexity of coding (or quantization) may increase.

[0023] Furthermore, when encoding one identified SV using codebook Q0 (e.g., codebook instruction value "0") or codebook Q2 under special conditions (e.g., codebook instruction value "1"), it may not be possible to reduce the number of encoding bits.

[0024] Here, the special case may be, for example, a case where, of the total number of bits available for encoding, there are no unused bits for encoding and all bits are used for encoding. In this case, for example, in FIG. 1 , among the multiple bits indicating the codebook indication value of each codebook, the trailing "0" (also called a stop bit) may be omitted. For example, in this special case, the codebook indication value of codebook Q2 may be "1" (1 bit) obtained by omitting the "0" from "10".

[0025] Furthermore, for example, when focusing on bit reduction of an SV that uses a larger number of bits for encoding among multiple SVs, it may not be possible to reduce the number of encoding bits if an SV occurs that uses 0 bits for encoding (for example, an SV that is not encoded due to a lack of available bits). Note that an SV that uses 0 bits for encoding is likely to be, for example, a high-frequency SV among multiple SVs (for example, the sixth, seventh, or eighth SV out of eight SVs).

[0026] Therefore, in one embodiment of the present disclosure, a method for reducing the number of coding bits used for encoding (in other words, variable length code) codebook indication values ​​of multi-rate lattice vector quantization (LVQ: Lattice VQ) applied to split vector quantization (e.g., SVQ: Split VQ) is described.

[0027] In the following, as an example, the Enhanced Voice Services (EVS) codec will be described, in which multi-rate lattice vector quantization is used as AVQ. Although AVQ is used for vector quantization of Discrete Cosine Transform (DCT) coefficients, the quantization and coding of DCT coefficients (i.e., frequency domain) is not limited thereto. For example, AVQ (or multi-rate lattice vector quantization) can also be applied to vector quantization in the time domain.

[0028] In the following, as an example, a case where the number of divisions into sub-vectors in AVQ is set to eight (for example, SV1 to SV8) will be described. Note that the number of divisions into sub-vectors is not limited to eight, and other numbers may be used.

[0029] (First Embodiment) [Configuration Example of Encoding Device] Fig. 2 is a block diagram showing a configuration example of an Algebraic Code Excited Linear Prediction (ACELP) encoding device for EVS codec (for example, Figure 29 of Non-Patent Document 1). Fig. 3 is a block diagram showing signal processing related to an AVQ encoding unit (for example, AVQ encoder) in Fig. 2. An embodiment of the present disclosure is applicable to, for example, encoding of codebook indicators (Codebook Indices) output from the AVQ encoding units (AVQ enc blocks or Split Lattice VQ blocks) in Figs. 2 and 3.

[0030] 4 is a block diagram showing an example of a signal processing configuration of an AVQ encoding unit (hereinafter, for convenience, referred to as an "encoding device") 100 according to an embodiment of the present disclosure. The encoding device 100 shown in FIG. 4 may include a multiplier 101, a subtractor 102, a de-emphasis unit 103, a DCT unit 104, an AVQ encoding unit (or a split multi-rate lattice vector quantization unit) 105 (e.g., corresponding to a quantization circuit), a floating bit count management unit 106, an inverse DCT (iDCT) unit 107, a subvector identification unit 108, a code conversion unit 109 (e.g., corresponding to a control circuit), and a multiplexer 110.

[0031] For example, multiplier 101 may multiply an adaptive codebook vector v(n) input from an adaptive codebook by an adaptive codebook gain (or pitch gain) gp, and output the multiplication result to subtractor 102.

[0032] The subtractor 102 may, for example, subtract the adaptive codebook vector multiplied by the adaptive codebook gain input from the multiplier 101 from the linear prediction residual signal r(n), which is the coding target in ACELP coding, to determine (e.g., calculate) the excitation residual signal qin(n). The excitation residual signal qin(n) may be calculated based on, for example, the following equation (2). The subtractor 102 may output the excitation residual signal qin(n) to the de-emphasis unit 103.

[0033] The de-emphasis unit 103 may be, for example, a de-emphasis filter Fp(z) and may perform de-emphasis processing on the excitation residual signal qin(n) input from the subtractor 102. The de-emphasis unit 103 may output the excitation residual signal qin,d(n) after the de-emphasis processing to the DCT unit 104.

[0034] The DCT unit 104 may convert the excitation residual signal qin,d(n) input from the de-emphasis unit 103 into DCT coefficients and output the DCT coefficients to the AVQ encoding unit 105. Note that the method of converting a time domain signal into a frequency domain signal is not limited to DCT processing, and other methods such as a Discrete Fourier Transform (DFT) or a Modified Discrete Cosine Transform (MDCT) may also be used.

[0035] The AVQ encoding unit 105 may perform split lattice vector quantization (or AVQ encoding) on ​​the DCT coefficients of the excitation residual signal qin,d(n) input from the DCT unit 104.

[0036] For example, the AVQ encoding unit 105 may divide the DCT coefficients into a plurality of sub-vectors (SVs), quantize each of the plurality of sub-vectors, and generate quantization parameters including codebook numbers (also called codebook indicator values ​​or codebook indices) indicating a codebook and a codevector index indicating one of a plurality of codevectors included in the codebook.

[0037] Furthermore, the AVQ encoding unit 105 may determine the number of bits to be allocated to AVQ or the bit allocation (AVQ bit budget) based on, for example, the sum of the fixed number of bits (or a predetermined number of bits, fixed bit-budget) and the floating number of bits (e.g., the number of additional bits available for use) (floating bit-budget) input from the floating bit number management unit 106 for each subframe to be encoded, and output this to the code conversion unit 109. Furthermore, the AVQ encoding unit 105 may output, for example, information on the floating bit number (floating bit-budget), which is updated based on the number of bits remaining after AVQ, to the floating bit number management unit 106.

[0038] The AVQ encoder 105 may, for example, output a global gain code from among the quantization parameters obtained by quantization to the multiplexer 110. The AVQ encoder 105 may also output codebook numbers for each subvector, codevector indices for each subvector, and the number of bits allocated to AVQ (AVQ bit budget) to the code converter 109. The AVQ encoder 105 may also output DCT coefficients of the quantized excitation residual signal qin,d(n) to the inverse DCT unit 107.

[0039] The floating bits manager 106 may hold (or manage) information regarding the number of bits available for use within an encoding processing frame, based on information regarding the number of floating bits input from the AVQ encoder 105. For example, the floating bits manager 106 may output the number of bits it holds as the number of floating bits to the AVQ encoder 105 for AVQ encoding of a subsequent subframe.

[0040] The inverse DCT unit 107 may perform inverse DCT transformation on the DCT coefficients of qin,d(n) input from the AVQ encoding unit 105, and output a quantized excitation residual signal qd(n).

[0041] For example, the subvector identification unit 108 may identify a dominant subvector from among multiple subvectors based on the input adaptive codebook vector v(n). The subvector identification unit 108 may output information related to the position of the dominant subvector (e.g., dominant subvector information) to the code conversion unit 109. For example, since the target of quantization or encoding in the AVQ encoding unit 105 is a DCT coefficient, the subvector identification unit 108 may convert the adaptive codebook vector v(n) into a DCT coefficient and identify the position (or frequency) of the subvector having the maximum energy in the DCT coefficient domain (or frequency domain) of the adaptive codebook vector v(n). Note that if the target of quantization or encoding in the AVQ encoding unit 105 is a time-domain signal, the subvector identification unit 108 does not need to convert the adaptive codebook vector v(n) into a DCT coefficient.

[0042] Alternatively, the subvector identification unit 108 may be a memory that outputs information regarding the position of a predetermined specific subvector to the code conversion unit 109, regardless of the adaptive codebook vector v(n). In this case, the position of the specific subvector is fixed. Therefore, for example, if an embodiment of the present disclosure is realized by a software program, the position of the specific subvector may be written into the program. For example, the subvector identification unit 108 may set the third subvector or the last subvector of multiple (e.g., eight) subvectors as the specific subvector. Note that the specific subvector is not limited to the third subvector or the last subvector, and may be a subvector in another order. For example, the position of the specific subvector may be set to a position (e.g., the highest position) that has a higher probability (frequency) of having a larger codebook number, as determined experimentally or statistically.

[0043] The code conversion unit 109 (Codebook indications conversion) may convert the coding information of the codebook number of a specific subvector (e.g., a subvector to be code converted) based on, for example, the codebook number and code vector index of each of the multiple subvectors input from the AVQ encoding unit 105, information on the number of bits allocated to AVQ in one subframe (AVQ bit-budget), and main subvector information input from the subvector identification unit 108.

[0044] For example, if the number of sub-vectors is eight, the code conversion unit 109 may output, to the multiplexing unit 110, coding information including codebook indicator values ​​(Codebook indexes) and code vector indexes for the eight sub-vectors, or may output, to the multiplexing unit 110, coding information including codebook indicator values ​​for seven sub-vectors, an indicator value for the number of unused bits (for example, referred to as an unused bit number indicator value), and code vector indexes for the eight sub-vectors.

[0045] The multiplexing unit 110 may multiplex the global gain input from the AVQ encoding unit 105 and the encoding information input from the code conversion unit 109, and output the multiplexed bitstream information (e.g., AVQ code).

[0046] Next, an example of the operation of the encoding device 100 will be described.

[0047] [Example of selection of subvectors to be code converted] The code conversion unit 109 may select subvectors to be code converted (also referred to as target subvectors, for example) based on, for example, primary subvector information input from the subvector identification unit 108 (for example, information indicating a subvector identified as a primary subvector) and the number of bits allocated to AVQ of one subframe input from the AVQ encoding unit 105 (number of bits allocated for vector quantization).

[0048] FIG. 5 is a diagram illustrating an example of a process for selecting sub-vectors to be subjected to code conversion.

[0049] In FIG. 5, the code conversion unit 109 determines, for example, the number of AVQ bits (AVQ bit-budget) available in a sub-frame (for example, AVQ sub-frame) (S101).

[0050] The code conversion unit 109 determines whether the AVQ bit-budget exceeds a threshold (S102). The threshold may be set to, for example, 85 bits / subframe, or another value. The threshold may be set experimentally or statistically, for example.

[0051] If the AVQ bit-budget exceeds the threshold (S102: Yes), the code conversion unit 109 may select, from among the multiple subvectors, a subvector identified by the primary subvector information as the subvector to be subjected to code conversion (S103).

[0052] On the other hand, if the AVQ bit-budget is equal to or less than the threshold (S102: No), the code conversion unit 109 may set, for example, the last subvector (e.g., the eighth subvector SV8) among the multiple subvectors as the subvector to be code converted (S104).

[0053] For example, the code conversion unit 109 may apply a code conversion process, which will be described later, to the selected sub-vectors to be code converted.

[0054] An example of selecting subvectors to be code converted has been described above.

[0055] The selection of subvectors to be code converted may be performed in the subvector identification unit 108, rather than in the code conversion unit 109. In this case, information on the AVQ bit budget may be input to the subvector identification unit 108. For example, the subvector identification unit 108 may output, to the code conversion unit 109, main subvector information related to the subvectors selected as subvectors to be code converted.

[0056] [Code Conversion Example] Next, an example of the code conversion process in the code conversion unit 109 will be described.

[0057] For example, the code conversion unit 109 may perform the following steps 1 to 3 based on the codebook instruction values ​​of the multiple subvectors input from the AVQ encoding unit 105 and the selected subvector to be code converted.

[0058] (Step 1) The code conversion unit 109 sets, for example, codebook indicator values ​​of other subvectors (for example, N-1 subvectors) at positions different from the subvector to be code converted, among a plurality of (for example, N) codebook indicator values, to codes (or encoded codes). Then, the code conversion unit 109 may calculate, for example, the sum of the number of used bits of the codebook indicator values ​​and the number of used bits of the code vector index in the N-1 subvectors.

[0059] (Step 2) The code conversion unit 109 may calculate the number of bits available for encoding the codebook indicator value of the subvector to be code converted. For example, the code conversion unit 109 may calculate the number of bits available for encoding the codebook indicator value of the subvector to be code converted by subtracting the sum of the numbers of bits used for encoding the N-1 subvectors calculated in (Step 1) from the total number of bits available for AVQ encoding (AVQ bit-budget).

[0060] (Step 3) The code conversion unit 109 may, for example, calculate the number of bits not used for encoding (e.g., referred to as the number of unused bits) from the number of bits available for encoding the subvector to be code converted calculated in (Step 2), and encode the number of unused bits. For example, the code conversion unit 109 may calculate the number of unused bits by subtracting the sum of the number of bits used for the codebook indication value of the subvector to be code converted and the number of bits used for the code vector index from the number of available bits calculated in (Step 2).

[0061] The code conversion unit 109 may output, for example, the codebook indication value (encoded code) obtained by (step 1) to (step 3) and information obtained by encoding the number of unused bits (also referred to as, for example, the unused bit number indication value or the unused bit number encoded code) to the multiplexing unit 110.

[0062] Next, an example of the operation of the code conversion unit 109 will be described.

[0063] 6, 7 and 8 are flow charts showing examples of processing by the code conversion unit 109. FIG.

[0064] 6, the code conversion unit 109 may classify a plurality of subvectors to be coded into two groups (S201). For example, if there are eight subvectors to be coded (e.g., SV1 to SV8), the code conversion unit 109 may classify the eight subvectors into the following two groups: Group 1: SV1 to SV5, excluding the subvector (SVd) selected for code conversion; Group 2: SV6 to SV8 and SVd.

[0065] For example, if the subvector to be code converted is SVd=SV3, Group 1 may include SV1, SV2, SV4, and SV5, while Group 2 may include SV6 to SV8 and SV3. Also, if the subvector to be code converted is SVd=SV8, Group 1 may include SV1 to SV5, while Group 2 may include SV6 to SV83. Note that SVd is not limited to SV3 or SV8.

[0066] The code conversion unit 109 may sequentially encode the codebook index and the code vector index of the subvectors classified into Group 1 (S202). Then, the code conversion unit 109 may output the encoding information (the codebook index and the code vector index) of the subvectors included in Group 1 to the multiplexing unit 110. The code conversion unit 109 may also calculate the number of bits (e.g., BITSgroup1) used for encoding Group 1 (S202). The code conversion unit 109 may also determine the number of bits (e.g., BITSgroup2) available for encoding the subvectors classified into Group 2 based on the following equation (3) (S202): (BITSgroup2)=(AVQ bit-budget)-(BITSgroup1) (3)

[0067] The code conversion unit 109 may determine, for example, whether BITSgroup2 exceeds a threshold Threshold1 (S203).

[0068] If BITSgroup2 exceeds the threshold Threshold1 (S203: Yes), the code conversion unit 109 may proceed to the process shown in FIG. 7 (for example, the process of S205).

[0069] On the other hand, if BITSgroup2 is equal to or smaller than the threshold Threshold1 (S203: No), the code conversion unit 109 may determine the encoding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S204): If SVd is any of SV1 to SV5: SVd, SV6, SV7, SV8 Otherwise: SV6, SV7, SV8

[0070] Then, code conversion section 109 outputs the coding information including the codebook indication value and code vector index of each subvector of Group 2 to multiplexing section 110, and ends the code conversion process.

[0071] 7, for example, if SVd is not SV6, the code conversion unit 109 may update Group2 by excluding SV6 from Group2, encode SV6, and output encoded information including the codebook number code vector index of SV6 to the multiplexing unit 110 (S205). Furthermore, the code conversion unit 109 may calculate the number of bits used to encode SV6 and update BITSgroup2 by subtracting the calculated number of bits from BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding SVs excluding SV6 from Group2.

[0072] If SVd is SV6, Group2 and BITSgroup2 do not need to be changed (or updated).

[0073] Next, the code conversion unit 109 may determine whether or not BITSgroup2 exceeds a threshold Threshold2 (S206).

[0074] If BITSgroup2 exceeds the threshold Threshold2 (S206: Yes), the code conversion unit 109 may proceed to the process shown in FIG. 8 (for example, the process of S208).

[0075] On the other hand, if BITSgroup2 is equal to or smaller than the threshold Threshold2 (S206: No), the code conversion unit 109 may determine the encoding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S207): If SVd is any of SV1 to SV6: SVd, SV7, SV8 Otherwise: SV7, SV8

[0076] Then, code conversion section 109 outputs the coding information including the codebook indication value and code vector index of each subvector of Group 2 to multiplexing section 110, and ends the code conversion process.

[0077] 8 , for example, if SVd is not SV7, the code conversion unit 109 may update Group2 by excluding SV7 from Group2, encode SV7, and output encoded information including the codebook number code vector index of SV7 to the multiplexing unit 110 (S208). Furthermore, the code conversion unit 109 may, for example, calculate the number of bits used to encode SV7 and update BITSgroup2 by subtracting the calculated number of bits from BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding SVs excluding SV7 from Group2.

[0078] If SVd is SV7, Group2 and BITSgroup2 do not need to be changed (or updated).

[0079] Next, the code conversion unit 109 may determine whether or not BITSgroup2 exceeds a threshold value Threshold3 (S209).

[0080] If BITSgroup2 is equal to or smaller than the threshold value Threshold3 (S209: No), the code conversion unit 109 may determine the encoding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S210): If SVd is any of SV1 to SV7: SVd, SV8 Otherwise: SV8

[0081] Then, code conversion section 109 outputs the coding information including the codebook indication value and code vector index of each subvector of Group 2 to multiplexing section 110, and ends the code conversion process.

[0082] On the other hand, if BITSgroup2 exceeds the threshold Threshold3 (S209: Yes), the code conversion unit 109 may determine the encoding order of the subvectors in Group2 as follows and encode the subvectors in the determined order (S211): If SVd is any of SV1 to SV7: SV8, SVd Otherwise: SV8

[0083] Then, the code conversion unit 109 outputs coded information including the SV8 codebook indicator value and code vector index and the indicator value of the number of unused bits to the multiplexing unit 110, thereby completing the code conversion process. In other words, the code conversion unit 109 may output coded information of the number of unused bits to the multiplexing unit 110 instead of coded information of the SVd codebook indicator value.

[0084] When SVd is SV8, the code converting unit 109 may output, for example, either one of the SV8 codebook indication value and the indication value of the number of unused bits, and the code vector index to the multiplexing unit 110. Either one of the codebook indication value and the number of unused bits may be determined in advance.

[0085] In this way, the code conversion unit 109 may determine whether to encode the codebook number of SVd or the number of unused bits, based on the number of bits available for encoding in Group 2. For example, the code conversion unit 109 may determine to encode the codebook number (in other words, to output a codebook indication value) when the number of bits available for encoding in Group 2 is equal to or smaller than a threshold value (e.g., Threshold 1, Threshold 2, or Threshold 3), and may determine to encode the number of unused bits (in other words, to output a number of unused bits indication value) when the number of bits available for encoding in Group 2 exceeds the threshold value.

[0086] Here, in FIGS. 6, 7, and 8, the thresholds Threshold1, Threshold2, and Threshold3 may be set as follows.

[0087] For example, based on the number of bits fixedly allocated to AVQ, the average number of bits allocated per subvector is denoted as "BITSsv."

[0088] In the above example, for example, Threshold1 may be set to 4×BITSsv when SVd is any of SV1 to SV5, and may be set to 3×BITSsv when SVd is any of SV6 to SV8.

[0089] Also, for example, Threshold2 may be set to 3×BITSsv when SVd is any of SV1 to SV6, and may be set to 2×BITSsv when SVd is any of SV7 to SV8.

[0090] Also, for example, Threshold3 may be set to 2×BITSsv when SVd is any of SV1 to SV7, and may be set to BITSsv when SVd is SV8.

[0091] In this way, the number of bits obtained by multiplying BITSsv by the number of SVs classified into Group 2 may be set as the threshold.

[0092] [Example of Encoding of Unused Bit Number] Next, an example of encoding of the unused bit number in the code conversion unit 109 (for example, the process of S211 in FIG. 8) will be described.

[0093] FIG. 9 is a flowchart showing an example of the coding process of the unused bit number in the code conversion unit 109.

[0094] 9 , the code conversion unit 109 determines whether the SV8 encoding result (e.g., codebook number) is zero (S301). In other words, the code conversion unit 109 may determine whether the SV8 is a null vector (or a zero vector). The process of S301 is a process for determining whether, for example, in AVQ encoding used in the EVS standard, the SV8 encoding result is zero and the number of bits available for AVQ has been used up for encoding subvectors, so encoding of the SV8 code 0 has been terminated (e.g., SV8 is encoded with 0 bits).

[0095] If SV8 is not zero (S301: No), the code conversion unit 109 may, for example, set the number of bits obtained by subtracting the number of bits used to encode the codebook number of SVd from the number of bits available for encoding the codebook number of SVd as the "number of unused bits" (S302).

[0096] Even when SV8 is not zero, there are cases in which the end of the codebook indication value of the SV8 encoding result (for example, stop bit 0) is truncated in AVQ encoding. In this case, the number of bits used in encoding SVd is reduced by one bit, but the shortage of one bit may be covered by truncating stop bit 0 in encoding SVd, or the shortage of one bit may be covered by the number of bits saved by applying an embodiment of the present disclosure.

[0097] Furthermore, for example, if the encoding result of SV8 is zero and the stop bit 0 is truncated, SV7 or SV6 may also be truncated (e.g., SV7 or SV6 may be encoded with a 0 bit). In this way, when two or more SVs are truncated, one bit (e.g., codebook instruction value 0) is assigned to encoding each of the two or more SVs, so the number of bits available for encoding SVd may be reduced by two or more bits. Such cases can be detected, for example, based on whether the number of bits available for encoding SVd is an odd number of bits compared to the number of bits used for encoding SV (e.g., whether it is different from a multiple of 5).

[0098] As described above, in encoding the unused bit number, the encoding order of SVd is set to the end of the subvectors included in Group 2 (in other words, swapped). Here, in FIG. 9 , if SV8 is zero (S301: Yes), for example, among the SVs encoded before SVd, there may be an SV coded with zero bits (e.g., an SV with zero allocated bits and not coded). For example, as in the process of S211 in FIG. 8 , if the unused bit number is coded instead of SVd, another SV may be coded before SVd. If the SV coded before SVd is coded with zero bits, one bit (e.g., the codebook indication value 0 shown in FIG. 1 ) for coding 0 for that SV is consumed (or wasted), and the number of bits available for coding SVd (or the unused bit number) may be reduced (or insufficient). Hereinafter, bits wasted for SVs coded with zero bits are referred to as "wasted bits."

[0099] Note that when SV8 (or an SV prior to SV8) is coded with zero bits, the number of unused bits is 0 because all bits allocated for AVQ coding have been used up.

[0100] Therefore, if there is a difference between the number of bits available for encoding SVd (e.g., the number of remaining bits) and the number of bits used to encode SVd, this difference may correspond to the number of SVs encoded with zero bits. Also, for example, as shown in Figure 1, when the codebook number is 2 or greater, the number of bits used to encode SVd is a multiple of 5.

[0101] For example, the code conversion unit 109 may add the number of wasted bits to the number of bits available for encoding SVd (e.g., the number of remaining bits) and update the number of bits available for encoding SVd to a multiple of 5 (S303). Also, the code conversion unit 109 may determine, for example, that the number of unused bits is zero.

[0102] In this way, the code conversion unit 109 may calculate the number of unused bits based on the number of bits that would originally be available for encoding SVd (in other words, when the encoding order of SVd is not rearranged) when wasted bits occur, by, for example, calculating the number of wasted bits and adding the wasted bits to the number of bits available for encoding SVd. In other words, the code conversion unit 109 may update the number of bits available for encoding SVd based on the number of consecutive subvectors whose quantization parameters are null vectors among subvectors in Group 2 that are different from the SVd.

[0103] Next, the code conversion unit 109 may encode (e.g., convert into an indication value) the number of unused bits obtained in the process of S302 or S303 (S304). Fig. 10 is a diagram showing an example of encoding the number of unused bits. In Fig. 10, the number of unused bits different from 0 has a range, but the number of bits used for encoding is specified as a multiple of 5 (or 1), so that a unique number of bits can be derived depending on the number of usable bits at the time of decoding.

[0104] As an example, if the number of available bits is 13 bits and the code (indication value) of the unused bits is "10", if there are no wasted bits, the number of unused bits can be specified as 3 bits because the number of bits excluding the unused bits is a multiple of 5.

[0105] Whether or not there are wasted bits can be determined, for example, by determining whether the decoded SV8 is a zero vector, the remainder when the number of available bits is divided by 5 (e.g., modulo 5) (hereinafter, also referred to as the "number of remaining bits"), and the number of consecutive decoded SVs that are zero vectors, including SV8. For example, if SV8 is not a zero vector, no wasted bits are generated. Also, for example, a wasted bit is generated when the number of unused bits is 0. The number of wasted bits can be determined, for example, by the number of consecutive decoded SVs that are zero vectors, including SV8, and the remainder of the number of available bits, modulo 5 (e.g., the number of remaining bits).

[0106] The number of unused bits when wasted bits occur may be determined, for example, as follows.

[0107] For example, if the number of bits available for encoding SVd is 12, and the decoded value of three consecutive SVs, including SV8, is a zero vector (null vector), the three bits (e.g., 5-(12 modulo 5)=3) used to encode the three zero vectors (e.g., SV6 to SV8) when rearranging the SVd encoding order are wasted bits. Therefore, the number of bits available for encoding SVd is 15 bits, obtained by adding 3 bits to 12 bits. As a result, the number of bits available for encoding SVd is equal to the number of bits used for encoding SVd (e.g., a multiple of 5), and the number of unused bits is zero.

[0108] As another example, consider a case where the number of bits available for encoding SVd is 13, the decoded values ​​of three consecutive SVs (e.g., SV6 to SV8) including SV8 are zero vectors (null vectors), SV6 is encoded with one bit, and SV7 and SV8 are encoded with zero bits (e.g., zero vectors without encoding). In this case, of the three bits used to encode the three zero vectors (encoding SV6 to SV8) when rearranging the encoding order of SVd, at least two bits (e.g., 5 - (13 modulo 5) = 2) are wasted bits. Therefore, the number of bits available for encoding SVd is 15 bits, obtained by adding two bits to 13 bits. As a result, the number of bits available for encoding SVd is equal to the number of bits used for encoding SVd (e.g., a multiple of 5), and the number of unused bits is zero.

[0109] For example, when the number of unused bits is 0, the number of bits used for encoding is 1, as shown in Figure 10. Also, when the number of bits used for encoding SVd is 15, the codebook number is 3, as shown in Figure 1, and the number of bits used for encoding the codebook indication value is 3. In the example above, the number of bits used for encoding the number of unused bits is 1, and there are 2 wasted bits, for a total of 3 bits. Therefore, when there are wasted bits, the number of bits used for encoding is the same when encoding the codebook indication value of SVd (e.g., 3 bits) and when encoding the number of unused bits (e.g., 1 bit + 2 wasted bits).

[0110] In this way, even if bits are wasted, the encoding device 100 can suppress an increase in the number of bits used for encoding and encode the number of unused bits.

[0111] Note that, since the number of unused bits is 0 when it is determined that a wasted bit has occurred, the code conversion unit 109 may, for example, determine the number of unused bits to be 0 without changing (or updating) the number of bits available for encoding SVd and then calculating the difference from the number of bits used for encoding SVd. Note that, for example, when decoding the codebook number of SVd by dividing the number of bits available for encoding SVd by 5, the number of bits available for encoding SVd may be changed as described above. Alternatively, depending on the case, the decoding procedure may be changed so that the codebook number is decoded by adding 1 to the codebook number obtained by dividing the number of bits available for encoding SVd by 5.

[0112] 10 shows an example in which the codes for the number of unused bits are assigned in ascending order of the number of unused bits, but this is not limiting, and for example, the codes may be assigned in descending order of the frequency of occurrence of the number of unused bits. For example, the more frequently the number of unused bits appears, the fewer the number of bits may be assigned. This makes it possible to reduce the number of bits used to encode the number of unused bits.

[0113] [Configuration Example of Decoding Device] Fig. 11 is a block diagram showing an example of signal processing related to an AVQ decoding unit (hereinafter, for convenience, referred to as "decoding device") 200 according to an embodiment of the present disclosure. The decoding device 200 shown in Fig. 11 may include, for example, a separating unit 201, a subvector identifying unit 202, a code converting unit 203 (e.g., corresponding to a control circuit), an AVQ decoding unit 204 (e.g., corresponding to an inverse quantization circuit), a floating bit count managing unit 205, and an inverse DCT unit 206.

[0114] In the decoding device 200 , the bit stream transmitted from the encoding device 100 is input to a separating section 201 .

[0115] The demultiplexing unit 201 may, for example, demultiplex a global gain code, code vector indices, codebook indices, and an unused-bit number indicator value (unused-bit code or unused-bit index) from an AVQ code included in an input bitstream. The demultiplexing unit 201 may, for example, output the global gain code to the AVQ decoding unit 204, and output the codebook indicator value, code vector indices, and unused-bit number indicator value to the code conversion unit 203.

[0116] The subvector identification unit 202 may identify a dominant subvector from among multiple subvectors based on the input adaptive codebook vector v(n). The subvector identification unit 202 may output information related to the position of the dominant subvector (e.g., dominant subvector information) to the code conversion unit 203. For example, since the target of quantization or encoding in the encoding device 100 (e.g., the AVQ encoding unit 105) is a DCT coefficient, the subvector identification unit 202 may convert the adaptive codebook vector v(n) into a DCT coefficient and identify the position (or frequency) of the subvector having the maximum energy in the DCT coefficient domain of the adaptive codebook vector v(n). Note that if the target of quantization or encoding in the encoding device 100 is a time-domain signal, the subvector identification unit 202 does not need to convert the adaptive codebook vector v(n) into a DCT coefficient.

[0117] The code conversion unit 203 may calculate a codebook indicator value of a subvector at a specific position (e.g., a subvector to be code converted) based on, for example, information input from the separation unit 201 and information input from the subvector identification unit 202. For example, the code conversion unit 203 may calculate the codebook indicator value of the subvector to be code converted based on the codebook indicator value, code vector index, and unused bit number indicator value input from the separation unit 201, and the number of bits available for AVQ (e.g., AVQ bit-budget) input from the AVQ decoding unit 204. The code conversion unit 203 may output the codebook indicator value and code vector index of each subvector to the AVQ decoding unit 204.

[0118] For example, the code conversion unit 203 may perform the following steps 4 to 7.

[0119] (Step 4) The code conversion unit 203 may, for example, decode a codebook indicator value of another sub-vector different from the sub-vector to be code converted, based on the codebook indicator value. Furthermore, the code conversion unit 203 may, for example, calculate, based on the decoded codebook indicator value, the number of bits used for encoding the sub-vector different from the sub-vector to be code converted (for example, the sum of the number of bits used in the codebook indicator value and the number of bits used in the code vector).

[0120] (Step 5) The code conversion unit 203 may decode the number of unused bits based on, for example, the unused bit number indication value.

[0121] (Step 6) The code conversion unit 203 may calculate the number of coding bits of the sub-vector to be code converted, for example, based on the number of coding bits of the sub-vector calculated in (Step 4) and the number of unused bits decoded in (Step 5).

[0122] (Step 7) The code conversion unit 203 may calculate (or decode) a codebook indication value of the subvector to be code converted, based on the number of coding bits of the subvector calculated in (Step 6), for example.

[0123] The AVQ decoding unit 204 may decode (or inverse quantize) the quantized DCT coefficients based on, for example, the global gain code input from the demultiplexing unit, the codebook indication value and code vector index of each SV input from the code conversion unit 203, and the number of floating bits input from the floating bit number management unit 205, and output the decoded quantized DCT coefficients to the inverse DCT unit 206. The AVQ decoding unit 204 may also determine (e.g., calculate) the number of bits to be allocated to AVQ based on, for example, the sum of a fixed number of bits (or a predetermined number of bits) and the number of floating bits input from the floating bit number management unit 205, and output the determined number of bits to the code conversion unit 203. The AVQ decoding unit 204 may also output, for example, information regarding the number of floating bits, which is updated based on the number of bits remaining after the AVQ decoding process, to the floating bit number management unit 205.

[0124] The floating bit number management unit 205 may hold (or manage) information regarding the number of bits available for use within a decoding processing frame, based on information regarding the number of floating bits input from the AVQ decoding unit 204. For example, the floating bit number management unit 205 may output the held number of bits as the number of floating bits to the AVQ decoding unit 204 for AVQ decoding of a subsequent subframe.

[0125] The inverse DCT unit 206 may, for example, perform an inverse DCT transformation on the dequantized DCT coefficients input from the AVQ decoding unit 204 to convert them into a time domain signal, and output it as a decoded excitation residual signal qd(n).

[0126] As described above, in this embodiment, the encoding device 100 determines whether to perform encoding of the codebook number for the subvector to be code converted or encoding based on the difference between the number of allocated bits for vector quantization and the number of bits for the quantization parameter (e.g., encoding of the number of unused bits), based on the number of bits available for encoding the subvector in vector quantization.

[0127] In this way, by switching between encoding the codebook number and encoding the number of unused bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multi-rate lattice vector quantization, thereby reducing the number of encoding bits. Thus, according to this embodiment, it is possible to reduce the number of encoding bits in multi-rate lattice vector quantization.

[0128] Furthermore, according to this embodiment, even when the subvector to be code converted into the unused bit number indicator value is different from the last subvector (e.g., SV8) (i.e., when the encoding order is reversed), the encoding device 100 can accurately determine the number of unused bits according to the number of wasted bits that may result from the reversal of the encoding order. For example, when wasted bits occur, the encoding device 100 can accurately estimate the number of unused bits according to the number of wasted bits, thereby suppressing errors or a reduction in codebook number (e.g., a reduction in codebook accuracy) due to an insufficient number of coding bits, and suppressing degradation of encoding performance.

[0129] For example, even if the bit allocation does not result in wasted bits even if the SV coding order is changed (e.g., when there is no SV coded with 0 bits), the coding device 100 may rearrange the coding bit allocation so that wasted bits are generated if there is a possibility of wasting bits (e.g., when there is a possibility of an SV coded with 0 bits). As an example, consider a case where, in Group 2, which includes SVd, SV6, SV7, and SV8, SV6, SV7, and SV8 are coded with 0 (1 bit), SVd is coded with 10 bits (codebook number 2), and the number of bits available for coding SVd is 13. In this case, since SV6 to SV8 are each a zero vector, the coding device 100 may set the bit allocation for SV6 to SV8 to 0 bits and allocate (in other words, reallocate) the 3 bits allocated to SV6 to SV8 to the coding bits for SVd. Note that a wasted bit occurs (e.g., 0 bits can be allocated) when the number of unused bits is 0. Since the sum of the number of remaining bits and the number of consecutive zero vectors is limited to a multiple of 5, the subvectors for which 0 bits can be allocated are SV7 and SV8. Therefore, the number of bits that can be allocated to the coding bits of SVd is 2 bits. In this case, the encoding device 100, for example, sets the number of available bits of SVd to 15 bits (13 bits plus 2 bits), and encodes SVd using codebook number 3 (e.g., 15 bits). In this case, the number of unused bits is 0. In this way, rearranging the bit allocation enables the decoding side to reliably determine whether or not there are wasted bits, and improves the encoding accuracy of SVd.

[0130] Furthermore, according to this embodiment, the decoding device 200 can identify coding information for a subvector to be code converted based on parameters such as the number of bits used for coding and decoding information (e.g., a codebook indication value of a subvector different from the subvector to be code converted). Therefore, for example, a signal for switching between coding for the codebook indication value and coding for the number of unused bits (e.g., a flag or control information dedicated to switching) does not need to be notified from the coding device 100 to the decoding device 200.

[0131] 12 is a block diagram showing an example configuration of an AVQ encoding unit (hereinafter referred to as "encoding device" for convenience) 300 according to an embodiment of the present disclosure. Note that in Fig. 12, components that perform the same processing as those in the encoding device 100 shown in Fig. 4 are assigned the same reference numerals.

[0132] 12 , the sub-vector identification unit 301 may output information about the position of a predetermined sub-vector (e.g., referred to as a target sub-vector or fixed sub-vector) to the code conversion unit 109. The predetermined sub-vector may be, for example, one of eight sub-vectors (e.g., SV1 to SV8). For example, in the following, a case will be described in which the predetermined sub-vector among the eight sub-vectors SV1 to SV8 is the third lowest sub-vector in the frequency domain (e.g., SV3) or the last sub-vector (e.g., SV8).

[0133] The subvector specification unit 301 does not need to perform any signal processing to specify (designate) a subvector at a predetermined specific position, and for example does not need to be explicitly provided as a component. In Fig. 12, as an example, the subvector specification unit 301 may be a memory that stores the positions of predetermined subvectors.

[0134] In the encoding device 300 shown in FIG. 12, the operations of the components other than the subvector identification unit 301 may be similar to those of the encoding device 100 shown in FIG.

[0135] Next, an example of the operation of the encoding device 300 that differs from that of the first embodiment will be described.

[0136] The method of selecting subvectors to be code converted may be the same as the method shown in Fig. 5. In this embodiment, the code conversion unit 109 may use position information of subvectors identified in advance instead of main subvector information. Furthermore, the subvector selection process may be performed, for example, by the subvector identification unit 301 rather than by the code conversion unit 109. In this case, AVQ bit-budget information may be input to the subvector identification unit 301, and information about the subvector to be selected may be input to the code conversion unit 109 as position information of the subvector.

[0137] 13 to 16 are flow diagrams showing an example of operation of the encoding device 300. As an example, Fig. 13 to 16 show an example of operation of the encoding device 300 when the position of the subvector to be code converted is the third lowest subvector SV3 in the frequency domain.

[0138] 13 , the encoding device 300 classifies, for example, the subvectors SV1 to SV8 into Group 1 including SV1 and SV2 and Group 2 including five subvectors SV3 to SV8 (S401). For example, the encoding device 300 may classify the subvectors SV1 to SV8 into Group 1 including subvectors (before the subvector to be code converted) and Group 2 including subvectors (after the subvector to be code converted). For example, when encoding subvectors in the frequency domain, the encoding device 300 may classify multiple subvectors (e.g., SV1 to SV8) into Group 1 consisting of subvectors with frequencies lower than the frequency of the subvector to be code converted and Group 2 consisting of the subvector to be code converted and subvectors with frequencies higher than the subvector to be code converted. In other words, the encoding device 300 may classify the subvectors SV1 to SV8 into Group 1, which does not include the subvector to be code converted, and Group 2, which includes the subvector to be code converted, using the subvector to be code converted as the boundary.

[0139] Next, the encoding device 300 encodes the quantization parameters of the subvectors included in Group 1 (e.g., SV1 and SV2) and outputs encoding information (e.g., codebook indication values ​​and code vector indices) (S402). The encoding device 300 may also determine the number of bits used (or consumed) for encoding Group 1, and the number of bits available for encoding the subvectors of Group 2 (e.g., SV3 to SV8).

[0140] Next, the encoding device 300 determines whether the number of bits available for encoding the subvectors of Group 2 is equal to or greater than a threshold value Threshold 1 (S403). For example, if the number of bits available for encoding the subvectors of Group 2 is less than Threshold 1 (S403: No), the encoding device 300 proceeds to the process shown in Fig. 14 (e.g., the process of S404), and if the number of bits available for encoding the subvectors of Group 2 is equal to or greater than Threshold 1 (S403: Yes), the encoding device 300 proceeds to the process shown in Fig. 15 (e.g., the process of S408).

[0141] Here, if the subvector selected for code conversion is the third subvector (e.g., SV3), Threshold1 may be set to 30 bits. For example, if SV3 is set as the last subvector to be coded among the subvectors SV1 to SV8 (i.e., if the coding order is changed), and the decoded results of the subvectors SV4 to SV8 after SV3 are 0 (e.g., null vectors), one bit may be used for coding each subvector (e.g., up to five bits for five subvectors). On the other hand, in the case of AVQ coding (i.e., if the coding order is not changed), SV4 to SV8 after SV3 may each be coded with 0 bits. If SV4 to SV8 are coded with 0 bits using AVQ coding, the coding method for code conversion according to this embodiment uses a total of five bits to code SV4 to SV8, and thus a bit reduction of five or more bits is expected in coding SV3. 1 and 10, for example, the number of coding bits is 1 when the number of unused bits is 0. Therefore, to achieve a 5-bit reduction effect, the SV3 codebook number may be 6 or more. For example, when the codebook number is 6, the coding information including the code vector index is 30 bits. Therefore, the threshold Threshold1 may be set to 30 bits.

[0142] If the position of a specific subvector is different from SV3, the subbands included in Group 2 and the threshold Threshold 1 may be set according to the specific subvector. For example, if SV4 is set to a specific subvector, Group 2 may include SV4 to SV8, and Threshold 1 may be set to 25 bits.

[0143] 14, the encoding device 300 determines the encoding order of the subvectors in Group 2 as SV3, SV4, SV5, SV6, SV7, and SV8, encodes SV3 to SV7, and outputs encoding information (e.g., codebook indication values ​​and code vector indexes) (S404). The encoding device 300 may also determine the number of bits used to encode SV3 to SV7, and then determine the number of bits available for encoding SV8 (S404).

[0144] In this way, for example, when the number of bits available for encoding Group 2 is less than Threshold 1 (S403: No), the encoding device 300 does not need to perform code conversion on subvector SV3 (in other words, change the encoding order) when encoding Group 2. In other words, when the number of bits available for encoding Group 2 is less than Threshold 1, the encoding device 300 may set (or change or update) the subvector to be code converted from SV3 to the last subvector in Group 2, SV8. This process can, for example, prevent a shortage of bits from occurring when encoding the subvector to be code converted.

[0145] Next, the encoding device 300 may determine whether the number of bits available for SV8 encoding is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S405).

[0146] If the number of bits available for SV8 encoding is less than Threshold 2 or exceeds Threshold 3 (S405: Yes), the encoding device 300 may encode the SV8 using, for example, an AVQ encoding method (a method for encoding a codebook number), output encoding information (e.g., a codebook indication value and a code vector index), and terminate the code conversion process (S406). In this way, if the number of bits available for SV8 encoding is less than Threshold 2 or exceeds Threshold 3, the encoding device 300 may encode the codebook number without encoding the unused bits, because the number of encoding bits is not reduced by encoding the unused bits.

[0147] On the other hand, if the number of bits available for SV8 encoding is equal to or greater than Threshold 2 but does not exceed Threshold 3 (S405: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output encoding information (e.g., an indicator value for the number of unused bits and a code vector index), and terminate the code conversion process (S407).

[0148] Here, for example, Threshold 2 may be set to 9 bits, and Threshold 3 may be set to 80 bits. The reason for setting Threshold 2 to 9 bits is that, for example, when the number of bits available for SV8 encoding is less than 10 bits, the number of bits used for encoding the codebook number in AVQ encoding is also 1 bit, and the effect of reducing the number of bits by code conversion cannot be obtained.

[0149] Furthermore, for example, Threshold 3 may be set experimentally or empirically. For example, the greater the number of bits available for SV8 encoding, the greater the number of unused bits, so Threshold 3 may be set to avoid an increase in the number of unused bits. Note that a large number of unused bits may occur, for example, when the encoding target contains a small amount of information, such as silence, so even if no bit reduction effect is achieved, there is no problem with the encoding quality. For this reason, Threshold 3 may be set to a somewhat large number of bits empirically, for example.

[0150] 15, the encoding device 300 may determine the encoding order of the subvectors in Group 2 as SV4, SV5, SV6, SV7, SV8, and SV3 (S408). In other words, the encoding device 300 may set the subvector SVd=SV3 to be code converted as the last subvector in Group 2.

[0151] Next, the encoding device 300 may encode the subvectors one by one in the order of, for example, SV4, SV5, SV6, SV7, and SV8, and output encoding information (for example, a codebook indication value and a code vector index) (S409). The encoding device 300 may also determine the number of bits used to encode the subvectors, and determine (in other words, update) the number of bits available for encoding the remaining subvectors of Group 2 (S409).

[0152] Next, the encoding device 300 determines whether the number of bits available for encoding the remaining subvectors of Group2 is equal to or greater than Threshold1 (S410).

[0153] If the number of bits available for encoding Group 2 is less than Threshold 1 (S410: No), the encoding device 300 may, for example, proceed to the process of S404 in Fig. 14, change the encoding order of the remaining subvectors in Group 2 to SV3 first, followed by the other remaining subvectors, and perform the encoding processes of S404 to S407 in Fig. 14. These processes are performed, for example, because the number of bits available for encoding Group 2 is insufficient to encode all of the remaining subvectors, and so the encoding order of SV3 is reverted to its previous order and encoded first.

[0154] On the other hand, if the number of bits available for encoding Group2 is equal to or greater than Threshold1 (S410: Yes), the encoding device 300 determines, for example, whether the subvector to be encoded next is SV3 (S411). If the subvector to be encoded next is not SV3 (the subvector to be code converted) (S411: No), the encoding device 300 may proceed to the process of S409, for example, and encode the next subvector. The encoding device 300 may repeat the processes of S409 to S411, for example, to encode SV4, SV5, SV6, SV7, and SV8 in order.

[0155] If the subvector to be coded next is SV3 (S411: Yes), the coding device 300 proceeds to the process of S412 shown in FIG. 16, for example.

[0156] In FIG. 16, the encoding device 300 may determine whether the number of bits available for encoding SV3 (=SVd) exceeds Threshold3 (S412).

[0157] If the number of bits available for encoding SV3 exceeds Threshold 3 (S412: Yes), the encoding device 300 may, for example, encode SV3 based on AVQ encoding without performing code conversion, output coding information (e.g., codebook indicator value and code vector index), and end the code conversion process (S413). In this way, if the number of bits available for encoding SV3 exceeds Threshold 3, the number of unused bits increases, and the number of bits of the unused bit indicator value tends to increase. Therefore, the encoding device 300 may encode the codebook number.

[0158] On the other hand, if the number of bits available for encoding SV3 is equal to or less than Threshold 3 (S412: No), the encoding device 300 may, for example, encode the number of unused bits instead of encoding the SV3 codebook number, output the encoding information (e.g., the codebook indication value and the code vector index), and terminate the code conversion process (S414).

[0159] Next, another example of the operation of the encoding device 300 will be described.

[0160] Fig. 17 is a flow diagram showing another example of the operation of the encoding device 300. Fig. 17 shows, as an example, an example of the operation of the encoding device 300 when the position of the subvector to be code converted is the subvector SV8 (e.g., the last subvector) at the highest position in the frequency domain.

[0161] 17 may be the same as the example of operation shown in Fig. 14. Fig. 14 shows an example of operation in which, when the position of a subvector selected as a target for code conversion is SV3 and code conversion of the coding information of SV3 is not possible (for example, the coding order of the subvectors cannot be rearranged to place SV3 last in order to apply coding of the number of unused bits to coding of SV3), SV8 is switched to the subvector to be code converted instead of SV3, and it is determined whether coding of the number of unused bits can be applied to coding of SV8 (for example, whether coding the number of unused bits results in fewer coding bits than coding a codebook number).

[0162] 17, the encoding device 300 encodes, for example, SV1 to SV7 and outputs encoding information (for example, a codebook indication value and a code vector index) (S501). The encoding device 300 may also determine the number of bits used to encode SV1 to SV7 and the number of bits available for encoding SV8 (S501).

[0163] Next, the encoding device 300 may determine whether the number of bits available for SV8 encoding is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S502).

[0164] If the number of bits available for SV8 encoding is less than Threshold 2 or more than Threshold 3 (S502: Yes), the encoding device 300 may encode the SV8 using, for example, an AVQ encoding method (encoding the codebook number), output encoding information (e.g., a codebook indication value and a code vector index), and terminate the code conversion process (S503). In this way, if the number of bits available for SV8 encoding is less than Threshold 2 or more than Threshold 3, the encoding device 300 may encode the codebook number without encoding the unused bits, because the number of encoding bits is not reduced by encoding the unused bits.

[0165] On the other hand, if the number of bits available for SV8 encoding is equal to or greater than Threshold 2 but does not exceed Threshold 3 (S502: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output encoding information (e.g., an indicator value for the number of unused bits and a code vector index), and terminate the code conversion process (S504).

[0166] In FIG. 17, for example, the values ​​set in FIG. 14 may be applied to Threshold2 and Threshold3.

[0167] Next, an example of the encoding process of the number of unused bits in the process of S407 in FIG. 14, the process of S414 in FIG. 16, or the process of S504 in FIG. 17 will be described.

[0168] FIG. 18 shows a flow diagram of an example of a process for encoding the number of unused bits.

[0169] 18 , the encoding device 300 may, for example, determine whether the subvector to be code converted is SV8 (S601). If the subvector to be code converted is SV8 (S601: Yes), the encoding device 300 may, for example, calculate the number of remaining bits (hereinafter referred to as "RB") (S602). The number of remaining bits RB may be calculated, for example, by multiplying the number of bits available for encoding the subvector to be code converted by %5, where "%" represents a modulo operation. After calculating the number of remaining bits RB, the encoding device 300 may, for example, proceed to the process of S606.

[0170] On the other hand, if the subvector to be code converted is not SV8 (e.g., SV3) (S601: No), the encoding order of the subvectors is changed, and the number of bits used to encode the subvectors after the encoding order change may differ from the number of bits used when encoding the subvectors without changing the encoding order (e.g., AVQ encoding). In other words, changing the encoding order may result in bits being wasted (e.g., wasted bits). For example, wasted bits may occur when the number of bits available for encoding becomes zero before encoding a subvector in the middle, and subsequent subvectors (e.g., consecutive subvectors including SV8) are forced to become zero vectors without being encoded (in other words, encoded with 0 bits).

[0171] In this embodiment, if the subvector to be code converted is not SV8 (S601: No), the encoding device 300 counts the number of consecutive subvectors whose quantization parameters are null vectors (also called null vectors, all-zero vectors, or zero vectors) (hereinafter referred to as "NCNV") among the subvectors to be AVQ encoded, and checks whether the null vector subvectors include SV8 (e.g., the last subvector) (S603). In other words, NCNV may indicate the number of consecutive subvectors that are null vectors and include SV8.

[0172] The encoding device 300 may also calculate, for example, the number of remaining bits R (S603). The number of remaining bits R may be calculated, for example, by (the number of bits available for encoding the subvector to be code converted)%5, where "%" represents a modulo operation.

[0173] Next, the encoding device 300 may determine whether or not there is a possibility that wasted bits will be generated by changing the encoding order of the subvectors (S604). The encoding device 300 may determine whether or not there is a possibility that wasted bits will be generated based on, for example, NCNV and RB (an example of the determination will be described later). If there is no possibility that wasted bits will be generated (S604: No), the encoding device 300 may proceed to the process of, for example, S606.

[0174] On the other hand, if there is a possibility of wasted bits (S604: Yes), the encoding device 300 may, for example, update the number of bits available for encoding the subvector to be code converted (e.g., SVd) (S605). For example, the encoding device 300 may add (5-RB) bits, NCNV bits, or (NCNV+1) bits to the number of bits available for encoding the subvector to be code converted, depending on the conditions. In other words, the encoding device 300 may, for example, increase the number of bits available for encoding the subvector to be code converted by the number of wasted bits (e.g., the number of bits that may be wasted). Furthermore, the encoding device 300 may, for example, update the number of remaining bits RB to 0 (S605). Note that an example of the process of updating the number of bits available for encoding the subvector to be code converted will be described later.

[0175] Note that the value "5" used to calculate the number of bits to add (e.g., 5-RB) and the number of remaining bits RB is just an example, and may be determined based on, for example, the ratio of the number of bits allocated to the codebook to the total number of bits used to encode multiple subvectors (e.g., 1 / 5), or a multiple of the number of bits used to encode the subvectors.

[0176] Next, the encoding device 300 determines whether the number of remaining bits RB is 4 (S606). If RB is not 4 (S606: No), the encoding device 300 may proceed to the process of S608, for example, and perform a process of determining the number of unused bits.

[0177] If RB=4 (S606: Yes), the encoding device 300 may increase the number of bits available for encoding the subvector to be code converted by 1 bit (S607).

[0178] Next, the encoding device 300 may determine, for example, the number of unused bits (S608). For example, the encoding device 300 may calculate, as the number of unused bits, the difference between the number of bits available for the subvector to be code converted and the number of bits used to encode the subvector to be code converted (e.g., the number of unused bits).

[0179] The encoding device 300 may, for example, encode the calculated number of unused bits (S609).

[0180] Next, an example of a method for determining whether or not there is a possibility that wasted bits will occur due to a change in the encoding order of subvectors in the process of S604 in FIG. 18 will be described.

[0181] For example, the encoding device 300 may determine that there is a possibility of wasted bits occurring when the following conditions 1 and 2 are satisfied. In other words, the encoding device 300 may determine that there is no possibility of wasted bits occurring when either the following condition 1 or condition 2 is not satisfied. Condition 1: SV8 after quantization (or SV8 to be decoded) is a null vector. Condition 2: RB+NCNV≧4

[0182] For example, in condition 1, if SV8 is not a null vector, all of the subvectors (e.g., SV1 to SV8) are coded in AVQ coding, so the number of bits used for coding remains the same whether the coding order of the subvectors is changed or not. Therefore, if SV8 is not a null vector, no wasted bits can occur. In other words, if SV8 is a null vector, there is a possibility that wasted bits will occur.

[0183] Condition 1 may be set to, for example, "NCNV>0." If NCNV>0 is satisfied, at least SV8 is a null vector.

[0184] Also, for example, in condition 2, wasted bits occur only when the number of unused bits (for example, the number of bits that become unused in AVQ encoding) is zero.

[0185] Here, for example, the number of remaining bits RB corresponds to the number of bits remaining due to the reduction (or shortage) of the number of bits available for encoding SVd caused by the change in the encoding order being wasted. Also, for example, the number of bits NCNV corresponds to the number of bits that may be wasted due to the change in the encoding order (wasted bits).

[0186] Therefore, if wasted bits occur, RB+NCNV may be a value of 5 or more. Note that, for example, if the number of bits used to encode a subvector is a multiple of 5 (e.g., 5n), the last bit (stop bit) of the codebook indication value may be omitted, so RB+NCNV may be a value of 4 or more. Thus, in condition 2, if the number of unused bits is zero, RB+NCNV may be 4 or more. In other words, if RB+NCNV is 4 or more, there is a possibility that the unused bits are zero, and wasted bits may occur. On the other hand, if RB+NCNV is less than 4, there are unused bits, so no wasted bits may occur.

[0187] Condition 2 may be set as follows: Condition 2': If the number of remaining bits is RB, the number of consecutive sub-vectors (including SV8) that are null vectors is "NCNVV", and the estimated codebook number is ECBI, then (number of bits available for SVd) + NCNVV ≥ 5 × ECBI + 4

[0188] Here, ECBI = (INT) (number of bits available for SVd / 5) may be used. The function (INT)(X) may be a function that returns the value of X truncated to 1.

[0189] Next, an example of a process of updating the number of bits available for encoding a subvector to be code converted in the encoding device 300 will be described.

[0190] FIG. 19 is a flow diagram illustrating an example of a process for updating the number of bits available for encoding a subvector to be code converted in the encoding device 300.

[0191] For example, when the encoding device 300 determines that there is a possibility of wasted bits occurring (S604: Yes in Figure 18), it may add NCNV bits, (NCNV + 1) bits, or (5 - RB) bits as the number of wasted bits to the number of bits available for encoding the subvector to be code converted, depending on conditions regarding the number of remaining bits (e.g., the remainder modulo 5 of the number of bits available for encoding the subvector to be code converted) RB and the number of consecutive subvectors whose quantization parameter is a null vector NCNV.

[0192] For example, if (RB+NCNV)%5=0 (S641: Yes), the encoding device 300 may set the number of added bits (hereinafter referred to as "W") to the NCNV bits (S642).

[0193] Also, for example, if (RB+NCNV)%5=4 (S641: No and S643: Yes), the encoding device 300 may set the number of added bits W to (NCNV+1) bits (S644).

[0194] Also, for example, if (RB+NCNV)%5=0 and (RB+NCNV)%5=4 are not true (S641: No and S643: No), the encoding device 300 may set the number of added bits W to (5-RB) bits (S645).

[0195] Then, the encoding device 300 may update the number of bits available for encoding the sub-vector to be code converted, for example, by adding the number of added bits W to the number of bits available for encoding the sub-vector to be code converted (S646). By the process of S646, the number of bits available for encoding the sub-vector to be code converted is set to a multiple of 5. In this case, since the number of residual bits RB is 0, the encoding device 300 may update the number of residual bits RB to 0, for example.

[0196] Here, as an example, the number of bits used to encode a subvector is a multiple of 5. Also, for example, in subvectors to be AVQ encoded, the number of consecutive subvectors whose quantization parameters are null vectors, NCNV, can be 5 or more. For example, if the subvector to be code converted is SV3 among SV1 to SV8, NCNV can be 5 (e.g., corresponding to SV4 to SV8).

[0197] When NCNV is 5 or more, for example, due to the occurrence of wasted bits, the number of bits available for encoding a subvector to be code converted may be reduced by 5 or more bits from the original number of bits (hereinafter referred to as "5n" bits) (n is an integer equal to or greater than 2). In this case, simply adding (5-RB) bits to update the number of bits available for the subvector to be code converted may result in a number of bits (e.g., 5(n-1) bits) that is less than the original number of bits (5n bits).

[0198] 19, the encoding device 300 adds the NCNV bit to the number of bits available for encoding the subvector to be code converted when (RB+NCNV)%5=0. As a result, even when NCNV is 5 or more (e.g., RB+NCNV=5 or 10), the encoding device 300 can set the number of bits available for encoding the subvector to be code converted to an appropriate value (e.g., 5n bits) taking the NCNV bit into consideration.

[0199] Furthermore, as described above, even if the number of bits used to encode a subvector is a multiple of 5, there are cases where, for example, the last bit (stop bit) of the codebook indication value can be omitted. In this case, (RB+NCNV)%5 can be 4. As shown in FIG. 19 , when (RB+NCNV)%5=4, the encoding device 300 adds (NCNV+1) bits to the number of bits available for encoding the subvector to be code converted. As a result, even if NCNV is 5 or greater, the encoding device 300 can set the number of bits available for encoding the subvector to be code converted to an appropriate value (e.g., 5n bits) taking the stop bit into consideration.

[0200] Note that, in FIG. 19 , an example based on the result of (RB+NCNV)%5 in the process of S641 has been described, but the present invention is not limited to this. For example, when NCNV is 5 or greater, if (RB+NCNV)%5=4 is not satisfied, the encoding device 300 may set the number of added bits W to NCNV, and if (RB+NCNV)%5=4 is satisfied, the encoding device 300 may set the number of added bits W to (NCNV+1) bits. Furthermore, for example, when NCNV is less than 5, the encoding device 300 may set the number of added bits W to (5-RB) bits. Note that similar processes may also be performed by the decoding device 400 (e.g., the process of FIG. 28 described later).

[0201] Although FIG. 19 illustrates the case where the process of S641 is based on (RB+NCNV) modulo 5, this is not limiting. For example, the encoding device 300 may set the number of added bits W based on (RB+NCNV) modulo 10. Even in this case, the encoding device 300 can appropriately set the number of bits (e.g., 5n bits) available for encoding the subvector to be code converted when NCNV is 5 or greater. Furthermore, for example, when the number of subvectors set in AVQ encoding is greater than 8, RB+NCNV can be 15 or greater. In this case, the encoding device 300 may set the number of added bits W based on (RB+NCNV) modulo 5, which is 15 or greater. Note that the decoding device 400 (e.g., the process of FIG. 28 described later) may also perform similar processing.

[0202] FIG. 20 is a flowchart illustrating another example of a process for updating the number of bits available for encoding a subvector to be code converted in the encoding device 300. In FIG.

[0203] For example, when the encoding device 300 determines that there is a possibility of wasted bits occurring (S604: Yes in Figure 18), it may add NCNV bits or (NCNV + 1) bits as the number of wasted bits to the number of bits available for encoding the subvector to be code converted, depending on conditions regarding the number of remaining bits RB and the number of consecutive subvectors whose quantization parameter is a null vector NCNV.

[0204] That is, in FIG. 20, unlike FIG. 19, the encoding device 300 does not add (5-RB) bits when updating the number of bits available for encoding the subvector to be code converted.

[0205] For example, if (RB+NCNV)%5=4 (S651: Yes), the encoding device 300 may set the number of added bits W to (NCNV+1) bits (S652), and if (RB+NCNV)%5=4 is not true (S651: No), the encoding device 300 may set the number of added bits W to NCNV bits (S653).

[0206] Then, the encoding device 300 may update the number of bits available for encoding the sub-vector to be code converted, for example, by adding the number of added bits W to the number of bits available for encoding the sub-vector to be code converted (S654).

[0207] Furthermore, the encoding device 300 may recalculate the number of remaining bits RB, for example, for the number of bits available for encoding the subvector to be code converted after adding (NCNV+1) bits or NCNV bits (S654). Due to the addition of NCNV bits, the recalculated number of remaining bits RB may become RB > 0.

[0208] The encoding device 300 determines, for example, whether the recalculated number of remaining bits RB > 0 (S655). In other words, the encoding device 300 determines whether the recalculated number of remaining bits RB (or the updated number of available bits) is a true value.

[0209] If RB>0 is not true (S655: No), the encoding device 300 may end the processing of FIG.

[0210] On the other hand, if RB>0 (S655: Yes), the encoding device 300 may update the number of bits available for encoding the sub-vector to be code converted by, for example, subtracting the number of remaining bits RB from the number of bits available for encoding the sub-vector to be code converted after adding (NCNV+1) bits or the NCNV bits (S656). Alternatively, the encoding device 300 may update the number of remaining bits RB to 0, for example.

[0211] 20 , by the processes of S652 and S653, the encoding device 300 can appropriately set the number of bits available for encoding the subvector to be code converted, even when, for example, NCNV is equal to or greater than 5. Furthermore, by the process of S656, the number of bits available for encoding the subvector to be code converted can be adjusted to a multiple of 5.

[0212] 19 or 20 , the encoding device 300 sets (e.g., updates) the number of bits available for encoding a subvector to be code converted, depending on conditions related to the number of residual bits RB and the number of consecutive subvectors whose quantization parameters are null vectors NCNV. This allows the encoding device 300 to set an appropriate number of bits available for encoding a subvector to be code converted, even when NCNV is 5 or greater.

[0213] Furthermore, the decoding device 400 described later cannot specify the number of wasted bits, but can specify RB and NCNV. In this embodiment, for example, the coding device 300 (and the decoding device 400 described later) can appropriately set the number of bits available for encoding the subvector to be code converted, using RB and NCNV, which are parameters that can be specified by the decoding device 400.

[0214] Next, an example of the operation of the AVQ decoding unit according to this embodiment will be described.

[0215] 21 is a block diagram showing an example configuration of an AVQ decoding unit (hereinafter referred to as a "decoding device" for convenience) 400 according to an embodiment of the present disclosure. Note that in FIG. 21, components that perform the same processing as in the decoding device 200 shown in FIG. 11 are assigned the same reference numerals.

[0216] 21 , the sub-vector identification unit 401 may output information about the position of a predetermined sub-vector (e.g., referred to as a target sub-vector or fixed sub-vector) to the code conversion unit 203. The predetermined sub-vector may be, for example, one of eight sub-vectors (e.g., SV1 to SV8). For example, in the following, a case will be described in which the predetermined sub-vector among the eight sub-vectors SV1 to SV8 is the third lowest sub-vector in the frequency domain (e.g., SV3) or the last sub-vector (e.g., SV8).

[0217] The subvector specification unit 401 does not need to perform any signal processing to specify (designate) a subvector at a predetermined specific position, and for example does not need to be explicitly provided as a component. In Fig. 21, as an example, the subvector specification unit 401 may be a memory that stores the positions of predetermined subvectors.

[0218] In the decoding device 400 shown in FIG. 21, the operations of the components other than the subvector identification unit 401 may be similar to those of the decoding device 200 shown in FIG.

[0219] Next, an example of the operation of the decoding device 400 that differs from that of the second embodiment will be described.

[0220] The method of selecting subvectors to be code converted may be the same as the method shown in Fig. 5. In this embodiment, the code conversion unit 203 may use pre-specified subvector position information instead of main subvector information. Furthermore, the subvector selection process may be performed, for example, by the subvector identification unit 401 rather than by the code conversion unit 203. In this case, AVQ bit-budget information may be input to the subvector identification unit 401, and information regarding the subvector to be selected may be input to the code conversion unit 203 as subvector position information.

[0221] 22 to 25 are flow diagrams showing an example of the operation of the decoding device 400. As an example, Fig. 22 to 25 show an example of the operation of the decoding device 400 when the position of the subvector to be code converted is the third lowest subvector SV3 in the frequency domain.

[0222] In the explanation of FIGS. 22 to 25, the plurality of sub-vectors SV1 to SV8 and the thresholds Threshold1, Threshold2, and Threshold3 may be the same as those in FIGS.

[0223] 22 , the decoding device 400 may decode subvectors of Group 1 (e.g., SV1 and SV2) and output decoding information (e.g., codebook number and code vector index) (S701). The decoding device 400 may also calculate the number of bits in a bit string used to decode the subvectors of Group 1 (e.g., SV1 and SV2), and calculate the number of bits remaining for the bit string of the subvectors of Group 2 by subtracting the number of bits used to decode SV1 and SV2 from the number of bits allocated to the entire AVQ (e.g., AVQ bit-budget) (S701).

[0224] Next, the decoding device 400 determines whether the number of bits remaining in the bit string of the subvectors of Group 2 is equal to or greater than a threshold value Threshold 1 (S702). For example, if the number of bits remaining in the bit string of the subvectors of Group 2 is less than Threshold 1 (S702: No), the decoding device 400 proceeds to the process shown in Fig. 23 (e.g., the process of S703), and if the number of bits remaining in the bit string of the subvectors of Group 2 is equal to or greater than Threshold 1 (S702: Yes), the decoding device 400 proceeds to the process shown in Fig. 24 (e.g., the process of S707).

[0225] 23, the decoding device 400 determines (or interprets) the encoding order of the subvectors in Group 2 as SV3, SV4, SV5, SV6, SV7, and SV8, decodes each of SV3 to SV7, and outputs the decoding results (codebook number and code vector index) (S703). Furthermore, the decoding device 400 may calculate the number of bits in the bit strings used to decode SV3 to SV7, and then calculate the number of bits remaining as the bit string (encoded code) for SV8 (S703).

[0226] In this way, for example, if the number of bits remaining as a bit string of a subvector of Group 2 is less than Threshold 1 (S702: No), the decoding device 400 may determine that code conversion (in other words, rearrangement of the encoding order) has not been performed on the subvector SV3 to be code converted in the encoding device 100.

[0227] Next, the decoding device 400 may determine whether the number of bits remaining as an SV8 bit string is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S704).

[0228] If the number of bits remaining as the SV8 bit string is less than Threshold 2 or exceeds Threshold 3 (S704: Yes), the decoding device 400 may determine, for example, that the SV8 is encoded using the AVQ encoding method (a method for encoding a codebook number), decode the SV8, output decoding information (e.g., the codebook number and the code vector index), and terminate the decoding process (S705).

[0229] On the other hand, if the number of bits remaining in the SV8 bit string is equal to or greater than Threshold 2 but does not exceed Threshold 3 (S704: No), the decoding device 400 determines, for example, that the number of unused bits is to be encoded instead of the SV8 codebook number, and decodes the number of unused bits and the code vector index (S706). The decoding device 400 may also determine the SV8 codebook number based on, for example, the number of bits remaining in the SV8 bit string and the decoded number of unused bits (S706). An example of a method for determining the codebook number will be described later. The decoding device 400 may output the determined SV8 decoding information (e.g., the codebook number and the code vector index) and terminate the decoding process.

[0230] 24, the decoding device 400 may determine (or interpret) the encoding order of the subvectors in Group 2 as SV4, SV5, SV6, SV7, SV8, and SV3 (S707). In other words, the decoding device 400 may set the subvector SVd=SV3 to be code converted as the last subvector in Group 2.

[0231] Next, the decoding device 400 may decode the subvectors one by one in the order of, for example, SV4, SV5, SV6, SV7, and SV8, and output decoding information (for example, a codebook number and a code vector index) (S708). The decoding device 400 may also determine the number of bits in a bit string used to decode the subvectors, and the number of bits in the bit strings of the remaining subvectors in Group 2 (S708).

[0232] Next, the decoding device 400 determines whether the number of bits in the bit strings of the remaining subvectors of Group 2 is equal to or greater than Threshold 1 (S709).

[0233] If the number of bits in the bit strings of the remaining subvectors in Group 2 is less than Threshold 1 (S709: No), the decoding device 400 may, for example, proceed to processing S703 in Figure 23, change the encoding order of the remaining subvectors in Group 2 to SV3, then the other remaining subvectors, and perform the decoding processing of S703 to S706 in Figure 23.

[0234] On the other hand, if the number of bits in the bit strings of the remaining subvectors in Group 2 is equal to or greater than Threshold 1 (S709: Yes), the decoding device 400 determines, for example, whether the next subvector to be decoded is SV3 (S710). If the next subvector to be decoded is not SV3 (the subvector to be code converted) (S710: No), the decoding device 400 may proceed to the process of S708, for example, and decode the next subvector. The decoding device 400 may repeat the processes of S708 to S710, for example, to decode SV4, SV5, SV6, SV7, and SV8 in order.

[0235] If the subvector to be decoded next is SV3 (S710: Yes), the decoding device 400 proceeds to the process of S711 shown in FIG. 25, for example.

[0236] In FIG. 25, the decoding device 400 may determine whether or not the number of bits remaining as the bit string of SV3 (=SVd) exceeds Threshold3 (S711).

[0237] If the number of bits remaining as the SV3 bit string exceeds Threshold 3 (S711: Yes), the decoding device 400 may, for example, decode the SV3 based on the AVQ encoding method without performing code conversion, output decoding information (e.g., codebook number and code vector index), and terminate the decoding process (S712).

[0238] On the other hand, if the number of bits remaining in the SV3 bit string is equal to or less than Threshold 3 (S711: No), the decoding device 400 may, for example, decode an unused bit number indicator value instead of the SV3 codebook number, and may also decode a code vector index (S713). The decoding device 400 may also determine the SV3 codebook number based on the number of bits remaining in the SV3 bit string and the decoded unused bit number information (S713). The decoding device 400 may, for example, output the SV3 codebook number and code vector index, and then terminate the decoding process. An example of a method for determining the codebook number will be described later.

[0239] Next, another example of the operation of the decoding device 400 will be described.

[0240] Fig. 26 is a flow diagram showing another example of the operation of the decoding device 400. Fig. 26 shows, as an example, an example of the operation of the decoding device 400 when the position of the subvector to be code converted is the subvector SV8 (e.g., the last subvector) at the highest position in the frequency domain.

[0241] For example, the process in Fig. 26 is an example of a decoding process corresponding to the encoding process shown in Fig. 17. Furthermore, the example of operation shown in Fig. 26 may be the same as the example of operation shown in Fig. 23, for example.

[0242] 23, the decoding device 400 decodes, for example, SV1 to SV7 and outputs decoding information (for example, a codebook number and a code vector index) (S801). The decoding device 400 may also determine the number of bits in the bit strings used to decode SV1 to SV7, and then determine the number of bits remaining as the bit string for SV8 (S801).

[0243] Next, the decoding device 400 may determine whether the number of bits remaining as an SV8 bit string is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S802).

[0244] If the number of bits remaining as the SV8 bit string is less than Threshold 2 or more than Threshold 3 (S802: Yes), the decoding device 400 may determine, for example, that the SV8 is encoded using the AVQ encoding method (a method for encoding a codebook number), decode the SV8, output decoding information (e.g., the codebook number and the code vector index), and terminate the decoding process (S803).

[0245] On the other hand, if the number of bits remaining in the SV8 bit string is equal to or greater than Threshold 2 but does not exceed Threshold 3 (S802: No), the decoding device 400 determines, for example, that the number of unused bits is to be encoded instead of the SV8 codebook number, and decodes the number of unused bits and the code vector index (S804). The decoding device 400 may also determine the SV8 codebook number based on, for example, the number of bits remaining in the SV8 bit string and the decoded number of unused bits (S804). An example of a method for determining the codebook number will be described later. The decoding device 400 may output the determined SV8 decoding information (e.g., the codebook number and the code vector index) and terminate the decoding process.

[0246] Next, an example of the SVd (for example, SV3 or SV8) decoding process in the process of S706 in FIG. 23, the process of S713 in FIG. 25, or the process of S804 in FIG. 26 will be described.

[0247] Fig. 27 shows a flow diagram of an example of a decoding process of SVd. The process shown in Fig. 27 may correspond to, for example, the encoding process shown in Fig. 18. The process shown in Fig. 27 includes, for example, a procedure for determining a codebook number of SVd based on the number of bits remaining as the encoded bit string of SVd and the number of unused bits.

[0248] 27 , the decoding device 400 may, for example, determine whether the subvector to be code converted is SV8 (S901). If the subvector to be code converted is SV8 (S901: Yes), the decoding device 400 may, for example, calculate the number of remaining bits RB (S902). The number of remaining bits RB may be calculated, for example, by (the number of bits available for encoding the subvector to be code converted)%5, where "%" represents a modulo operation. After calculating the number of remaining bits RB, the decoding device 400 may, for example, proceed to the process of S906.

[0249] On the other hand, if the subvector to be code converted is not SV8 (here, for example, SV3) (S901: No), the decoding device 400 may, for example, count the number of consecutive subvectors (including SV8) whose quantization parameter is a null vector (zero vector) (e.g., NCNV) in the decoded subvector (S903).

[0250] Furthermore, the decoding device 400 may calculate, for example, the number of remaining bits (e.g., RB) (S903). The number of remaining bits RB may be calculated, for example, by (the number of bits remaining as the code bit string of the subvector (e.g., SV3) to be code converted)%5, where "%" represents a modulo operation.

[0251] Next, the decoding device 400 may determine whether to update the number of bits remaining in the bit string of SVd (e.g., SV3) based on, for example, NCNV and RB (S904). In other words, the decoding device 400 may determine whether there is a possibility that wasted bits have occurred due to, for example, a change in the encoding order of the subvectors. Note that the determination method in S904 may be the same as the determination method in the encoding device 300.

[0252] If there is no possibility that a wasted bit has occurred (S904: No), the decoding device 400 proceeds to the process of, for example, S906.

[0253] On the other hand, if there is a possibility that a wasted bit has occurred (S904: Yes), the decoding device 400 may, for example, update the number of bits remaining in the bit string of the subvector to be code converted (e.g., SVd) (S905). For example, the decoding device 400 may add (5-RB) bits, NCNV bits, or (NCNV+1) bits to the number of bits remaining in the bit string of the subvector to be code converted, depending on the conditions. In other words, the decoding device 400 may, for example, increase the number of bits remaining in the bit string of SVd by the number of wasted bits (e.g., the number of bits that may be used wastefully). Furthermore, the decoding device 400 may, for example, update the number of remaining bits RB to 0 (S905). Note that an example of the process of updating the number of bits remaining in the bit string of the subvector to be code converted will be described later.

[0254] Next, the decoding device 400 determines whether the number of remaining bits RB is 4 (S906). If RB is not 4 (S906: No), the decoding device 400 may proceed to the process of S908, for example, and determine the code length of SVd obtained by AVQ encoding based on the number of unused bits (an example will be described later).

[0255] If RB=4 (S906: Yes), the decoding device 400 may increase the number of bits remaining as the bit string of the subvector to be code converted by one bit (S907).

[0256] Next, the decoding device 400 may determine the code length of the SVd obtained by AVQ encoding, for example, based on the unused bit number information (S908). For example, the decoding device 400 may calculate the code length of the SVd (for example, the number of bits of the code (bit string) obtained by AVQ encoding) by subtracting the number of unused bits to be decoded from the number of bits remaining as the bit string of the subvector to be code converted.

[0257] For example, when the association between the number of unused bits and the code (unused bit number indicator value) is defined as shown in Fig. 10, the SV8 code length may be determined as follows: SV8 code length = (INT(number of bits remaining as SV8 encoded bit string - (number of bits in Fig. 10 - 1) x 5) / 5) + 1) x 5

[0258] For example, if the number of bits remaining in the SV8 encoded bit string is 13 bits and the code for the number of unused bits is 10, the SV8 code length is (INT((13-5) / 5)+1)×5=10 bits. Note that when the code for the number of unused bits is 10, the number of unused bits to be decoded is any one of 1 to 5 bits based on FIG. 10, but if the number of bits remaining in the SV8 encoded bit string is 13 bits, the number of unused bits to be decoded may be specified as 3. This is because the code length of the subvector is set to a multiple of 5.

[0259] Next, the decoding device 400 may decode the codebook number and code vector index of SVd based on the code length of SVd (S909). For example, when the code length of SV8 is 10 bits, the decoding device 400 may decode the codebook number = 2 based on FIG. 1.

[0260] Next, an example of processing for updating the number of bits remaining as a bit string of a subvector to be code converted in the decoding device 400 will be described.

[0261] 28 is a flow diagram illustrating an example of processing for updating the number of bits remaining as a bit string of a subvector to be code converted in the decoding device 400. The processing of the decoding device 400 illustrated in FIG. 28 corresponds to, for example, the processing of the encoding device 300 illustrated in FIG.

[0262] For example, when the decoding device 400 determines that there is a possibility that wasted bits have occurred (S904: Yes in Figure 27), it may add NCNV bits, (NCNV + 1) bits, or (5 - RB) bits as the number of wasted bits to the number of bits remaining in the bit sequence of the subvector to be code converted, depending on conditions regarding the number of remaining bits (e.g., the remainder modulo 5 of the number of bits remaining in the bit sequence of the subvector to be code converted) RB and the number of consecutive subvectors whose quantization parameter is a null vector NCNV.

[0263] For example, if (RB+NCNV)%5=0 (S941: Yes), the decoding device 400 may set the number of added bits (hereinafter referred to as "W") to the NCNV bits (S942).

[0264] Furthermore, for example, when (RB+NCNV)%5=4 (S941: No and S943: Yes), the decoding device 400 may set the number of added bits W to (NCNV+1) bits (S944).

[0265] Also, for example, if (RB+NCNV)%5=0 and (RB+NCNV)%5=4 are not true (S941: No and S943: No), the decoding device 400 may set the number of added bits W to (5-RB) bits (S945).

[0266] Then, the decoding device 400 may update the number of bits remaining in the bit sequence of the subvector to be code converted, for example, by adding the number of added bits W to the number of bits remaining in the bit sequence of the subvector to be code converted (S946). By the process of S946, the number of bits remaining in the bit sequence of the subvector to be code converted is set to a multiple of 5. In this case, the number of remaining bits RB is 0, so the decoding device 400 may update the number of remaining bits RB to 0, for example.

[0267] 29 shows another flow diagram of an example of processing for updating the number of bits remaining as a bit string of a subvector to be code converted in the decoding device 400. The processing of the decoding device 400 shown in FIG. 29 corresponds to, for example, the processing of the encoding device 300 shown in FIG.

[0268] For example, when the decoding device 400 determines that there is a possibility that a wasted bit has occurred (S904: Yes in Figure 27), it may add NCNV bits or (NCNV + 1) bits as the number of wasted bits to the number of bits remaining as the bit string of the subvector to be code converted, depending on conditions regarding the number of remaining bits RB and the number of consecutive subvectors whose quantization parameter is a null vector NCNV.

[0269] That is, in FIG. 29, unlike FIG. 28, the decoding device 400 does not add (5-RB) bits when updating the number of bits remaining as the bit string of the subvector to be code converted.

[0270] For example, if (RB+NCNV)%5=4 (S951: Yes), the decoding device 400 may set the number of added bits W to (NCNV+1) bits (S952), and if (RB+NCNV)%5=4 is not true (S951: No), the decoding device 400 may set the number of added bits W to NCNV bits (S953).

[0271] Then, the decoding device 400 may update the number of bits remaining as the bit string of the subvector to be code converted, for example, by adding the number of added bits W to the number of bits remaining as the bit string of the subvector to be code converted (S954).

[0272] Furthermore, the decoding device 400 may recalculate the number of remaining bits RB for, for example, (NCNV+1) bits or the number of bits remaining as a bit string of the subvector to be code converted after adding the NCNV bits (S954). Due to the addition of the NCNV bits, the recalculated number of remaining bits RB may become RB > 0.

[0273] The decoding device 400 determines, for example, whether the recalculated number of remaining bits RB > 0 (S955). In other words, the decoding device 400 determines whether the recalculated number of remaining bits RB (or the updated number of available bits) is a true value.

[0274] If RB>0 is not satisfied (S955: No), the decoding device 400 may end the processing of FIG.

[0275] On the other hand, if RB>0 (S955: Yes), the decoding device 400 may update the number of bits remaining as the bit string of the subvector to be code converted by, for example, subtracting the number of remaining bits RB from the number of bits remaining as the bit string of the subvector to be code converted after adding (NCNV+1) bits or NCNV bits (S956). Also, the decoding device 400 may update the number of remaining bits RB to 0, for example.

[0276] 28 or 29 , the decoding device 400 sets (e.g., updates) the number of bits remaining as a bit string of a subvector to be code converted, depending on conditions related to the number of remaining bits RB and the number NCNV of consecutive subvectors whose quantization parameters are null vectors. In this way, the decoding device 400 can set an appropriate value for the number of bits remaining as a bit string of a subvector to be code converted, even when NCNV is 5 or more, for example.

[0277] Furthermore, the decoding device 400 can appropriately set the number of bits remaining as the bit string of the subvector to be code converted, using RB and NCNV, which are parameters that can be specified by the decoding device 400, without specifying the wasted bits.

[0278] The decoding device 400 may, for example, decode the codebook number and code vector index for the subvector to be code converted based on the setting of the number of bits remaining as the bit string of the subvector to be code converted as described above, and perform AVQ decoding (e.g., inverse vector quantization) based on the decoding result.

[0279] As described above, in this embodiment, the encoding device 300 determines whether to perform encoding of the codebook number for the subvector to be code converted or encoding based on the difference between the number of allocated bits for vector quantization and the number of bits for the quantization parameter (e.g., encoding of the number of unused bits), based on the number of bits available for encoding the subvector in vector quantization.

[0280] In this way, by switching between encoding the codebook number and encoding the number of unused bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multi-rate lattice vector quantization, thereby reducing the number of encoding bits. Thus, according to this embodiment, it is possible to reduce the number of encoding bits in multi-rate lattice vector quantization.

[0281] Furthermore, according to this embodiment, even when the subvector to be code converted into the unused bit number indication value is a subvector different from the last subvector (e.g., SV8) (in other words, when the encoding order is reversed), the encoding device 300 can accurately determine the number of unused bits according to the number of wasted bits that may result from the reversal of the encoding order.

[0282] Furthermore, according to this embodiment, the decoding device 400 can identify coding information for a subvector to be code converted based on parameters such as the number of bits used for coding and decoding information (e.g., a codebook indication value of a subvector different from the subvector to be code converted). Therefore, for example, a signal for switching between coding for the codebook indication value and coding for the number of unused bits (e.g., a flag or control information dedicated to switching) does not need to be notified from the coding device 300 to the decoding device 400.

[0283] The embodiments of the present disclosure have been described above.

[0284] In an embodiment of the present disclosure, the codebook list is not limited to the example shown in Fig. 1, and the codebook indicator value in the codebook and the code value and the number of used bits (or the total number of used bits) of the code vector index may be other values. In addition, the above-mentioned threshold may be set according to the codebook list applied to encoding and decoding.

[0285] Also, for example, in FIG. 1, a case has been described in which the ratio of the number of bits used by the codebook indication value to the total number of bits used in each codebook is 1 / 5 (in other words, when using a remainder, the divisor is 5), but this is not limiting.

[0286] Furthermore, in the above-described embodiment, the case where the number of sub-vectors into which the input signal S(f) is divided is described as eight, but the number of sub-vectors into which the input signal S(f) is divided is not limited to eight.

[0287] Furthermore, in the above-described embodiment, an input signal is divided into a plurality of subvectors in the frequency domain as an example. However, the present disclosure is not limited to this example. The input signal may be divided into a plurality of subvectors in the time domain. In the case of the time domain, for example, the subvector SVd to be code converted may be set to a specific subvector among the subvectors arranged in the time domain (for example, the third subvector from the earliest or the last subvector). Thus, in an embodiment of the present disclosure, when an input signal is divided into subvectors of a certain length in either the frequency domain or the time domain, the subvector SVd to be code converted may be set to a subvector of a specific order among the arranged subvectors (for example, the third subvector or the last subvector).

[0288] Furthermore, in the above-described embodiment, vector quantization is not limited to AVQ, and other methods may be used.

[0289] The present disclosure can be realized by software, hardware, or software integrated with hardware. Each functional block described in the above embodiments may be partially or entirely realized as an LSI, which is an integrated circuit. Each process described in the above embodiments may be partially or entirely controlled by a single LSI or a combination of LSIs. The LSI may be composed of individual chips, or may be composed of a single chip that includes some or all of the functional blocks. The LSI may have data inputs and outputs. Depending on the level of integration, an LSI may be referred to as an IC, system LSI, super LSI, or ultra LSI. The integrated circuit implementation is not limited to LSIs, and may be realized using dedicated circuits, general-purpose processors, or dedicated processors. Furthermore, a field programmable gate array (FPGA), which can be programmed after LSI fabrication, or a reconfigurable processor, which allows the connections and settings of circuit cells within an LSI to be reconfigured, may also be used. The present disclosure may be realized as digital processing or analog processing. Furthermore, if an integrated circuit technology that can replace LSI emerges due to advances in semiconductor technology or other derivative technologies, it is natural that such technology may be used to integrate functional blocks. The application of biotechnology, etc. is also a possibility.

[0290] The present disclosure may be implemented in any type of apparatus, device, or system (collectively referred to as a communications apparatus) that has a communications function. The communications apparatus may include a radio transceiver and processing / control circuitry. The radio transceiver may include a receiver and a transmitter, or both functions. The radio transceiver (transmitter and receiver) may include a radio frequency (RF) module and one or more antennas. The RF module may include an amplifier, an RF modulator / demodulator, or the like. Non-limiting examples of communication devices include telephones (e.g., cell phones, smartphones), tablets, personal computers (PCs) (e.g., laptops, desktops, notebooks), cameras (e.g., digital still / video cameras), digital players (e.g., digital audio / video players), wearable devices (e.g., wearable cameras, smartwatches, tracking devices), game consoles, digital book readers, telehealth / telemedicine devices, communication-enabled vehicles or mobile transportation (e.g., cars, airplanes, ships), and combinations of the above devices.

[0291] The communication devices are not limited to portable or mobile devices, but also include any kind of non-portable or fixed equipment, devices, and systems, such as smart home devices (such as home appliances, lighting equipment, smart meters or measuring devices, control panels, etc.), vending machines, and any other "things" that may exist on an IoT (Internet of Things) network.

[0292] Communications include data communications via cellular systems, wireless LAN systems, communication satellite systems, and the like, as well as data communications via combinations of these.

[0293] A communications apparatus also includes devices such as controllers and sensors connected or coupled to a communications device that performs the communications functions described in this disclosure, such as controllers and sensors that generate control and data signals used by the communications device to perform the communications functions of the communications apparatus.

[0294] The communication apparatus also includes infrastructure facilities, such as base stations, access points, and any other apparatus, device, or system that communicates with or controls the various apparatuses listed above, but are not limited to these.

[0295] An encoding device according to one embodiment of the present disclosure includes a quantization circuit that generates a quantization parameter including information about a vector quantization codebook, and a control circuit that sets the number of bits available for encoding a target subvector according to conditions in encoding based on the difference between the number of bits available for encoding the target subvector and the number of bits of the quantization parameter for the target subvector.

[0296] In one embodiment of the present disclosure, the control circuit classifies multiple subvectors into a first group including subvectors with frequencies lower than that of the target subvector and a second group including the target subvector and subvectors with frequencies higher than that of the target subvector, and sets the encoding order of the target subvector to be the last of the subvectors included in the second group.

[0297] In one embodiment of the present disclosure, the control circuit updates the number of available bits based on the condition regarding a first number of consecutive subvectors of the second group that are different from the target subvector and whose quantization parameter indicates a null vector, and a second number that is a remainder of 5 with respect to the number of available bits.

[0298] In one embodiment of the present disclosure, the control circuit adds the first number to the number of usable bits if the remainder modulo 5 of the sum of the first number and the second number is 0, adds the first number plus 1 to the number of usable bits if the remainder modulo 5 of the sum of the first number and the second number is 4, and adds the value obtained by subtracting the second number from 5 to the number of usable bits if the remainder modulo 5 of the sum of the first number and the second number is other than 0 and 4.

[0299] In one embodiment of the present disclosure, the control circuit adds the first number plus 1 to the number of usable bits when the remainder by 5 of the sum of the first number and the second number is 4, adds the first number to the number of usable bits when the remainder by 5 of the sum of the first number and the second number is different from 4, and subtracts the third number from the number of usable bits after adding the first number or the value of the first number plus 1 to the number of usable bits when a third number that is the remainder by 5 of the number of usable bits after adding the first number or the value of the first number plus 1 is greater than 0.

[0300] In one embodiment of the present disclosure, the target subvector is the third lowest subvector in the frequency domain or the third earliest subvector in the time domain among the eight subvectors.

[0301] A decoding device according to one embodiment of the present disclosure includes a control circuit that sets the number of bits available for encoding a target subvector in vector quantization according to conditions in decoding encoded data based on the difference between the number of bits available for encoding the target subvector and the number of bits of a quantization parameter that includes information about a codebook for the vector quantization of the target subvector, and an inverse quantization circuit that performs inverse vector quantization based on the results of the decoding.

[0302] In an encoding method according to one embodiment of the present disclosure, an encoding device generates a quantization parameter including information about a vector quantization codebook, and sets the number of available bits according to conditions in encoding based on the difference between the number of bits available for encoding a target subvector and the number of bits of the quantization parameter for the target subvector.

[0303] In a decoding method according to one embodiment of the present disclosure, a decoding device sets the number of available bits according to conditions when decoding encoded data based on the difference between the number of bits available for encoding a target subvector in vector quantization and the number of bits of a quantization parameter containing information about the codebook for the vector quantization of the target subvector, and performs inverse vector quantization based on the results of the decoding.

[0304] The disclosures of the specification, drawings and abstract contained in Japanese Patent Application No. 2021-195488, filed on December 1, 2021, are incorporated herein by reference in their entirety.

[0305] An embodiment of the present disclosure is useful for coding systems and the like.

[0306] 100, 300 Encoding device 101 Multiplication unit 102 Subtractor 103 De-emphasis unit 104 DCT unit 105 AVQ encoding unit 106, 205 Floating bit number management unit 107, 206 Inverse DCT unit 108, 202, 301, 401 Subvector identification unit 109, 203 Code conversion unit 110 Multiplexing unit 200 Decoding device 201 Separation unit 204 AVQ decoding unit

Claims

1. A quantization circuit that generates, for each of a plurality of sub-vectors, a quantization parameter including a codebook index indicating a codebook used in vector quantization and a codevector index indicating a codevector used in the vector quantization; a control circuit that divides the plurality of subvectors into a first group not including a target subvector and a second group including the target subvector, and when calculating a number of unused bits, which is a difference between a number of bits available for encoding the target subvector and a number of bits required for encoding the quantization parameter of the target subvector, in encoding the second group, updates the number of available bits based on a number of consecutive null vectors (NCNV) indicating the number of consecutive null vectors other than the target subvector among two or more subvectors included in the second group, and / or a number of remainder bits (RB) which is a remainder of the number of available bits modulo 5; and An encoding device comprising:

2. The control circuit setting the encoding order of the target sub-vector to the last of the two or more sub-vectors included in the second group; The encoding device according to claim 1 .

3. After updating the number of available bits, the control circuit updates the value of the RB to 0. The encoding device according to claim 1 .

4. The control circuit If the remainder modulo 5 of the sum of the value of the NCNV and the value of the RB is 0, add the value of the NCNV to the number of available bits before the update; If the remainder of 5 for the sum of the value of the NCNV and the value of the RB is 4, add the value obtained by adding 1 to the value of the NCNV to the number of available bits before the update; If the remainder of the sum of the NCNV value and the RB value modulo 5 is different from 0 or 4, add the value obtained by subtracting the RB value from 5 to the number of available bits before the update. The encoding device according to claim 1 .

5. The control circuit If the remainder of 5 for the sum of the value of the NCNV and the value of the RB is 4, add the value obtained by adding 1 to the value of the NCNV to the number of available bits before the update; If the remainder modulo 5 of the sum of the value of the NCNV and the value of the RB is different from 4, add the value of the NCNV to the number of available bits before the update; If the recalculated RB value is a value obtained by adding 1 to the NCNV value or a remainder of 5 to the number of available bits after adding the NCNV value, the recalculated RB value is subtracted from the value obtained by adding 1 to the NCNV value or the number of available bits after adding the NCNV value. The encoding device according to claim 1 .

6. The target subvector is the third subvector from the lowest in the frequency domain or the third subvector from the earliest in the time domain among eight subvectors included in the plurality of subvectors. The encoding device according to claim 1 .

7. An encoding method in an encoding device, comprising: generating a quantization parameter for each of a plurality of sub-vectors, the quantization parameter including a codebook index indicating a codebook used for vector quantization and a codevector index indicating a codevector used for the vector quantization; The plurality of subvectors are divided into a first group not including a target subvector and a second group including the target subvector, and in encoding the second group, when calculating the number of unused bits, which is the difference between the number of bits available for encoding the target subvector and the number of bits required for encoding the quantization parameter of the target subvector, the number of available bits is updated based on a number of consecutive null vectors (NCNV) indicating the number of consecutive null vectors other than the target subvector among two or more subvectors included in the second group, and / or a number of remainder bits (RB), which is the remainder of the number of available bits modulo 5, and then the number of unused bits of the target subvector is calculated and encoded. Encoding method.

8. The encoding order of the target subvector is set to the last of the two or more subvectors included in the second group. The encoding method according to claim 7.

9. After updating the number of available bits, the value of the RB is updated to 0. The encoding method according to claim 7.

10. If the remainder modulo 5 of the sum of the value of the NCNV and the value of the RB is 0, the value of the NCNV is added to the number of available bits before the update; If the remainder of 5 for the sum of the value of the NCNV and the value of the RB is 4, add the value obtained by adding 1 to the value of the NCNV to the number of available bits before the update; If the remainder of the sum of the NCNV value and the RB value modulo 5 is different from 0 or 4, add the value obtained by subtracting the RB value from 5 to the number of available bits before the update. The encoding method according to claim 7.

11. If the remainder of 5 for the sum of the value of the NCNV and the value of the RB is 4, the value obtained by adding 1 to the value of the NCNV is added to the number of available bits before the update; If the remainder modulo 5 of the sum of the value of the NCNV and the value of the RB is different from 4, add the value of the NCNV to the number of available bits before the update; If the recalculated RB value is a value obtained by adding 1 to the NCNV value or a remainder of 5 to the number of available bits after adding the NCNV value, the recalculated RB value is subtracted from the value obtained by adding 1 to the NCNV value or the number of available bits after adding the NCNV value. The encoding method according to claim 7.

12. The target subvector is the third subvector from the lowest in the frequency domain or the third subvector from the earliest in the time domain among eight subvectors included in the plurality of subvectors. The encoding method according to claim 7.