Semiconductor device

Abstract

This semiconductor device comprises: a support substrate; a plurality of first semiconductor elements; a plurality of second semiconductor elements; a first terminal; a first conductive member that electrically connects the plurality of first semiconductor elements and a second conductive portion; a second conductive member that electrically connects the plurality of second semiconductor elements and the first terminal; and a sealing resin. The first conductive member includes: a plurality of first joining portions that are joined to the plurality of first semiconductor elements; and a second joining portion that is joined to the second conductive portion. The second conductive member includes a plurality of third joining portions that are joined to the plurality of second semiconductor elements. Each third joining portion includes: two flat portions that are joined to a second semiconductor element and aligned in the y-direction; and two first inclined portions that are respectively linked to the two flat portions on the outer sides thereof in the y-direction.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices including power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. Such semiconductor devices are installed in a wide variety of electronic devices, from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 (Patent Document 1) discloses a conventional semiconductor device (power module). The semiconductor device described in Patent Document 1 includes a semiconductor element and a support substrate (ceramic substrate). The semiconductor element is, for example, an IGBT made of silicon (Si). The support substrate supports the semiconductor element. The support substrate includes an insulating base material and conductor layers laminated on both sides of the base material. The base material is, for example, made of ceramic. Each conductor layer is, for example, made of copper (Cu), and a semiconductor element is bonded to one of the conductor layers. The semiconductor element is covered, for example, with a sealing resin.

[0003] Japanese Patent Application Laid-Open No. 2021-190505

[0004] In order to simplify the manufacturing process of the power module or improve reliability during use, it is preferable to further simplify the structure of the members that form the conduction paths within the power module.

[0005] In addition, in order to increase the current capacity of the power module, it is preferable to suppress current concentration in the conduction path within the power module.

[0006] Furthermore, even if deformation such as bending occurs in the components of the power module, it is preferable to prevent shortening of the product life.

[0007] An object of the present disclosure is to provide an improved semiconductor device. In particular, in view of the above-described circumstances, an object of the present disclosure is to provide a semiconductor device that can further simplify the structure of components that form a conduction path. Another object of the present disclosure is to provide a semiconductor device that can suppress current concentration in the conduction path within a power module. Another object of the present disclosure is to provide a semiconductor device that can suppress a shortening of the product life even when deformation such as bending occurs in the components.

[0008] a first conductive portion having a first main surface facing one side in a thickness direction and located on one side in a first direction perpendicular to the thickness direction, and a second conductive portion having a second main surface facing one side in the thickness direction and located on the other side in the first direction; a plurality of first semiconductor elements mounted on the first conductive portion, each having a switching function, and arranged in a second direction perpendicular to both the thickness direction and the first direction; a plurality of second semiconductor elements mounted on the second conductive portion, each having a switching function, and arranged in the second direction; first terminals protruding to one side in the first direction with respect to the first conductive portion; a first conductive member connecting the plurality of first semiconductor elements to the second conductive portion; a second conductive member connecting the plurality of second semiconductor elements to the first terminal; and a sealing resin covering the plurality of first semiconductor elements, the plurality of second semiconductor elements, the first conductive member, the second conductive member, and a portion of each of the support substrate and the first terminal. The first conductive member has a plurality of first bonding portions bonded to the plurality of first semiconductor elements and a second bonding portion bonded to the second conductive portion. The second conductive member has a plurality of third bonding portions bonded to the plurality of second semiconductor elements. The third bonding portions each have two flat portions bonded to the second semiconductor elements and aligned in the second direction, and two first inclined portions connected to the two flat portions outward in the second direction.

[0009] According to the above configuration, it is possible to provide a semiconductor device capable of suppressing current concentration in the conduction path within the power module.

[0010] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0011] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a perspective view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 3 is a perspective view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 4 is a plan view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 5 is a plan view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 6 is a side view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 7 is an enlarged plan view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 8 is a plan view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 9 is a plan view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 10 is a side view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 11 is a bottom view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 5. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 5. FIG. 14 is an enlarged cross-sectional view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 15 is an enlarged cross-sectional view showing a main portion of the semiconductor device according to the first embodiment of the present disclosure. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 5 . FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 5 . FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 5 . FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 5 . FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 5 . FIG. 21 is a perspective view showing a second conductive member of the semiconductor device according to the first embodiment of the present disclosure. FIG. 22 is a plan view showing the second conductive member of the semiconductor device according to the first embodiment of the present disclosure. FIG. 23 is a front view showing the second conductive member of the semiconductor device according to the first embodiment of the present disclosure. FIG. 24 is an enlarged front view showing a main portion of the second conductive member of the semiconductor device according to the first embodiment of the present disclosure. FIG. 25 is a side view showing the second conductive member of the semiconductor device according to the first embodiment of the present disclosure. FIG. 26 is a cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 27 is a cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. 28 and 29 are perspective views of a main part of a semiconductor device according to a second embodiment of the present disclosure.FIG. 30 is a plan view of a main portion of a semiconductor device according to a second embodiment of the present disclosure. FIG. 31 is a cross-sectional view taken along line XXXI-XXXI in FIG. 30. FIG. 32 is a cross-sectional view taken along line XXXII-XXXII in FIG. 30. FIG. 33 is a cross-sectional view taken along line XXXIII-XXXIII in FIG. 30. FIG. 34 is a perspective view showing a second conductive member of a semiconductor device according to a second embodiment of the present disclosure. FIG. 35 is a plan view showing a second conductive member of a semiconductor device according to a second embodiment of the present disclosure. FIG. 36 is a plan view showing a first modified example of a second conductive member of a semiconductor device according to a second embodiment of the present disclosure. FIG. 37 is a plan view showing a second modified example of a second conductive member of a semiconductor device according to a second embodiment of the present disclosure. FIG. 38 is a schematic diagram of a vehicle equipped with a semiconductor device according to the present disclosure.

[0012] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0013] The terms "first," "second," "third," etc. in this disclosure are used for identification purposes only and are not intended to impose any ranking on their objects.

[0014] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, in the present disclosure, "a surface A faces in (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.

[0015] 1 to 25 show a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 according to this embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a support substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a sealing resin 8.

[0016] FIG. 1 is a perspective view showing the semiconductor device A1. FIGS. 2 and 3 are perspective views of a main portion of the semiconductor device A1. FIG. 4 is a plan view showing the semiconductor device A1. FIG. 5 is a plan view of a main portion of the semiconductor device A1. FIG. 6 is a side view of a main portion of the semiconductor device A1. FIG. 7 is an enlarged plan view of a main portion of the semiconductor device A1. FIGS. 8 and 9 are plan views of a main portion of the semiconductor device A1. FIG. 10 is a side view of the semiconductor device A1. FIG. 11 is a bottom view of the semiconductor device A1. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 5. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 5. FIGS. 14 and 15 are enlarged cross-sectional views of a main portion of the semiconductor device A1. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 5. FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 5. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 5. Fig. 19 is a cross-sectional view taken along line XIX-XIX in Fig. 5. Fig. 20 is a cross-sectional view taken along line XX-XX in Fig. 5. Fig. 21 is a perspective view showing the second conductive member 6 of the semiconductor device A1. Fig. 22 is a plan view showing the second conductive member 6 of the semiconductor device A1. Fig. 23 is a front view showing the second conductive member 6 of the semiconductor device A1. Fig. 24 is an enlarged front view showing a main part of the second conductive member of the semiconductor device A1. Fig. 25 is a side view showing the second conductive member 6 of the semiconductor device A1.

[0017] In these figures, the z direction is an example of the thickness direction of the present disclosure, the x direction is an example of the first direction of the present disclosure, and the y direction is an example of the second direction of the present disclosure. Furthermore, one side of the x direction is referred to as the x1 side of the x direction, and the other side of the x direction is referred to as the x2 side of the x direction. Furthermore, one side of the y direction is referred to as the y1 side of the y direction, and the other side of the y direction is referred to as the y2 side of the y direction. Furthermore, one side of the z direction is referred to as the z1 side of the z direction, and the other side of the z direction is referred to as the z2 side of the z direction.

[0018] The multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are electronic components that are central to the functionality of the semiconductor device A1. The constituent material of each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is a semiconductor material primarily composed of, for example, silicon carbide (SiC). This semiconductor material is not limited to SiC and may be silicon (Si), gallium nitride (GaN), diamond (C), or the like. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, a power semiconductor chip with switching function, such as a metal oxide semiconductor field effect transistor (MOSFET). In this embodiment, the first semiconductor elements 10A and the second semiconductor elements 10B are MOSFETs, but are not limited thereto and may be other transistors such as insulated gate bipolar transistors (IGBTs). Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is the same element. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0019] 14 and 15 , the first semiconductor element 10A and the second semiconductor element 10B each have an element main surface 101 and an element back surface 102. In each of the first semiconductor elements 10A and the second semiconductor elements 10B, the element main surface 101 and the element back surface 102 are spaced apart in the z direction. The element main surface 101 faces the z1 side in the z direction, and the element back surface 102 faces the z2 side in the z direction.

[0020] In this embodiment, the semiconductor device A1 includes four first semiconductor elements 10A and four second semiconductor elements 10B. However, the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this configuration and may be changed as appropriate depending on the performance required of the semiconductor device A1. In the example shown in FIGS. 8 and 9, four first semiconductor elements 10A and four second semiconductor elements 10B are arranged. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be two, three, or five or more. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal to or different from each other. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B is determined by the current capacity handled by the semiconductor device A1.

[0021] The semiconductor device A1 is configured, for example, as a half-bridge switching circuit. In this case, a plurality of first semiconductor elements 10A form an upper arm circuit of the semiconductor device A1, and a plurality of second semiconductor elements 10B form a lower arm circuit. In the upper arm circuit, the plurality of first semiconductor elements 10A are connected in parallel with each other, and in the lower arm circuit, the plurality of second semiconductor elements 10B are connected in parallel with each other. Each first semiconductor element 10A and each second semiconductor element 10B are connected in series to form a bridge layer.

[0022] As shown in FIGS. 8 , 9 , and 19 , each of the multiple first semiconductor elements 10A is mounted on a first conductive portion 32A of a support substrate 3 (described later). In the example shown in FIGS. 8 and 9 , the multiple first semiconductor elements 10A are aligned, for example, in the y direction and spaced apart from one another. Each first semiconductor element 10A is conductively bonded to the first conductive portion 32A via a conductive bonding material 19. When each first semiconductor element 10A is bonded to the first conductive portion 32A, the element back surface 102 faces the first conductive portion 32A. Note that, unlike the present embodiment, the multiple first semiconductor elements 10A may be mounted on a metal member other than a part of the DBC substrate, etc. In this case, the metal member corresponds to the first conductive portion in the present disclosure. This metal member may be supported by, for example, the first conductive portion 32A.

[0023] As shown in FIGS. 8 , 9 , and 18 , each of the multiple second semiconductor elements 10B is mounted on a second conductive portion 32B of the support substrate 3 (described later). In the example shown in FIGS. 8 and 9 , the multiple second semiconductor elements 10B are aligned, for example, in the y direction and spaced apart from one another. Each second semiconductor element 10B is conductively bonded to the second conductive portion 32B via a conductive bonding material 19. When each second semiconductor element 10B is bonded to the second conductive portion 32B, the element back surface 102 faces the second conductive portion 32B. As can be seen from FIG. 9 , the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap when viewed in the x direction, but they do not necessarily need to overlap. Unlike the present embodiment, the multiple second semiconductor elements 10B may be mounted on a metal member other than a part of the DBC substrate, etc. In this case, the metal member corresponds to the second conductive portion in the present disclosure. This metal member may be supported by, for example, the second conductive portion 32B.

[0024] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B each have a first principal surface electrode 11, a second principal surface electrode 12, a third principal surface electrode 13, and a back surface electrode 15. The configurations of the first principal surface electrode 11, the second principal surface electrode 12, the third principal surface electrode 13, and the back surface electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are provided on the element main surface 101. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are insulated by an insulating film (not shown). The back surface electrode 15 is provided on the element back surface 102.

[0025] The first principal surface electrode 11 is, for example, a gate electrode, to which a drive signal (for example, a gate voltage) for driving the first semiconductor element 10A (second semiconductor element 10B) is input. In the first semiconductor element 10A (second semiconductor element 10B), the second principal surface electrode 12 is, for example, a source electrode, through which a source current flows. The second principal surface electrode 12 of this embodiment has a gate finger 121. The gate finger 121 is, for example, made of a linear insulator extending in the x direction, and divides the second principal surface electrode 12 into two parts in the y direction. The third principal surface electrode 13 is, for example, a source sense electrode, through which a source current flows. The back surface electrode 15 is, for example, a drain electrode, through which a drain current flows. The back surface electrode 15 covers substantially the entire area of ​​the back surface 102 of the element. The back surface electrode 15 is, for example, formed by Ag (silver) plating.

[0026] When a drive signal (gate voltage) is input to the first principal surface electrode 11 (gate electrode), each first semiconductor element 10A (each second semiconductor element 10B) switches between a conductive state and a non-conductive state in response to the drive signal. In the conductive state, current flows from the back surface electrode 15 (drain electrode) to the second principal surface electrode 12 (source electrode), and in the non-conductive state, current does not flow. In other words, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching operation. The semiconductor device A1 converts a DC voltage input between the single fourth terminal 44 and the two first and second terminals 41 and 42 into, for example, an AC voltage, and outputs the AC voltage from the third terminal 43, using the switching functions of the multiple first semiconductor elements 10A and multiple second semiconductor elements 10B.

[0027] 5, 8, 9, etc., the semiconductor device A1 includes a thermistor 17. The thermistor 17 is used as a temperature detection sensor. Note that the semiconductor device A1 may include, for example, a temperature-sensitive diode in addition to the thermistor 17, or may not include the thermistor 17.

[0028] The support substrate 3 supports a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. The specific configuration of the support substrate 3 is not limited in any way, and may be, for example, a DBC (Direct Bonded Copper) substrate or an AMB (Active Metal Brazing) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, and a back surface metal layer 33. The first metal layer 32 includes a first conductive portion 32A and a second conductive portion 32B. The dimension of the support substrate 3 in the z direction is, for example, not less than 0.4 mm and not more than 3.0 mm.

[0029] The insulating layer 31 is made of, for example, ceramics with excellent thermal conductivity. Examples of such ceramics include silicon nitride (SiN). The insulating layer 31 is not limited to ceramics and may be an insulating resin sheet or the like. The insulating layer 31 has, for example, a rectangular shape in a plan view. The dimension of the insulating layer 31 in the z direction is, for example, 0.05 mm or more and 1.0 mm or less.

[0030] The first conductive portion 32A supports a plurality of first semiconductor elements 10A, and the second conductive portion 32B supports a plurality of second semiconductor elements 10B. The first conductive portion 32A and the second conductive portion 32B are formed on the upper surface (the surface facing the z1 side in the z direction) of the insulating layer 31. The constituent material of the first conductive portion 32A and the second conductive portion 32B includes, for example, Cu (copper). The constituent material may include, for example, Al (aluminum) other than Cu (copper). The first conductive portion 32A and the second conductive portion 32B are spaced apart in the x direction. The first conductive portion 32A is located on the x1 side of the second conductive portion 32B in the x direction. The first conductive portion 32A and the second conductive portion 32B each have, for example, a rectangular shape in a plan view. The first conductive portion 32A and the second conductive portion 32B, together with the first conductive member 5 and the second conductive member 6, constitute a path of the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0031] The first conductive portion 32A has a first main surface 301A. The first main surface 301A is a flat surface facing the z1 side in the z direction. A plurality of first semiconductor elements 10A are bonded to the first main surface 301A of the first conductive portion 32A via conductive bonding material 19. The second conductive portion 32B has a second main surface 301B. The second main surface 301B is a flat surface facing the z1 side in the z direction. A plurality of second semiconductor elements 10B are bonded to the second main surface 301B of the second conductive portion 32B via conductive bonding material 19. The material of the conductive bonding material 19 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. The dimension of the first conductive portion 32A and the second conductive portion 32B in the z direction is, for example, 0.1 mm or more and 1.5 mm or less.

[0032] The back surface metal layer 33 is formed on the lower surface (surface facing the z2 side in the z direction) of the insulating layer 31. The constituent material of the back surface metal layer 33 is the same as the constituent material of the first metal layer 32. The back surface metal layer 33 has a back surface 302. The back surface 302 is a flat surface facing the z2 side in the z direction. In the example shown in FIG. 11 , the back surface 302 is exposed from the sealing resin 8, for example. A heat dissipation member (for example, a heat sink) (not shown) can be attached to the back surface 302. The back surface 302 may not be exposed from the sealing resin 8 and may be covered by the sealing resin 8. The back surface metal layer 33 overlaps both the first conductive portion 32A and the second conductive portion 32B in a plan view.

[0033] The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 are each made of a plate-shaped metal plate. This metal plate contains, for example, Cu (copper) or a Cu (copper) alloy. In the examples shown in Figures 1 to 5, 8, 9, and 11, the semiconductor device A1 includes one each of the first terminal 41, the second terminal 42, and the fourth terminal 44, and two third terminals 43, but the number of each terminal is not limited in any way.

[0034] A DC voltage to be converted into power is input to the first terminal 41, the second terminal 42, and the fourth terminal 44. The fourth terminal 44 is a positive electrode (P terminal), and the first terminal 41 and the second terminal 42 are each a negative electrode (N terminal). An AC voltage converted into power by the first semiconductor element 10A and the second semiconductor element 10B is output from the plurality of third terminals 43. The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 each include a portion covered with the sealing resin 8 and a portion exposed from the sealing resin 8.

[0035] As shown in FIG. 13 , the fourth terminal 44 is conductively bonded to the first conductive portion 32A. The conductive bonding method is not limited, and methods such as ultrasonic bonding, laser bonding, welding, or methods using solder, metal paste, sintered silver, etc. may be appropriately adopted. As shown in FIGS. 8 and 9 , the fourth terminal 44 is located on the x1 side in the x direction with respect to the multiple first semiconductor elements 10A and the first conductive portions 32A. The fourth terminal 44 is conductively connected to the first conductive portion 32A and, via the first conductive portion 32A, to the back surface electrode 15 (drain electrode) of each first semiconductor element 10A.

[0036] The first terminal 41 and the second terminal 42 are electrically connected to the second conductive member 6. In this embodiment, the first terminal 41 and the second conductive member 6 are integrally formed. The term "integrally formed" refers to a configuration in which the first terminal 41 and the second conductive member 6 are formed, for example, by cutting and bending a single metal plate material, without using any bonding material or the like to join them together. Furthermore, in this embodiment, the second terminal 42 and the second conductive member 6 are integrally formed. Note that the first terminal 41 and the second terminal 42 may be configured to be electrically connected to the second conductive member 6, and may have a bonding portion to join them, unlike this embodiment. As shown in FIGS. 5 and 8 , the first terminal 41 and the second terminal 42 are each located on the x1 side in the x direction with respect to the multiple first semiconductor elements 10A and the first conductive portion 32A. The first terminal 41 and the second terminal 42 are each electrically connected to the second conductive member 6 and, via the second conductive member 6, to the second principal surface electrode 12 (source electrode) of each second semiconductor element 10B.

[0037] 1 to 5 and 11 , the first terminal 41, the second terminal 42, and the fourth terminal 44 each protrude from the sealing resin 8 toward the x1 side in the x direction in the semiconductor device A1. The first terminal 41, the second terminal 42, and the fourth terminal 44 are spaced apart from one another. The first terminal 41 and the second terminal 42 are located on opposite sides of the fourth terminal 44 in the y direction. The first terminal 41 is located on the y1 side of the fourth terminal 44 in the y direction, and the second terminal 42 is located on the y2 side of the fourth terminal 44 in the y direction. The first terminal 41, the second terminal 42, and the fourth terminal 44 overlap one another when viewed in the y direction.

[0038] As can be seen from FIGS. 8 , 9 , and 12 , the two third terminals 43 are each conductively bonded to the second conductive portion 32B. The conductive bonding method is not limited to any particular method, and methods such as ultrasonic bonding, laser bonding, and welding, or methods using solder, metal paste, silver sintered body, etc., may be appropriately employed. As shown in FIG. 8 and other figures, the two third terminals 43 are each located on the x2 side in the x direction relative to the multiple second semiconductor elements 10B and the second conductive portions 32B. Each third terminal 43 is conductively connected to the second conductive portion 32B and, via the second conductive portion 32B, to the back electrode 15 (drain electrode) of each second semiconductor element 10B. The number of third terminals 43 is not limited to two and may be, for example, one or three or more. For example, if there is one third terminal 43, it is preferably connected to the center portion of the second conductive portion 32B in the y direction.

[0039] The plurality of control terminals 45 are pin-shaped terminals for controlling each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The plurality of control terminals 45 include a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47D. The plurality of first control terminals 46A to 46E are used to control each of the first semiconductor elements 10A, etc. The plurality of second control terminals 47A to 47D are used to control each of the second semiconductor elements 10B, etc.

[0040] The multiple first control terminals 46A-46E are arranged at intervals in the y direction. As shown in Figures 8, 13, and 20, each of the first control terminals 46A-46E is supported by the first conductive portion 32A via a control terminal support 48 (a first support portion 48A described below). As shown in Figures 5 and 8, each of the first control terminals 46A-46E is located in the x direction between the multiple first semiconductor elements 10A and the first terminal 41, the second terminal 42, and the fourth terminal 44.

[0041] The first control terminal 46A is a terminal (gate terminal) for inputting a drive signal for the plurality of first semiconductor elements 10A. A drive signal for driving the plurality of first semiconductor elements 10A is input to the first control terminal 46A (for example, a gate voltage is applied).

[0042] The first control terminal 46B is a terminal (source sense terminal) for detecting source signals of the multiple first semiconductor elements 10A. The first control terminal 46B detects a voltage (a voltage corresponding to a source current) applied to each second principal surface electrode 12 (source electrode) of the multiple first semiconductor elements 10A.

[0043] The first control terminal 46C and the first control terminal 46D are terminals that are electrically connected to the thermistor 17.

[0044] The first control terminal 46E is a terminal (drain sense terminal) for detecting drain signals of the multiple first semiconductor elements 10A. The first control terminal 46E detects a voltage (a voltage corresponding to a drain current) applied to each back electrode 15 (drain electrode) of the multiple first semiconductor elements 10A.

[0045] The second control terminals 47A to 47D are spaced apart in the y direction. As shown in FIGS. 8 and 13 , each of the second control terminals 47A to 47D is supported by the second conductive portion 32B via a control terminal support 48 (a second support portion 48B described below). As shown in FIGS. 5 and 8 , each of the second control terminals 47A to 47D is located between the second semiconductor elements 10B and two third terminals 43 in the x direction.

[0046] The second control terminal 47A is a terminal (gate terminal) for inputting drive signals for the multiple second semiconductor elements 10B. A drive signal for driving the multiple second semiconductor elements 10B is input to the second control terminal 47A (for example, a gate voltage is applied). The second control terminal 47B is a terminal (source sense terminal) for detecting source signals for the multiple second semiconductor elements 10B. The second control terminal 47B detects a voltage (a voltage corresponding to a source current) applied to each second main surface electrode 12 (source electrode) of the multiple second semiconductor elements 10B. The second control terminal 47C and the second control terminal 47D are terminals that are electrically connected to the thermistor 17.

[0047] Each of the plurality of control terminals 45 (the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D) includes a holder 451 and a metal pin 452.

[0048] The holder 451 is made of a conductive material. As shown in FIGS. 14 and 15 , the holder 451 is bonded to the control terminal support 48 (first metal layer 482 described below) via a conductive bonding material 459. The holder 451 includes a cylindrical portion, an upper flange, and a lower flange. The upper flange is connected to the upper part of the cylindrical portion, and the lower flange is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange and the cylindrical portion of the holder 451. The holder 451 is covered with sealing resin 8 (second protrusion 852 described below).

[0049] The metal pin 452 is a rod-shaped member extending in the z direction. The metal pin 452 is supported by being press-fitted into the holder 451. The metal pin 452 is electrically connected to the control terminal support body 48 (a first metal layer 482 described below) at least via the holder 451. As in the example shown in FIGS. 14 and 15 , when the lower end (the end on the z2 side in the z direction) of the metal pin 452 is in contact with the conductive bonding material 459 inside the insertion hole of the holder 451, the metal pin 452 is electrically connected to the control terminal support body 48 via the conductive bonding material 459.

[0050] The control terminal support body 48 supports the plurality of control terminals 45. The control terminal support body 48 is interposed between the first main surface 301A and the second main surface 301B and the plurality of control terminals 45 in the z direction.

[0051] The control terminal support 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is disposed on the first conductive portion 32A and supports a plurality of first control terminals 46A to 46E among the plurality of control terminals 45. As shown in FIG. 14 , the first support portion 48A is bonded to the first conductive portion 32A via a bonding material 49. The bonding material 49 may be conductive or insulating, and is, for example, solder. The second support portion 48B is disposed on the second conductive portion 32B and supports a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. As shown in FIG. 15 , the second support portion 48B is bonded to the second conductive portion 32B via the bonding material 49.

[0052] The control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is made of, for example, a direct bonded copper (DBC) substrate and includes an insulating layer 481, a first metal layer 482, and a second metal layer 483 stacked on top of each other.

[0053] The insulating layer 481 is made of, for example, ceramics and has, for example, a rectangular shape in plan view.

[0054] As shown in FIGS. 14 and 15 , the first metal layer 482 is formed on the upper surface of the insulating layer 481. Each control terminal 45 is provided upright on the first metal layer 482. The first metal layer 482 includes, for example, Cu (copper) or a Cu (copper) alloy. As shown in FIG. 8 , the first metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, a fifth portion 482E, and a sixth portion 482F. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, the fifth portion 482E, and the sixth portion 482F are spaced apart and insulated from one another.

[0055] A plurality of wires 71 are bonded to the first portion 482A, and the first portion 482A is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 71. A plurality of wires 73 are connected between the first portion 482A and the sixth portion 482F. As a result, the sixth portion 482F is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 73 and 71. As shown in FIG. 8 , the first control terminal 46A is bonded to the sixth portion 482F of the first support portion 48A, and the second control terminal 47A is bonded to the sixth portion 482F of the second support portion 48B.

[0056] A plurality of wires 72 are joined to the second portion 482B, and the second portion 482B is electrically connected to the third principal surface electrode 13 (source sense electrode) of each of the first semiconductor elements 10A (each of the second semiconductor elements 10B) via each of the wires 72. As shown in Fig. 8 , the first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and the second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0057] The thermistor 17 is joined to the third portion 482C and the fourth portion 482D. As shown in Fig. 8 , the first control terminals 46C and 46D are joined to the third portion 482C and the fourth portion 482D of the first support portion 48A, and the second control terminals 47C and 47D are joined to the third portion 482C and the fourth portion 482D of the second support portion 48B.

[0058] A wire 74 is joined to the fifth portion 482E of the first support portion 48A, and the fifth portion 482E is electrically connected to the first conductive portion 32A via the wire 74. As shown in FIG. 8 , a first control terminal 46E is joined to the fifth portion 482E of the first support portion 48A. The fifth portion 482E of the second support portion 48B is not electrically connected to other components. Each of the wires 71 to 74 is, for example, a bonding wire. The material of each of the wires 71 to 74 includes, for example, any of Au (gold), Al (aluminum), and Cu (copper).

[0059] 14, 15, etc., the second metal layer 483 is formed on the lower surface of the insulating layer 481. As shown in Fig. 14, the second metal layer 483 of the first support portion 48A is joined to the first conductive portion 32A via a bonding material 49. As shown in Fig. 15, the second metal layer 483 of the second support portion 48B is joined to the second conductive portion 32B via a bonding material 49.

[0060] The first conductive member 5 and the second conductive member 6, together with the first conductive portion 32A and the second conductive portion 32B, form a path for a main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The first conductive member 5 and the second conductive member 6 are spaced apart from the first main surface 301A and the second main surface 301B on the z1 side in the z direction and overlap the first main surface 301A and the second main surface 301B in a plan view. In this embodiment, the first conductive member 5 and the second conductive member 6 are each made of a metal plate material. The metal includes, for example, Cu (copper) or a Cu (copper) alloy. Specifically, the first conductive member 5 and the second conductive member 6 are made of an appropriately bent metal plate material.

[0061] The first conductive member 5 is connected to the second principal surface electrode 12 (source electrode) of each first semiconductor element 10A and the second conductive portion 32B, thereby electrically connecting the second principal surface electrode 12 of each first semiconductor element 10A and the second conductive portion 32B. The first conductive member 5 forms a path for a main circuit current switched by the multiple first semiconductor elements 10A. As shown in FIGS. 7 and 8 , the first conductive member 5 includes a main portion 51, multiple first bonding portions 52, and multiple second bonding portions 53.

[0062] The main portion 51 is located between the plurality of first semiconductor elements 10A and the second conductive portions 32B in the x direction and is a strip-shaped portion extending in the y direction in a plan view. The main portion 51 overlaps both the first conductive portions 32A and the second conductive portions 32B in a plan view and is spaced apart in the z direction from the first main surface 301A and the second main surface 301B on the z1 side in the z direction. As shown in FIG. 16 and other figures, the main portion 51 is located on the z2 side in the z direction with respect to a third path portion 66 and a fourth path portion 67 of the second conductive member 6 described later and is closer to the first main surface 301A and the second main surface 301B than the third path portion 66 and the fourth path portion 67.

[0063] In this embodiment, the main portion 51 is disposed parallel (or approximately parallel) to the first main surface 301A and the second main surface 301B.

[0064] As shown in FIG. 8 and other figures, the main portion 51 extends continuously in the y direction to correspond to the region in which the multiple first semiconductor elements 10A are arranged. In this embodiment, as shown in FIGS. 7 , 8 , 13 , and other figures, multiple first openings 514 are formed in the main portion 51. Each of the multiple first openings 514 is, for example, a through hole that penetrates in the z direction (the plate thickness direction of the main portion 51). The multiple first openings 514 are aligned at intervals in the y direction. The multiple first openings 514 are provided corresponding to each of the multiple first semiconductor elements 10A. In this embodiment, four first openings 514 are provided in the main portion 51, and these first openings 514 and the multiple (four) first semiconductor elements 10A are positioned at the same position in the y direction.

[0065] 8, 13, etc., in the present embodiment, each first opening 514 overlaps with a gap between the first conductive portion 32A and the second conductive portion 32B in a plan view. The multiple first openings 514 are formed to facilitate the flow of the resin material between the upper side (the z1 side in the z direction) and the lower side (the z2 side in the z direction) near the main portion 51 (first conductive member 5) when injecting the flowable resin material to form the sealing resin 8.

[0066] As shown in FIG. 8 and other figures, the multiple first bonding portions 52 and the multiple second bonding portions 53 are each connected to the main portion 51 and are arranged to correspond to the multiple first semiconductor elements 10A. Specifically, each first bonding portion 52 is located on the x1 side of the main portion 51 in the x direction. Each second bonding portion 53 is located on the x2 side of the main portion 51 in the x direction. As shown in FIG. 14 , each first bonding portion 52 is bonded to the corresponding second principal surface electrode 12 of one of the first semiconductor elements 10A via a conductive bonding material 59. Each second bonding portion 53 is bonded to the second conductive portion 32B via the conductive bonding material 59. The material of the conductive bonding material 59 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. In this embodiment, the first bonding portion 52 has two portions spaced apart in the y direction. These two portions are joined to the second principal surface electrode 12 on both sides in the y direction, with the gate finger 121 of the second principal surface electrode 12 of the first semiconductor element 10A sandwiched therebetween.

[0067] The second conductive member 6 electrically connects the second main surface electrode 12 (source electrode) of each second semiconductor element 10B to the first terminal 41 and the second terminal 42. The second conductive member 6 is integrally formed with the first terminal 41 and the second terminal 42. The second conductive member 6 constitutes a path for a main circuit current switched by the plurality of second semiconductor elements 10B. As shown in FIGS. 7 and 21 to 25 , the second conductive member 6 includes a plurality of third joint portions 61, a first path portion 64, a second path portion 65, a plurality of third path portions 66, and a fourth path portion 67. In the illustrated example, the second conductive member 6 also includes a first step portion 602 and a second step portion 603.

[0068] The multiple third bonding portions 61 are portions that are individually bonded to the multiple second semiconductor elements 10B. Each third bonding portion 61 and the second main surface electrode 12 of each second semiconductor element 10B are bonded via a conductive bonding material 69. The material of the conductive bonding material 69 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. In this embodiment, the third bonding portion 61 has two flat portions 611 and two first inclined portions 612.

[0069] The two flat portions 611 are aligned in the y direction. The two flat portions 611 are spaced apart from each other in the y direction. The shape of the flat portions 611 is not limited in any way, and in the illustrated example, they are rectangular. The two flat portions are joined to the second main surface electrode 12 on both sides in the y direction, sandwiching the gate finger 121 of the second main surface electrode 12 of the second semiconductor element 10B therebetween.

[0070] The two first inclined portions 612 are connected to the outside of the two flat portions 611 in the y direction. That is, the first inclined portion 612 located on the y1 side in the y direction is connected to the y1 side in the y direction of the flat portion 611 located on the y1 side in the y direction. Furthermore, the first inclined portion 612 located on the y2 side in the y direction is connected to the y2 side in the y direction of the flat portion 611 located on the y2 side in the y direction. The first inclined portion 612 is inclined so that the farther it is from the flat portion 611 in the y direction, the closer it is to the z1 side in the z direction.

[0071] The first path portion 64 is interposed between the plurality of third joint portions 61 and the first terminal 41. In the illustrated example, the first path portion 64 is connected to the first terminal 41 via a first step portion 602. The first path portion 64 overlaps the first conductive portion 32A in a plan view. The first path portion 64 has a shape that extends in the x-direction as a whole.

[0072] The first path portion 64 includes a first band-shaped portion 641 and a first extending portion 643. The first band-shaped portion 641 is located on the x2 side in the x direction with respect to the first terminal 41 and is substantially parallel to the first main surface 301A. The first band-shaped portion 641 has a shape that extends in the x direction as a whole. In the illustrated example, the first band-shaped portion 641 has a recess 649. The recess 649 is a portion of the first band-shaped portion 641 that is recessed toward the y1 side in the y direction. In FIG. 5 , the first metal portion 35 appears through the recess 649.

[0073] The first extending portion 643 extends from the side end of the first strip portion 641 on the y1 side in the y direction to the z2 side in the z direction. The first extending portion 643 is spaced apart from the first conductive portion 32A. In the example shown, the first extending portion 643 is shaped along the z direction and has an elongated rectangular shape with the x direction as the longitudinal direction. Note that the first path portion 64 may not have the first extending portion 643.

[0074] The second path portion 65 is interposed between the plurality of third joint portions 61 and the second terminal 42. In the illustrated example, the second path portion 65 is connected to the second terminal 42 via the second step portion 603. The second path portion 65 overlaps the first conductive portion 32A in a plan view. The second path portion 65 has a shape that extends in the x-direction as a whole.

[0075] The second path portion 65 includes a second band-shaped portion 651 and a second extending portion 653. The second band-shaped portion 651 is located on the x2 side in the x direction with respect to the second terminal 42 and is substantially parallel to the first main surface 301A. The second band-shaped portion 651 has a shape that extends in the x direction as a whole. In the illustrated example, the second band-shaped portion 651 has a recess 659. The recess 659 is a portion of the second band-shaped portion 651 that is recessed toward the y2 side in the y direction. In FIG. 5 , the second metal portion 36 appears through the recess 659.

[0076] The second extending portion 653 extends from the side end of the second strip portion 651 on the y2 side in the y direction to the z2 side in the z direction. The second extending portion 653 is spaced apart from the first conductive portion 32A. In the example shown, the second extending portion 653 is shaped along the z direction and has an elongated rectangular shape with the x direction as the longitudinal direction. Note that the second path portion 65 may not have the second extending portion 653.

[0077] In the following description, when describing modified examples or other embodiments of the first path section 64, the configuration of the first path section 64 can also be appropriately adopted for the second path section 65, for example, in a relationship where it is linearly symmetrical about a center line extending in the x direction.

[0078] The multiple third path portions 66 are individually connected to the multiple third joint portions 61. Each third path portion 66 has a shape extending in the x direction and is arranged spaced apart from one another in the y direction. The number of multiple third path portions 66 is not limited in any way, and in the example shown, five third path portions 66 are arranged. Each third path portion 66 is arranged so as to be located between the multiple second semiconductor elements 10B in the y direction or to be located outward in the y direction from the multiple second semiconductor elements 10B.

[0079] Recesses 669 are formed in the two third path portions 66 located on both outer sides in the y direction. The recesses 669 are recessed from the inside toward the outside in the y direction. In the illustrated example, one recess 669 is formed in each of the two third path portions 66. In FIG. 5 , the second conductive portion 32B appears through these recesses 669.

[0080] In the present embodiment, one third joint 61 is disposed between two third path portions 66 adjacent to each other in the y direction. In one third joint 61, the first inclined portion 612 located on the y1 side in the y direction is connected to the third path portion 66 located on the y1 side in the y direction, of the two third path portions 66 adjacent to each other in the y direction. In one third joint 61, the first inclined portion 612 located on the y2 side in the y direction is connected to the third path portion 66 located on the y2 side in the y direction, of the two third path portions 66 adjacent to each other in the y direction.

[0081] The fourth path portion 67 is connected to the ends of the multiple third path portions 66 on the x1 side in the x direction. The fourth path portion 67 has a shape that extends elongatedly in the y direction. The fourth path portion 67 is connected to the ends of the first band portion 641 of the first path portion 64 and the second band portion 651 of the second path portion 65 on the x2 side in the x direction. In the example shown, the first path portion 64 is connected to the end of the fourth path portion 67 on the y1 side in the y direction. Furthermore, the second path portion 65 is connected to the end of the fourth path portion 67 on the y2 side in the y direction.

[0082] In this embodiment, the positions in the z direction of the flat portions 611 of the multiple third joints 61 are set in accordance with the curvature of the support substrate 3. More specifically, as shown in FIG. 23 , the positions in the z direction of the multiple third path portions 66 are the same (or approximately the same) as one another. Furthermore, the positions in the z direction of the multiple third path portions 66 and the fourth path portion 67 are the same (or approximately the same) as one another. A distance Gz in the z direction between the flat portions 611 of the multiple third joints 61 and the fifth joint portion 63 is set in accordance with the curvature of the support substrate 3.

[0083] In FIG. 23 , the distances Gz1, Gz2, Gz3, and Gz4 are defined in order from the distance Gz of the third bonding portion 61 located on the y2 side in the y direction. The curved imaginary lines in the figure exaggerate the curved shape of the second main surface 301B of the curved support substrate 3 for ease of understanding. In the illustrated example, the second main surface 301B is curved so that its central portion in the y direction is located on the z2 side in the z direction and its both end portions in the y direction are located on the z1 side in the z direction. In this case, the distance Gz1 is smaller than the distance Gz2. Furthermore, the distance Gz4 is smaller than the distance Gz3. The distances Gz1 and Gz4 are, for example, approximately the same, and the distances Gz2 and Gz3 are, for example, approximately the same. The difference between the distances Gz1 and Gz2 is, for example, approximately 40 μm. The difference between the distances Gz3 and Gz4 is, for example, approximately 40 μm. In this case, the thickness of the conductive bonding material 69 is, for example, 60 μm or more and 120 μm or less. The magnitude relationship of the distances Gz1 to Gz4 is set appropriately depending on the direction and amount of curvature of the support substrate 3 (second main surface 301B).

[0084] 24 , in this embodiment, the thickness t2 of the first inclined portion 612 is thinner than the thickness t1 of the flat portion 611. The thickness t2 of the first inclined portion 612 is also thinner than the thickness t0 of the third path portion 66. The thickness t1 of the flat portion 611 and the thickness t0 of the third path portion 66 are the same (or approximately the same).

[0085] In the process of forming such a third bonding portion 61, first, an intermediate portion that will become the flat portion 611 and the first inclined portion 612 is formed in the metal plate material by cutting or the like. At this time, one third bonding portion 61 is formed from two intermediate portions. A gap 619 is provided between these two intermediate portions. The gap 619 is a portion where the gate finger 121 of the second main surface electrode 12 of the second semiconductor element 10B is positioned. For this reason, the size of the gap 619 is set to be approximately the same as or slightly larger than the y-direction dimension of the gate finger 121, for example.

[0086] The two intermediate portions that will become the two flat portions 611 are sandwiched, for example, by a mold or the like, and moved toward the z2 side in the z direction relative to the third path portion 66 and the fourth path portion 67. As a result, a portion of each of the two intermediate portions becomes inclined, becoming two first inclined portions 612. In this processing, the portions that become the first inclined portions 612 are subjected to a stretching process. Therefore, the thickness t2 is thinner than the thicknesses t1 and t0. The dimension of the gap 619 in the y direction remains almost unchanged before and after moving the mold toward the z2 side in the z direction. The magnitudes of the above-mentioned distances Gz1 to Gz4 can be adjusted, for example, by the amount by which the mold is moved.

[0087] The sealing resin 8 covers the plurality of first semiconductor elements 10A, the plurality of second semiconductor elements 10B, the support substrate 3 (excluding the back surface 302), portions of the first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44, portions of the plurality of control terminals 45, the control terminal support 48, the first conductive member 5, the second conductive member 6, and the plurality of wires 71 to 74. The sealing resin 8 is made of, for example, black epoxy resin. The sealing resin 8 is formed, for example, by molding. The sealing resin 8 has, for example, a dimension in the x direction of approximately 35 mm to 60 mm, a dimension in the y direction of approximately 35 mm to 50 mm, and a dimension in the z direction of approximately 4 mm to 15 mm. These dimensions are the sizes of the largest portions along each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0088] As shown in Figures 10, 12, and 18, the resin main surface 81 and the resin back surface 82 are spaced apart in the z direction. The resin main surface 81 faces the z1 side in the z direction, and the resin back surface 82 faces the z2 side in the z direction. Multiple control terminals 45 (multiple first control terminals 46A-46E and multiple second control terminals 47A-47D) protrude from the resin main surface 81. As shown in Figure 11, the resin back surface 82 has a frame shape surrounding the back surface 302 (the lower surface of the back surface metal layer 33) of the support substrate 3 in a plan view. The back surface 302 of the support substrate 3 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82. Multiple resin side surfaces 831-834 are each connected to both the resin main surface 81 and the resin back surface 82 and are sandwiched between them in the z direction. As shown in Figure 4, the resin side surface 831 and the resin side surface 832 are spaced apart in the x direction. Resin side surface 831 faces the x2 side in the x direction, and resin side surface 832 faces the x1 side in the x direction. Two third terminals 43 protrude from resin side surface 831, and first terminal 41, second terminal 42, and fourth terminal 44 protrude from resin side surface 832. As shown in FIG. 4 and other figures, resin side surface 833 and resin side surface 834 are spaced apart in the y direction. Resin side surface 833 faces the y2 side in the y direction, and resin side surface 834 faces the y1 side in the y direction.

[0089] As shown in FIG. 4 , a plurality of recesses 832 a are formed on the resin side surface 832. Each recess 832 a is a portion recessed in the x-direction in plan view. The plurality of recesses 832 a include one formed between the first terminal 41 and the fourth terminal 44 and one formed between the second terminal 42 and the fourth terminal 44 in plan view. The plurality of recesses 832 a are provided to increase the creepage distance along the resin side surface 832 between the first terminal 41 and the fourth terminal 44 and the creepage distance along the resin side surface 832 between the second terminal 42 and the fourth terminal 44.

[0090] As shown in FIGS. 12 and 13 , the sealing resin 8 has a plurality of first protrusions 851 , a plurality of second protrusions 852 , and a resin gap 86 .

[0091] Each of the multiple first protrusions 851 protrudes in the z direction from the resin main surface 81. The multiple first protrusions 851 are arranged near the four corners of the sealing resin 8 in a plan view. A first protrusion end surface 851a is formed at the tip (the end on the z1 side in the z direction) of each of the first protrusions 851. Each of the multiple first protrusions 851 has a bottomed, hollow truncated cone shape, for example. The multiple first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or other device that uses power generated by the semiconductor device A1. Each of the multiple first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each of the first protrusions 851 may be columnar, and is preferably cylindrical. The shape of the recess 851b is preferably cylindrical, and the inner wall surface 851c is preferably a single perfect circle in plan view.

[0092] The semiconductor device A1 may be mechanically fixed to a control circuit board or the like by a method such as screwing. In this case, a female screw thread may be formed on the inner wall surfaces 851c of the recesses 851b of the first protrusions 851. Insert nuts may be embedded in the recesses 851b of the first protrusions 851.

[0093] As shown in FIG. 13 and other figures, the multiple second protrusions 852 protrude in the z direction from the resin main surface 81. The multiple second protrusions 852 overlap the multiple control terminals 45 in a plan view. Each metal pin 452 of the multiple control terminals 45 protrudes from the corresponding second protrusion 852. Each second protrusion 852 has a truncated cone shape. In each control terminal 45, the second protrusion 852 covers the holder 451 and a portion of the metal pin 452.

[0094] Next, the operation of this embodiment will be described.

[0095] The first terminal 41 and the second conductive member 6 are integrally formed. This makes it possible to reduce the number of bonding steps in the manufacturing process of the semiconductor device A1 compared to a configuration in which the first terminal 41 and the second conductive member 6 are bonded together. Furthermore, it is possible to prevent cracks, peeling, etc. from occurring at the bonded portion when the semiconductor device A1 is in use. This makes it possible to simplify the manufacturing process of the semiconductor device A1 and improve reliability during use.

[0096] Furthermore, the second terminal 42 and the second conductive member 6 are integrally formed. This makes it possible to reduce the number of bonding steps in the manufacturing process of the semiconductor device A1 compared to a configuration in which the second terminal 42 and the second conductive member 6 are bonded together. It also makes it possible to prevent cracks, peeling, and the like from occurring at the bonded portion when the semiconductor device A1 is in use. This makes it possible to simplify the manufacturing process of the semiconductor device A1 and improve reliability during use.

[0097] The second conductive member 6 has a first step portion 602 connected to the first terminal 41. This can increase the rigidity of the connecting portion between the second conductive member 6 and the first terminal 41.

[0098] The second conductive member 6 has a second step portion 603 that is connected to the second terminal 42. This increases the rigidity of the connecting portion between the second conductive member 6 and the second terminal 42.

[0099] The third bonding portion 61 has two flat portions 611 and two first inclined portions 612. The two first inclined portions 612 are connected to the outside of the two flat portions 611 in the y direction. Therefore, the current flowing through the second principal surface electrode 12 flows from the second principal surface electrode 12 to both sides in the y direction via the flat portions 611 and the first inclined portions 612. This makes it possible to prevent the current flowing through the second principal surface electrode 12 from concentrating in one place.

[0100] The two flat portions 611 are spaced apart in the y direction, which allows current to flow reliably through both the two flat portions 611 and the two first inclined portions 612, and is preferable for suppressing current concentration.

[0101] By separating the two flat portions 611 from each other, the gate finger 121 of the second principal surface electrode 12 can be disposed between them.

[0102] One third joint 61 is disposed between two third path portions 66 adjacent to each other in the y direction. This allows the current flowing through the second main surface electrode 12 of one second semiconductor element 10B to be distributed to the two third path portions 66.

[0103] The positions in the z direction of the flat portions 611 of the multiple third bonding portions 61 are set corresponding to the curvature of the support substrate 3 (second main surface 301B). This makes it possible to more uniform the distance in the z direction between the flat portions 611 of the multiple third bonding portions 61 and the second main surface electrodes 12 of the multiple second semiconductor elements 10B. This makes it possible to prevent cracks and peeling in the conductive bonding material 69, which bonds the second main surface electrode 12 of any of the second semiconductor elements 10B to the flat portions 611 of the third bonding portions 61, due to an inappropriate thinning of the thickness of the conductive bonding material 69, and thus makes it possible to prevent a shortened product life.

[0104] A distance Gz in the z direction between the flat portions 611 of the plurality of third joints 61 and the third path portion 66 is set corresponding to the curvature of the support substrate 3 (second main surface 301B). With this configuration, the third path portion 66, the fourth path portion 67, etc. can be formed, for example, in a flat shape regardless of the curvature of the support substrate 3, and the plurality of third joints 61 can be formed while taking the curvature of the support substrate 3 into consideration.

[0105] The thickness t2 of the first inclined portion 612 is thinner than the thickness t1 of the flat portion 611. This configuration can be formed by the above-mentioned stretching process using a mold. In this case, there is an advantage that the size of the gap 619 can be easily controlled to a desired size.

[0106] 26 to 37 show modified examples and other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. Furthermore, the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate within the scope of not causing technical contradictions.

[0107] 26 and 27 show a first modified example of the semiconductor device A1. In the semiconductor device A11 of this modified example, the second conductive member 6 does not have the first step portion 602 and the second step portion 603 described above.

[0108] In this modification, the position in the z direction of the first terminal 41 is the same (or approximately the same) as the position in the z direction of the first band portion 641 of the first path portion 64. In other words, the first terminal 41 and the first band portion 641 are connected to each other in the form of an integral flat plate.

[0109] The position of the second terminal 42 in the z direction is the same as the position of the second band portion 651 of the second path portion 65 in the z direction. That is, the second terminal 42 and the second band portion 651 are connected to each other in the form of an integral flat plate.

[0110] This modification also simplifies the manufacturing process of the semiconductor device A11 and improves reliability during use. Furthermore, as can be seen from this modification, the specific shape of the connecting portion between the second conductive member 6 and the first terminal 41 and the second terminal 42 is not limited in any way.

[0111] 28 to 35 show a semiconductor device according to a second embodiment of the present disclosure. A semiconductor device A2 according to this embodiment differs from the above-described embodiments mainly in the configuration of the second conductive member 6.

[0112] In this embodiment, as shown in FIGS. 28 and 30 to 35 , the x-direction dimension of the fourth path portion 67 of the second conductive member 6 is larger than the x-direction dimension of the fourth path portion 67 of the above-described embodiment. The fourth path portion 67 is sized to overlap both the first conductive portion 32A and the second conductive portion 32B when viewed in the z-direction. Furthermore, the x-direction dimension of the third path portion 66 is significantly smaller than the x-direction dimension of the fourth path portion 67. The gap in the x-direction between the fourth path portion 67 and the third joint portion 61 is smaller than the x-direction dimension of the third joint portion 61.

[0113] 28 , 30 , 31 , and 33 , in this embodiment, the second conductive member 6 is joined to the first terminal 41 and the second terminal 42 via a conductive bonding material 69. That is, the second conductive member 6 is not integrally formed with the first terminal 41 and the second terminal 42. The conductive bonding material 69 is, for example, solder, a metal paste material, or a sintered metal.

[0114] The second conductive member 6 has a fourth joint portion 62 and a fifth joint portion 63. The fourth joint portion 62 is connected to the end portion of the first path portion 64 on the x1 side in the x direction. The fourth joint portion 62 is joined to the first terminal 41 by a conductive bonding material 69. The fifth joint portion 63 is connected to the end portion of the second path portion 65 on the x1 side in the x direction. The fifth joint portion 63 is joined to the second terminal 42 by a conductive bonding material 69.

[0115] 28 to 30, the first support portion 48A is not provided with the thermistor 17. Therefore, the semiconductor device A2 does not include the first control terminals 46C and 46D in the above-described embodiments.

[0116] This embodiment also makes it possible to prevent the current flowing through the second principal surface electrode 12 from concentrating at one location. Furthermore, as can be understood from this embodiment, the second conductive member 6 and the first and second terminals 41, 42 may not be integrally formed.

[0117] The fourth path portion 67 has a large dimension in the x direction, for example, larger than the dimension in the x direction of the third path portion 66, so that current concentration in the fourth path portion 67 can be further suppressed.

[0118] 36 and 37 show modified examples of the second conductive member 6 used in the semiconductor device A2.

[0119] In the first modified example shown in FIG. 36 , the third joint portion 61 has two flat portions 611 , two first inclined portions 612 , and two second inclined portions 613 .

[0120] The two second inclined portions 613 are spaced apart in the y direction and extend from the fourth path portion 67 to the x2 side in the x direction. The two second inclined portions 613 are individually connected to the two flat portions 611. The second inclined portions 613 are inclined so that they are located closer to the z1 side in the z direction as they move from the flat portion 611 to the x1 side in the x direction. In this modification, a plurality of openings 618 are formed corresponding to the plurality of second inclined portions 613. The plurality of openings 618 are intended to prevent unintended cracks or the like from occurring in the second conductive member 6, for example, during the drawing process (drawing process) when forming the third joint portion 61.

[0121] This modification also makes it possible to prevent the current flowing through the second principal surface electrode 12 from concentrating at one location. Furthermore, by further including two second inclined portions 613 in the third bonding portion 61, it is possible to further prevent the current from concentrating.

[0122] 37 , the third joint portion 61 has two flat portions 611, two first inclined portions 612, two second inclined portions 613, and two third inclined portions 614. The second conductive member 6 further has a plurality of fifth path portions 68.

[0123] The plurality of fifth path portions 68 are connected to the ends of the plurality of third path portions 66 on the x2 side in the x direction and extend to both sides in the y direction. The two third inclined portions 614 are spaced apart in the y direction and extend from the fifth path portion 68 to the x1 side in the x direction. The two third inclined portions 614 are individually connected to the two flat portions 611. The third inclined portions 614 are inclined so as to be positioned closer to the z1 side in the z direction as they move from the flat portions 611 toward the x2 side in the x direction. In this modification, a plurality of openings 617 are formed corresponding to the plurality of third inclined portions 614. The plurality of openings 617 are intended to prevent unintended cracks or the like from occurring in the second conductive member 6, for example, during the drawing process (drawing process) used to form the third joint portion 61.

[0124] This modification also makes it possible to prevent the current flowing through the second principal surface electrode 12 from concentrating at one location. Furthermore, current concentration can be further prevented by the third bonding portion 61 further having two third inclined portions 614. Note that in the modifications shown in Figures 36 and 37, the openings 617, 618 may not be provided as appropriate, depending on the processing conditions of the drawing process (drawing process), etc.

[0125] Next, a vehicle B equipped with the semiconductor device A10 will be described with reference to Fig. 38. The vehicle B is, for example, an electric vehicle (EV).

[0126] As shown in Figure 38, vehicle B includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is equipped with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600V.

[0127] The drive system 93 drives the vehicle B. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor device A10 constitutes part of the inverter 931. Power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Alternatively, unlike the power system shown in FIG. 24 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 including the semiconductor device A10 is connected to the drive source 932. The drive source 932 includes an AC motor and a transmission. When the AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle B. This drives vehicle B. To drive vehicle B, it is necessary to freely control the rotation speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, semiconductor device A10 in inverter 931 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotation speed of the AC motor.

[0128] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0129] Supplementary Note 1. A semiconductor device comprising: a support substrate having a first conductive portion having a first main surface facing one side in a thickness direction and located on one side in a first direction orthogonal to the thickness direction, and a second conductive portion having a second main surface facing one side in the thickness direction and located on the other side in the first direction; a plurality of first semiconductor elements mounted on the first conductive portion, each having a switching function, and arranged in a second direction orthogonal to both the thickness direction and the first direction; a plurality of second semiconductor elements mounted on the second conductive portion, each having a switching function, and arranged in the second direction; a first terminal protruding to one side in the first direction from the first conductive portion; a first conductive member connecting the plurality of first semiconductor elements to the second conductive portion; a second conductive member connecting the plurality of second semiconductor elements to the first terminal; and a sealing resin covering the plurality of first semiconductor elements, the plurality of second semiconductor elements, the first conductive member, the second conductive member, and a portion of each of the support substrate and the first terminal. A semiconductor device wherein the first conductive member has a plurality of first bonding portions bonded to the plurality of first semiconductor elements and a second bonding portion bonded to the second conductive portion, the second conductive member has a plurality of third bonding portions bonded to the plurality of second semiconductor elements, and the third bonding portions have two flat portions each bonded to the second semiconductor element and aligned in the second direction, and two first inclined portions connecting to the two flat portions on the outside in the second direction. Appendix 2. The semiconductor device according to Appendix 1, wherein the two flat portions are spaced apart in the second direction. Appendix 3. The semiconductor device according to Appendix 2, wherein the second semiconductor element has a first main surface electrode, a second main surface electrode, and a third main surface electrode located on one side in the thickness direction, and the two flat portions are bonded to the second main surface electrode. Appendix 4. The semiconductor device according to Appendix 3, wherein the second main surface electrode has a gate finger located between the two flat portions in the second direction.Supplementary Note 5. The semiconductor device according to Supplementary Note 3 or 4, further comprising a second terminal protruding on one side in the first direction from the first conductive portion and positioned on the other side in the second direction from the first terminal, wherein the second conductive member has a first path portion interposed between the plurality of third joint portions and the first terminal, a second path portion interposed between the plurality of third joint portions and the second terminal, a plurality of third path portions each extending in the first direction, and a fourth path portion connected to one side ends in the first direction of the plurality of third path portions, the first path portion and the second path portion, and extending in the second direction, wherein the first inclined portion extends from the third path portion in the second direction when viewed in the thickness direction. Supplementary Note 6. The semiconductor device according to Supplementary Note 5, wherein one third joint portion is disposed between the third path portions adjacent to each other in the second direction. Supplementary Note 7. The semiconductor device according to Supplementary Note 6, wherein a thickness of the first inclined portion is equal to or less than a thickness of the flat portion. Supplementary Note 8. The semiconductor device according to Supplementary Note 7, wherein the thickness of the first inclined portion is equal to or less than the thickness of the third path portion. Supplementary Note 9. The semiconductor device according to Supplementary Note 8, wherein the thickness of the flat portion and the thickness of the third path portion are the same (or approximately the same). Supplementary Note 10. The semiconductor device according to any of Supplements 5 to 9, wherein the third joint portion has two second inclined portions that are individually connected to one side of the two flat portions in the first direction. Supplementary Note 11. The semiconductor device according to Supplementary Note 10, wherein the third joint portion has two third inclined portions that are individually connected to the other side of the two flat portions in the first direction. Supplementary Note 12. The semiconductor device according to any of Supplements 5 to 11, wherein the first terminal and the second conductive member are integrally formed. Supplementary Note 13. The semiconductor device according to Supplementary Note 12, wherein the second terminal and the second conductive member are integrally formed. Supplementary Note 14. The semiconductor device according to Supplementary Note 13, wherein the second conductive portion has a first step portion interposed between the first terminal and the first path portion. Supplementary Note 15. 15. The semiconductor device according to claim 14, wherein the second conductive portion has a second step portion interposed between the second terminal and the second path portion.Supplementary Note 16. The semiconductor device according to any one of Supplementary Notes 5 to 15, wherein the first bonding portion has two flat portions each bonded to the first semiconductor element and aligned in the second direction, and at least one of the positions in the thickness direction of the flat portions of the plurality of first bonding portions and the positions in the thickness direction of the flat portions of the plurality of third bonding portions is set corresponding to the curvature of the support substrate. Supplementary Note 17. The semiconductor device according to Supplementary Note 16, wherein the positions in the thickness direction of the flat portions of the plurality of third bonding portions are set corresponding to the curvature of the support substrate. Supplementary Note 18. A vehicle comprising: a drive source; and the semiconductor device according to any one of Supplementary Notes 1 to 17, wherein the semiconductor device is electrically connected to the drive source.

[0130] A1, A11, A2: semiconductor device B: vehicle 3: supporting substrate 5: first conductive member 6: second conductive member 8: sealing resin 10A: first semiconductor element 10B: second semiconductor element 11: first principal surface electrode 12: second principal surface electrode 13: third principal surface electrode 15: back surface electrode 17: thermistor 19: conductive bonding material 31: insulating layer 32: first metal layer 32A: first conductive portion 32B: second conductive portion 33: back surface metal layer 35: first metal portion 36: second metal portion 41: first terminal 42: second terminal 43: third terminal 44: fourth terminal 45: control terminal 46A, 46B, 46C, 46D, 46E: first control terminal 47A, 47B, 47C, 47D: second control terminal 48: Control terminal support 48A: First support portion 48B: Second support portion 49: Bonding material 51: Main portion 52: First bonding portion 53: Second bonding portion 59: Conductive bonding material 61: Third bonding portion 62: Fourth bonding portion 63: Fifth bonding portion 64: First path portion 65: Second path portion 66: Third path portion 67: Fourth path portion 68: Fifth path portion 69: Conductive bonding material 71, 72, 73, 74: Wire 81: Resin main surface 82: Resin back surface 86: Resin void portion 101: Element main surface 102: Element back surface 121: Gate finger 301A: First main surface 301B: Second main surface 302: Back surface 451: Holder 452: Metal pin 459: Conductive bonding material 481: Insulating layer 482: First metal layer 482A: First portion 482B: Second portion 482C: Third portion 482D: Fourth portion 482E: Fifth portion 482F: Sixth portion 483: Second metal layer 514: First opening 602: First step portion 603: Second step portion 611: Flat portion 612: First inclined portion 613: Second inclined portion 614: Third inclined portion 617,618: Opening 619: Gap 641: First band-shaped portion 643: First extending portion 649: Recessed portion 651: Second band-shaped portion 653: Second extending portion 659: Recessed portion 669: Recessed portion 831: Resin side surface 832: Resin side surface 832a: Recessed portion 833: Resin side surface 834: Resin side surface 851: First protruding portion 851a: First protruding end surface 851b: Recessed portion 851c: Inner wall surface 852: Second protruding portion 91: On-board charger 92: Storage battery 93: Drive system 931: Inverter 932: Drive source Gz, Gz1, Gz2, Gz3, Gz4: Distance t0, t1, t2: Thickness,

Claims

1. a support substrate having a first conductive portion having a first main surface facing one side in a thickness direction and positioned on one side in a first direction perpendicular to the thickness direction, and a second conductive portion having a second main surface facing one side in the thickness direction and positioned on the other side in the first direction; a plurality of first semiconductor elements mounted on the first conductive portion, each having a switching function, and arranged in a second direction perpendicular to both the thickness direction and the first direction; a plurality of second semiconductor elements mounted on the second conductive portion, each of which has a switching function and which are arranged in the second direction; a first terminal protruding from the first conductive portion to one side in the first direction; a first conductive member that electrically connects the plurality of first semiconductor elements and the second conductive portion; a second conductive member that electrically connects the second semiconductor elements to the first terminal; a sealing resin that covers the plurality of first semiconductor elements, the plurality of second semiconductor elements, the first conductive member, the second conductive member, the support substrate, and a portion of each of the first terminals, the first conductive member has a plurality of first joint portions joined to the plurality of first semiconductor elements and a second joint portion joined to the second conductive portion, the second conductive member has a plurality of third bonding portions bonded to the plurality of second semiconductor elements, A semiconductor device, wherein the third joint portion has two flat portions each joined to the second semiconductor element and aligned in the second direction, and two first inclined portions connected to the outside in the second direction relative to the two flat portions.

2. The semiconductor device according to claim 1 , wherein the two flat portions are spaced apart from each other in the second direction.

3. the second semiconductor element has a first principal surface electrode, a second principal surface electrode, and a third principal surface electrode located on one side in the thickness direction; The semiconductor device according to claim 2 , wherein the two flat portions are joined to the second principal surface electrode.

4. The semiconductor device according to claim 3 , wherein the second principal surface electrode has a gate finger located between the two flat portions in the second direction.

5. a second terminal protruding from the first conductive portion on one side in the first direction and positioned on the other side in the second direction with respect to the first terminal, the second conductive member has a first path portion interposed between the plurality of third joint portions and the first terminal, a second path portion interposed between the plurality of third joint portions and the second terminal, a plurality of third path portions each extending in the first direction, and a fourth path portion connected to one side ends of the plurality of third path portions in the first direction, the first path portion and the second path portion, and extending in the second direction; The semiconductor device according to claim 3 , wherein the first inclined portion extends in the second direction from the third path portion when viewed in the thickness direction.

6. One of the third joint portions is disposed between the third path portions adjacent to each other in the second direction. The semiconductor device according to claim 5 .

7. The semiconductor device according to claim 6 , wherein the thickness of said first inclined portion is equal to or smaller than the thickness of said flat portion.

8. The semiconductor device according to claim 7 , wherein a thickness of the first inclined portion is equal to or smaller than a thickness of the third path portion.

9. The semiconductor device according to claim 8 , wherein a thickness of the flat portion and a thickness of the third path portion are the same or approximately the same.

10. The semiconductor device according to claim 5 , wherein the third joint portion has two second inclined portions each connected to one side of the first direction and the two flat portions.

11. The semiconductor device according to claim 10 , wherein the third joint portion has two third inclined portions each connected to one of the two flat portions on the other side in the first direction.

12. The semiconductor device according to claim 5 , wherein the first terminal and the second conductive member are integrally formed.

13. The semiconductor device according to claim 12 , wherein the second terminal and the second conductive member are integrally formed.

14. The semiconductor device according to claim 13 , wherein the second conductive portion has a first step portion interposed between the first terminal and the first path portion.

15. The semiconductor device according to claim 14 , wherein the second conductive portion has a second step portion interposed between the second terminal and the second path portion.

16. the first bonding portion has two flat portions each bonded to the first semiconductor element and aligned in the second direction; The semiconductor device according to claim 5, wherein at least one of the positions of the flat portions of the plurality of first joints in the thickness direction and the positions of the flat portions of the plurality of third joints in the thickness direction are set in accordance with the curvature of the supporting substrate.

17. The semiconductor device according to claim 16 , wherein positions of the flat portions of the third bonding portions in the thickness direction are set in accordance with a curvature of the support substrate.

18. A driving source; The semiconductor device according to claim 1, The semiconductor device is electrically connected to the drive source.