Composite component device, and method for producing same
Patent Information
- Application Number
- JP2024538821
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-12-26
- Publication Date
- 2025-03-07
AI Technical Summary
Conventional composite component devices experience high connection resistance and reliability issues due to solder bumps, which can crack and create voids, hindering height reduction and increasing the device's overall height.
The device employs multiple composite component layers with electronic components and rewiring layers alternately arranged, using component electrodes electrically connected to rewiring layers and through-vias for inter-layer connections, eliminating the need for solder bumps.
This configuration reduces connection resistance, enhances reliability, and allows for a lower profile by minimizing the space occupied by bumps, resulting in a more compact and reliable composite component device.
Abstract
Description
Composite component device and manufacturing method thereof
[0001] FIELD OF THE DISCLOSURE The present disclosure relates to composite component devices and methods for their manufacture.
[0002] A conventional package combining multiple electronic components is, for example, the device shown in FIG. 4F of Japanese Patent Laid-Open Publication No. 2019-125779 (Patent Document 1). This device (400F) includes a redistribution layer (306), a first mold layer (316) disposed on the redistribution layer (306), and a second mold layer (326) disposed on the first mold layer (316). Dies (318, 320) encapsulated in the second mold layer (326) are connected to a bridge die (310) encapsulated in the first mold layer (316) via an electrical connection portion (312) and to the redistribution layer (306) via an electrical connection portion (314).
[0003] Japanese Patent Application Laid-Open No. 2019-125779
[0004] However, the inventors have found that the above-described device has the following problems. Specifically, the die, bridge die, and wiring layer are connected via balls (bumps). This results in relatively high connection resistance, and there is a risk of reliability being reduced due to cracks in the bumps. Furthermore, there is a risk that the bumps used during manufacturing may create spaces within the device, hindering the device's low profile.
[0005] Therefore, an object of the present disclosure is to provide a composite component device that can be made more reliable and has a lower height.
[0006] The present inventors conducted extensive research to solve the above-mentioned problems and discovered that in a composite component device including two or more composite component layers, each having an electronic component layer and a redistribution layer disposed on the electronic component layer, electrical connections between one or more electronic components and the redistribution layer and between the two or more composite component layers can be made without using solder bumps. Based on this technical discovery, the present disclosure has been conceived in which component electrodes are electrically connected to the redistribution layer and the composite component layers are electrically connected to each other by through-electronic component layer vias. That is, the present disclosure includes the following embodiments.
[0007] In order to solve the above-described problems, a composite component device according to one aspect of the present disclosure is a composite component device including two or more composite component layers, each having an electronic component layer and a rewiring layer provided on the electronic component layer, wherein the two or more composite component layers are stacked in a thickness direction such that the electronic component layers and the rewiring layers are alternately arranged, the electronic component layer includes one or more electronic components each having an electronic component main body portion having a first surface perpendicular to the thickness direction and a second surface opposing the first surface, and a plurality of component electrodes arranged on the first surface, the component electrodes of the one or more electronic components being electrically connected to the rewiring layer, and an electronic component layer in a composite component layer adjacent to a rewiring layer of another composite component layer of the two or more composite component layers further includes an electronic component layer through-via electrically connecting to the rewiring layer of the other composite component layer.
[0008] According to the above embodiment, the component electrodes are electrically connected to the rewiring layer, and the composite component layers are electrically connected to the electronic component through-layer vias. This allows the composite component device to have a shorter wiring length (particularly the length of the via wiring in the thickness direction of the composite component device) compared to when electrical connections are made using bumps (e.g., solder bumps), thereby reducing connection resistance and improving reliability. This also allows the composite component device to eliminate the space between the composite component layers caused by the bumps, thereby reducing the height compared to when electrical connections are made using bumps.
[0009] According to a composite part device according to an embodiment of the present disclosure, reliability can be increased and the height can be reduced.
[0010] FIG. 2 is a cross-sectional view showing a composite component according to the first embodiment. FIG. 3 is an enlarged view of part A of FIG. 1 . FIG. 4 is an enlarged view of part B of FIG. 1 . FIG. 5 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 6 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 7 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 8 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 9 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 10 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 11 is an explanatory view illustrating a method for manufacturing a composite component device according to the first embodiment. FIG. 1 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a first embodiment; FIG. 2 is an explanatory diagram illustrating a method for manufacturing a composite component device according to the first embodiment; FIG. 3 is a cross-sectional view showing a composite component according to a second embodiment; FIG. 4 is an explanatory diagram illustrating a method for manufacturing a composite component device according to the second embodiment; FIG. 5 is an explanatory diagram illustrating a method for manufacturing a composite component device according to the second embodiment; FIG. 6 is an explanatory diagram illustrating a method for manufacturing a composite component device according to the second embodiment;7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. FIG. 7 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a second embodiment. Fig. 10 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a third embodiment; Fig. 11 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a third embodiment; Fig. 12 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a first embodiment; Fig. 13 is an explanatory diagram illustrating a method for manufacturing a composite component device according to a first embodiment;
[0011] A composite component device and a manufacturing method thereof according to one aspect of the present disclosure will be described in detail below with reference to the illustrated embodiments. Note that the drawings include some schematic illustrations and may not reflect actual dimensions or proportions. The dimensions (more specifically, thickness, etc.) of the components within the composite component device were measured based on SEM images taken with a scanning electron microscope (SEM). The dimensions were obtained as the average of multiple measurements (number of measurements n≧3).
[0012] Various numerical ranges mentioned in this specification are intended to include the lower and upper limit numerical values (i.e., upper and lower limit values) themselves, unless otherwise specified, such as "less than," "greater than," or "smaller." That is, for example, taking a numerical range such as 80 to 120 μm as an example, the numerical range 80 to 120 μm is interpreted as including the lower limit of "80 μm" and also the upper limit of "120 μm."
[0013] First Embodiment: Composite Component Device A composite component device according to a first embodiment includes two or more composite component layers. In this embodiment, a composite component device including three composite component layers will be described as an example.
[0014] The composite component device according to the first embodiment is a composite component device including two or more composite component layers, each having an electronic component layer and a rewiring layer provided on the electronic component layer, wherein the two or more composite component layers are stacked in the thickness direction such that the electronic component layers and the rewiring layers are alternately arranged, wherein the electronic component layer includes one or more electronic components each having an electronic component main body portion having a first surface perpendicular to the thickness direction and a second surface opposing the first surface, and a plurality of component electrodes arranged on the first surface, wherein the component electrodes of the one or more electronic components are electrically connected to the rewiring layer, and wherein an electronic component layer in a composite component layer adjacent to a rewiring layer of another composite component layer among the two or more composite component layers further includes an electronic component layer through-via electrically connecting to the rewiring layer of the other composite component layer.
[0015] [Mechanism of Action] The composite component device according to the first embodiment can be made both more reliable and thinner. Without being bound by any particular theory, the reason for this is presumed to be as follows: In the composite component device according to the first embodiment, component electrodes are electrically connected to rewiring layers, and composite component layers are electrically connected to through-electronic component layer vias. This allows the composite component device to have shorter wiring lengths (particularly the length of via wiring in the thickness direction of the composite component device) compared to when electrical connections are made using bumps (e.g., solder bumps), thereby reducing connection resistance and improving reliability. This also allows the composite component device to eliminate the space between composite component layers caused by bumps, thereby making it possible to make the device thinner compared to when electrical connections are made using bumps.
[0016] [Configuration of Composite Component Device] The configuration of the composite component device according to the first embodiment will be described with reference to Fig. 1, Fig. 2, and Fig. 3. Fig. 1 is a diagram schematically showing a cross section of the composite component device according to the first embodiment of the present disclosure. Fig. 2 is an enlarged view of part A in Fig. 1. Fig. 3 is an enlarged view of part B in Fig. 1.
[0017] As shown in Fig. 1, the composite component device 1 includes three composite component layers 100, 200, and 300. In Fig. 1, the direction parallel to the thickness of the composite component device 1 is the Z direction, with the forward Z direction being the upper side and the reverse Z direction being the lower side. The direction perpendicular to the Z direction in the cross section of the composite component device 1 shown in Fig. 1 is the X direction. The direction perpendicular to the cross section of the composite component device 1 shown in Fig. 1 is the Y direction.
[0018] [Composite Component Layer] The composite component layers 100, 200, and 300 each include an electronic component layer 110, 210, or 310 and a rewiring layer 120, 220, or 320 provided on the electronic component layer 110, 210, or 310. The three composite component layers 100, 200, and 300 are stacked in the thickness direction so that the electronic component layers 110, 210, or 310 and the rewiring layers 120, 220, or 320 are alternately arranged. When a composite component layer is connected to the rewiring layer of another composite component layer, the composite component layer further includes an interlayer adhesive layer. Specifically, the composite component layers 100 and 200 further include an interlayer adhesive layer 130 or 230.
[0019] The second and third composite component layers 200, 300 are configured almost identically to the first composite component layer 100, and therefore the following description will be given using the first composite component layer 100 as an example. However, differences between the second and third composite component layers 200, 300 and the first composite component layer 100 may be referred to. The third composite component layer 300 differs from the first and second composite component layers 100, 200 in that it does not have an interlayer adhesive layer or through-composite component layer vias.
[0020] (Electronic Component Layer) The first electronic component layer 110 is bonded (joined) on its underside to the first redistribution layer 120 and on its upper side to the second redistribution layer 220 of the second composite component layer 200 via a first interlayer adhesive layer (first composite component adhesive layer) 130. Here, the first redistribution layer 120 and the second redistribution layer 220 are, for example, sheets or substrates of multilayer wiring layers, as described below, and include, for example, wiring (conductive wiring) 120b and a dielectric film 120a containing an inorganic material (inorganic insulating material). The first electronic component layer 110 includes one or more first electronic components 111 and first-electronic-component-layer through-vias 116, as well as a first Si base layer 112, a first sidewall portion 113, a first resin sealing portion 114, a first electronic component adhesive layer 115, and a first through-Si via 117.
[0021] Electronic Component One or more first electronic components 111 are arranged within the first composite component layer 100. Each of the first electronic components 111 includes a first electronic component body 111c having a first surface 111a perpendicular to the thickness direction and a second surface 111b facing the first surface 111a (the first surface 111a and second surface 111b facing each other), a plurality of first component electrodes 111d arranged on the first surface 111a, and a first insulating portion 111e arranged between the plurality of first component electrodes 111d. The first electronic component 111 is supported on the first Si base layer 112 via a first electronic component adhesive layer 115. The first electronic component 111 is encapsulated within the first composite component layer 100 by a first resin encapsulant 114. The first component electrodes 111d of the first electronic component 111 are electrically connected to the first redistribution layer 120 via first through-Si vias 117. When there are a plurality of one or more first electronic components 111, the first electronic components 111 may be of the same type or different types. The thickness of the first electronic component 111 is, for example, 80 to 120 μm.
[0022] One or more first electronic components 111 (specifically, two first electronic components 111) are all arranged in the first composite component layer 100 so that their first surfaces 111a are located closer to the first redistribution layer 120 than their second surfaces 111b. Similarly to the arrangement direction of the one or more first electronic components 111, one or more second and third electronic components 211 and 311 are also arranged in the second and third composite component layers 200 and 300 so that their first surfaces 211a and 311a are located closer to the second and third redistribution layers 220 and 320 than their second surfaces 211b and 311b. These one or more electronic components 111, 211, and 311 are connected to the redistribution layers 120, 220, and 320, respectively. In this way, the composite component device 1 has simple wiring, so that not only two composite component layers but also three or more composite component layers can be stacked.
[0023] The one or more first electronic components 111 are, for example, electronic components in which one or more elements are integrated in the same material as the material that constitutes the first Si base layer 112. The first electronic components 111 are, for example, active components (more specifically, a CPU, a GPU, an LSI, etc.) and passive components (more specifically, a capacitor, a resistor, an inductor, etc.).
[0024] The first electronic component body portion 111c includes, for example, a ceramic or semiconductor material (more specifically, silicon, etc.).
[0025] The first component electrode 111d is made of a conductive material such as Cu, Ni, Sn, Al, or an alloy containing any of these. Among these, the conductive material is preferably the same material as the first through-Si via 117. The thickness of the first component electrode 111d is, for example, 1 μm to 30 μm, preferably 5 μm or less. The first component electrode 111d can be thinned to a thickness of 1 to 5 μm. The thickness of the first component electrode 111d can be, for example, 1 / 4 to 1 / 6 times the thickness of the first electronic component body 111c.
[0026] The first insulating portion 111e functions as a layer that electrically insulates the first component electrodes 111d. The thickness of the first insulating portion 111e is, for example, 1 to 30 μm, preferably 5 μm or less. The first component electrodes 111d can be thinned to a thickness of 1 to 5 μm. The thickness of the first insulating portion 111e can be, for example, 1 / 4 to 1 / 6 times the thickness of the first electronic component body portion 111c. The thickness of the first insulating portion 111e may be the same as that of the first component electrodes 111d, in which case the lower surfaces of the first insulating portion 111e and the first component electrodes 111d are flush with each other.
[0027] -Si Base Layer- The first Si base layer 112 has a first main surface 112a and a second main surface 112b that face each other. The first Si base layer 112 supports one or more first electronic components 111 on the second main surface 112b via a first electronic component adhesive layer 115, and is connected to the first redistribution layer 120 on the first main surface 112a. The first Si base layer 112 is composed essentially of Si. Here, in this specification, "composed essentially of Si" means that the target component contains Si at a ratio of 99% by mass or more.
[0028] The thickness of the first Si base layer 112 is, for example, 150 μm or less, preferably 50 μm or less, and more preferably 30 μm or less. The reason why the thickness of the first Si base layer 112 can be made extremely thin is that in the manufacturing method of the composite component device 1 described below, the first Si support 140 is bonded to the first Si base layer 112 to reinforce its strength. Therefore, even if the first Si base layer 112 is ground to be thin, damage (e.g., cracks) of the first Si base layer 112 due to insufficient strength is unlikely to occur (see FIGS. 4E and 4F ). The reinforcement provided by the first Si support 140 makes it possible to manufacture the composite component device 1. Because the thickness of the first Si base layer 112 can be made extremely thin compared to conventional methods, the length of the via wiring (i.e., the first through-Si via 117) electrically connecting the first component electrodes 111d of one or more electronic components 111 to the first redistribution layer 120 can be shortened. This reduces the parasitic impedance caused by the via wiring, and improves the electrical characteristics of electronic equipment that uses the composite component device 1.
[0029] 1 and 3, the first sidewalls 113 are disposed on the second main surface 112b of the first Si base layer 112 so as to surround one or more first electronic components 111. The first sidewalls 113 are disposed at both ends of the first composite component layer 100 so as to surround the entirety of one or more electronic components 111. First-electronic-component-layer through-vias 116 penetrate the first sidewalls 113. The first sidewalls 113 have a generally rectangular shape in cross-section, and their upper surface is connected to the second redistribution layer 220 of the second composite component layer 200 via a first interlayer adhesive layer 130, and their lower surface is bonded to the first Si base layer 112 via a first electronic component adhesive layer 115. The thickness of the first sidewalls 113 is, for example, 90 to 130 μm. The first sidewalls 113 are, for example, substantially composed of Si.
[0030] Resin Sealing Portion The first resin sealing portion 114 seals one or more first electronic components 111. The resin sealing portion 114 contains a resin (e.g., epoxy resin) and can integrate multiple (two or more) first electronic components 111 with the resin. Because the multiple first electronic components 111 can be integrated with the resin, two or more first electronic components 111 can be arranged in the first electronic component layer 110 even if the two or more first electronic components 111 have different dimensions and shapes. This allows for a high degree of design freedom and allows two or more first electronic components 111 to be combined depending on the application. For example, the composite component device 1 can incorporate different types of first electronic components 111.
[0031] - Electronic Component Adhesive Layer - The first electronic component adhesive layer 115 adheres one or more first electronic components 111 to the second main surface 112b of the first Si base layer 112. In this specification, the thickness of the first electronic component adhesive layer 115 refers to the thickness in the Z direction from the lower surface of the first component electrode 111d to the second main surface 112b of the first Si base layer 112. The thickness of the first electronic component adhesive layer 115 is, for example, 4 to 6 μm.
[0032] -Through-electronic-component-layer via-An electronic component layer in a composite component layer adjacent to a rewiring layer of another composite component layer among two or more composite component layers further has a through-electronic-component-layer via that electrically connects to the rewiring layer of the other composite component layer. In other words, when a composite component layer is bonded to the rewiring layer of another composite component layer, the electronic component layer further has a through-electronic-component-layer via that electrically connects to the rewiring layer of the other composite component layer.
[0033] For example, the first electronic component layer 110 in the first composite component layer 100 adjacent to the second redistribution layer 220 in the second composite component layer 200 further includes a first through-electronic component layer via 116 electrically connecting to the second redistribution layer 220 in the second composite component layer 200. That is, because the first composite component layer 100 is connected to the second redistribution layer 220 in another second composite component layer 200, the first electronic component layer 110 further includes a first through-electronic component layer via 116 electrically connecting to the second redistribution layer 220 in the second composite component layer 200. Because the second composite component layer 200 is connected to the third redistribution layer 320 in the third composite component layer 300, the second electronic component layer 210 further includes a second through-electronic component layer via 216 electrically connecting to the third redistribution layer 320 in the third composite component layer 300. On the other hand, since the third composite component layer 300 is not connected to the rewiring layer of another composite component layer, the third composite component layer 300 does not have any through-electronic component layer vias.
[0034] The first electronic component layer through-via 116 penetrates the first electronic component layer 110 in the Z direction (more specifically, penetrates the first sidewall portion 113, the first electronic component adhesive layer 115, and the first Si base layer 112 in the Z direction), and also penetrates the first interlayer adhesive layer 130. The first electronic component layer through-via 116 includes an adhesive layer conductive via 116a that penetrates the first interlayer adhesive layer 130, a sidewall through-via 116b that penetrates the first sidewall portion 113, a conductive via 116c that penetrates the first electronic component adhesive layer 115, and a through-Si via 116d that penetrates the first Si base layer 112. The adhesive layer conductive via 116a electrically connects the first electronic component layer through-via 116 to the second redistribution layer 220 of the second composite component layer 200. The cross-sectional area (cross-sectional area in the XY plane) of the adhesive layer conductive via 116a is larger than the cross-sectional area of the sidewall through-via 116b in a plane perpendicular to the thickness direction of the composite component device 1. This improves the electrical connection between the first electronic component layer through-via 116 and the second redistribution layer 220, reducing the connection resistance between the first and second composite component layers 100, 200 and thereby further improving reliability.
[0035] The first electronic component through-layer via 116 is preferably made substantially of copper. In this specification, "made substantially of copper (Cu)" means that the target component contains copper at a ratio of 99% by mass or more. When the first electronic component through-layer via 116 is made substantially of copper, the electrical resistance of the wiring is reduced because copper is a good conductive material.
[0036] 1 and 2, the first through-Si via 117 penetrates the first Si base layer 112 (and the first electronic component adhesive layer 115) to electrically connect the first component electrode 111d and the first redistribution layer 120. The first through-Si via 117 has a through-Si via main body 117a and an extending portion 117b. The through-Si via main body 117a is electrically connected to the first redistribution layer 120 and penetrates the first Si base layer 112. The extending portion 117b is electrically connected to the through-Si via main body 117a, extends from the second main surface 112b of the first Si base layer 112, penetrates the first electronic component adhesive layer 115, and is electrically connected to the first component electrode 111d. In this way, the via wiring electrically connecting the first component electrode 111d to the first redistribution layer 120 is composed only of the first through-Si via 117, and therefore does not include (requires) a bump (e.g., a solder bump). Therefore, the composite component device 1 according to this embodiment can further reduce the parasitic impedance caused by the via wiring. This also improves the electronic characteristics of electronic devices using the composite component device 1. Furthermore, since the wiring length can be shortened compared to conventional devices, the thickness of the composite component device 1 can be reduced, enabling the composite component device 1 to be made smaller, thinner, and thinner. The length of the via wiring (i.e., the length of the first through-Si via 117 in the stacking direction) is, for example, 3 μm to 36 μm. For reference, for example, a solder bump generally has a diameter of 100 μm to 150 μm.
[0037] The first through Si via 117 is substantially linear in the stacking direction in Fig. 2. The cross-sectional shape of the first through Si via 117 in the ZX plane is substantially rectangular in Fig. 2. The cross-sectional shape of the first through Si via 117 in the XY plane is, for example, substantially circular, substantially polygonal, or substantially polygonal with rounded corners.
[0038] (Redistribution Layer) The first redistribution layer 120 is formed on the first main surface 112a of the first Si base layer 112. The first redistribution layer 120 is a multi-layered wiring layer. The first redistribution layer 120 has wiring (conductive wiring) 120b and a dielectric film 120a substantially made of an inorganic material (inorganic insulating material).
[0039] The wiring 120b has conductive vias. The conductive vias electrically connect wiring between different layers in the first redistribution layer 120. The wiring 120b includes a conductive material. Examples of conductive materials include Cu, Ag, and Au, as well as alloys containing these, with Cu being preferred. The first redistribution layer 120 can have multiple layers, for example, two or more layers of wiring 120b and one or more layers of dielectric film 120a. The thickness of each layer of wiring 120b and each layer of dielectric film 120a constituting the first redistribution layer 120 is, for example, 1.5 μm to 5.0 μm. In this case, the thickness of the first redistribution layer 120 is the value (unit: μm) obtained by multiplying the thickness of one layer (1.5 μm to 5.0 μm) by the total number of layers in the first redistribution layer 120.
[0040] The dielectric film 120a is substantially composed of an inorganic material (inorganic insulating material) as an insulating material. In this specification, "substantially composed of an inorganic material" refers to the target component containing 99% or more by mass of inorganic material. Examples of inorganic insulating materials include silicon oxide (SiO2) and silicon nitride (SiN, Si3N4). When the dielectric film 120a is composed of an inorganic insulating material, the wiring width can be reduced to approximately 1 / 10 of that of the dielectric film in the composite component device 1A according to the second embodiment. This enables further miniaturization and thinning of the composite component device 1. The line-and-space (L / S) of the first redistribution layer 120, including the dielectric film 120a substantially composed of an inorganic material, is, for example, 1 μm / 1 μm.
[0041] The thickness of the dielectric film 120a is, for example, 0.1 to 2 μm. The dielectric film 120a may be a multi-component film containing two or more components. The multi-component film may be a multi-layer film in which multiple layers are formed for each component. The layer structure of the multi-layer film is, for example, SiO2 (thickness 0.25 μm) / Si3N4 (thickness 0.1 μm) / SiO2 (thickness 0.25 μm) / Si3N4 (thickness 0.1 μm) in this order from the first Si base layer 112 side.
[0042] (Interlayer Adhesion Layer) The first interlayer adhesion layer 130 bonds the first electronic component layer 110 and the second rewiring layer 220 of the second composite component layer 200 together.
[0043] [Manufacturing Method of Composite Component Device] An example of a manufacturing method of the composite component device 1 according to the first embodiment will be described. The manufacturing method of the composite component device 1 according to the first embodiment includes, for example, an electronic component bonding step of bonding one or more electronic components to a Si base layer having a lattice-shaped sidewall portion so that multiple component electrodes of the one or more electronic components contact a bottom surface portion of the Si base layer via an electronic component adhesive layer, an electronic component sealing step of sealing the one or more electronic components with resin to form a resin sealing portion, a rewiring layer formation step of forming a composite component layer by forming a rewiring layer, and a stacking step of forming another composite component layer by the electronic component bonding step, the electronic component sealing step, and the rewiring layer formation step, forming electronic component layer through-vias in the sidewall portions of the another composite component layer, and stacking the another composite component layer on the composite component layer, where the stacking step is performed at least once.
[0044] The manufacturing method of the composite component device 1 according to the first embodiment further includes a Si base layer thinning process for thinning the Si base layer, a through hole forming process for forming a through hole in the thinned Si base layer and the electronic component adhesive layer to expose a portion of the surface of the component electrode, and a Si through via forming process for forming a Si through via in the through hole.
[0045] The manufacturing method of the composite component device 1 according to the first embodiment may further include a Si base layer preparation process for preparing a Si base layer, an insulating portion formation process for forming insulating portions between component electrodes, a resin sealing portion thinning process for thinning the resin sealing portion, a Si support attachment process for attaching a Si support to the electronic component layer, a dielectric film formation process for forming a dielectric film having a predetermined pattern on the Si base layer, and a dicing process for dividing the device into individual pieces by dicing.
[0046] Specifically, an example of a manufacturing method for the composite component device 1 will be described with reference to FIGS. 10A-10B and 4A-4V. FIGS. 10A-10B and 4A-4V are diagrams illustrating the manufacturing method for the composite component device 1. The manufacturing method for the composite component device 1 according to the first embodiment includes an insulating portion forming process, a Si base layer preparing process, an electronic component bonding process, an electronic component sealing process, a resin sealing portion thinning process, a Si support bonding process, a Si base layer thinning process, a dielectric film forming process, a through-hole forming process, a through-Si via forming process, a rewiring layer forming process, a stacking process, and a dicing process. In this manufacturing method, a mother integrated body in which the composite component devices 1 are integrated is produced from the electronic component bonding process to the stacking process. In this manufacturing method, the third composite component layer 300, the second composite component layer 200, and the first composite component layer 100 are produced in this order.
[0047] (Insulating Portion Forming Process) In the insulating portion forming process, first insulating portions 111e are formed between the first component electrodes 111d of the first electronic component 111. Specifically, in the resin layer forming process, a resin-containing coating film is formed and then planarized to form the first insulating portions 111e. As shown in FIG. 10A , a solution containing resin and a solvent is applied using a spin coating method to form the coating film. Here, the lowest portion of the coating film is higher than the highest portion of the first component electrodes 111d. In other words, the coating film is formed so that all of the multiple first component electrodes 111d are completely buried in the coating film. The coating layer is then dried to form the first insulating portions 111e. Before the subsequent planarization process, the first insulating portions 111e preferably completely cover the first component electrodes 111d.
[0048] 10B , the planarization process involves grinding and planarizing the surfaces of the first component electrodes 111 d and the first insulating portions 111 e using, for example, a surface planer and a grinder, to form the first insulating portions 111 e between the first component electrodes 111 d, thereby exposing the top surfaces of the first component electrodes 111 d and making them flush with each other.
[0049] (Si Base Layer Preparation Step) In the Si base layer preparation step, a third Si base layer 312 is prepared. Specifically, as shown in FIG. 4A , in the Si base layer preparation step, a Si wafer is prepared as the third Si base layer 312, a third electronic component adhesive layer 315 (strictly speaking, a coating film of adhesive) is formed on the third Si base layer 312, and a third sidewall portion 313 is disposed. This forms the third Si base layer 312 having a rectangular bottom surface in a plan view and sidewall portions arranged in a lattice pattern so as to surround the rectangular bottom surface. One or more third electronic components 311 are adhered to recesses (or depressions or cavities) surrounded by the bottom surface and sidewall portions in the electronic component adhesion step described below.
[0050] An adhesive coating is formed on the second main surface 312b of the third Si base layer 312. This produces a third Si base layer 312 with a coating film formed thereon. The coating method is, for example, spin coating. The thickness of the coating is preferably controlled to be within a range of 10 μm to the thickness of the third component electrodes 311d of one or more third electronic components 311. The adhesive is, for example, a thermosetting resin. Such a thermosetting resin is, for example, a thermosetting resin containing repeating units derived from benzocyclobutene (BCB), and can be obtained by polymerizing, for example, 1,3-divinyl-1,1,3,3-tetramethyldisiloxane-bis-benzocyclobutene (DVS-bis-BCB). Commercially available products include, for example, "CYCLOTENE" manufactured by Dow Chemical.
[0051] The shape of the Si wafer may be, but is not limited to, a flat cylindrical shape when viewed from above in a plan view. In this specification, "flat" refers to a cylindrical shape in which the height (h) of the cylindrical shape is smaller than the outer diameter (diameter: 2r) (h / 2r<1). When the Si wafer has a cylindrical shape, the thickness of the Si wafer is, for example, 775 μm (Si wafer diameter φ300 mm), 725 μm (φ200 mm), 675 μm (φ150 mm), or 525 μm (φ100 mm). The Si base layer preparation process may be performed before the insulating portion formation process. The third Si base layer 312 and the third sidewall portion 313 are both substantially composed of Si.
[0052] (Electronic Component Bonding Process) In the electronic component bonding process, one or more third electronic components 311 are bonded to the third Si base layer 312 so that the third component electrodes 311 d of the one or more third electronic components 311 contact the bottom surface of the third Si base layer 312, which has a lattice-shaped third sidewall portion 313, via the third electronic component adhesive layer 315. Specifically, in the electronic component bonding process, as shown in FIG. 4B , one or more third electronic components 311 are placed (mounted) on the bottom surface of the third Si base layer 312 so that the third component electrodes 311 d and the third insulating portions 311 e contact the bottom surface of the third Si base layer 312 via the third electronic component adhesive layer 315 (strictly speaking, an adhesive coating film). Next, the adhesive coating film is cured to form the third electronic component adhesive layer 315. This bonds the one or more third electronic components 311 to the third Si base layer 312.
[0053] The third electronic component 311 is placed on the coating film using an apparatus equipped with a vacuum chamber. Specifically, an electronic component integrated wafer (a wafer on which one or more third electronic components 311 are integrated) is bonded to a third Si base layer 312 (a third Si base layer 312 having a third sidewall portion 313). Pressure is applied bidirectionally along the stacking direction of the third electronic component 311, and heating is performed. Specifically, the third Si base layer 312 is set on a lower stage in a vacuum chamber of the apparatus. The third electronic component 311 is vacuum-sucked (or decompressed) onto an upper stage in the vacuum chamber so that the third component electrodes 311d of the third electronic component 311 face the coating film. The third Si base layer 312 and the electronic component integrated wafer are aligned using, for example, recognition marks on the third Si base layer 312. One or more third electronic components 311 are placed on the coating film side of the third Si base layer 312. Pressure is applied in both directions along the direction in which the upper and lower stages face each other, and heat is applied.
[0054] The electronic component integrated wafer is bonded onto the third Si base layer 312 so that the third component electrodes 311d and the third insulating portions 311e face the third Si base layer 312 via the third electronic component adhesive layer 315.
[0055] (Electronic Component Sealing Process) In the electronic component sealing process, one or more third electronic components 311 are sealed with resin to form a third resin sealing portion 314. Specifically, in the electronic component sealing process, as shown in FIG. 4C , a dispenser is used to apply liquid resin onto the third Si base layer 312 on which one or more third electronic components 311 are mounted. Then, a compression molding device is used to mold the applied liquid resin. Then, for example, a hot air circulating oven is used to harden the liquid resin. The heat treatment conditions for hardening are, for example, 150°C and 1 hour. This forms the third resin sealing portion 314.
[0056] (Resin Sealing Portion Thinning Process) In the resin sealing portion thinning process, the third resin sealing portion 314 is thinned. Specifically, in the resin sealing portion thinning process, as shown in FIG. 4D , a Si wafer back grinder is used to grind and thin the third resin sealing portion 314. In the electronic component thinning process, the surface of the third resin sealing portion 314 on the second surface 311b side of the third electronic component 311 is ground. It is preferable to grind as much as possible. The thickness of the third resin sealing portion 314 after thinning is, for example, 50 to 150 μm.
[0057] 4D , which shows an example of the resin sealing portion thinning step, the third resin sealing portion 314 of the third electronic component layer 310 is ground, but one or more third electronic components 311 may also be ground. However, care must be taken not to damage the internal functional portions of the third electronic components 311. The functional portions are, for example, the dielectric and electrodes in the case of a capacitor, and the wiring in the case of an inductor.
[0058] (Si Support Bonding Process) In the Si support bonding process, as shown in FIG. 4E , the third Si support 340 is bonded to the third resin sealing portion 314. Specifically, the Si wafer described in the Si base layer preparation process is separately prepared as the third Si support 340. Next, an adhesive layer 350 (strictly speaking, a coating film of adhesive) is formed on the third Si support 340 by the method described in the electronic component bonding process. Thereafter, the third resin sealing portion 314 is bonded onto the third Si support 340 so that the ground surface of the third resin sealing portion 314 contacts the coating film, and pressure is applied and heated. This hardens the coating film of adhesive to form the adhesive layer 350, and the third Si support 340 is placed on the ground surface of the third resin sealing portion 314 via the adhesive layer 350. The purpose of providing the third Si support 340 is to prevent adverse effects (more specifically, a decrease in strength, etc.) that may occur in the subsequent Si base layer thinning process due to the layer being thinner during the manufacturing process than in the past.
[0059] The third Si support 340 can be thinned before bonding as needed to improve processability. This is because a dielectric film will be formed using a semiconductor device in a subsequent process. For example, if the third electronic component 311 has a thickness of 150 μm, the third Si support 340 is a Si wafer (φ300 mm, typical thickness of 775 μm) that is thinned to approximately 625 μm.
[0060] (Si Base Layer Thinning Process) In the Si base layer thinning process, the third Si base layer 312 is thinned. Specifically, in the Si base layer thinning process, as shown in FIG. 4F , the third Si base layer 312 is ground using a method similar to that used in the resin encapsulation portion thinning process to thin the third Si base layer 312 and flatten the ground surface. In the Si base layer thinning process, the third Si base layer 312 is thinned while supported by the third Si support 340, thereby effectively thinning the third Si base layer 312. As a result, the manufacturing method of the composite component device 1 according to this embodiment can manufacture a composite component device 1 that is excellent as an electronic component module and has a low profile and a small size. The amount of grinding is preferably as large as possible while preventing the above-mentioned adverse effects and, for example, maintaining a certain strength. Considering variations in the flatness of the ground surface, the thickness of the thinned third Si base layer 312 is preferably 3 μm or more.
[0061] (Dielectric Film Forming Process) In the dielectric film forming process, as shown in Figures 4G, 4H, and 4I, a dielectric film 320a having a predetermined pattern is formed on the third Si base layer 312. Here, Figures 4G to 4I are enlarged views of a portion corresponding to part C in Figure 4F. Figures 4J to 4M are similar. Also, it should be noted that, because Figures 4G to 4M are mainly views relating to the formation of the third through Si via 317 and the third redistribution layer 320, for convenience, the third through Si via 317, the third redistribution layer 320, and the areas where they are formed are enlarged so as to occupy a large area.
[0062] Specifically, as shown in FIG. 4G, a dielectric film (0.1 to 0.2 μm thick) 320a is formed on the entire surface of the third Si base layer 312 using a chemical vapor deposition (CVD) method such as plasma-enhanced chemical vapor deposition (PECVD). The dielectric film 320a may be formed in one or more layers. For example, when forming a four-layer dielectric film 320a, the thicknesses of the dielectric film 320a may be, in order from the third Si base layer 312 side, SiO: 0.25 μm / SiN: 0.1 μm / SiO: 0.25 μm / SiN: 0.1 μm. Furthermore, in the dielectric film formation process, the surface of the third Si base layer 312 may be cleaned before forming the dielectric film 320a. The cleaning may be, for example, wet cleaning or oxygen plasma ashing.
[0063] Next, as shown in FIGS. 4H and 4I, the dielectric film 320a is patterned using photolithography. A liquid resist is spin-coated to form a photoresist film 360 on the entire surface of the dielectric film 320a. The photoresist film 360 is exposed through a mask corresponding to a predetermined pattern. The exposed photoresist film 360 is developed. The dielectric film 320a is selectively removed from the photoresist film 360 using RIE (reactive ion etching). For example, if the four-layer dielectric film 320a described above is formed, two layers on the front side of the dielectric film 320a (the side of the dielectric film 320a facing the third Si base layer 312) are selectively removed. The photoresist film 360 is then peeled off. This forms a dielectric film 320a having a predetermined pattern on the third Si base layer 312. The dielectric film 320a also functions as an insulating film that electrically insulates two third through-Si vias 317 shown in FIG. 4L (described later). The first main surface 312a of the third Si base layer 312 may further have a mark layer. The mark layer can be detected by an infrared (IR) camera to perform alignment in the photolithography method.
[0064] (Through-Hole Forming Process) In the through-hole forming process, through-holes 312c and 315c are formed in the thinned third Si base layer 312 and third electronic component adhesive layer 315, exposing a portion of the surface of the third component electrode 311d. Specifically, in the through-hole forming process, a photoresist film 360 is formed over the entire surface. The photoresist film 360 is exposed to light through a mask corresponding to the pattern of the third Si through via 317. The exposed photoresist film 360 is developed to form a photoresist film 360 having a predetermined pattern as shown in FIG. 4J. As shown in FIG. 4K, portions of the third Si base layer 312 and the third electronic component adhesive layer 315 present in the Z direction through openings 360a in the photoresist film 360 are selectively removed (etched). The etching is performed using, for example, RIE and laser irradiation. This forms through-holes 312c and 315c, exposing (a portion of) the top surface of the third component electrode 311d. Here, the through-hole 315c of the third electronic component adhesive layer 315 has a substantially elliptical shape in the ZX cross section. In this specification, the term "substantially elliptical shape" refers not only to a strict elliptical shape but also to a similar elliptical shape that takes into account actual variations in etching conditions during manufacturing. This is because the material constituting the third electronic component adhesive layer 315 is more easily etched than the material constituting the third Si base layer 312. As a result, a substantially elliptical extension portion 317b is formed in the subsequent through-Si via formation process. After the through-holes 312c and 315c are formed, the photoresist film 360 is removed. RIE is preferably used as the etching method. Using RIE as the etching method improves the flatness of the exposed top surface of the third component electrode 311d, thereby forming a good bond with the third through-Si via 317 to be formed later. This further suppresses deterioration of electrical connectivity.
[0065] (Through-Si Via Forming Process) In the through-Si via forming process, through-Si vias are formed in the through holes. Specifically, in the through-hole forming process, as shown in FIG. 4L , third through-Si vias 317 are formed in the through holes 312c and 315c by electroplating. Using a dual damascene method (more specifically, a Cu dual damascene method), the third through-Si vias 317 are formed in the through holes 312c and 315c by electroplating (more specifically, Cu electroplating). This forms the third electronic component layer 310.
[0066] (Redistribution Layer Formation Process) In the redistribution layer formation process, a third redistribution layer 320 is formed to produce a third composite component layer 300. Specifically, in the redistribution layer formation process, as shown in FIG. 4M, a dielectric film 320a and wiring 320b having a predetermined pattern are formed by the above-described photolithography and etching to form the third redistribution layer 320. Note that FIG. 4M depicts the third redistribution layer 320 incorporating the dielectric film 320a formed in FIG. 4H and the wiring 320b formed in FIG. 4L. FIG. 4N shows a cross-sectional view of the third composite component layer 300 including FIG. 4M. FIG. 4M is an enlarged view of portion C' in FIG. 4N.
[0067] (Laminating Process) In the laminating process, another composite component layer (first and second composite component layers 100, 200) is formed by the insulating portion forming process through the rewiring layer forming process described above. Then, electronic component layer through-vias 116, 216 are formed in the another composite component layer, and the another composite component layer is laminated on the third composite component layer 300. In this embodiment, the composite component layers are laminated twice. Specifically, first, in the laminating process, the second composite component layer 200 is laminated on the third composite component layer 300. The second composite component layer 200 is formed by the insulating portion forming process through the rewiring layer forming process shown in FIGS. 4A to 4M. The second Si support 240 is removed from the second composite component layer 200 to which it has been bonded, and a new second Si support 240 is bonded to the second rewiring layer 220 of the second composite component layer 200, as shown in FIG. 4O. As shown in Figure 4P, the second composite component layer 200 shown in Figure 4O is bonded to the third composite component layer 300 shown in Figure 4N using the second interlayer adhesive layer 230. As shown in Figure 4Q, the second Si support 240 is removed. As shown in Figure 4R, a second electronic component layer through-via 216 is formed in the second composite component layer 200. The second electronic component layer through-via 216 can be formed by a method similar to the above-mentioned through-Si via process. In this way, the second composite component layer 200 is laminated onto the third composite component layer 300.
[0068] Next, the first composite component layer 100 is laminated. In the same manner as the second composite component layer 200, the first composite component layer 100 is laminated on the second composite component layer 200 as shown in FIGS. 4A to 4P (see FIG. 4S). As shown in FIG. 4T, the first Si support 140 is removed. As shown in FIG. 4U, a first electronic component layer through-via 116 is formed in the first composite component layer 100. The first electronic component layer through-via 116 can be formed by a method similar to the through-Si via process described above. This allows the first composite component layer 100 to be further laminated.
[0069] (Dicing Process) In the dicing process, the mother integrated body is diced into individual pieces as shown in Fig. 4V, and the third Si support 340 is removed, thereby manufacturing the composite component device 1.
[0070] Second Embodiment [Configuration of Composite Component Device] The composite component device according to the second embodiment differs from the composite component device according to the first embodiment in that it does not have Si base layers 112, 212, 312, sidewall portions 113, 213, 313, and through-Si vias 117, 217, 317, but has a metal layer 370, and in that electronic component adhesive layers 115, 215, 315 and electronic component through-layer vias 116, 216, 316 are different. These different configurations will be mainly described below. Note that in the second embodiment, the same reference numerals as in the first embodiment represent the same configuration as in the first embodiment, and therefore, their description will be omitted in principle.
[0071] The configuration of a composite component device according to the second embodiment will be described with reference to Figures 5 and 6. Figure 5 is a diagram schematically illustrating a cross section of a composite component device according to the second embodiment of the present disclosure. As in the first embodiment, the configurations of the second and third composite component layers 200, 300 are substantially the same as that of the first composite component layer 100, and therefore, the following description will mainly focus on the first composite component layer 100. However, differences from the first composite component layer 100 may be referred to in connection with the second and third composite component layers 200, 300.
[0072] (Electronic Component Layer) The first electronic component layer 110 has a first electronic component 111 and a first electronic component layer through-via 116A, and further has a first resin sealing portion 114 and a first electronic component adhesive layer 115A.
[0073] The first electronic component 111 is supported by the first redistribution layer 120 A. The first component electrodes 111 d of the first electronic component 111 are directly electrically connected to (directly bonded to) the first redistribution layer 120 A.
[0074] Electronic Component Adhesive Layer When a composite component layer is connected to a rewiring layer of another composite component layer, one or more electronic components disposed within the composite component layer are adhered to the rewiring layer of the other composite component layer by an electronic component adhesive layer. More specifically, the first electronic component adhesive layer 115A adheres the second surface 111b of the first electronic component 111 to the second rewiring layer 220A of the second composite component layer 200. The second electronic component adhesive layer 215A adheres the second surface 211b of the second electronic component 211 to the third rewiring layer 320 of the third composite component layer 300. Meanwhile, the third electronic component adhesive layer 315A adheres the second surface 311b of the third electronic component 311 to the metal layer 370.
[0075] -Electronic component layer through via- The first electronic component layer through via 116A is a pillar-shaped wiring (more specifically, a Cu pillar). The cross-sectional area of the first electronic component layer through via 116A in the XY plane is larger than that of the first electronic component layer through via 116 in the first embodiment. The cross-sectional diameter of the first electronic component layer through via 116A in the XY plane is, for example, 35 to 100 μm. There are a total of four first electronic component layer through vias 116A in cross-sectional view, with two located at each end of the first composite component layer 100.
[0076] The cross-sectional area of the first electronic component through-layer via 116A in a plane perpendicular to the thickness direction of the composite component device 1A may increase from the second surface 111b toward the first surface 111a of the first electronic component 111. In other words, the shape of the first electronic component through-layer via 116A in the ZX cross section (ZX cross-sectional shape) may be tapered with respect to the stacking direction of the composite component layers 100, 200, 300. More specifically, the cross-sectional area of the first electronic component through-layer via 116A in the XY plane (XY cross-sectional area) may decrease from the second surface 111b toward the first surface 111a.
[0077] (Rewiring Layer) The first rewiring layer 120A is directly bonded to the first component electrode 111d. When the first rewiring layer 120A is directly bonded to the first component electrode 111d, the length of the via wiring between the first rewiring layer 120A and the first component electrode 111d can be further reduced, which allows the composite component device to be further miniaturized and thin, and also reduces the electrical resistance of the via wiring.
[0078] The first redistribution layer 120A includes a dielectric film substantially composed of an organic material (organic insulating material) and wiring (conductive wiring). In this specification, "substantially composed of an organic material" refers to the dielectric film containing 99% or more by mass of organic material. The dielectric film is substantially composed of an organic insulating material. Examples of organic insulating materials include epoxy resin, silicone resin, polyester, polypropylene, polyimide, acrylonitrile-butadiene-styrene (ABS) resin, acrylonitrile-styrene (AS) resin, methacrylic resin, polyamide, fluororesin, liquid crystal polymer, polybutylene terephthalate, and polycarbonate. When the insulating material constituting the dielectric film is an organic insulating material, the dielectric film can be formed without using a method such as PECVD, thereby reducing costs compared to the composite component device 1 according to the first embodiment. The line-and-space (L / S) of the first redistribution layer 120A, which includes a dielectric film substantially composed of an inorganic material, is, for example, 10 μm / 10 μm. The thickness of the dielectric film is, for example, 1 to 20 μm.
[0079] (Metal Layer) The third composite component layer 300 has a metal layer 370. The metal layer 370 functions as an electromagnetic shield for the composite component device 1A.
[0080] [Manufacturing Method of Composite Component Device] An example of a manufacturing method of the composite component device 1A according to the second embodiment will be described. The manufacturing method of the composite component device 1A according to the second embodiment includes, for example, an electronic component bonding step of bonding one or more electronic components to a Si support (Si support substrate) so that second surfaces of the one or more electronic components contact the Si support via an electronic component adhesive layer, an electronic component sealing step of encapsulating the one or more electronic components with resin to form a resin encapsulation portion, a resin encapsulation portion thinning step of thinning the resin encapsulation portion to expose the entire surfaces of the component electrodes, a rewiring layer forming step of forming a composite component layer, and a stacking step of forming a through-electronic component via in the composite component layer, attaching one or more electronic components to the composite component layer so that second surfaces of the one or more electronic components contact the composite component layer via the electronic component adhesive layer, encapsulating the one or more electronic components with resin to form a resin encapsulation portion, thinning the resin encapsulation portion to expose the entire surfaces of the component electrodes, forming a rewiring layer, and stacking another composite component layer on the composite component layer. The stacking step is performed at least once.
[0081] The manufacturing method of the composite component device 1A according to the second embodiment may further include an insulating portion forming step of forming insulating portions, and a dicing step of dividing the composite component device 1A into individual pieces by dicing.
[0082] Specifically, an example of a manufacturing method for the composite component device 1A will be described with reference to FIGS. 6A to 6O. FIGS. 6A to 6O are diagrams for explaining the manufacturing method for the composite component device 1A. The manufacturing method for the composite component device 1A according to the second embodiment includes, in chronological order, an insulating portion forming step, an electronic component bonding step, an electronic component sealing step, a resin sealing portion thinning step, a rewiring layer forming step, a stacking step, and a dicing step. Of these steps, the insulating portion forming step (see FIGS. 10A and 10B ), the electronic component sealing step (see FIG. 6B ), and the dicing step (see FIG. 6O ) are substantially the same as the corresponding steps in the first embodiment, and therefore will not be described.
[0083] (Electronic Component Adhesion Process) In the electronic component adhesion process, one or more third electronic components 311 are adhered to the third Si support 340 so that the second surfaces 311b of the one or more third electronic components 311 contact the third Si support 340 via a third electronic component adhesive layer 315A. Specifically, in the electronic component adhesion process, as shown in FIG. 6A , a third electronic component adhesive layer 315A (strictly speaking, a coating film of adhesive) is formed on the second surfaces 311b of the third electronic components 311 (on which the third insulating portions 311e have been formed in the same manner as in the insulating portion forming process of the first embodiment), and one or more third electronic components 311 are placed (mounted) on the third Si support 340 (strictly speaking, the third Si support 340 on which the metal layer 370 has been disposed via an adhesive layer 350) via the coating film. Next, the third electronic component adhesive layer 315A is cured. This adheres the one or more third electronic components 311 to the third Si support 340.
[0084] (Resin Sealing Portion Thinning Process) In the resin sealing portion thinning process, the third resin sealing portion 314 is thinned to expose the entire surface of the third component electrode 311d. Specifically, in the resin sealing portion thinning process, as shown in FIG. 6C , the third resin sealing portion 314 is ground and thinned using a Si wafer back grinder. This exposes the entire surface of the third component electrode 311d. Note that in this process, parts of the component electrode 311d and the third insulating portion 311e may also be ground.
[0085] (Redistribution Layer Formation Process) In the redistribution layer formation process, third redistribution layers 320A are formed to produce third composite component layer 300. Specifically, in the redistribution layer formation process, as shown in Figure 6D, a dielectric film and wiring having a predetermined pattern are formed using photolithography to form third redistribution layer 320A. In the second embodiment, relatively expensive equipment such as PVCVD is not used to form the dielectric film, thereby reducing costs.
[0086] (Laminating Process) The laminating process includes forming second electronic component layer through-vias 216A on the third composite component layer 300, bonding one or more second electronic components 211 to the third composite component layer 300 so that the second surfaces 211 b of the one or more second electronic components 211 contact the third composite component layer 300 via second electronic component adhesive layers 215A, encapsulating the one or more second electronic components 211 with resin to form a second resin encapsulation portion 214, thinning the second resin encapsulation portion 214 to expose the entire surfaces of the second component electrodes 311 d, forming a second rewiring layer 220A, and laminating another composite component layer (first and second composite component layers 100, 200) on the third composite component layer 300. The laminating process is performed twice.
[0087] Specifically, in the lamination process, first, the second composite component layer 200 is laminated on the third composite component layer 300. As shown in FIG. 6E , a second electronic component layer through-via 216A is formed on the third composite component layer 300. More specifically, a dry film resist (DFR) is laminated on (the entire surface of) the third redistribution layer 320A of the third composite component layer 300. An opening is formed through the DFR by photolithography. A second electronic component layer through-via 216A is formed in the opening by Cu via plating. The DFR is then peeled off. As a result, the second electronic component layer through-via 216A is formed on the third composite component layer 300.
[0088] Similar to the electronic component bonding process, one or more second electronic components 211 are bonded to the third composite component layer 300 so that the second surfaces 211b of the one or more second electronic components 211 contact the third composite component layer 300 via the second electronic component bonding layer 215A, as shown in FIG. 6F.
[0089] As in the electronic component sealing process, one or more second electronic components 211 are sealed with resin to form a second resin sealing portion 214, as shown in Fig. 6G. As in the resin sealing portion thinning process, the second resin sealing portion 214 is thinned to expose the entire surfaces of the second component electrodes 211d and the second insulating portions 211e, as shown in Fig. 6H. As in the rewiring layer forming process, a second rewiring layer 220A is formed, as shown in Fig. 6I. This allows the second composite component layer 200 to be stacked on the third composite component layer 300.
[0090] Next, the first composite component layer 100 is laminated onto the second composite component layer 200. The first composite component layer 100 is laminated onto the second composite component layer 200 in the same manner as in the formation of the second composite component layer 200 in the lamination process described above, as shown in Figures 6J to 6N.
[0091] Through the dicing step shown in FIG. 6O, the composite component device 1A according to the second embodiment is manufactured.
[0092] Third Embodiment [Configuration of Composite Component Device] The composite component device according to the third embodiment differs from the composite component device according to the first embodiment in that it does not have the Si base layers 112, 212, 312, the electronic component adhesive layers 115, 215, 315, and the through-Si vias 117, 217, 317, and in that the electronic component layer through-vias 116, 216, 316 are different. This different configuration will be mainly described below. In the third embodiment, the same reference numerals as those in the first and second embodiments represent the same configuration as those in the first and second embodiments, and therefore, in principle, description thereof will be omitted.
[0093] The configuration of a composite component device according to a third embodiment will be described with reference to FIGS. 7 and 8 . FIG. 7 is a schematic cross-sectional view of a composite component device according to a third embodiment of the present disclosure. FIG. 8 is an enlarged view of portion D in FIG. 7 . As in the first embodiment, the configurations of the second and third composite component layers 200 and 300 are substantially the same as that of the first composite component layer 100, and therefore, the following description will mainly focus on the first composite component layer 100. However, differences from the first composite component layer 100 may be referred to in the second and third composite component layers 200 and 300. The first composite component layer 100 includes a first electronic component layer 110 and a redistribution layer 120A provided on the first electronic component layer 110.
[0094] (Electronic Component Layer) The first electronic component layer 110 has a first electronic component 111 and a first electronic component layer through-via 116B, as well as a first sidewall portion 113 and a first resin sealing portion 114.
[0095] -Electronic component layer through via- The first electronic component layer through via 116B penetrates the first side wall portion 113 of the first electronic component layer 110 in the Z direction, and also penetrates the first interlayer adhesive layer 130. The first electronic component layer through via 116B has an adhesive layer conductive via 116a that penetrates the first interlayer adhesive layer 130, and a sidewall through via 116b that penetrates the first side wall portion 113.
[0096] [Manufacturing Method of Composite Component Device] An example of a manufacturing method of composite component device 1B according to the third embodiment will be described. The manufacturing method of composite component device 1B according to the third embodiment includes, for example, an electronic component bonding step of bonding one or more electronic components to a Si base layer having a lattice-shaped sidewall portion so that multiple component electrodes of the one or more electronic components contact a bottom surface portion of the Si base layer via an electronic component adhesive layer, an electronic component sealing step of sealing the one or more electronic components with resin to form a resin sealing portion, a rewiring layer formation step of forming a composite component layer by forming a rewiring layer, and a stacking step of forming another composite component layer by the electronic component bonding step, the electronic component sealing step, and the rewiring layer formation step, forming electronic component layer through-vias in the sidewall portions of the another composite component layer, and stacking the another composite component layer on the composite component layer, where the stacking step is performed at least once.
[0097] The method for manufacturing the composite component device 1B according to the third embodiment further includes a Si base layer removal step of removing the Si base layer and the electronic component adhesive layer to expose the entire surface of the component electrode.
[0098] The manufacturing method of the composite component device 1B according to the third embodiment may further include a Si base layer preparation process for preparing a Si base layer, an insulating portion formation process for forming an insulating portion, a resin sealing portion thinning process for thinning the resin sealing portion, a Si support attachment process for attaching a Si support to the electronic component layer, and a dicing process for dividing the device into individual pieces by dicing.
[0099] Specifically, an example of a manufacturing method for the composite component device 1B will be described with reference to Figures 9A to 9J. Figures 9A to 9J are diagrams for explaining the manufacturing method for the composite component device 1B. The manufacturing method for the composite component device 1B according to the third embodiment includes an insulating portion forming step, a Si base layer preparing step, an electronic component bonding step, an electronic component sealing step, a resin sealing portion thinning step, a Si support bonding step, a Si base layer removing step, a rewiring layer forming step, a stacking step, and a dicing step.
[0100] (Insulating portion forming step to Si support attaching step) As in the first embodiment, the insulating portion forming step to Si support attaching step are carried out (see: FIGS. 4A to 4E).
[0101] (Si base layer removal process) In the Si base layer removal process, the third Si base layer 312 and the third electronic component adhesive layer 315 are removed to expose the entire surface of the third component electrode 111 d. Specifically, in the Si base layer removal process, as shown in FIG. 9A , the third Si base layer 312 and the third electronic component adhesive layer 315 are removed using the same means as in the Si base layer thinning process in the first embodiment.
[0102] (Redistribution Layer Formation Process) In the redistribution layer formation process, the third redistribution layer 320A is formed. Specifically, in the redistribution layer formation process, the third redistribution layer 320A is formed using the same means as in the redistribution layer formation process of the second embodiment, as shown in FIG. 9B . This forms the third composite component layer 300.
[0103] 9C to 9I, the lamination process is similar to the lamination process of the first embodiment, and involves forming another composite component layer (first and second composite component layers 100, 200) through the insulating portion formation process to the rewiring layer formation process described above, forming electronic component layer through-vias 116B, 216B in the another composite component layer, and laminating the another composite component layer on a third composite component layer 300.
[0104] (Dicing Process) As in the first embodiment, a dicing process is carried out (see FIG. 9J), thereby manufacturing a composite component device 1B.
[0105] Other Embodiments The present disclosure is not limited to the above-described embodiments, and design modifications are possible without departing from the spirit and scope of the present disclosure. In addition, the configurations of the first to third embodiments may be combined in various ways.
[0106] In the first to third embodiments, the composite component devices 1, 1A, and 1B include three composite component layers, but are not limited to this. For example, the composite component device may include two or four or more composite component layers. In such cases, the lamination process is performed once or three or more times in the manufacturing method of the composite component device. In the composite component device according to the present disclosure, each composite component layer has a substantially identical configuration, so the wiring design is less complicated and it is easy to electrically connect the composite component layers. Therefore, wiring can be easily formed even when three or more composite component layers are stacked. Therefore, there are fewer restrictions on the number and types of electronic components to be built into the circuit design, allowing for a high degree of design freedom. This enables a variety of circuit configurations, broadening the range of applications.
[0107] In the first to third embodiments, the composite component device has two of the same type of electronic components in each composite component layer, but this is not limited to this. For example, the composite component device may have different types of electronic components, or one or three or more electronic components in each composite component layer. Furthermore, the composite component device may have a different number of electronic components in each composite component layer. This means that there are fewer restrictions on the number and types of electronic components to be built into the circuit design, allowing for greater design freedom. This enables a variety of circuit configurations, broadening the range of applications.
[0108] Aspects of a composite component device and a manufacturing method thereof according to the present disclosure are as follows: <1> A composite component device including two or more composite component layers, each having an electronic component layer and a redistribution layer provided on the electronic component layer, wherein the two or more composite component layers are stacked in a thickness direction such that the electronic component layers and the redistribution layers are alternately arranged, wherein the electronic component layer includes one or more electronic components having an electronic component body portion having a first surface perpendicular to the thickness direction and a second surface opposing the first surface, and a plurality of component electrodes arranged on the first surface, wherein the component electrodes of the one or more electronic components are electrically connected to the redistribution layer, and wherein an electronic component layer in a composite component layer adjacent to a redistribution layer of another composite component layer among the two or more composite component layers further includes an electronic component through-layer via electrically connecting to the redistribution layer of the other composite component layer. <2> The composite component device according to <1>, wherein the electronic component through-layer via is made substantially of copper. <3> The composite component device according to <1> or <2>, wherein the electronic component layer further includes a resin sealing portion that seals the one or more electronic components. <4> The composite component device according to any one of <1> to <3>, wherein all electronic components included in the composite component device are arranged in the two or more composite component layers so that their first surfaces are located on the redistribution layer side relative to their second surfaces. <5> The composite component device according to any one of <1> to <4>, wherein the electronic component layer further includes a sidewall portion that is arranged to surround the one or more electronic components and through which the through-electronic component layer via penetrates. <6> The composite component device according to any one of <1> to <5>, wherein the electronic component layer further includes: a Si-based layer that supports the one or more electronic components; and a through-Si via that penetrates the Si-based layer and electrically connects the component electrode and the redistribution layer. <7> The composite component device according to any one of <1> to <6>, wherein the redistribution layer includes a dielectric film substantially composed of an inorganic material.<8> The composite component device according to <5>, wherein the composite component layer is bonded to the other composite component layer via an adhesive layer, the through-electronic component layer via has a through-sidewall via that penetrates the sidewall and a conductive via that penetrates the adhesive layer, the conductive via electrically connects the through-electronic component layer via to a redistribution layer of the other composite component layer, and the cross-sectional area of the conductive via is larger than the cross-sectional area of the through-sidewall via in a plane perpendicular to the thickness direction. <9> The composite component device according to any one of <1> to <4>, wherein the redistribution layer is directly bonded to the component electrode. <10> The composite component device according to any one of <1> to <5> and <9>, wherein the redistribution layer has a dielectric film substantially composed of an organic material. <11> The composite component device according to <10>, wherein the cross-sectional area of the through-electronic component layer via in a plane perpendicular to the thickness direction increases from the second surface to the first surface. <12> A method for manufacturing a composite component device according to any one of <1> to <8>, wherein the electronic component layer of the composite component device further has sidewall portions arranged so as to surround the one or more electronic components and through which the electronic component layer through-vias pass, and a resin sealing portion that integrates the one or more electronic components, the method comprising: an electronic component bonding step of bonding the one or more electronic components to the Si base layer so that a plurality of component electrodes of the one or more electronic components contact a bottom surface portion of the Si base layer having a lattice-shaped sidewall portion via an electronic component adhesive layer; an electronic component sealing step of sealing the one or more electronic components with resin to form the resin sealing portion; a rewiring layer formation step of forming the composite component layer by forming the rewiring layer; and a stacking step of forming another composite component layer by the electronic component bonding step, the electronic component sealing step, and the rewiring layer formation step, forming another composite component layer by forming electronic component layer through-vias in the another composite component layer, and stacking the another composite component layer on the composite component layer, wherein the stacking step is performed at least once.<13> A method for manufacturing a composite component device according to <12>, further comprising: a Si base layer thinning step of thinning the Si base layer; a through hole forming step of forming a through hole in the thinned Si base layer and the electronic component adhesive layer to expose a portion of a surface of the component electrode; and a through Si via forming step of forming a through Si via in the through hole, wherein the through Si via penetrates the Si base layer and the electronic component adhesive layer and electrically connects the redistribution layer to the component electrode of the electronic component, and a dielectric film of the redistribution layer is substantially made of an inorganic material. <14> A method for manufacturing a composite component device according to <12>, further comprising: a Si base layer removal step of removing the Si base layer and the electronic component adhesive layer to expose the entire surface of the component electrode, and wherein the dielectric film of the redistribution layer is substantially made of an organic material. <15> A method for manufacturing a composite component device according to any one of <1> to <5> and <9>, wherein the electronic component layer of the composite component device further has a resin encapsulation portion that integrates the one or more electronic components, and the rewiring layer further has a dielectric film that is directly bonded to the component electrodes and is substantially composed of an organic material, an electronic component adhering step of adhering the one or more electronic components to the Si support so that the second surfaces of the one or more electronic components contact the Si support via an electronic component adhesive layer, an electronic component encapsulating step of encapsulating the one or more electronic components with resin to form a resin encapsulation portion, a resin encapsulation portion thinning step of thinning the resin encapsulation portion to expose the entire surfaces of the component electrodes, and a rewiring layer forming step of forming the rewiring layer to fabricate a composite component layer. a lamination step of forming the electronic component layer through-vias on the composite component layer, adhering the one or more electronic components to the composite component layer so that the second surfaces of the one or more electronic components contact the composite component layer via an electronic component adhesive layer, encapsulating the one or more electronic components with resin to form a resin encapsulation portion, thinning the resin encapsulation portion to expose the entire surfaces of the component electrodes, forming a rewiring layer, and laminating another composite component layer on the composite component layer, wherein the lamination step is performed at least once.
[0109] The composite component device according to the present disclosure can be mounted and used in a variety of electronic devices.
[0110] DESCRIPTION OF SYMBOLS 1, 1A, 1B... Composite component device 100, 200, 300... First, second, third composite component layer 110, 210, 310... First, second, third electronic component layer 111, 211, 311... First, second, third electronic component 111a, 211a, 311a... First surface 111b, 211b, 311b... Second surface 111c, 211c, 311c... First, second, third electronic component body portion 111d, 211d, 311d... First, second, third component electrode 111e, 211e, 311e... First, second, third insulating portion 112, 212, 312... First, second, third Si base layer 112a, 312a... First main surface 112b, 312b... second main surface 113, 213, 313... first, second, third side wall portions 114, 214, 314... first, second, third resin sealing portions 115, 115A, 215, 215A, 315, 315A... first, second, third electronic component adhesive layers 116, 116A, 116B, 216, 216A, 216B... first, second electronic component layer through vias 117, 217, 317... first, second, third Si through vias 120, 120A, 220, 220A, 320, 320A... first, second, third rewiring layers 320a... dielectric film 320b... wiring 130, 230 first, second interlayer adhesive layers 140, 240, 340 First, second, and third Si supports 150, 250, 350 Adhesion layer
Claims
1. A composite component device including two or more composite component layers each having an electronic component layer and a rewiring layer provided on the electronic component layer, The two or more composite component layers are laminated in a thickness direction such that the electronic component layers and the rewiring layers are alternately arranged, The electronic component layer is one or more electronic components each having an electronic component body having a first surface perpendicular to the thickness direction and a second surface opposite to the first surface, and a plurality of component electrodes disposed on the first surface; having the component electrodes of the one or more electronic components are electrically connected to the rewiring layer; An electronic component layer in a composite component layer adjacent to a rewiring layer of another composite component layer among the two or more composite component layers, a through-electronic component layer via electrically connecting the rewiring layer of the other composite component layer; and The electronic component layer is A sidewall portion that is disposed so as to surround the one or more electronic components and through which the electronic component layer through-via penetrates. and The composite part layer is bonded to another composite part layer via an adhesive layer; the electronic component layer through-via includes a sidewall through-via that passes through the sidewall and a conductive via that passes through the adhesive layer, the conductive via electrically connects the electronic component layer through-via and a rewiring layer of the other composite component layer; A composite component device, wherein in a plane perpendicular to the thickness direction, a cross-sectional area of the conductive via is larger than a cross-sectional area of the sidewall through-via.
2. The composite component device of claim 1 , wherein said electronic component through layer vias consist essentially of copper.
3. The composite component device according to claim 1 , wherein the electronic component layer further includes a resin sealing portion that seals the one or more electronic components.
4. The composite component device according to claim 1 , wherein all electronic components included in the composite component device are arranged within the two or more composite component layers so that their first surfaces are located on the redistribution layer side relative to their second surfaces.
5. The electronic component layer is a Si-based layer supporting the one or more electronic components; a through-Si via that penetrates the Si base layer and electrically connects the component electrode and the rewiring layer; The composite component device of claim 1 further comprising:
6. The composite component device of claim 1 , wherein the redistribution layer comprises a dielectric film substantially composed of an inorganic material.
7. 10. A method for manufacturing the composite component device of claim 1, comprising the steps of: The electronic component layer of the composite component device comprises: a sidewall portion disposed so as to surround the one or more electronic components and through which the electronic component layer through-via penetrates; a resin sealing portion that integrates the one or more electronic components; and an electronic component bonding step of bonding one or more electronic components to a bottom surface of the Si base layer having a lattice-shaped sidewall portion such that a plurality of component electrodes of the one or more electronic components are in contact with the bottom surface of the Si base layer via an electronic component bonding layer; an electronic component sealing step of sealing the one or more electronic components with resin to form a resin sealed portion; a rewiring layer forming step of forming the rewiring layer to fabricate a composite component layer; a lamination step of forming another composite component layer by the electronic component bonding step, the electronic component sealing step, and the rewiring layer forming step, forming an electronic component layer through-via in the other composite component layer, and laminating another composite component layer on the composite component layer; Consisting of A method for manufacturing a composite component device, wherein the laminating step is performed at least once.
8. a Si-based layer thinning step of thinning the Si-based layer; a through-hole forming step of forming a through-hole in the thinned Si base layer and the electronic component adhesive layer to expose a part of a surface of the component electrode; a through-Si via forming step of forming a through-Si via in the through hole; Further comprising the through-Si via penetrates the Si base layer and the electronic component adhesive layer, and electrically connects the redistribution layer and the component electrode of the electronic component; The method for manufacturing a composite component device according to claim 7 , wherein the dielectric film of the redistribution layer is substantially made of an inorganic material.