Electric power conversion device and flying object

Abstract

Provided is an electric power conversion device that outputs a three-phase AC voltage, using as an output voltage a voltage in which an output of a sub-inverter (3) is added to an output of a main inverter (2) that is capable of outputting a voltage in three levels of E, 0, and -E in each of the three phases, wherein: control is performed so that the voltage of an electric power storage element that supplies a bus voltage of the sub-inverter (2) becomes E / 3; and semiconductor switching elements that constitute the main inverter (2) and the sub-inverter (3) are controlled by using a 3rd-order superposition target AC voltage, in which a 3rd-order superposition voltage that is a 3rd-order harmonic wave of a frequency that is triple the frequency of a fundamental wave is added to a target AC voltage of the fundamental wave, as a target AC voltage for the output voltage in each phase, and setting the amplitude of the 3rd-order superposition voltage so that the fundamental wave component that is included in the output voltage of the sub-inverter (2) becomes 0.

Description

Power conversion device and flying object

[0001] The present application relates to a power conversion device and a flying object equipped with the same.

[0002] In recent years, the use of electric vehicles, ships, and other vehicles driven by motors instead of engines has become widespread, and the use of CO2 in aircraft has also become widespread. ２ Due to the trend toward reducing energy consumption, research into electrification is progressing in countries around the world. Lightweight equipment is required for aircraft. Naturally, there is a demand for more efficient and lighter power conversion devices, such as power supplies for aircraft equipment and motor drive inverters. In particular, as mentioned above, technology is needed to make lighter power conversion devices, particularly inverters used to drive propulsion AC motors, which require a large amount of power.

[0003] While lightweight inverter equipment is required for use on aircraft, its output can affect the load. Wiring exists between the inverter and its load, the motor, and when the inverter outputs an output voltage with a steep rise, a surge voltage is superimposed on the output. The surge voltage causes partial discharge through the dielectric at the end of the motor's winding or between the wiring, resulting in the deterioration of each. Because the low atmospheric pressure in high-altitude environments such as aircraft makes discharges more likely to occur than on the ground, higher-level countermeasures are required than for ground-based equipment.

[0004] To suppress surges, it is necessary to install a filter as described in Non-Patent Document 1. This filter is heavy, accounting for approximately half of the equipment, and hinders weight reduction. A multilevel inverter is a useful topology for miniaturizing the filter.

[0005] As a multilevel inverter topology, a series multiplexed multilevel inverter as described in Patent Document 1 is an effective circuit system. In a series multiplexed multilevel inverter, a high-voltage, low-frequency main inverter and a low-voltage, high-frequency sub-inverter are connected in series, and the sum of the output voltages of each inverter is output as a power conversion device. Hereinafter, this inverter will be referred to as a gradation control inverter.

[0006] International Publication No. WO2020-166003 JP 2012-175848 A

[0007] Arie Nawawi, et al. “Design and Demonstration of High Power Density Inverter for Aircraft Applications” IEEE Transactions on Industry Applications, Volume: 53, Issue: 2, March-April 2017

[0008] The DC bus of the sub-inverter of the gradation control inverter requires a voltage. Providing a separate DC power supply to ensure this voltage is difficult in terms of cost and size. Therefore, if all output power is borne by the main inverter and the output power of the sub-inverter becomes zero in one cycle of the AC output, a power supply-less system can be achieved. Patent Document 2 discloses one means for achieving this power supply-less system.

[0009] According to Patent Document 2, the aforementioned power supply-less operation can be achieved by adjusting the output power by advancing or delaying the phase of the output pulse of each inverter. However, Patent Document 2 is a technology for a reactive power compensator that acts as an inverter that handles reactive power for a power system in which the output AC voltage and frequency are fixed within a specific range, and is not suitable for applications that use active power, such as aircraft propulsion motor drives, in which the output AC voltage and frequency are not fixed.

[0010] The present application aims to provide a lightweight power conversion device that is configured with a main inverter and a sub-inverter and is used for applications in which the output AC voltage and frequency are not fixed, and that can eliminate the need for a power supply for the sub-inverter, suppress partial discharge in the load, and is lightweight.

[0011] The power conversion device disclosed in the present application comprises three main inverters that use a plurality of semiconductor switching elements connected in series to switch between a DC voltage E, a DC voltage -E, and a 0 voltage to produce an output voltage, three sub-inverters each having a plurality of semiconductor switching elements and a storage element that supplies a DC voltage Vb, and that switch between Vb, -Vb, and a 0 voltage to produce an output voltage, and a control device that controls the plurality of semiconductor switching elements of the three main inverters and the plurality of semiconductor switching elements of the three sub-inverters, wherein the three main inverters constitute a U-phase main inverter, a V-phase main inverter, and a W-phase main inverter, respectively, and the three sub-inverters constitute a U-phase sub-inverter, a V-phase sub-inverter, and a W-phase sub-inverter, respectively, and the U-phase sub-inverter, the V-phase sub-inverter, and the W-phase sub-inverter are connected to an output terminal of the U-phase main inverter, an output terminal of the V-phase main inverter, and an output terminal of the W-phase main inverter, respectively, so that the output voltage of each phase is the sum of the output voltage of the main inverter for each phase and the output voltage of the sub-inverter for each phase, The control device sets a target voltage of Vb, which is the voltage of the capacitor of each phase, to E / 3, sets a tertiary superimposed target AC voltage, which is obtained by adding a tertiary superimposed voltage, which is a third harmonic having a frequency three times that of the fundamental wave, to a fundamental wave target AC voltage, which is a target AC voltage of a target fundamental wave, as a target AC voltage of the output voltage of each phase, and sets the amplitude of the tertiary superimposed voltage so that the fundamental wave component included in the output voltage of the sub-inverter of each phase becomes zero, and controls each semiconductor switching element of the main inverter of each phase and the sub-inverter of each phase.

[0012] According to the present application, in a power conversion device that is composed of a main inverter and a sub-inverter and is used in applications where the output AC voltage and frequency are not fixed, it is possible to realize a power supply-less sub-inverter, suppress partial discharge in the load, and provide a lightweight power conversion device.

[0013] FIG. 1 is a circuit diagram showing a configuration of a power conversion device according to a first embodiment. FIG. 2 is a diagram explaining a main inverter, a sub-inverter, and an output voltage of the power conversion device according to the first embodiment. FIG. 3 is a diagram explaining a basic operation of a gradation control inverter. FIG. 4 is a diagram explaining the operation of the power conversion device according to the first embodiment. FIG. 5 is a diagram explaining a graph explaining a method for determining the phase of a rising edge of an output pulse of a main inverter, according to an example of operation of the power conversion device according to the first embodiment. FIG. 6 is a diagram explaining a second example of operation of the power conversion device according to the first embodiment. FIG. 7 is a diagram explaining a third example of operation of the power conversion device according to the first embodiment. FIG. 8 is a diagram explaining a graph explaining a method for determining the phase of a rising edge of an output pulse of a main inverter, according to another example of operation of the power conversion device according to the first embodiment. FIG. 9 is a diagram explaining a graph explaining a method for determining the phase of a rising edge of an output pulse of a main inverter, according to yet another example of operation of the power conversion device according to the first embodiment. b1 and the ratio b of the target AC voltage amplitude A b111. is a diagram showing the value of / A as a graph. FIG. 12 is a diagram showing an extracted portion of the graph in FIG. 10 to explain the operation of the power conversion device according to embodiment 1. FIG. 13 is a diagram adding arrows indicating the directionality of control to the graph in FIG. 11 to explain the operation of the power conversion device according to embodiment 1. FIG. 14 is a block diagram for explaining the calculation in the control device of the power conversion device according to embodiment 1. FIG. 15 is a block diagram for explaining the calculation in the control device of the power conversion device according to embodiment 2. FIG. 16 is a diagram for explaining the calculation in the control device of the power conversion device according to embodiment 3. FIG. 17 is a diagram for explaining the reset operation in the control device of the power conversion device according to embodiment 3. FIG. 18 is a schematic circuit diagram showing another example of the configuration of the main inverter of each embodiment. FIG. 19 is a block diagram showing an example of the configuration of the control device 11 of each embodiment. FIG. 19 is a block diagram showing a schematic configuration of a flying object according to embodiment 4.

[0014] Embodiment 1. A power conversion device according to embodiment 1 will now be described with reference to the drawings. FIG. 1 is a circuit diagram showing the configuration of the power conversion device according to embodiment 1. The power conversion device converts DC from a DC source 1 into AC required to drive a motor 8, which is a load. In this embodiment, it is assumed that DC source 1 is supplied from an aircraft's DC power distribution system, but it may also be a normal DC power source or a battery system such as a solar cell. The power conversion device, i.e., the gradation control inverter, is made up of a main inverter 2, a sub-inverter 3, and a control device 11 that controls these inverters. The output of the gradation control inverter is supplied to the motor 8, which is a load, via a filter 7.

[0015] The main inverter 2 is a three-phase inverter, and as shown in Fig. 1, is a three-level inverter that can output three levels of potential in each phase: a positive side (high potential) potential of the DC source 1, a negative side (low potential) potential, and a neutral point potential that is the median value between the positive side potential and the negative side potential. The three-level inverter shown in Fig. 1 is composed of three output phases: a U-phase main inverter arm 15 (also simply referred to as the U-phase main inverter 15), a V-phase main inverter arm 16 (also simply referred to as the V-phase main inverter 16), and a W-phase main inverter arm 17 (also simply referred to as the W-phase main inverter 17), and each phase is equipped with semiconductor switching elements composed of four self-extinguishing semiconductor elements such as IGBTs or MOSFETs having switching capabilities and two diodes having rectification capabilities.

[0016] The sub-inverters for each phase constituting the sub-inverter 3 are connected in series to the output terminals of the U-phase main inverter 15, V-phase main inverter 16, and W-phase main inverter 17 of the main inverter 2. Each sub-inverter for each phase is a full-bridge inverter composed of two-phase inverter arms, and each phase is equipped with semiconductor switching elements composed of self-extinguishing semiconductor elements such as IGBTs or MOSFETs with two switching capabilities. The sub-inverters for each phase are referred to as the U-phase sub-inverter 4, V-phase sub-inverter 5, and W-phase sub-inverter 6. Here, capacitors, which are energy storage elements, are used as DC sources to supply DC bus voltage to each sub-inverter. That is, a U-phase capacitor 41 is provided as the DC source for the U-phase sub-inverter 4, a V-phase capacitor 51 is provided as the DC source for the V-phase sub-inverter 5, and a W-phase capacitor 61 is provided as the DC source for the W-phase inverter. Note that instead of capacitors, energy storage elements such as lithium-ion batteries can also be used as the DC sources for each sub-inverter.

[0017] The switches of the semiconductor switching elements constituting the main inverter 2 and the sub-inverter 3 are controlled by a control device 11 that controls the output voltage waveform, and the gates of each semiconductor switching element are driven through drivers. In addition, sensors detect the high-potential side voltage (voltage of P bus capacitor 13) and low-potential side voltage (voltage of N bus capacitor 14), which are voltages on the input side of the main inverter 2, and the bus voltages of each of the three phases of the sub-inverter 3, which are voltage Vbu of U-phase capacitor 41, voltage Vbv of V-phase capacitor 51, and voltage Vbw of W-phase capacitor 61.

[0018] The DC bus voltage Vdc of the main inverter 2 is the voltage of the DC source 1, and because it is a three-level inverter, it is divided at the neutral point by two series-connected capacitors. A P bus capacitor 13 is connected to the high potential side, and an N bus capacitor 14 is connected to the low potential side, and the voltages of the P bus capacitor 13 and the N bus capacitor 14 are each controlled to Vm = Vdc / 2.

[0019] The DC bus voltages Vbu, Vbv, and Vbw (which are controlled to the same target voltage and are therefore sometimes referred to as a common voltage Vb) of the capacitors of each phase of the sub-inverter 3 are smaller than Vm, which is the voltage on the high-potential and low-potential sides of the input of the main inverter 2, and are controlled to be one-third of Vm. Therefore, if the voltage level of Vdc is 2E, the voltage level of Vb is E / 3.

[0020] The outputs of the main inverter 2 and the sub-inverter 3 are added in series, resulting in a multi-level waveform close to a sine wave. Figure 2 shows a table summarizing the output voltages of the main inverter 2, the sub-inverter 3, and the output voltage of the gradation-controlled inverter, which is the sum of the two output voltages. The main inverter 2 has three output patterns: E, 0, and -E, while the sub-inverter has three patterns: E / 3, 0, and -E / 3. This demonstrates a ternary gradation-controlled inverter that outputs nine voltage levels in continuous E / 3 increments. Because the output voltage is continuous in nine E / 3 increments, surge voltages are small and lightweight filters can be used. The voltage level of the sub-inverter, i.e., the voltage controlled as Vb, does not have to be exactly one-third of E; it can be controlled within a range of, for example, 0.9 x E / 3 to 1.1 x E / 3. Even if Vb deviates slightly from one-third of E, the waveform can be corrected for the error by switching control, and as for the filter, this is within the error range of the reactor design, so the effect of the present invention can be achieved.

[0021] Figure 3 shows an example of the output voltage due to the basic operation of a gradation control inverter. Only the positive side of the sine wave is extracted. The negative side phase also produces a similar output voltage waveform, with the only difference being that the positive and negative sides are reversed. The horizontal axis represents the phase, and the vertical axis represents the voltage. Starting from phase 0 degrees, when the target waveform exceeds 0.5Vb, only sub-inverter 3 operates and outputs +E / 3; next, when the target waveform exceeds 1.5Vb, main inverter 2 outputs +E and sub-inverter 3 outputs -E / 3, for a total of 2E / 3; next, when the target waveform exceeds 2.5Vb, main inverter 2 outputs +E and sub-inverter 3 outputs 0, for a total of 3E / 3; next, when the target waveform exceeds 3.5Vb, main inverter 2 outputs +E and sub-inverter 3 outputs +E / 3, for a total of 4E / 3; next, when the target waveform falls below 3.5Vb, main inverter 2 outputs +E and sub-inverter 3 outputs 0, for a total of 3E / 3; next, when the target waveform falls below 2.5Vb, main inverter 2 outputs E and sub-inverter 3 outputs -E / 3, for a total of 2E / 3; next, when the target waveform falls below 1.5Vb, sub-inverter 3 operates only and outputs +E / 3; Finally, when the target waveform falls below 0.5Vb, both the main inverter and the sub-inverter output 0, resulting in a total output of 0, and the phase reaches 180 degrees. This forms a pseudo-sine wave on the positive side. In this application, the output voltages of the main inverter 2 and the sub-inverter 3 are added together to form a pseudo-sine wave or other target waveform with a stepped output voltage waveform that changes in steps of E / 3 (=Vb). To pseudo-form a target waveform with a stepped output voltage waveform that changes in steps of E / 3 (=Vb), the main inverter 2 simply starts or stops output at the phase when the target waveform becomes 1.5Vb. The output start and stop times (phases) of the main inverter 2 are similar in Figures 4, 6, and 7 described below. The same applies to the negative side, although the positive and negative signs are reversed. That is, the main inverter 2 simply starts or stops output at the phase when the target waveform becomes -1.5Vb.

[0022] Here, the capacitor voltage Vb, which is the DC source that supplies the DC bus voltage to sub-inverter 3, must be controlled to E / 3. Because there is no dedicated power supply, in order to maintain the capacitor voltage Vb of sub-inverter 3 at E / 3, the output power of sub-inverter 3 must be kept to zero overall over the power supply cycle. As shown in Figure 3, sub-inverter 3 outputs positive and negative polarities in each half power supply cycle, so it is sufficient to match the amount of power during the positive period with the amount of power during the negative period. Therefore, to match the amount of power, the amount of power of each positive and negative polarity of sub-inverter 3 is adjusted, but this operation is equivalent to main inverter 2 shouldering all of the AC output. Therefore, it is sufficient to control during which phase period main inverter 2 starts up.

[0023] As shown in Figure 3, the output of the sub-inverter 3 of the ternary gradation control inverter contains a third-order harmonic component with a frequency three times the frequency of the sine wave (fundamental wave). Therefore, in this embodiment, a third-order harmonic (also referred to as a third-order superimposed voltage) with an adjusted amplitude is superimposed on the fundamental wave target AC voltage (fundamental wave target AC voltage) as the target AC voltage output by the gradation control inverter, and the maximum voltage is adjusted to adjust the power, i.e., the period of output from the main inverter 2. Note that while the output contains a third-order harmonic in each of the U, V, and W phases, the third-order harmonic is canceled in the phase-to-phase voltage, leaving only the fundamental wave component. Note that even if the third-order harmonic is not completely canceled in the phase-to-phase voltage, the frequency of the third-order harmonic does not have to be exactly three times the frequency of the fundamental wave, as long as it does not cause any problems in terms of waveform distortion of the phase-to-phase voltage. For example, the frequency of the third harmonic may deviate from three times the frequency of the fundamental wave as long as the component three times the frequency of the fundamental wave component in the phase-to-phase voltage is within the percentage range specified by the harmonic standards required for the application. The frequency of the third harmonic may be, for example, between 2.9 and 3.1 times the frequency of the fundamental wave. Figure 4 shows an example of voltage waveforms when the third harmonic is added to the fundamental wave target AC voltage to obtain the third harmonic superimposed target AC voltage, which is the target AC voltage for the gradation-controlled inverter. Comparing Figures 3 and 4 reveals changes in the phase and period of the voltage output by the main inverter 2. When the third harmonic shown in Figure 4 is superimposed, the output period of the main inverter 2 is longer than that shown in Figure 3, resulting in higher output power from the main inverter 2. In this embodiment, the direction and amount of power increase / decrease are controlled by the polarity and magnitude of the superimposed third harmonic.

[0024] The period during which the main inverter 2 outputs will now be described. First, there are three patterns for the period during which the main inverter 2 outputs, depending on the target AC voltage amplitude A of the fundamental wave and the amplitude B of the third harmonic to be added, i.e., the third-order superimposed voltage (referred to as the third-order superimposed voltage amplitude). To simplify the equations, let the DC bus voltage of the sub-inverter 3 (the voltage of the capacitor of the sub-inverter 3) be Vb (= E / 3) and the voltage of the main inverter 2 be Vm (= E).

[0025] The first main pattern is a pattern in which the amplitude polarity of the third harmonic is set to the same polarity as the amplitude polarity of the fundamental wave. In this case, the target voltage Vr is expressed by equation (1). Vr = A sin θ + B sin 3θ (1) Here, equation (2) holds for the phase θ0 at which the main inverter starts output. Vm / 2 = 1.5Vb = (A + 3B) sin θ0 - 4B sin 3 θ0 (2) Furthermore, by placing sinθ0 as X, we get equation (3). 4BX 3 - (A + 3B) X + 1.5Vb=0 (3)

[0026] The solution of the cubic equation (3) is X1, X2, and X3, which are expressed by equations (4), (5), and (6). X1 = (-27a0a3 2 + L・i)) 1 / 3 / (3(2) 1 / 3 a3) - (2) 1 / 3 a1 / (-27a0a3 2 + L・i) 1 / 3 (4) X2=ω(-27a0a3 2 +L・i)) 1 / 3 / (3(2) 1 / 3 a3) - ω 2 (2) 1 / 3 a1 / (-27a0a3 2 +L・i) 1 / 3 (5) X3 = ω 2 (-27a0a3 2 +L・i)) 1 / 3 / (3(2) 1 / 3 a3) - ω(2) 1 / 3 a1 / (-27a0a3 2 +L・i) 1 / 3 (6) Note that a0 = 1.5Vb, a1 = -(A + 3B), a3 = 4B, L = (-4 27 (a1a3) 3 -(27a0a3 2 ) 2 ) 1 / 2 , where i=√(-1), ω=-1 / 2+(√(3) / 2)i.

[0027] For example, when A is 30, B is 10, Vb is 10, and Vm is 30, the graph of the left side of equation (3) as function Y(X) is shown in Figure 5. The results where this function becomes 0 are X1 to X3. Here, the only solution for sin θ that falls between 0 and 1 is X3, and the phase where this sin θ becomes X3 is the rising phase θ of the main inverter 2, and the falling phase is 180 degrees -θ.

[0028] The second main pattern is a pattern in which the amplitude polarity of the third harmonic is opposite to that of the fundamental wave (B is negative), and the output pulse of the main inverter 2 has only one pulse on the same polarity side. An example waveform is shown in Figure 6. The solution for the second main pattern can be found using equations (4), (5), and (6), just like the first main pattern.

[0029] The third main pattern is a pattern in which the amplitude polarity of the third harmonic is opposite to that of the fundamental wave (B is negative), and the output pulse of the main inverter 2 generates one pulse on the positive side and two pulses on the opposite polarity (negative side). An example waveform is shown in Figure 7. The solutions for the positive side pulse can be found using equations (4), (5), and (6), just like the first main pattern. The solutions for the opposite polarity pulse can be found using equations (4), (5), and (6) by changing a0 to -Vm / 2.

[0030] As an example of the positive output pulse of the main inverter 2, a graph is shown in Figure 8, where A is 10, B is -25, Vb is 10, Vm is 30, and a0 is Vm / 2, and the left side of equation (3) is the function Y(X). The variables X that make the function Y(X) 0 are the solutions, which are X1 to X3. Here, the only solution for sinθ that is in the range from 0 to 1 is X2, and the phase in which this sinθ becomes X2 is the phase θ in which the main inverter rises. 00 and the falling edge is 180 degrees -θ 00 This becomes:

[0031] Similarly, as an example of the negative output pulse of the main inverter 2, a graph is shown in Figure 9, where A is 10, B is -25, Vb is 10, Vm is 30, and a0 is -Vm / 2, and equation (3) is expressed as a function Y(X). The variables X that make the function Y(X) 0 are the solutions, which are X1 to X3. Here, the solutions in the range of 0 to 1 for sin θ are X2 and X3. The phase where X3 is closest to this sin θ0 is the phase θ where the main inverter rises to the negative side. 01 and the phase θ where sinθ is X2 02 is the phase at which the main inverter falls. Regarding the second negative output pulse, 01 and θ 02 The values ​​obtained by subtracting 1 correspond to the falling phase and the rising phase, respectively.

[0032] Next, we calculate the third-order superimposed voltage amplitude B, which is the third-order harmonic to be superimposed. First, we calculate the fundamental component b m1 is expressed by Fourier series expansion as equation (7). m1 =(4Vm / π)・(cosθ 00 +cosθ 02 -cosθ 01 ) (7)

[0033] Fundamental wave component b of main inverter 2 m1 and the fundamental wave component b contained in the output voltage of the sub-inverter 3 b1 Equation (8) holds for the target AC voltage amplitude A. A = b m1 +b b1 (8) Therefore, the fundamental wave component b of the sub-inverter 3 b1 is calculated using equation (9). b1 =A-b m1 =A-(4Vm / π)・(cosθ 00 +cosθ 02 -cosθ 01 ) (9)

[0034] Since the condition for stabilizing the voltage of the sub-inverter 3 is that the total power is zero, if the calculation result of the above equation (9) showing the fundamental wave component is zero, no power is generated in the sub-inverter 3, and the DC bus voltage of the sub-inverter is stable.

[0035] FIG. 10 shows an example of the fundamental wave component b of the sub-inverter 3, where the tertiary superimposed voltage amplitude B is on the horizontal axis and the target AC voltage amplitude A is on the parameter when the bus voltage Vm of the main inverter 2 is set to 30 V and the bus voltage Vb of the sub-inverter 3 is set to 10 V. b1 b, which is the ratio of the target AC voltage amplitude A to b1 10 shows graphs in which the target AC voltage amplitude A is changed from 5V to 35V.

[0036] From the graph in Figure 10, b1 In other words, if the third-order superimposed voltage can be controlled to be added so that the inverter operates at the intersection of the zero line, the fundamental wave component b b1 can be set to 0, that is, the amount of energy flowing into and out of the sub-inverter can be set to zero, and the bus voltage Vb of the sub-inverter 3 can be stabilized. That is, for the target AC voltage amplitude A, the fundamental wave component b b1 The tertiary superimposed voltage amplitude B at which the tertiary superimposed voltage amplitude B is 0 is calculated, and the tertiary superimposed voltage of the calculated tertiary superimposed voltage amplitude B is added to the fundamental wave target AC voltage of the target AC voltage amplitude A to obtain the tertiary superimposed target AC voltage, and the main inverter and the sub-inverter are controlled using this voltage.

[0037] Figure 11 shows waveforms extracted from Figure 10 when the target AC voltage amplitude A is 35 V and when A is 10 V. As shown in the figure, when A is 35 V, the fundamental wave component b b1 b is the ratio of the target AC voltage amplitude A to b1 The slope of / A is negative only, and there is one intersection with the zero line. When A is 10V, the fundamental wave component b of the sub-inverter 3 b1 b is the ratio of the target AC voltage amplitude A to b1 The slope of / A has a pole that changes from negative to positive, and there are two intersections with the zero line. The point on the right side of the two intersections is the b b1 The slope of / A is opposite to the slope at the intersection located on the left side. Figure 12 is a diagram of Figure 11 with arrows added to indicate the direction of control.

[0038] Therefore, in order for each to reach the intersection, the direction of increase / decrease in the magnitude of the amplitude of the superimposed tertiary voltage, which is necessary to control the bus voltage Vb to the target value, is reversed with respect to the polarity of the deviation of the bus voltage Vb of the sub-inverter 3. Therefore, when the tertiary superimposed voltage amplitude B, which is the third harmonic for controlling the bus voltage Vb of the sub-inverter 3, is calculated by the control device 11, the change condition of the control amount relative to the deviation should be in the same direction.

[0039] In this case, even if there are two intersections, only the intersection with the same control direction as when there is only one intersection is used. In order to match this control direction, it is necessary to set a third-order superposition limiter, which is an upper limiter for the third-order superposition voltage amplitude B, as a forbidden band so as not to enter a positive slope, and to prevent the control system from reaching the intersection located on the right side.

[0040] An appropriate limiter value is a value greater than or equal to the cubic superimposed voltage amplitude B at the intersection located on the left side of the low-voltage side, which is the solution, and less than or equal to B at the pole where the slope changes direction. In this embodiment, for each condition of the target AC voltage amplitude A, if there is one intersection, that intersection is found, and if there are two intersections, the pole where the slope changes is found. From the plotted values, an approximate equation is created using the target AC voltage amplitude A as the amount of change (variable), and this approximate equation is used in the control device 11. Therefore, the control device 11 calculates the approximate equation in a control routine. A margin may be provided so that the plotted value is greater than the intersection if there is one intersection, and is less than the pole if there are two intersections.

[0041] Furthermore, as shown in the graph in FIG. 12 under the condition that the target AC voltage amplitude A is 10 V, if the cubic superimposed voltage amplitude B is on the small side even on the right-hand intersection side, the control will temporarily go out of control, but will move toward the target gradient, from a positive gradient to a negative gradient, and so it is possible to set a limiter for the cubic superimposed voltage amplitude B if the value is smaller than the intersection on the positive polarity side.

[0042] Of course, instead of performing the calculation of a complex function each time in the control device 11, it is also possible to solve the approximate equation in advance, create a map using the results as limiter values, save it in memory, and read it in during the control routine.

[0043] To summarize the above, when a target AC voltage amplitude A is given, the fundamental wave component b of the sub-inverter 3 is b1 The tertiary superimposed voltage amplitude B at which ≠ 0 is calculated using an approximation equation or map stored in the control device 11. The rising and falling phases of the pulses of the main inverter 2 are calculated from the solution of equation (3), and the rising and falling phases of the pulses of the sub-inverters are calculated to control each semiconductor switching element. By controlling in this manner, AC voltages in which the tertiary superimposed voltage is superimposed on the fundamental wave are output as the outputs of the U, V, and W phases of the gradation control inverter, and a three-phase AC voltage in which the tertiary superimposed voltage is canceled can be generated as the inter-phase voltage. At this time, the total power of the sub-inverter 3 over one cycle is zero. The target voltage of the capacitor voltage Vb of the sub-inverter 3 is set to E / 3. The rising and falling phases of the pulses of the sub-inverters are determined as phases in which the tertiary superimposed target AC voltage is E / 3, 2E / 3, 0, -E / 3, and -2E / 3.

[0044] FIG. 13 is a block diagram illustrating an operation performed in the control device 11 of the power conversion device according to the first embodiment to calculate a third-order superimposed voltage amplitude B, which is a third-order harmonic to be superimposed, and an inverter output voltage command value Vr (Vru, Vrv, Vrw), which is a third-order superimposed target AC voltage of the U phase, V phase, and W phase.

[0045] First, calculations are performed based on the U-phase. A subtractor 101u calculates a deviation ΔVbu (also referred to as a first deviation) between a sub-DC bus voltage target value (capacitor voltage target value) R_Vb, which is a sub-inverter DC bus voltage target value for the sub-inverter 3, and a U-phase sub-DC bus detected value Vbu, which is a detected value of the U-phase sub-inverter bus voltage, i.e., the U-phase capacitor voltage. An integral controller 102 receives the deviation ΔVbu as its input and calculates a controlled variable Bi as its output. A U-phase proportional controller 103u receives the deviation ΔVbu as its input and calculates a controlled variable Bpu as its output. The control variable Bi, which is the output of the integral controller 102, and the U-phase controlled variable Bpu, which is the output of the U-phase proportional controller 103u, are added together by an adder 104u, resulting in the third-order superimposed voltage amplitude Bu at the U-phase inverter. The control system that derives the third-order superimposed voltage amplitude Bu from the first deviation ΔVbu is a typical proportional-integral control (PI control) system. Furthermore, this tertiary superposition voltage amplitude Bu passes through a tertiary superposition limiter 105u, and is multiplied by sin3θ, which is a frequency three times the frequency of the fundamental wave Asinθ, which is the target AC voltage, to obtain Bu(sin3θ), which is the instantaneous value of the tertiary superposition voltage to be superposed. The sum of Asinθ and Bu(sin3θ) added by an adder 106u becomes the U-phase inverter output voltage command value Vru, and the output of the gradation control inverter is controlled to satisfy this command value.

[0046] Next, in the V-phase, a subtractor 101v calculates a deviation ΔVbv (also referred to as a second deviation) between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbv of the V-phase sub inverter 3. A V-phase proportional controller 103v receives this deviation ΔVbv as an input, and calculates a control variable Bpv as its output.

[0047] The control variable Bi, which is the output of integral controller 102 calculated by the control calculation for the U phase, and the V-phase control variable Bpv, which is the output of V-phase proportional controller 103v, are added together by adder 104v to obtain the tertiary superimposed voltage amplitude Bv for the V-phase inverter. Furthermore, this tertiary superimposed voltage amplitude Bv passes through tertiary superimposition limiter 105v, and is multiplied by sin3θ, which is three times the frequency of the fundamental wave target AC voltage Asinθ, to obtain Bv(sin3θ), which is the instantaneous value of the tertiary superimposed voltage to be superimposed. The V-phase fundamental wave Asin(θ+2π / 3) and Bv(sin3θ) are added together by adder 106v to obtain the V-phase inverter output voltage command value Vrv, and the gradation control inverter is controlled to satisfy this command value.

[0048] Next, in the W-phase, a subtractor 101w calculates the deviation ΔVbw (also referred to as the third deviation) between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbw of the W-phase sub-inverter 3. This deviation ΔVbw is used as an input to a W-phase proportional controller 103w, which calculates a controlled variable Bpw as its output. The controlled variable Bi, which is the output of the integral controller 102 obtained by the control calculation in the U-phase, and the controlled variable Bpw, which is the output of the W-phase proportional controller 103w, are added together in an adder 104v to form the tertiary superimposed voltage amplitude Bw in the W-phase inverter. Furthermore, this tertiary superimposed voltage amplitude Bw passes through a tertiary superimposition limiter 105w and is multiplied by sin3θ, which is three times the frequency of the fundamental wave target AC voltage Asinθ. This Bw(sin3θ) is the instantaneous value of the tertiary superimposed voltage to be superimposed. The sum of the W-phase fundamental waves Asin(θ+4π / 3) and Bw(sin3θ) added by adder 106w becomes the W-phase inverter output voltage command value Vrw, and the gradation control inverter is output controlled to satisfy this command value.

[0049] By sharing the integral controller 102 for each of the three-phase control systems, the tertiary superimposed voltage is roughly matched for the three phases, preventing the generation of zero-phase voltage. The proportional controllers for each phase are merely for fine adjustment, and the ideal setting is for this fine adjustment component to apply a limiter so that the zero-phase voltage is below a predetermined value.

[0050] For example, in the characteristic of FIG. 10, when the target AC voltage amplitude A is in the range of 20 V to 35 V, bb1 In applications where only the target AC voltage amplitude A is used in a range where there is no peak in the characteristic of / A relative to B, the third-order superposition limiter can be omitted in each phase.

[0051] According to the first embodiment, in a gradation control inverter configured to obtain an output voltage by adding the output voltage of the sub-inverter 3 to the output voltage of the main inverter 2, the voltage Vb of the capacitor serving as the DC source of the sub-inverter 3 is controlled to be E / 3 relative to the input voltage E (=Vdc / 2) of the main inverter 2, and a tertiary superimposed voltage amplitude B that makes the fundamental wave component of the sub-inverter 3 zero is calculated even when the target AC voltage amplitude A and frequency change, and a tertiary superimposed target AC voltage obtained by adding the tertiary superimposed voltage of the tertiary superimposed voltage amplitude B to the fundamental wave target AC voltage of the target AC voltage amplitude A is controlled as the target AC voltage of the gradation control inverter. As a result, in a 9-level gradation control inverter capable of miniaturizing the filter, a dedicated power supply is not required for the DC bus of the sub-inverter 3 even in applications where the target AC voltage and frequency change, making it possible to provide a lighter inverter.

[0052] 14 is a block diagram illustrating calculations performed in a control device of a power conversion device according to embodiment 2 to calculate a third-order superimposed voltage amplitude B, which is a third-order harmonic to be superimposed, and inverter output voltage command values ​​Vr (Vru, Vrv, Vrw), which are third-order superimposed target AC voltages of the U, V, and W phases. The configuration of the power conversion device in embodiment 2 is the same as that shown in FIG.

[0053] First, calculations are performed based on the U-phase. A subtractor 101u calculates the deviation ΔVbu between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbu of the U-phase sub-inverter 3. An integral controller 102 receives this deviation ΔVbu as its input and calculates a controlled variable Bi as its output. Next, a target AC voltage amplitude A is input to a feedforward amount calculator 107, which outputs the controlled variable Bff as the feedforward controlled variable of the tertiary superimposed voltage. This is added to the controlled variable Bi, which is the output of the integral controller 102, by an adder 108, and the sum Bif is output. A U-phase proportional controller 103u receives the deviation ΔVbu as its input and calculates a controlled variable Bpu as its output. The sum of the total output Bif of the integral controller 102 and the feedforward amount calculator 107 and the U-phase controlled variable Bpu, added by an adder 104u, becomes the tertiary superimposed voltage amplitude Bu. Furthermore, this third-order superimposed voltage amplitude Bu passes through a third-order superimposition limiter 105u, and is multiplied by sin3θ, which is three times the frequency of the fundamental wave Asinθ of the target output AC voltage, to obtain Bu(sin3θ), which is the instantaneous value of the third-order superimposed voltage to be superimposed. The sum of Asinθ and Bu(sin3θ) added by an adder 106u becomes the U-phase inverter output voltage command value Vru, and the output of the gradation control inverter is controlled to satisfy this command value.

[0054] Next, in the V-phase, a subtractor 101v calculates the deviation ΔVbv between the sub DC bus voltage target value R_Vb and the bus voltage detection value Vbv of the V-phase sub-inverter 3. This deviation ΔVbv is used as an input to a V-phase proportional controller 103v, which calculates a controlled variable Bpv as its output. Next, an adder 104v adds the total output Bif of the integral controller 102 and the feedforward variable calculator 107 calculated in the U-phase calculation to the controlled variable Bpv of the V-phase proportional controller 103v, resulting in a cubic superimposed voltage amplitude Bv. This cubic superimposed voltage amplitude Bv then passes through a cubic superimposition limiter 105v and is multiplied by sin3θ, which is three times the frequency of the target AC fundamental wave Asinθ. This multiplied value, Bv(sin3θ), is the instantaneous value of the cubic superimposed voltage to be superimposed. The sum of the V-phase fundamental waves Asin(θ+2π / 3) and Bv(sin3θ) added by adder 106v becomes the V-phase inverter output voltage command value Vrv, and the gradation control inverter is output-controlled to satisfy this command value.

[0055] Next, for the W-phase, a subtractor 101w calculates the deviation ΔVbw between the sub-DC bus voltage target value R_Vb and the detected value Vbw of the W-phase sub-inverter DC bus voltage. This deviation ΔVbw is used as an input to a W-phase proportional controller 103w, which calculates a controlled variable Bpw as its output. The total output Bif of the integral controller 102 and the feedforward variable calculator, calculated by the control calculation for the U-phase, and the controlled variable Bpw of the W-phase proportional controller 103w are added together by an adder 104w to obtain the cubic superimposed voltage amplitude Bw. This cubic superimposed voltage amplitude Bw then passes through a cubic superimposition limiter 105w and is multiplied by sin3θ, which is three times the frequency of the target AC fundamental wave Asinθ, to obtain Bw(sin3θ), which is the instantaneous value of the cubic superimposed voltage. The sum of the W-phase fundamental waves Asin(θ+4π / 3) and Bw(sin3θ) added by adder 106w becomes the W-phase inverter output voltage command value Vrw, and the output of the gradation control inverter is controlled based on this command value.

[0056] Here, the feedforward amount calculator 107 calculates the fundamental wave component b b1 From the result of calculating the third-order superimposed voltage amplitude B at which the value becomes zero, an approximation equation is found in which the target AC voltage amplitude A is the amount of change (variable), and this approximation equation is implemented in the control as a function. The calculation result of the implemented function for the input target AC voltage amplitude A is output as the feedforward amount calculation result.

[0057] According to this embodiment, a dedicated power supply for the sub-inverter is not required in a 9-level gradation control inverter that allows for the miniaturization of filters, and the sub-inverter bus voltage control is also speeded up, making it possible to provide a lightweight inverter that can be applied to loads that require more rapid changes.

[0058] 15 is a block diagram illustrating calculations performed in a control device of a power conversion device according to embodiment 3 to calculate a third-order superimposed voltage amplitude B, which is a third-order harmonic to be superimposed, and inverter output voltage command values ​​Vr (Vru, Vrv, Vrw), which are third-order superimposed target AC voltages of the U, V, and W phases. The configuration of the power conversion device in embodiment 3 is the same as that shown in FIG.

[0059] First, calculations are performed based on the U phase. A subtractor 101u calculates the deviation ΔVbu between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbu of the U phase sub inverter 3. The deviation ΔVbu is input to a reset-equipped integral controller 112, and the control variable Bi is calculated as its output.

[0060] The reset-equipped integral controller 112 has a function of returning the accumulated integral amount to an initial value when a reset signal is input. The reset signal, which is a trigger for resetting, is a signal output from the reset determiner 109. The reset determiner 109 determines the output fundamental wave component b of the sub-inverter as shown in FIG. 10 for the input target AC voltage amplitude A. b1 When the number of intersections where A is 0 changes from one to two, a toggle reset signal is output only for that calculation period.

[0061] The initial value is equal to or less than the appropriate value of the required cubic superposition voltage amplitude B. As described above, under the condition that there are two intersections, the appropriate value of B is B of the intersection shown on the left side, which is selected to align the directionality of control, as explained in the first embodiment, and is applied as the appropriate solution.

[0062] FIG. 16 shows an example of the relationship between the third-order superimposed voltage amplitude B and the fundamental wave component b of the output voltage of the sub-inverter 3 when the target AC voltage amplitude A is reduced, in this case, A is reduced from 35 V to 10 V. b1 In this figure, the control amount Bi stored in the integral controller is reset to its initial value so that A moves to the negative polarity gradient region when A is 10 V.

[0063] In the third embodiment, the fundamental wave component b b1 The result of calculating the third-order superimposed voltage amplitude B at which the value of σ becomes zero is used as the initial value in an approximation equation in which the target AC voltage amplitude A is a change parameter (variable).

[0064] Of course, it is also possible to use an approximation formula that changes depending on the value of A. The approximation formula can be created by plotting the value obtained by subtracting the margin voltage in the negative direction from the appropriate solution of B for the target AC voltage amplitude A, and can be implemented in the control device 11 as a function.

[0065] Also, instead of performing complex calculations of functions each time, the control device 11 can solve approximate equations in advance, create a map using the results as initial values, save it in memory, and read it in during the control routine.

[0066] Next, the target AC voltage amplitude A, which is the fundamental wave, is input to feedforward amount calculator 107, which outputs it as the feedforward control amount Bff of the tertiary superimposed voltage, and this is added to the control amount Bi, which is the output of reset integral controller 112, by adder 108, to output Bif. Also, the deviation ΔVbu is input and a U-phase proportional controller 103u is used to calculate the control amount Bpu as its output. The sum of the total output amount Bif of reset integral controller 112 and feedforward amount calculator 107 and the U-phase control amount Bpu, added by adder 104u, becomes the tertiary superimposed voltage amplitude Bu.

[0067] Although the feedforward amount calculation described in the second embodiment is used in FIG. 15, it is not necessary to use the feedforward amount calculation as in the first embodiment.

[0068] Furthermore, this third-order superposition voltage amplitude Bu passes through a third-order superposition limiter 105u and is multiplied by sin3θ, which is three times the frequency of the target AC fundamental wave Asinθ, to obtain Bu(sin3θ), which is the instantaneous value of the third-order superposition voltage to be superposed. The sum of Asinθ and Bu(sin3θ) added by an adder 106u becomes the U-phase inverter output voltage command value Vru, and the output of the gradation control inverter is controlled to satisfy this command value.

[0069] Next, in the V-phase, a subtractor 101v calculates the deviation ΔVbv between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbv of the V-phase sub-inverter 3. This deviation ΔVbv is used as an input to a V-phase proportional controller 103v, which calculates a controlled variable Bpv as its output. Next, an adder 104v adds together the total output Bif of the reset-equipped integral controller 112 and the feedforward variable calculator 107, calculated in the control calculation for the U-phase, and the controlled variable Bpv of the V-phase proportional controller 103v, resulting in a cubic superimposed voltage amplitude Bv. This cubic superimposed voltage amplitude Bv then passes through a cubic superimposition limiter 105v and is multiplied by sin3θ, which is three times the frequency of the target AC fundamental wave Asinθ. This multiplied value, Bv(sin3θ), is the instantaneous value of the cubic superimposed voltage to be superimposed. The sum of the V-phase fundamental waves Asin(θ+2π / 3) and Bv(sin3θ) added by adder 106v becomes the V-phase inverter output voltage command value Vrv, and the gradation control inverter is output-controlled to satisfy this command value.

[0070] Next, for the W-phase, a subtractor 101w calculates the deviation ΔVbw between the sub DC bus voltage target value R_Vb and the DC bus voltage detection value Vbw of the W-phase sub-inverter 3. This deviation ΔVbw is used as an input to a W-phase proportional controller 103w, which calculates a controlled variable Bpw as its output. Next, an adder 104w adds together the total output Bif of the reset-equipped integral controller 112 and the feedforward variable calculator 107, calculated in the control calculation for the U-phase, and the controlled variable Bpw of the W-phase proportional controller 103w, resulting in a cubic superimposed voltage amplitude Bw. This cubic superimposed voltage amplitude Bw then passes through a cubic superimposition limiter 105w and is multiplied by sin3θ, which is three times the frequency of the target AC fundamental wave Asinθ. This Bw(sin3θ) is the instantaneous value of the cubic superimposed voltage to be superimposed. The sum of the W-phase fundamental waves Asin(θ+4π / 3) and Bw(sin3θ) added by adder 106w becomes the W-phase inverter output voltage command value Vrw, and the gradation control inverter is output controlled to satisfy this command value.

[0071] The third embodiment is a variation of the control method of the first and second embodiments, which can reduce the amount of control calculation for sub-inverter bus voltage control in a 9-level gradation control inverter that can downsize the filter, thereby providing a lightweight inverter.

[0072] 13 to 15, a controller that inputs ΔVbu (first deviation) or ΔVbu and target AC voltage amplitude A and outputs a tertiary superposition voltage amplitude Bu will be referred to as a first controller, a controller that inputs ΔVbv (second deviation) and outputs a tertiary superposition voltage amplitude Bv will be referred to as a second controller, and a controller that inputs ΔVbw (third deviation) and outputs a tertiary superposition voltage amplitude Bw will be referred to as a third controller. In addition, when a tertiary superposition limiter is provided, the first controller, second controller, and third controller each include a tertiary superposition limiter.

[0073] In the above embodiment, the main inverter 2 is shown as a three-level inverter of a neutral point clamping type as shown in FIG. 1, but a T-type three-level inverter as shown in FIG. 17 may also be used, which is provided with switches through which current flows in both directions to short-circuit the neutral point of the DC source 1 and the AC output of each phase.

[0074] Specifically, as shown in FIG. 18 , the control device 11 shown in FIG. 1 includes an arithmetic processing device 11p such as a central processing unit (CPU), a storage device 11m that exchanges data with the arithmetic processing device 11p, and an input / output interface 11i that inputs and outputs signals between the arithmetic processing device 11p and the outside. The arithmetic processing device 11p may include an application-specific integrated circuit (ASIC), an integrated circuit (IC), a digital signal processor (DSP), a field programmable gate array (FPGA), and various signal processing circuits. Furthermore, the arithmetic processing device 11p may include multiple devices of the same or different types, each performing a different process. The storage device 11m may include a random access memory (RAM) that can read and write data from the arithmetic processing device 11p, a read-only memory (ROM) that can read data from the arithmetic processing device 11p, and the like. The input / output interface 11i is composed of, for example, an A / D converter that inputs sensor signals output from each voltage sensor, current sensor, etc. provided in the main inverter 2 and the sub-inverter 3 to the arithmetic processing unit 11p, and a drive circuit for outputting drive signals to each semiconductor switching element.

[0075] Embodiment 4 This embodiment is an embodiment of a flying object including any one of the power conversion devices according to Embodiments 1 to 3. The flying object of this embodiment is, for example, an airplane, a helicopter, a drone, a flying car, or the like.

[0076] 19 is a schematic block diagram of a flying object 200 according to a fourth embodiment. The flying object 200 includes the power conversion device described in any one of the first to third embodiments. The flying object 200 includes, as its propulsion power system 210, a power source 214, a DC power source 215 connected to the power source 214, a DC / DC converter 216 connected to the DC power source 215 and equipped with, for example, a step-down chopper circuit for converting the DC power to a predetermined voltage, an inverter 213 that converts the DC power stepped down by the DC / DC converter 216 into AC power, a load 212 to which power is supplied from the inverter 213, and a control device 211 that controls the DC / DC converter 216 and the inverter 213. Here, the load 212 is a propulsion load for obtaining propulsion force, such as an electric motor.

[0077] The gradation-controlled inverter of the power conversion device according to embodiment 1, embodiment 2, or embodiment 3 is used as inverter 213 mounted on flying object 200. Here, DC / DC converter 216 corresponds to DC source 1 in FIG. 1 . Also, control device 211 includes the functions of control device 11 in FIG. 1 . Devices mounted on flying objects, such as aircraft, that fly in the sky are required to be lightweight and reliable, such as being less susceptible to discharge. For this reason, a power conversion device equipped with the gradation-controlled inverter described in embodiment 1, embodiment 2, or embodiment 3 as inverter 213 is mounted on propulsion power system 210. This allows for weight reduction, suppression of partial discharge, and improved reliability.

[0078] Although various exemplary embodiments and examples are described in this application, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless modifications not illustrated are contemplated within the scope of the technology disclosed in this specification. For example, this includes cases where at least one component is modified, added, or omitted, and even cases where at least one component is extracted and combined with components of another embodiment.

[0079] REFERENCE SIGNS LIST 1 DC source, 2 main inverter, 3 sub-inverter, 4 U-phase sub-inverter, 5 V-phase sub-inverter, 6 W-phase sub-inverter, 11 control device, 15 U-phase main inverter, 16 V-phase main inverter, 17 W-phase main inverter, 41, 51, 61 capacitor (storage element), 102 integral controller, 103u U-phase proportional controller, 103v V-phase proportional controller, 103w W-phase proportional controller, 105u, 105v, 105w third-order superposition limiter, 107 feedforward amount calculator, 109 reset determiner, 112 reset-equipped integral controller, 200 flying object, 212 load, 215 DC power supply

Claims

1. Three main inverters that use a plurality of semiconductor switching elements connected in series to switch between a DC voltage E, a DC voltage -E, and a voltage of 0 to produce an output voltage; three sub-inverters each having a plurality of semiconductor switching elements and a storage element for supplying a DC voltage Vb, and switching between Vb, −Vb, and a voltage of 0 as an output voltage; a control device that controls the semiconductor switching elements of the three main inverters and the semiconductor switching elements of the three sub-inverters; The three main inverters respectively constitute a U-phase main inverter, a V-phase main inverter, and a W-phase main inverter, The three sub-inverters respectively constitute a U-phase sub-inverter, a V-phase sub-inverter, and a W-phase sub-inverter, the U-phase sub-inverter, the V-phase sub-inverter, and the W-phase sub-inverter are connected to an output terminal of the U-phase main inverter, an output terminal of the V-phase main inverter, and an output terminal of the W-phase main inverter, respectively, so that an output voltage of each phase is equal to a voltage obtained by adding an output voltage of the sub-inverter of each phase to an output voltage of the main inverter of each phase; 1. A power conversion device that outputs a three-phase AC voltage, The control device sets a target voltage of Vb, which is the voltage of the storage element of each phase, to E / 3, sets a tertiary superimposed target AC voltage, which is obtained by adding a tertiary superimposed voltage, which is a third harmonic having a frequency three times that of the fundamental wave, to a fundamental wave target AC voltage, which is a target AC voltage of a target fundamental wave, as a target AC voltage of the output voltage of each phase, and sets an amplitude of the tertiary superimposed voltage so that a fundamental wave component included in the output voltage of the sub-inverter of each phase becomes zero, and controls each semiconductor switching element of the main inverter of each phase and the sub-inverter of each phase.

2. The control device is configured to calculate an amplitude b of a fundamental wave component included in an output voltage of the sub-inverter for each phase with respect to a target AC voltage amplitude A which is an amplitude of the fundamental wave target AC voltage. b1 2. The power conversion device according to claim 1, further comprising: a tertiary superimposed voltage amplitude B, which is an amplitude of the tertiary superimposed voltage such that a tertiary superimposed voltage amplitude B is zero; and the tertiary superimposed voltage of the obtained tertiary superimposed voltage amplitude B is added to the fundamental wave target AC voltage of the target AC voltage amplitude A to set the tertiary superimposed target AC voltage.

3. The control device is a variable of the b b1 The power conversion device according to claim 2 , further comprising an approximation equation for B such that B=0, and B is calculated using the approximation equation.

4. The control device includes: a first controller that receives as input a first deviation between the target voltage of the storage element and a detection value of the voltage of the storage element of the U-phase sub-inverter and outputs Bu that is the tertiary superimposed voltage amplitude of the U-phase; a second controller that receives as input a second deviation between the target voltage of the storage element and a detection value of the voltage of the storage element of the V-phase sub-inverter and outputs Bv that is the tertiary superimposed voltage amplitude of the V-phase; a third controller that receives as input a third deviation between the target voltage of the storage element and a detection value of the voltage of the storage element of the W-phase sub-inverter and outputs Bw, which is the tertiary superimposed voltage amplitude of the W-phase; The power conversion device according to claim 2 , wherein the tertiary superimposed target AC voltage for each phase is set using outputs from the first controller, the second controller, and the third controller, respectively.

5. the first controller is configured to calculate the Bu by adding an output of an integral controller having the first deviation as an input and an output of a U-phase proportional controller having the first deviation as an input; the second controller is configured to calculate the Bv by adding an output of the integral controller and an output of a V-phase proportional controller that receives the second deviation as an input; The third controller is configured to calculate the Bw by adding an output of the integral controller and an output of a W-phase proportional controller that receives the third deviation as an input. The power conversion device according to claim 4.

6. the first controller is configured to calculate the Bu by adding together an output of an integral controller having the first deviation as an input, an output of a feedforward amount calculator having the target AC voltage amplitude A as an input, and an output of a U-phase proportional controller having the first deviation as an input; the second controller is configured to calculate the Bv by adding together an output of the integral controller, an output of the feedforward amount calculator, and an output of a V-phase proportional controller that receives the second deviation as an input; The third controller is configured to calculate the Bw by adding an output of the integral controller, an output of the feedforward amount calculator, and an output of a W-phase proportional controller that receives the third deviation as an input. The power conversion device according to claim 4.

7. 7. The power conversion device according to claim 5, wherein the integral controller has a reset function, and an integral amount of the integral controller is reset to an initial value in response to a command from a reset determiner that determines whether or not to reset the integral controller based on the target AC voltage amplitude A.

8. The power conversion device according to any one of claims 4 to 6, wherein the first controller, the second controller, and the third controller are each provided with a third-order superposition limiter that sets upper limits for the values ​​of the Bu, the Bv, and the Bw.

9. The power conversion device according to claim 8 , wherein an upper limit set by the third-order superposition limiter is set based on the target AC voltage amplitude A.

10. 7. A flying object comprising: a power source; a load that uses power from the power source; and the power conversion device according to claim 1 as a power conversion device that converts power from the power source and supplies power to the load.