Nitride-based bidirectional switching device for battery management and method of manufacturing the same

Abstract

A nitride-based bidirectional switching device is provided to operate as a battery protection controller having a power input terminal, a discharge overcurrent protection (DO) terminal, a charge overcurrent protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal. The nitride-based bidirectional switching device includes an adaptive module configured to receive DO and CO signals from a nitride-based bidirectional switching element and a battery protection controller, and to generate a main control signal for controlling the bidirectional switching element. By realizing the adaptive circuit, the nitride-based bidirectional switching device can operate as a conventional battery protection controller for battery charge and discharge management. Accordingly, a nitride-based battery management system can be realized with a higher operating frequency and a more compact size.

Description

Technology Field

[0001] The present invention generally relates to a nitride-based semiconductor bidirectional switching device. In particular, the present invention relates to a nitride-based semiconductor bidirectional switching device for battery management. Background Technology

[0002] To charge and discharge high-power density batteries, battery management is required to monitor battery status and ensure operational safety. A typical battery management system is equipped with a battery protection controller, generally a silicon MOSFET, and an electronic switch to disconnect the battery from the charger or load under critical conditions that could trigger a dangerous reaction, thereby preventing potential damage to battery cells and battery failure.

[0003] Nitride-based devices, such as GaN-based ones, are widely used in high-frequency electrical energy conversion systems due to their low power loss and fast switching. Compared to silicon (Si) metal-oxide-semiconductor field-effect transistors (MOSFETs), GaN high electron mobility transistors (HEMTs) offer significantly better performance figures and more promising performance in high-power and high-frequency applications. Therefore, it is desirable to have nitride-based battery management systems that can be used for higher frequency applications and have a more compact size. More specifically, there is a need for nitride-based bidirectional switching devices capable of operating as conventional battery protection controllers for battery charge and discharge management. The problem to be solved

[0004] According to one embodiment of the present invention, a nitride-based bidirectional switching device is provided to operate as a battery protection controller having a power input terminal, a discharge overcurrent protection (DO) terminal, a charge overcurrent protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal. The nitride-based bidirectional switching device includes a nitride-based bidirectional switching element and an adaptive module configured to receive DO signals and CO signals from the battery protection controller and to generate a main control signal for controlling the bidirectional switching element. By realizing the adaptive circuit, the nitride-based bidirectional switching device can operate as a conventional battery protection controller for battery charge / discharge management. Accordingly, a nitride-based battery management system can be realized with a higher operating frequency and a more compact size. means of solving the problem

[0005] According to another aspect of the present invention, a nitride-based bidirectional switching device further comprises a substrate potential management module configured to manage the potential of the main substrate of the bidirectional switching device. By implementing the substrate potential management circuit, the substrate potential of the bidirectional switching device is substantially the same as the lower potential among the potentials of the conducting terminals, regardless of the direction in which the bidirectional switching device is operated. Thus, the bidirectional switching device can be operated at a stable substrate potential to conduct current in both directions. Brief explanation of the drawing

[0006] The embodiments described herein may be easily understood from the following detailed description with reference to the accompanying drawings. The drawings may not necessarily be drawn to scale. That is, the dimensions of various features may be increased or decreased at will for the sake of clarity of description. Due to manufacturing processes and tolerances, there may be differences between the artistic representation of the description in this specification and the actual device. Throughout the drawings and the detailed description, the same reference numerals may be used for identical or similar components. FIG. 1a FIG. 1b is a circuit diagram of a battery management system (1) in each charging operation and discharging operation according to some embodiments of the present invention. FIG. 2 is a circuit of an exemplary circuit of a bidirectional switching device according to one embodiment of the present invention. FIG. 3 is a circuit diagram of an exemplary circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 4 is a circuit diagram of an exemplary circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 5 is a circuit diagram of an exemplary circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 6 is a circuit diagram of an exemplary circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 7 is a circuit diagram of an exemplary circuit of a bidirectional switching device according to another embodiment of the present invention. FIG. 8 is a diagram illustrating how each diode for forming a voltage-clamping element is replaced with a nitride-based transistor. FIGS. 9A and FIGS. 9B are cross-sectional views of a nitride-based IC chip integrated with a circuit as shown in FIGS. 2. FIGS. 10a and FIGS. 10b are cross-sectional views of a nitride-based IC chip integrated with a circuit as shown in FIG. 3. FIG. 11 is a cross-sectional view of a nitride-based IC chip integrated with a circuit as shown in FIG. 4. FIG. 12 is a cross-sectional view of a nitride-based IC chip integrated with a circuit as shown in FIG. 5. FIG. 13 is a cross-sectional view of a nitride-based IC chip integrated with a circuit as shown in FIG. 6. FIG. 14 is a cross-sectional view of a nitride-based IC chip integrated with a circuit as shown in FIG. 7. FIGS. 15a to 15e illustrate resistance structures formed on nitride-based IC chips according to various embodiments of the present invention. FIGS. 16a to 16j illustrate different steps of a method for manufacturing a nitride-based IC chip according to various embodiments of the present invention. FIGS. 17a to 17e are drawings illustrating the steps of forming resistance structures according to various embodiments of the present invention. FIG. 18 is a drawing illustrating the step of forming a through gallium via (TGV) according to various embodiments of the present invention. Specific details for implementing the invention

[0007] In the following description, preferred embodiments of the present invention will be presented as examples together with the accompanying drawings. The description and drawings should be considered illustrative rather than limiting. Specific details may be omitted so as not to obscure the description of this specification. However, this description is written so that a person skilled in the art can carry out the description of this specification without excessive experimentation.

[0008] FIGS. 1a and FIGS. 1b are circuit diagrams of a battery management system (1) in each charging operation and discharging operation according to some embodiments of the present invention. As illustrated, the battery management system (1) may include a battery protection controller (10), a nitride-based bidirectional switching device (100) configured to operate with the battery protection controller (10), a pair of positive and negative interface ports (P+, P-) configured to be coupled with a load (16) and / or a charger (14), and a battery (12) that is charged by receiving power from the charger (14) (as illustrated in FIG. 1a) or discharged by supplying power to the load (16) (as illustrated in FIG. 1b).

[0009] The battery protection controller (10) may have a power input node (Vcc) electrically coupled to the positive terminal (B+) of the battery (12) and a ground node (Vss) electrically coupled to the negative terminal (B-) of the battery (12). Optionally, an RC circuit (18) may be executed between the battery (12) and the battery protection controller (10).

[0010] The battery protection controller (10) receives a voltage monitoring resistor (R) to receive a monitoring signal for overcurrent detection. VM You can have additional voltage monitoring nodes electrically coupled to the negative interface port (P-) through ).

[0011] The battery protection controller (10) may further have a charging overcurrent protection node (CO) and a discharging overcurrent protection node (DO) to provide control signals to control a nitride-based bidirectional switching device (100) for overcurrent protection during charging and discharging operations, respectively.

[0012] In particular, the nitride-based bidirectional switching device (100) may include a control terminal (Ctrl1) configured to be electrically connected to the DO node of the controller and a control terminal (Ctrl2) configured to be electrically connected to the CO node of the controller. The nitride-based bidirectional switching device (100) may further include a conductive terminal (Cdct1) configured to be electrically connected to the ground node (Vss) of the controller (and the negative terminal of the battery (12)) and a conductive terminal (Cdct2) configured to be electrically connected to the negative interface port (P-).

[0013] Referring to FIG. 1a, during charging operation, the charging current (I C The current is conducted from the charger (14) to the battery and flows from the conduction terminal (Cdct1) to the conduction terminal (Cdct2) through the bidirectional switching device (100). When an overcurrent is detected, the battery protection controller (10) generates a control signal at the charging overcurrent protection node (CO) and controls the nitride-based bidirectional switching device (100) to disconnect the battery (12) from the charger (14).

[0014] Referring to FIG. 1b, during discharge operation, the discharge current (I D The current is conducted from the battery (12) to the load (16) and flows from the conduction terminal (Cdct2) to the conduction terminal (Cdct1) through the bidirectional switching device (100). When an overcurrent is detected, the battery protection controller (10) generates a control signal at the discharge overcurrent protection node (DO) and controls the nitride-based bidirectional switching device (100) to disconnect the battery (12) from the load (16).

[0015] FIGS. 2 to 7 are circuit diagrams of various exemplary circuits (100A-100F) of a bidirectional switching device (100) according to various embodiments of the present invention. As shown in FIGS. 2 to 7, the bidirectional switching device (100) may generally include an adaptive module (200A-F) configured to receive a DO signal and a CO signal from a main switching element (Sm) and a control terminal (Ctrl1) and a control terminal (Ctrl2), respectively, and to generate a main control signal for controlling the main switching element (Sm).

[0016] The main switching element (Sm) may have a control electrode electrically connected to the adaptation module (200A-F), a first conduction electrode connected to a conduction terminal (Cdct1), and a second conduction electrode connected to a conduction terminal (Cdct2). The main switching element (Sm) may be a nitride-based transistor having a gate operating as the control electrode of the main switching element (Sm), a drain operating as the first conduction electrode of the main switching element (Sm), and a source operating as the second conduction electrode of the main switching element (Sm). Preferably, the nitride-based transistor is an AlGaN / GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT).

[0017] During normal operation of charging and discharging, when a high voltage is applied to the control terminal (Ctrl1) and a high voltage is applied to the control terminal (Ctrl2), the main switching element (Sm) is turned on to allow currents to flow in both directions between the conduction terminals (Cdct1, Ccdt2).

[0018] When an overcurrent is detected during discharge operation, and a low voltage is applied to the control terminal (Ctrl1) and a high voltage is applied to the control terminal (Ctrl2), the main switching element (Sm) is turned off to disconnect the battery from the load, and the battery is protected from over-discharge or short circuit.

[0019] When an overcurrent is detected during charging operation, and a high voltage is applied to the control terminal (Ctrl1) and a low voltage is applied to the control terminal (Ctrl2), the main switching element (Sm) is turned off to disconnect the battery from the charger, and the battery is protected from overcharging.

[0020] Referring to FIGS. 2, FIGS. 4 and FIGS. 6, the adaptive module (200A, 200C, 200E) may include a voltage-clamping element (D1), a voltage-clamping element (D2), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistor element (R1).

[0021] The voltage-clamping element (D1) may have a positive electrode electrically connected to a control terminal (Ctrl1) and a negative electrode electrically connected to a wiring node (A). The voltage-clamping element (D2) may have a positive electrode electrically connected to a second control terminal (Ctrl2) and a negative electrode electrically connected to a wiring node (A).

[0022] The auxiliary switching element (S1) may have a control electrode electrically connected to a control terminal (Ctrl1), a first conductive electrode connected to a wiring node (A), and a second conductive electrode connected to a wiring node (B). The auxiliary switching element (S2) may have a control electrode electrically connected to a second control terminal (Ctrl2), a first conductive electrode connected to a wiring node (B), and a second conductive electrode connected to a control electrode of the main switching element (Sm).

[0023] The resistor element (R1) may have a first electrode electrically connected to the control electrode of the main switching element (Sm) and a second electrode electrically connected to the conduction terminal (Cdct1).

[0024] Voltage-clamping elements (D1, D2) are configured to isolate the main switching element (Sm) from the control terminals (Ctrl1, Ctrl2), respectively, thereby protecting the main switching element (Sm) from being damaged by a short circuit when the voltage levels at the control terminals (Ctrl1, Ctrl2) differ from normal operation.

[0025] Voltage-clamping elements (D1, D2) can be selected to have suitable forward voltages to clamp the voltage applied to the control electrode of the main switching element (Sm) to a desired level in order to ensure that the main switching element (Sm) operates normally. Generally, the voltage-clamping elements (D1, D2) can have substantially the same forward voltages (VF1, VF2).

[0026] The auxiliary switching elements (S1, S2) are configured to control the main switching element (Sm) by transmitting control signals received from the control terminals (Ctrl1, Ctrl2) to the main control signal.

[0027] During normal operation of charging and discharging, the battery protection controller (10) can generate high-level voltage signals (e.g., 10 V) at both DO and CO nodes. That is, a high-level voltage (V Ctrl1_P (10 V)) is applied to the control terminal (Ctrl1), and a high-level voltage (V Ctrl2_P (10 V) is applied to the control terminal (Ctrl2). Both voltage-clamping elements (D1, D2) are forward-biased. Both auxiliary switching elements (S1, S2) are turned on. As a result, the voltage at the control electrode of the main switching element (Sm) is V Ctrl1_P- V F1 (or V Ctrl2_P- V F2 It is pulled up to the same high level voltage as ). Then, the main switching element (Sm) is turned on to allow charge / discharge currents to flow between the conduction terminals (Cdct1, Ccdt2).

[0028] If an overcurrent is detected during discharge operation or if the battery (12) is completely discharged, the battery protection controller (10) can generate a low-level voltage signal (e.g., 0 V) ​​at the DO node and a high-level voltage signal (e.g., 10 V) at the CO node. That is, the low-level voltage (V Ctrl1_L (0 V)) is applied to the control terminal (Ctrl1), and a high-level voltage (V Ctrl2_P )(10 V) is applied to the control terminal (Ctrl2). The voltage-clamping element (D1) is reverse-biased and the voltage-clamping element (D2) is forward-biased. The auxiliary switching element (S1) is turned off and the auxiliary switching element (S2) is turned on. As a result, the voltage at the control electrode of the main switching element (Sm) drops to the voltage level of the conduction terminal (Cdct1) connected to the negative terminal (B-) of the battery (12) through the resistor element (R1) (i.e., ground potential = 0 V). The main switching element (Sm) is turned off to disconnect the battery (12) from the load (16) so that the battery can be protected from over-discharge or overcurrent.

[0029] When an overcurrent is detected during charging operation or when the battery (12) is fully charged, the battery protection controller (10) generates a high-level voltage signal (e.g., 10 V) at the DO node and a low-level voltage signal (e.g., -10 V) at the CO node to generate a high-level voltage (V Ctrl1_P )(10 V) is applied to the control terminal (Ctrl1) and a low-level voltage (V Ctrl2_N-10 V is applied to the control terminal (Ctrl2). The voltage-clamping element (D1) is forward-biased and the voltage-clamping element (D2) is reverse-biased. The auxiliary switching element (S1) is turned on and the auxiliary switching element (S2) is turned off. As a result, the voltage at the control electrode of the main switching element (Sm) is pulled down to the voltage level of the conduction terminal (Cdct1) connected to the negative terminal (B-) of the battery (12) (i.e., ground potential = 0 V). Then, the main switching element (Sm) is turned off to disconnect the battery (12) from the charger (14) so ​​that the battery can be protected from overcharging or overcurrent.

[0030] Referring to FIGS. 3, 5, and 7, the adaptive modules (200B, 200D, 200F) are similar to the adaptive modules (200A, 200C, 200E), respectively, except that the adaptive modules (200B, 200D, 200F) further comprise a voltage-clamping element (D3) having a positive electrode electrically connected to the control electrode of the main switching element (Sm) and a negative electrode electrically connected to the control terminal (Ctrl2). Generally, the voltage-clamping element (D3) has a forward voltage (V F1 , V F2 ) and substantially the same forward voltage (V F3 Can have ).

[0031] During normal operation of charging and discharging, the battery protection controller (10) can generate high-level voltage signals (e.g., 10 V) at both DO and CO nodes. That is, a high-level voltage (V Ctrl1_P )(10 V)) is applied to the control terminal (Ctrl1), and a high-level voltage (V Ctrl2_P )(10 V)) is applied to the control terminal (Ctrl2). All voltage-clamping elements (D1, D2, D3) are forward-biased. Both auxiliary switching elements (S1, S2) are turned on. As a result, the voltage at the control electrode of the main switching element (Sm) is V Ctrl1_P - VF1 (or V Ctrl2_P - V F2 It is pulled up to the same high level voltage as ). Then, the main switching element (Sm) is turned on so that charge and discharge currents can flow between the conduction terminals (Cdct1, Ccdt2).

[0032] If an overcurrent is detected during discharge operation or if the battery (12) is completely discharged, the battery protection controller (10) can generate a low-level voltage signal (e.g., 0 V) ​​at the DO node and a high-level voltage signal (e.g., 10 V) at the CO node. That is, the low-level voltage (V Ctrl1_L )(0 V)) is applied to the control terminal (Ctrl1), and the high-level voltage (V Ctrl2_P )(10 V) is applied to the control terminal (Ctrl2). The voltage-clamping elements (D1, D3) are reverse-biased and the voltage-clamping element (D2) is forward-biased. The auxiliary switching element (S1) is turned off and the auxiliary switching element (S2) is turned on. As a result, the voltage at the control electrode of the main switching element (Sm) is pulled down to the voltage level (i.e., 0 V) ​​of the conduction terminal (Cdct1) connected to the negative terminal (B-) of the battery (12) through the resistor element (R1). Then, the main switching element (Sm) is turned off to disconnect the battery (12) from the load (16) so that the battery can be protected from over-discharge or overcurrent.

[0033] When an overcurrent is detected during charging operation or when the battery (12) is fully charged, the battery protection controller (10) generates a high-level voltage signal (e.g., 10 V) at the DO node and a low-level voltage signal (e.g., -10 V) at the CO node to generate a high-level voltage (V Ctrl1_P )(10 V) is applied to the control terminal (Ctrl1) and the low-level voltage (V Ctrl2_N-10 V is applied to the control terminal (Ctrl2). Voltage-clamping elements (D1, D3) are forward-biased, and voltage-clamping element (D2) is reverse-biased. Auxiliary switching element (S1) is turned on, and auxiliary switching element (S2) is turned off. As a result, the voltage at the control electrode of the main switching element (Sm) is V Ctrl2_N + V F3 It is pulled to the same voltage level as. Then, the main switching element (Sm) is turned off to disconnect the battery (12) from the charger (14) so ​​that the battery can be protected from overcharging or overcurrent.

[0034] In some embodiments, the adaptive modules (200A-200F) may further include a voltage-clamping element (D4) (not shown) having a positive electrode electrically connected to a control terminal (Ctrl1) and a negative electrode electrically connected to a control electrode of an auxiliary switching element (S1); and a voltage-clamping element (D5) (not shown) having a positive electrode electrically connected to a control terminal (Ctrl2) and a negative electrode electrically connected to a control electrode of an auxiliary switching element (S2).

[0035] As illustrated in FIGS. 4 to 7, the bidirectional switching device (100) may further include a substrate potential management module (300C-F) configured to manage the potential of the main substrate (SUB) of the main switching element (Sm) to be substantially the same as the lower potential among the potentials of the first and second conductive terminals.

[0036] During normal operation of charging and discharging, a high-level voltage is applied to the control terminal (Ctrl1) and a high-level voltage is applied to the control terminal (Ctrl2), so that the substrate potential management module (300C-F) can manage the potential of the main substrate (SUB) to be substantially the same as the ground potential.

[0037] When an overcurrent is detected during discharge operation and a low-level voltage is applied to the control terminal (Ctrl1) and a high-level voltage is applied to the control terminal (Ctrl2), the substrate potential management module (300C-F) can manage the potential of the main substrate (SUB) to be substantially the same as the ground potential.

[0038] When an overcurrent is detected during charging operation, and a high-level voltage is applied to the control terminal (Ctrl1) and a low-level voltage is applied to the control terminal (Ctrl2), the substrate potential management module (300C-F) can manage the potential of the main substrate (SUB) to be substantially the same as the potential of the second conduction terminal.

[0039] Referring to FIGS. 4 and 5, the substrate potential management module (300C / 300D) may include an auxiliary switching element (S3) and an auxiliary switching element (S4).

[0040] The auxiliary switching element (S3) may include a control electrode electrically connected to a control terminal (Ctrl2), a first conductive electrode electrically connected to a conductive terminal (Cdct1), and a second conductive electrode electrically connected to a main substrate (SUB) of the main switching element (Sm). The auxiliary switching element (S4) may have a control electrode electrically connected to a control terminal (Ctrl1), a first conductive electrode electrically connected to a conductive terminal (Cdct2), and a second conductive electrode electrically connected to a main substrate (SUB) of the main switching element (Sm).

[0041] During normal operation of charging and discharging, the battery protection controller (10) can generate high-level voltage signals (e.g., 10 V) at both DO and CO nodes. That is, a high-level voltage (V Ctrl1_P )(i.e., 10 V) is applied to the control terminal (Ctrl1), and the high-level voltage (V Ctrl2_P)(i.e., 10 V) is applied to the control terminal (Ctrl2). Both auxiliary switching elements (S3, S4) are turned on. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 *R s3,on / (R s3,on + R s4,on Given as ), where V Cdct1 and V Cdct2 is the voltage potential at the respective conduction terminals (Cdct1 and Cdct2, Rs3), and R s3,on and R s4,on ε₀ and ε₀ are the on-resistances of the auxiliary switching elements (S3 and S4), respectively. V₀ Cdct1 is equal to the ground potential (i.e., 0 V). The main switching element is turned on. V Cdct2 is the on-state drain-source voltage (V) of the main switching element (Sm). m,on It is the same as ). V m,on Because this is very small, Vsub is equal to the ground potential (i.e., 0 V). Cdct1 It is practically the same as.

[0042] If an overcurrent is detected during discharge operation or if the battery (12) is completely discharged, the battery protection controller (10) can generate a low-level voltage signal (e.g., 0 V) ​​at the DO node and a high-level voltage signal (e.g., 10 V) at the CO node. That is, the low-level voltage (V Ctrl1_L )(i.e., 0 V) ​​is applied to the control terminal (Ctrl1), and a high-level voltage (V Ctrl2_P )(i.e., 10 V) is applied to the control terminal (Ctrl2). The auxiliary switching element (S3) is turned on and the auxiliary switching element (S4) is turned off. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 *R s3,on / (R s3,on + R s4,off It is given as ), where R s4,off is the off-resistance of S4. V Cdct1is equal to the ground potential (0 V). The main switching element (Sm) is turned off. V Cdct2 is the off-state drain-source voltage (V) of the main switching element (Sm). m,off V for the same difference as ) Cdct1 It is higher than. That is, V Cdct2 = V Cdct1 + V m,off = V m,off is. R s4,off Ga R s3,on Since it is much larger, the potential of the substrate (Vsub) is equal to the ground potential (i.e., 0 V). Cdct1 It is practically the same as.

[0043] When an overcurrent is detected during charging operation or when the battery (12) is fully charged, the battery protection controller (10) can generate a high-level voltage signal (e.g., 10 V) at the DO node and a low-level voltage signal (e.g., -10 V) at the CO node, so that the high-level voltage (V Ctrl1_P )(i.e., 10 V) is applied to the control terminal (Ctrl1) and the low-level voltage (V Ctrl2_N )(i.e., -10 V) is applied to the control terminal (Ctrl2). The auxiliary switching element (S3) is turned off and the auxiliary switching element (S4) is turned on. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 *R s3,off / (R s3,off + R s4,on It is given as ), where R s3,off is the off resistance of the auxiliary switching element (S3). V Cdct1 is equal to the ground potential (0V). The main switching element is turned off. V Cdct2 is the off-state drain-source voltage (V) of the main switching element (Sm). m,off V for the same difference as ) Cdct1 It is lower than. That is, V Cdct2 = V Cdct1 - V m,off = - V m,off is. R s3,off Ga Rs4,on Since it is much larger than -V, the potential of the substrate (Vsub) is -V m,off V identical to Cdct2 It is practically the same as...

[0044] Referring to FIGS. 6 and FIGS. 7, the substrate potential management module (300E / 300F) is similar to the substrate potential management module (300C / 300D), except that the substrate potential management module (300E / 300F) further includes a resistor element (R2) having a first electrode electrically connected to the main substrate (SUB) of the main switching element (Sm) and a second electrode electrically connected to a conductive terminal (Cdct1).

[0045] During normal operation of charging and discharging, the battery protection controller (10) can generate high-level voltage signals (e.g., 10 V) at both DO and CO nodes. That is, a high-level voltage (V Ctrl1_P )(i.e., 10 V) is applied to the control terminal (Ctrl1), and the high-level voltage (V Ctrl2_P )(i.e., 10 V) is applied to the control terminal (Ctrl2). Both auxiliary switching elements (S3, S4) are turned on. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 * R s3,on / (R s3,on + R s4,on It is given as ). V Cdct1 is equal to the ground potential (i.e., 0 V). The main switching element is turned on. V Cdct2 is the on-state drain-source voltage (V) of the main switching element (Sm). m,on It is the same as ). V m,on Because this is very small, Vsub is equal to the ground potential (i.e., 0 V). Cdct1 It is practically the same as.

[0046] If an overcurrent is detected during discharge operation or if the battery (12) is completely discharged, the battery protection controller (10) can generate a low-level voltage signal (e.g., 0 V) ​​at the DO node and a high-level voltage signal (e.g., 10 V) at the CO node. That is, the low-level voltage (V Ctrl1_L )(i.e., 0 V) ​​is applied to the control terminal (Ctrl1), and the high-level voltage (V Ctrl2_P )(i.e., 10 V) is applied to the control terminal (Ctrl2). The auxiliary switching element (S3) is turned on and the auxiliary switching element (S4) is turned off. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 *R eq,on / (R eq,on + R s4,off It is given as ), where R eq,on = R2* R s3,on / (R2+ R s3,on ) and this is the equivalent resistance (R2 and R) connected in parallel. s3,on ) is. V Cdct1 is equal to the ground potential (0V). The main switching element (Sm) is turned off. V Cdct2 is the off-state drain-source voltage (V) of the main switching element (Sm). m,off V for the same difference as ) Cdct1 It is higher than. That is, V Cdct2 = V Cdct1 + V m,off = V m,off is. R s4,off Ga R eq,on Since it is much larger, the potential of the substrate (Vsub) is equal to the ground potential (i.e., 0 V). Cdct1 It is practically the same as.

[0047] Alternatively, if an overcurrent is detected during discharge operation or if the battery (12) is completely discharged, the battery protection controller (10) may generate a low-level voltage signal (e.g., 0 V) ​​at the DO node and a low-level voltage signal (e.g., 0 V) ​​at the CO node. That is, a low-level voltage (V Ctrl1_L)(i.e., 0 V) ​​is applied to the control terminal (Ctrl1), and the low-level voltage (V Ctrl2_P )(i.e., 0 V) ​​is applied to the control terminal (Ctrl2). Both auxiliary switching elements (S3, S4) are turned off. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 *R eq,off / (R eq,off + R s4,off It is given as ), where R eq,off = R2* R s3,off / (R2+ R s3,off ) and this is R2 and R connected in parallel s3,off It is the equivalent resistance of. V Cdct1 is equal to the ground potential (0V). The main switching element (Sm) is turned off. V Cdct2 is the off-state drain-source voltage (V) of the main switching element (Sm). m,off V for the same difference as ) Cdct1 It is lower than. That is, V Cdct2 = V Cdct1 + V m,off = V m,off is. R s4,off Ga R eq,off Since it is similar to, the potential of the substrate (Vsub) is substantially the same as the ground potential (e.g., 0V).

[0048] When an overcurrent is detected during charging operation or when the battery (12) is fully charged, the battery protection controller (10) can generate a high-level voltage signal (e.g., 10V) at the DO node and a low-level voltage signal (e.g., -10V) at the CO node, so that the high-level voltage (V Ctrl1_P )(i.e., 0V) is applied to the control terminal (Ctrl1), and the low-level voltage (VCtrl2_N)(i.e., -10 V) is applied to the control terminal (Ctrl2). The auxiliary switching element (S3) is turned off, and the auxiliary switching element (S4) is turned on. The potential of the substrate (Vsub) is Vsub = V Cdct1 + V Cdct2 * R eq,off / (R eq,off+ R s4,on It is given as ). V Cdct1 is equal to the ground potential (0V). The main switching element is turned off. V Cdct2 is the off-state drain-source voltage (V) of the main switching element (Sm). m,off It is lower than VCdct1 for the same difference as ). That is, VCdct2 = VCdct1 - Vm,off = - Vm,off. Req,off is R s4,on Since it is lower than, the potential of the substrate (Vsub) is -V m,off V identical to Cdct2 It is practically the same as...

[0049] In some embodiments, the substrate potential management module (300C-300F) may further include a voltage-clamping element (D6) (not shown) having a positive electrode electrically connected to a control terminal (Ctrl2) and a negative electrode electrically connected to a control electrode of an auxiliary switching element (S3); and a voltage-clamping element (D7) (not shown) having a positive electrode electrically connected to a control terminal (Ctrl1) and a negative electrode electrically connected to a control electrode of an auxiliary switching element (S4).

[0050] The voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7) may include a diode having an anode acting as the positive electrode of the voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7) and a cathode acting as the negative electrode of the voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7). Alternatively, the voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7) may include a plurality of diodes connected in series, having an anode of the diode at one end acting as the positive electrode of the voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7) and a cathode of the diode at the other end acting as the negative electrode of the voltage-clamping element (D1 / D2 / D3 / D4 / D5 / D6 / D7).

[0051] As shown in FIG. 8, each of the diodes for forming the voltage-clamping elements (D1 / D2 / D3 / D4 / D5 / D6 / D7) can be replaced with a transistor having a gate and a source connected together to act as the anode of the diode and a drain configured to act as the cathode of the diode. This transistor may be a Si MOSFET or an AlGaN / GaN high electron mobility transistor (HEMT).

[0052] The auxiliary switching elements (S1 / S2 / S3 / S4) may be transistors having a gate acting as a control electrode of the auxiliary switching elements (S1 / S2 / S3 / S4), a drain acting as a first conduction electrode of the auxiliary switching elements (S1 / S2 / S3 / S4), and a source acting as a second conduction electrode of the auxiliary switching elements (S1 / S2 / S3 / S4). The transistors may be Si MOSFETs or AlGaN / GaN high electron mobility transistors (HEMTs).

[0053] The resistive elements (R1 / R2) may be resistors having a first terminal acting as a first electrode of the resistive elements (R1 / R2) and a second terminal acting as a second electrode of the resistive elements (R1 / R2).

[0054] The resistor (R1) can be selected to have a resistance value that is much higher than the on-resistance of the auxiliary switching elements (S1 / S2) and much lower than the off-resistance of the auxiliary switching elements (S1 / S2). For example, the resistor (R1) can be selected to have a resistance value in the range of approximately 0.1Ω to approximately 1GΩ.

[0055] The resistor (R2) can be selected to have a resistance value that is much higher than the on-resistance of the auxiliary switching element (S3 / S4) and much lower than the off-resistance of the auxiliary switching element (S3 / S4). For example, the resistor (R2) can be selected to have a resistance value in the range of approximately 0.1Ω to approximately 1GΩ.

[0056] A nitride-based bidirectional switching device (100) can be integrated into a nitride-based integrated circuit (IC) chip. FIGS. 9a to 9b and 10a to 10b each illustrate cross-sections of nitride-based IC chips integrated with circuits (100A, 100B). For clarification, FIGS. 11 and 12 each illustrate cross-sections of nitride-based IC chips integrated with circuits (100C, 100D) based on circuits (100A, 100B); and FIGS. 13 and 14 each illustrate cross-sections of nitride-based IC chips integrated with circuits (100E, 100F) based on circuits (100A, 100B).

[0057] Referring to FIGS. 9a and 9b, a nitride-based IC chip integrated with a circuit (100A) may include a substrate (102), a first nitride-based semiconductor layer (104), a second nitride-based semiconductor layer (106), gate structures (110), S / D electrodes (116), a first passivation layer (124), a second passivation layer (126), a third passivation layer (128), one or more first conductive vias (132), one or more second conductive vias (136), one or more first conductive lines (142), one or more second conductive lines (146), a protection layer (154), conductive pads (170), and resistive structures (180).

[0058] The substrate (102) may be a semiconductor substrate. Exemplary materials of the substrate (102) may include, but are not limited to, semiconductors on insulators such as Si, SiGe, SiC, gallium arsenide, p-doped Si, n-doped Si, sapphire, SOI (silicon on insulator), or other suitable semiconductor materials. In some embodiments, the substrate (102) may include, for example, group III elements, group IV elements, group V elements, or combinations thereof (e.g., group III-V compounds), but is not limited thereto. In other embodiments, the substrate (102) may include one or more other features such as, for example, doping regions, buried layers, epitaxial (epi) layers, or combinations thereof, but is not limited thereto.

[0059] A nitride-based semiconductor layer (104) is disposed on a substrate (102). Exemplary materials for the nitride-based semiconductor layer (104) include, for example, nitride or GaN, AlN, InN, InxAl. y Ga (1-x-y) N where x+y ≤ 1, Al y Ga (1-y) N may include III-V group compounds such as y ≤ 1, but is not limited thereto. Exemplary structures of the nitride-based semiconductor layer (104) may include, for example, multilayer structures, superlattice structures and compositional gradient structures, but are not limited thereto.

[0060] A nitride-based semiconductor layer (106) is disposed on a nitride-based semiconductor layer (104). Exemplary materials of the nitride-based semiconductor layer (106) are, for example, nitride or GaN, AlN, InN, InxAl. y Ga (1-x-y) N where x+y ≤ 1, Al y Ga (1-y) N may include, but is not limited to, group III-V compounds such as y ≤ 1.

[0061] Exemplary materials for the nitride-based semiconductor layers (104, 106) are selected such that the nitride-based semiconductor layer (106) has a bandgap (i.e., forbidden band) greater than the bandgap of the nitride-based semiconductor layer (104), which causes different electron affinities and forms a heterojunction between them. For example, if the nitride-based semiconductor layer (104) is an undoped GaN layer with a bandgap of approximately 3.4 eV, the nitride-based semiconductor layer (106) may be selected as an AlGaN layer with a bandgap of approximately 4.0 eV. In this way, the nitride-based semiconductor layers (104, 106) can each act as a channel layer and a barrier layer. A triangular well potential is generated at the junction interface between the channel layer and the barrier layer, and electrons accumulate within the triangular well potential, thereby creating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction. Therefore, a nitride-based IC chip may include one or more GaN-based high electron mobility transistors (HEMTs).

[0062] In some embodiments, the nitride-based IC chip may further comprise a buffer layer, a nucleation layer, or a combination thereof (not shown). The buffer layer may be disposed between the substrate (102) and the nitride-based semiconductor layer (104). The buffer layer may be configured to reduce lattice and thermal mismatch between the substrate (102) and the nitride-based semiconductor layer (104), thereby healing defects caused by the mismatch / difference. The buffer layer may comprise a III-V compound. The III-V compound may include, for example, aluminum, gallium, indium, nitrogen, or combinations thereof, but is not limited thereto. Accordingly, exemplary materials of the buffer layer may further include, for example, GaN, AlN, AlGaN, InAlGaN, or combinations thereof, but are not limited thereto.

[0063] A nucleation layer may be formed between the substrate (102) and the buffer layer. The nucleation layer may be configured to provide a transition to accommodate a mismatch / difference between the substrate (102) and the III-nitride layer of the buffer layer. Exemplary materials for the nucleation layer may include, for example, AlN or any of its alloys, but are not limited thereto.

[0064] Gate structures (110) are disposed on / above / above the second nitride-based semiconductor layer (106). Each of the gate structures (110) may include an optional gate semiconductor layer (112) and a gate metal layer (114). The gate semiconductor layer (112) and the gate metal layer (114) are stacked on the nitride-based semiconductor layer (106). The gate semiconductor layer (112) is located between the nitride-based semiconductor layer (106) and the gate metal layer (114). The gate semiconductor layer (112) and the gate metal layer (114) may form a Schottky barrier. In some embodiments, the nitride-based IC chip may further include an optional dielectric layer (not shown) between the p-type doped III-V compound semiconductor layer (112) and the gate metal layer (114).

[0065] The nitride-based transistor forming the nitride-based bidirectional switching device (100) may be enhancement-mode devices in a normal-off state when the gate electrodes (114) are approximately at zero vias. Specifically, the gate semiconductor layer (112) may be a p-type doped III-V compound semiconductor layer. The p-type doped III-V compound semiconductor layer (112) may form at least one pn junction with the nitride-based semiconductor layer (106) to empty the 2DEG region, so that at least one region of the 2DEG region corresponding to a location under the corresponding gate structure (110) has different characteristics (e.g., different electron concentrations) from the rest of the 2DEG region and is thus blocked. Due to this mechanism, the bidirectional switching device (100) has a normal-off characteristic. On the other hand, when no voltage is applied to the gate electrode (114) or when the voltage applied to the gate electrode (114) is less than the threshold voltage (i.e., the minimum voltage required to form an inversion layer under the gate structures (110)), the 2DEG region under the gate structure (110) remains blocked so that no current flows through it. Furthermore, by providing p-type doped III-V compound semiconductor layers (112), the gate leakage current is reduced and an increase in the threshold voltage during the off state is achieved.

[0066] In some embodiments, the p-type doped III-V compound semiconductor layers (112) may be omitted, so that the bidirectional switching device (100) is a depletion mode device, which means that the transistor is in a normally-on state at zero (0) gate source voltage.

[0067] Exemplary materials of the p-type doped III-V compound semiconductor layers (112) may include, but are not limited to, p-type doped III-V nitride semiconductor materials such as, for example, p-type GaN, p-type AlGaN, p-type InN, p-type AlInN, p-type InGaN, p-type AlInGaN, or combinations thereof. In some embodiments, the p-doped materials are achieved by using p-type impurities such as Be, Mg, Zn, Cd, and Mg.

[0068] In some embodiments, the nitride-based semiconductor layer (104) comprises undoped GaN and the nitride-based semiconductor layer (106) comprises AlGaN, and the p-type doped III-V compound semiconductor layers (112) are p-type GaN layers that can be bent to move the base band structure upward and deplete the corresponding region of the 2DEG region to put the bidirectional switching device (11) in an off-state condition.

[0069] In some embodiments, the gate electrodes (114) may comprise metals or metal compounds. The gate electrodes (114) may be formed as a single layer or as multiple layers of the same or different compositions. Exemplary materials of metals or metal compounds may include, for example, W, Au, Pd, Ti, Ta, Co, Ni, Pt, Mo, TiN, TaN, Si, metal alloys or compounds thereof, or other metal compounds, but are not limited thereto. In some embodiments, exemplary materials of the gate electrodes (114) may include, for example, nitrides, oxides, silicides, doped semiconductors, or combinations thereof, but are not limited thereto.

[0070] In some embodiments, an optional dielectric layer may be formed by a single layer or more layers of dielectric materials. Exemplary dielectric materials include, for example, one or more oxide layers, SiO₂ x Layer, SiNx The layer may include, but is not limited to, a high-K dielectric material (e.g., HfO2, Al2O3, TiO2, HfZrO, Ta2O3, HfSiO4, ZrO2, ZrSiO2, etc.), or a combination thereof.

[0071] S / D electrodes (116) are disposed on a nitride-based semiconductor layer (106). The "S / D" electrodes mean that each of the S / D electrodes (116) can function as a source electrode or a drain electrode depending on the device design. Although other configurations may be used, particularly multiple source, drain, or gate electrodes may be used in the device, the S / D electrodes (116) may be disposed on two opposite sides of the corresponding gate structure (110). Each gate structure (110) may be arranged so that each gate structure (110) is disposed between at least two of the S / D electrodes (116). The gate structure (110) and the S / D electrodes (116) can collectively function as at least one nitride-based / GaN-based HEMT having a 2DEG region.

[0072] In an exemplary example, adjacent S / D electrodes (116) are symmetric with respect to the gate structure (110) between them. In some embodiments, adjacent S / D electrodes (116) may be optionally asymmetric with respect to the gate structure (110) between them. That is, one of the S / D electrodes (116) may be closer to the gate structure (110) than the other of the S / D electrodes (116).

[0073] In some embodiments, the S / D electrodes (116) may comprise, for example, metals, alloys, doped semiconductor materials (such as doped crystalline silicon), compounds such as silicides and nitrides, other conductive materials, or combinations thereof, but are not limited thereto. Exemplary materials of the S / D electrodes (116) may comprise, for example, Ti, AlSi, TiN, or combinations thereof, but are not limited thereto. The S / D electrodes (116) may be a single layer or multiple layers of the same or different compositions. In some embodiments, the S / D electrodes (116) may form an ohmic contact with the nitride-based semiconductor layer (106). The ohmic contact may be achieved by applying Ti, Al, or other suitable materials to the S / D electrodes (116). In some embodiments, each of the S / D electrodes (116) is formed by at least one conformal layer and a conductive filler. The conformal layer may surround the conductive filler. Exemplary materials for the matching layer include, but are not limited to, Ti, Ta, TiN, Al, Au, AlSi, Ni, Pt, or combinations thereof. Exemplary materials for the conductive filler may include, but are not limited to, AlSi, AlCu, or combinations thereof.

[0074] A passivation layer (124) is disposed on a nitride-based semiconductor layer (106). The passivation layer (124) may be formed for protective purposes or to improve the electrical properties of the device (e.g., by providing an electrical insulation effect between / among different layers / devices). The passivation layer (124) covers the upper surface of the nitride-based semiconductor layer (106). The passivation layer (124) may cover the gate structures (110). The passivation layer (124) may cover at least two opposing sidewalls of the gate structures (110). S / D electrodes (116) may penetrate / pass through the passivation layer (124) to come into contact with the nitride-based semiconductor layer (106). Exemplary materials for the passivation layer (124) are, for example, SiN x , SiO x It may include, but is not limited to, Si3N4, SiON, SiC, SiBN, SiCBN, oxides, nitrides, poly(2-ethyl-2-oxazoline) (PEOX), or combinations thereof. In some embodiments, the passivation layer (124) may be a multilayer structure such as a composite dielectric layer of Al2O3 / SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or a combination thereof.

[0075] A passivation layer (126) is disposed over the passivation layer (124) and the S / D electrodes (116). The passivation layer (126) covers the passivation layer (124) and the S / D electrodes (116). The passivation layer (126) can function as a planarization layer having a flat top surface that supports other layers / devices. Exemplary materials for the passivation layer (126) are, for example, SiN x , SiO xIt may include, but is not limited to, Si3N4, SiON, SiC, SiBN, SiCBN, oxides, PEOX, or combinations thereof. In some embodiments, the passivation layer (126) is a multilayer structure such as a composite dielectric layer of Al2O3 / SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or a combination thereof.

[0076] Conductive vias (132) are disposed within the passivation layer (126) and the passivation layer (124). The conductive vias (132) penetrate the passivation layer (126) and the passivation layer (124). The conductive vias (132) extend longitudinally to electrically couple with the gate structure (110) and the S / D electrodes (116), respectively. The upper surfaces of the conductive vias (132) are not covered by the passivation layer (126). Exemplary materials of the conductive vias (132) may include, for example, conductive materials such as metals or alloys, but are not limited thereto.

[0077] Conductive lines (142) are disposed on the passivation layer (126) and the conductive vias (132). The conductive lines (142) are in contact with the conductive vias (132). The conductive lines (142) can be formed by patterning the conductive layer disposed on the passivation layer (126) and the conductive vias (132). Exemplary materials of the conductive lines (142) may include, for example, conductive materials, but are not limited thereto. The conductive lines (142) may include a single thin film or a multilayer thin film having Ag, Al, Cu, Mo, Ni, alloys thereof, oxides thereof, nitrides thereof, or combinations thereof.

[0078] A passivation layer (128) is placed over the passivation layer (126) and the conductive lines (142). The passivation layer (128) covers the passivation layer (126) and the conductive lines (142). The passivation layer (128) can act as a flattening layer having a flat top surface that supports other layers / devices. Exemplary materials for the passivation layer (128) are, for example, SiN x , SiO x It may include, but is not limited to, Si3N4, SiON, SiC, SiBN, SiCBN, oxides, PEOX, or combinations thereof. In some embodiments, the passivation layer (128) is Al2O 3 / It is a multilayer structure such as a composite dielectric layer of SiN, Al2O3 / SiO2, AlN / SiN, AlN / SiO2, or a combination thereof.

[0079] Conductive vias (136) are disposed within the passivation layer (128). The conductive vias (136) penetrate the passivation layer (128). The conductive vias (136) extend longitudinally and are electrically coupled to the conductive lines (142). The upper surface of the conductive vias (136) is uncovered. Exemplary materials for the conductive vias (136) may include, for example, conductive materials such as metals or alloys, but are not limited thereto.

[0080] Conductive lines (146) are disposed on the passivation layer (128) and the conductive vias (136). The conductive lines (146) are in contact with the conductive vias (136). The conductive lines (146) can be formed by patterning the conductive layer disposed on the passivation layer (128) and the conductive vias (136). Exemplary materials of the conductive layer (146) may include, for example, conductive materials, but are not limited thereto. The conductive layer (146) may include a single thin film or a multilayer thin film having Ag, Al, Cu, Mo, Ni, alloys thereof, oxides thereof, nitrides thereof, or combinations thereof.

[0081] A protective layer (154) is placed over the passivation layer (128) and the conductive layer (146). The protective layer (154) covers the passivation layer (128) and the conductive layer (146). The protective layer (154) can prevent oxidation of the conductive layer (146). Some portions of the conductive layer (146) may be exposed through openings within the protective layer (154) to form conductive pads (170), which are configured to be electrically connected to an external element (e.g., an external circuit).

[0082] The conductive pad (170) may include one or more conductive pads that each act as a first control terminal (Ctrl1), a second control terminal (Ctrl2), a first conductive terminal (Cdct1), and a second conductive terminal (Cdct2).

[0083] Conductive lines (142 or 146) and conductive vias (132 or 136) may be configured to electrically connect different layers / elements to form an adaptive module including a main switching element (Sm), a voltage-clamping element (D1), a voltage-clamping element (D2), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistor element (R1).

[0084] FIGS. 15a through 15e illustrate different ways of forming resistance structures (180) according to various embodiments of the present invention. Referring to FIG. 15a, resistance structures (180) can be formed by patterning a two-dimensional electron gas region adjacent to a heterojunction interface between first and second nitride-based semiconductor layers (i.e., a 2DEG region). Referring to FIG. 15b, resistance structures (180) can be formed by patterning a gate metal layer (114). Referring to FIG. 15c, resistance structures (180) can be formed by patterning an S / D electrode layer (116). Referring to FIG. 15d, resistance structures (180) can be formed by patterning a first conductive film (142). Referring to FIG. 15e, resistance structures (180) can be formed by patterning the second conductive layer (146).

[0085] Referring to FIGS. 10a and 10b, the nitride-based IC chip integrated with the circuit (100B) may have a layered structure similar to the IC chip integrated with the circuit (100A). Conductive lines (142 or 146) and conductive vias (132 or 136) may be configured to electrically connect various layers / devices to form an adaptive module including a main switching element (Sm), a voltage-clamping element (D1), a voltage-clamping element (D2), a voltage-clamping element (D3), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistor element (R1).

[0086] Referring to FIG. 11, the nitride-based IC chip integrated with the circuit (100C) may have a layered structure similar to the IC chip integrated with the circuit (100A), except that the nitride-based IC chip integrated with the circuit (100C) further includes one or more through-gallium vias (TGV) (162).

[0087] The TGV (162) may be formed to extend longitudinally from the second conductive layer (146) and penetrate into the substrate (102). The upper surfaces of the TGV (162) are not covered by the third passivation layer (128). In some embodiments, the TGV (162) may be formed to extend longitudinally from the first conductive layer (142) and penetrate into the substrate (102). The upper surfaces of the TGV (162) are not covered by the second passivation layer (126). Exemplary materials for the TGV (162) include, but are not limited to, conductive materials such as metals or alloys.

[0088] Conductive lines (142 or 146), conductive vias (132 or 136) and TGV (162) may be configured to electrically connect different layers / devices / conductive lines to form a main switching element (Sm); an adaptive module including a voltage-clamping element (D1), a voltage-clamping element (D2), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistor element (R1); and a substrate potential management module including an auxiliary switching element (S3) and an auxiliary switching element (S4).

[0089] Referring to FIG. 12, the nitride-based IC chip integrated with the circuit (100D) may have a layered structure similar to the IC chip integrated with the circuit (100B), except that the nitride-based IC chip integrated with the circuit (100D) further includes one or more through-gallium vias (TGV) (162). The conductive lines (142 or 146), conductive vias (132 or 136) and TGV (162) may be configured to electrically connect different layers / elements to form a main switching element (Sm); an adaptive module including a voltage-clamping element (D1), a voltage-clamping element (D2), a voltage-clamping element (D3), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistor element (R1); and a substrate potential management module including an auxiliary switching element (S3) and an auxiliary switching element (S4).

[0090] Referring to FIG. 13, the nitride-based IC chip integrated with the circuit (100E) may have a layered structure similar to the IC chip integrated with the circuit (100A), except that the nitride-based IC chip integrated with the circuit (100E) further includes one or more through-gallium vias (TGV) (162). The conductive lines (142 or 146), conductive vias (132 or 136) and TGV (162) may be configured to electrically connect different layers / elements to form a main switching element (Sm); an adaptive module including a voltage-clamping element (D1), a voltage-clamping element (D2), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistive element (R1); and a substrate potential management module including an auxiliary switching element (S3), an auxiliary switching element (S4), and a resistive element (R2).

[0091] Referring to FIG. 14, the nitride-based IC chip integrated with the circuit (100F) may have a layered structure similar to the IC chip integrated with the circuit (100B), except that the nitride-based IC chip integrated with the circuit (100F) further includes one or more through-gallium vias (TGV) (162). The conductive lines (142 or 146), conductive vias (132 or 136) and TGV (162) may be configured to electrically connect different layers / elements to form a main switching element (Sm); an adaptive module including a voltage-clamping element (D1), a voltage-clamping element (D2), a voltage-clamping element (D3), an auxiliary switching element (S1), an auxiliary switching element (S2), and a resistive element (R1); and a substrate potential management module including an auxiliary switching element (S3), an auxiliary switching element (S4), and a resistive element (R2).

[0092] Different steps of a method for manufacturing a circuit (100A / 100B) and an integrated nitride-based IC chip are illustrated in FIGS. 16a through 16j and described below. In the following, deposition techniques may include, but are not limited to, atomic layer deposition (ALD), physical vapor deposition (PVD), chemical vapor deposition (CVD), metal-organic CVD (MOCVD), plasma-enhanced CVD (PECVD), low-pressure CVD (LPCVD), plasma-assisted vapor deposition, epitaxial growth, or other suitable processes. A process for forming passivation layers acting as planarization layers generally includes a chemical mechanical polishing (CMP) process. A process for forming conductive vias generally includes forming vias in the passivation layer and filling the vias with conductive materials. A process for forming conductive lines generally includes photolithography, exposure and development, etching, other suitable processes, or combinations thereof.

[0093] Referring to FIG. 16, a substrate (102) is provided. Nitride-based semiconductor layers (104, 106) can be formed sequentially on the substrate (102) using the aforementioned deposition techniques. A two-dimensional electron gas (2DEG) region is formed adjacent to the heterojunction interface between the first nitride-based semiconductor layer (104) and the second nitride-based semiconductor layer (106).

[0094] In some embodiments, the 2DEG region may also be patterned by injection to form one or more resistance structures (180) as shown in FIG. 17a.

[0095] Referring to FIG. 16b, a blanket p-type doped III-V compound semiconductor layer (111) and a blanket gate metal layer (113) can be formed sequentially on a nitride-based semiconductor layer (106) using the aforementioned deposition techniques.

[0096] Referring to FIG. 16c, a blanket p-type doped III-V compound semiconductor layer (111) and a blanket gate metal layer (113) are patterned to form a plurality of gate structures (110) on a nitride-based semiconductor layer (106). Each of the gate structures (110) includes a p-type doped III-V compound semiconductor layer (112) and a gate metal layer (114). Then, a passivation layer (124) can be formed to cover the gate structures (110) using the aforementioned deposition techniques.

[0097] In some embodiments, the blanket gate metal layer (113) may also be patterned to form one or more resistor structures (180) as shown in FIG. 17b in the same step of forming the gate structure (110).

[0098] Referring to FIG. 16d, some S / D regions (160) are formed by removing parts of the passivation layer (124). At least a part of the nitride semiconductor layer (106) is exposed from the S / D regions (160). A blanket conductive layer (115) is formed to cover the nitride semiconductor layer (106) and the passivation layer (124) and to fill the S / D regions (160), thereby coming into contact with the nitride semiconductor layer (106).

[0099] Referring to FIG. 16e, S / D electrodes (116) are formed by patterning the blanket conductive layer (115). Parts of the blanket conductive layer (115) are removed, and the remaining parts of the blanket conductive layer (115) within the S / D regions (160) remain to function as S / D electrodes (116). Then, a passivation layer (126) can be formed on the passivation layer (124) to cover the S / D electrodes (116) using the aforementioned deposition techniques.

[0100] In some embodiments, the blanket conductive layer (115) may also be patterned to form one or more resistive structures (180) as shown in FIG. 17c in the same step of forming the S / D electrodes (116).

[0101] Referring to FIG. 16f, conductive vias (132) are formed to penetrate the passivation layers (126, 124). A blanket conductive layer (141) is deposited on the passivation layer (126) using the aforementioned deposition techniques.

[0102] Referring to FIG. 16g, a blanket conductive layer (141) is patterned from conductive lines (142) on a passivation layer (126) and electrically coupled to conductive vias (132). Then, a passivation layer (128) is formed on the passivation layer (126) so as to cover the conductive lines (142) using the aforementioned deposition techniques.

[0103] In some embodiments, the blanket conductive layer (141) may also be patterned to form one or more resistive structures (180) in the same step of forming conductive lines (142) as shown in FIG. 17d.

[0104] Referring to FIG. 16h, conductive vias (136) are formed in the passivation layer (128). A blanket conductive layer (145) is deposited on the passivation layer (128) using the aforementioned deposition techniques.

[0105] Referring to FIG. 16i, a blanket conductive layer (145) is patterned to form conductive lines (146) on a passivation layer (128) and electrically coupled with conductive vias (136). Then, a protective layer (154) is formed on the passivation layer (128) so as to cover the conductive lines (146) using the aforementioned deposition techniques.

[0106] In some embodiments, the blanket conductive layer (145) may also be patterned to form one or more resistive structures (180) in the same step of forming conductive lines (146) as shown in FIG. 17e.

[0107] Referring to FIG. 16j, the protective layer (154) may be patterned to form one or more openings to expose one or more conductive pads (170).

[0108] The method for manufacturing a nitride-based IC chip integrated with a circuit (100C / 100D / 100E / 100F) is similar to the method for manufacturing a nitride-based IC chip integrated with a circuit (100A / 100B), except that in the step shown in FIG. 16h, a plurality of TGVs (162) may be formed to extend from the upper surface of the passivation layer (128) and penetrate the substrate (102) before depositing the blanket conductive layer (145) (as shown in FIG. 18).

[0109] Embodiments of the present invention have been selected and described to best illustrate the principles of the invention and its practical application, and accordingly, those skilled in the art will understand the invention with respect to various embodiments and various modifications suitable for the specific application being considered. Although the methods described herein have been described with reference to specific operations performed in a specific order, it will be understood that such operations may be combined, subdivided, or rearranged to form equivalent methods without departing from the teachings of the invention. Therefore, unless specifically stated in this specification, the order of operations and groupings are not limited. Although the devices described herein have been described with reference to specific structures, shapes, materials, compositions of materials, and interrelationships, etc., such descriptions and examples are not limited. Modifications may be made to adapt specific situations to the purpose, spirit, and scope of the description in this specification. All such modifications are intended to be within the scope of the claims appended herein. Explanation of the symbols

[0110] 1: Battery Management System 10: Battery Protection Controller 12: Battery 14: Charger 16: Load 100: Bidirectional switching device 102: Substrate 106: Nitride-based semiconductor layer 110: Gate structure 112: Gate semiconductor layer 113: Metal layer 114: Gate electrode 115: Conductive layering 116: Source / drain (S / D) electrodes 124, 126, 128: Passivation layer 132, 136: Conductive via 142, 146: Conductive lines 160: Source / Drain (S / D) area 162: Through-gallium via (TGV) 170: Conductive pad 180: Resistance structure

Claims

Claim 1 A nitride-based bidirectional switching device for operating as a battery protection controller having a power input terminal, a discharge overcurrent protection (DO) terminal, a charge overcurrent protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal, wherein the nitride-based bidirectional switching device comprises: a first control terminal configured to be electrically connected to the DO terminal of the controller and a second control terminal configured to be electrically connected to the CO terminal of the controller; a first conduction terminal configured to be electrically connected to the ground terminal of the controller and a second conduction terminal configured to be electrically connected to the VM terminal of the controller through a voltage monitoring resistor; and a main switching element having a control electrode, a first conduction electrode connected to the first conduction terminal, and a second conduction electrode connected to the second conduction terminal. and an adaptation module configured to receive a DO signal and a CO signal from the first and second control terminals, respectively, and to generate a main control signal at the control electrode of the main switching element to control the main switching element; wherein the adaptation module comprises: a first voltage-clamping element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to a first interconnection node; a second voltage-clamping element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first interconnection node; a first auxiliary switching element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first interconnection node, and a second conductive electrode connected to the second interconnection node; and a second auxiliary switching element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second interconnection node, and a second conductive electrode connected to the control electrode of the main switching element.A nitride-based bidirectional switching device comprising: a first resistive element having a first electrode electrically connected to a control electrode of the main switching element and a second electrode electrically connected to a first conductive terminal; Claim 2 A nitride-based bidirectional switching device according to claim 1, wherein when a positive high-level voltage is applied to the first control terminal and a positive high-level voltage is applied to the second control terminal, the main switching element is turned on to allow charging or discharging of a battery. Claim 3 A nitride-based bidirectional switching device according to claim 1, wherein when a low-level voltage is applied to the first control terminal and a positive high-level voltage is applied to the second control terminal, the main switching element is turned off to protect the battery from over-discharge or short circuit. Claim 4 A nitride-based bidirectional switching device according to claim 1, wherein when a positive high-level voltage is applied to the first control terminal and a negative high-level voltage is applied to the second control terminal, the main switching element is turned off to protect the battery from overcharging. Claim 5 A nitride-based bidirectional switching device according to claim 1, wherein the main switching element is a first nitride-based transistor having a gate acting as a control electrode of the main switching element, a drain acting as a first conduction electrode of the main switching element, and a source acting as a second conduction electrode of the main switching element. Claim 6 In claim 5, the first nitride-based transistor is an AlGaN / GaN enhancement-mode (E-mode) high electron mobility transistor (HEMT), a nitride-based bidirectional switching device. Claim 7 A nitride-based bidirectional switching device according to claim 1, wherein the first voltage-clamping element is a second nitride-based transistor having a gate and a source connected together to act as the positive electrode of the first voltage-clamping element and a drain configured to act as the negative electrode of the first voltage-clamping element; and the second voltage-clamping element is a third nitride-based transistor having a gate and a source connected together to act as the positive electrode of the second voltage-clamping element and a drain configured to act as the negative electrode of the second voltage-clamping element. Claim 8 A nitride-based bidirectional switching device according to claim 1, wherein the first auxiliary switching element is a fourth nitride-based transistor having a gate acting as a control electrode of the first auxiliary switching element, a drain acting as a first conduction electrode of the first auxiliary switching element, and a source acting as a second conduction electrode of the first auxiliary switching element; and the second auxiliary switching element is a fifth nitride-based transistor having a gate acting as a control electrode of the second auxiliary switching element, a drain acting as a first conduction electrode of the second auxiliary switching element, and a source acting as a second conduction electrode of the second auxiliary switching element. Claim 9 A nitride-based bidirectional switching device according to claim 1, wherein the first resistor element is a resistor. Claim 10 A nitride-based bidirectional switching device according to claim 1, wherein the adaptation module further comprises a third voltage-clamping element having a positive electrode electrically connected to the control electrode of the main switching element and a negative electrode electrically connected to the second control terminal. Claim 11 A nitride-based bidirectional switching device according to claim 10, wherein the third voltage-clamping element is a sixth nitride-based transistor having a gate and a source connected together to act as the positive electrode of the third voltage-clamping element and a drain configured to act as the negative electrode of the third voltage-clamping element. Claim 12 In claim 1, the main switching element and the adaptive module are integrated into a nitride-based bidirectional switching device, wherein the main switching element and the adaptive module are integrated into a nitride-based integrated circuit (IC) chip. Claim 13 In claim 12, the nitride-based IC chip comprises: a first nitride-based semiconductor layer disposed on a substrate; a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than the bandgap of the first nitride-based semiconductor layer; one or more gate structures formed by patterning a gate semiconductor layer disposed on the second nitride-based semiconductor layer and patterning a gate metal layer disposed on the gate semiconductor layer; a first passivation layer disposed on the second nitride-based semiconductor layer and covering the gate structures; one or more source / drain (S / D) electrodes formed by patterning an S / D electrode layer disposed on the first passivation layer and penetrating through the first passivation layer in contact with the second nitride-based semiconductor layer; a second passivation layer disposed on the first passivation layer and covering the S / D electrodes; and one or more first conductive elements disposed within the second passivation layer. A nitride-based bidirectional switching device comprising: a via; a first conductive layer disposed on the second passivation layer and patterned to form one or more first conductive lines; a third passivation layer disposed on the first conductive layer and covering the one or more first conductive layers; one or more second conductive vias disposed within the third passivation layer; a second conductive layer disposed on the third passivation layer and patterned to form one or more second conductive lines; and a protective layer disposed on the second conductive layer and having one or more openings to expose one or more conductive pads. Claim 14 A nitride-based bidirectional switching device according to claim 13, wherein the nitride-based IC chip further comprises one or more resistance structures formed by patterning a two-dimensional electron gas region adjacent to a heterojunction interface between the first and second nitride-based semiconductor layers. Claim 15 A method for manufacturing a nitride-based bidirectional switching device for operating as a battery protection controller having a power input terminal, a discharge overcurrent protection (DO) terminal, a charge overcurrent protection (CO) node, a voltage monitoring (VM) terminal, and a ground terminal, comprising: configuring a first control terminal for electrically connecting to the DO terminal of the controller and a second control terminal for electrically connecting to the CO terminal of the controller; configuring a first conduction terminal for electrically connecting to the ground terminal of the controller and a second conduction terminal for electrically connecting to the VM terminal of the controller through a voltage monitoring register; and forming a main switching element having a control electrode, a first conduction electrode connected to the first conduction terminal, and a second conduction electrode connected to the second conduction terminal. The method comprises the step of configuring an adaptive module for controlling a main switching element by receiving a DO signal and a CO signal from the first and second control terminals, respectively, and generating a main control signal at the control electrode of the main switching element; wherein the adaptive module comprises: the step of forming a first voltage-clamping element having a positive electrode electrically connected to the first control terminal and a negative electrode electrically connected to the first wiring node; the step of forming a second voltage-clamping element having a positive electrode electrically connected to the second control terminal and a negative electrode electrically connected to the first wiring node; the step of forming a first auxiliary switching element having a control electrode electrically connected to the first control terminal, a first conductive electrode connected to the first wiring node, and a second conductive electrode connected to the second wiring node; and the step of forming a second auxiliary switching element having a control electrode electrically connected to the second control terminal, a first conductive electrode connected to the second wiring node, and a second conductive electrode connected to the control electrode of the main switching element.A method for manufacturing a nitride-based bidirectional switching device, comprising the step of forming a first resistor element having a first electrode electrically connected to a control electrode of the main switching element and a second electrode electrically connected to a first conductive terminal. Claim 16 A method for manufacturing a nitride-based bidirectional switching device according to claim 15, wherein the adaptation module further comprises the step of forming a third voltage-clamping element having a positive electrode electrically connected to the control electrode of the main switching element and a negative electrode electrically connected to the second control terminal. Claim 17 In claim 15, the method further comprises the step of integrating the main switching element and the adaptation module into an integrated circuit (IC) chip by the following steps, wherein the following steps are: a step of placing a first nitride-based semiconductor layer on a substrate; a step of placing a second nitride-based semiconductor layer on the first nitride-based semiconductor layer having a bandgap larger than the bandgap of the first nitride-based semiconductor layer; a step of placing a gate semiconductor layer on the second nitride-based semiconductor layer and placing a gate metal layer on the gate semiconductor layer and patterning the gate semiconductor layer and the gate metal layer to form one or more gate structures; a step of placing a first passivation layer on the second nitride-based semiconductor layer to cover the gate structures and patterning the first passivation layer to form one or more source / drain (S / D) regions; a step of placing an S / D electrode layer to cover the first passivation layer and the one or more S / D regions and patterning the S / D electrode layer to contact the first nitride-based semiconductor layer A step of forming one or more S / D electrodes penetrating through a passivation layer; a step of placing a second passivation layer on the first passivation layer to cover the S / D electrodes; a step of placing a first conductive layer on the second passivation layer and patterning the first conductive layer to form one or more first conductive lines; a step of placing a third passivation layer on the first conductive layer to cover the one or more first conductive lines; a step of placing a second conductive layer on the third passivation layer and patterning the second conductive layer to form one or more second conductive lines;A method for manufacturing a nitride-based bidirectional switching device, comprising the step of: placing a protective layer on the second conductive layer, patterning the protective layer, and forming one or more openings to expose one or more conductive pads to function as the first control terminal, the second control terminal, the first conductive terminal, and the second conductive terminal, respectively. Claim 18 A method for manufacturing a nitride-based bidirectional switching device according to claim 17, wherein the integration of the main switching element and the adaptive module into the IC chip further comprises the step of forming one or more resistance structures by patterning a two-dimensional electron gas region adjacent to a heterojunction interface between the first nitride-based semiconductor layer. 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