Electrostatic puck and manufacturing method

Abstract

A method for fabricating an electrostatic puck is provided, the method comprising: forming at least one trench in a lower substrate; depositing an electrode material on the lower substrate and in the at least one trench; forming an electrode by removing excess electrode material from the lower substrate, leaving electrode material in the at least one trench; and forming a dielectric layer on the electrode and the lower substrate such that the electrode is positioned between the lower substrate and the upper substrate. The step of forming the at least one trench in the lower substrate comprises forming at least one standoff portion adjacent to the at least one trench, wherein the at least one standoff portion reduces dishing of the electrode material while removing excess electrode material from the lower substrate.

Description

Technology Field

[0001] [Cross-reference of related applications]

[0002] The present invention carries a claim of priority to U.S. Patent Application No. 16 / 565,054, filed on September 9, 2019, titled "Electrostatic puck and Method of Manufacture," the contents of which are incorporated herein by reference in their entirety.

[0003] [Technology Field]

[0004] The present invention relates to an electrostatic puck used in a semiconductor process, and more generally to a ceramic puck having an internal electrode. Background Technology

[0005] The contents of this section are provided merely as background technology regarding the present invention and may not constitute prior art.

[0006] Typically, an electrostatic chuck (sometimes referred to herein as an "E-chuck") is used as a clamping surface to electrostatically secure a semiconductor wafer during a deposition or etching process. The electrostatic chuck may include an electrostatic puck (sometimes referred to herein as an "E-puck"), which comprises a sintered ceramic structure having an electrode embedded between two ceramic plate members, and a conductive path formed from the electrode through the ceramic plate members. During operation, a potential, for example, between 300 and 12,000 volts, is applied to the conductive path through a terminal lead, thereby activating the electrode of the electrostatic puck. Upon activation, an electrostatic force is generated between the electrode embedded inside the electrostatic puck and an external electrode, for example, a semiconductor wafer.

[0007] One method for manufacturing an electrostatic puck having embedded electrodes comprises: forming a first layer of green ceramic material; screen printing a film electrode on the first layer; depositing a second layer of green ceramic material on the screen-printed electrode; and sintering the resulting ceramic structure. However, an electrostatic puck produced by this manufacturing method may have fluctuations or non-uniformities in the thickness of the second layer, as well as very small cracks and holes, which may adversely affect the performance of the electrostatic puck in electrostatically fixing a substrate to the surface of the electrostatic puck. Additionally, non-uniformities in the electrode thickness may adversely affect the electrostatic force between the electrode embedded inside the electrostatic puck and the semiconductor wafer. Furthermore, the sintering process may alter the properties of the ceramic material or affect the power density (Watts / °K), which may cause non-uniformities in the thermal profile of the electrostatic puck during operation. The problem to be solved

[0008] The present invention aims to improve the above-mentioned issues among other issues related to forming a ceramic component having an embedded electrical component when forming an electrostatic puck. means of solving the problem

[0009] This section provides a general summary of the invention and does not describe all or the entire scope of the features of the invention in detail.

[0010] A method for fabricating an electrostatic puck provided in one embodiment of the present invention comprises: forming at least one trench within the upper surface of a lower substrate; depositing electrode material on the upper surface of the lower substrate and within the at least one trench; forming an electrode by removing excess electrode material from the lower substrate, leaving electrode material within the at least one trench of the substrate; and fixing the upper substrate to the lower substrate without hot-pressing. The electrode is flat and lies coplanar with the outer surface of the upper substrate, so that the electrode lies coplanar with and is flat with the semiconductor wafer to which the electrode is electrostatically attached to the electrostatic puck. In one variant of the present invention, the excess electrode material is removed, among other things, by processes such as chemical-mechanical planarization / polishing (CMP), etching, and polishing. In at least one variant, the at least one trench includes at least one standoff portion therein.

[0011] In at least one embodiment, the step of fixing the upper substrate to the lower substrate comprises bonding the upper substrate to the lower substrate such that a bond area is formed by bonding, wherein the bond area is indented in a recessed shape from the lower surface of the upper substrate. In at least one variant, the bonding comprises, among other things, a layered process selected from a thick film, a thin film, a thermal spray, and a sol-gel. In one variant, the layered process is a thermal spray.

[0012] In at least one embodiment, the method comprises forming a mesas on the outer surface of an upper substrate. In at least one variant, the method comprises depositing an yttria layer on the outer surface of the upper substrate layer.

[0013] In at least one form, the above-mentioned trench is formed by processes such as a laser removal process, a bead blasting process, machining, 3D sintering / printing / additive manufacturing, green state, molding, water jet, hybrid laser / water, and dry plasma etching.

[0014] In at least one embodiment, the electrode material is deposited within the at least one trench and on the substrate by layering processes such as thick film, thin film, thermal spray, and sol-gel, among others. Additionally or alternatively, the electrode material is deposited by melting a metal foil within the at least one trench.

[0015] In at least one form, the lower substrate is, among other things, a ceramic such as aluminum nitride and aluminum oxide, and the resistive material is, among other things, a material such as titanium, molybdenum, tungsten, nickel, aluminum, and alloys thereof.

[0016] In another embodiment of the present invention, a method for manufacturing an electrostatic puck comprises: forming a plurality of trenches in a substrate in which a plurality of standoff portions are formed inside; depositing an electrode material on the substrate and in the plurality of trenches; forming an electrode by removing excess electrode material from the substrate and leaving electrode material in the plurality of trenches; and fixing an upper substrate to a lower substrate without hot-pressing.

[0017] In at least one embodiment, the upper substrate is fixed to the lower substrate by joining the upper substrate to the lower substrate, and a joining portion is formed by the joining, and the joining portion forms a recess on the lower surface of the upper substrate. That is, in at least one variant, a joining portion is formed by joining the upper substrate to the lower substrate, and the joining portion forms a recess on the lower surface of the upper substrate.

[0018] In at least one embodiment, the upper substrate is fixed to the lower substrate by depositing material using a thermal spray process. In at least one variant, a portion of the upper substrate is removed after the material is deposited.

[0019] Additional applications will be clearly understood from the description herein. It should be understood that the description and specific embodiments herein are intended merely for illustrative purposes and are not intended to limit the scope of the invention. Brief explanation of the drawing

[0020] The present invention will be more clearly understood from the various embodiments presented as examples with reference to the attached drawings below. FIG. 1 shows a cross-sectional view of an electrostatic chuck equipped with an electrostatic puck manufactured according to the present invention. FIG. 2 illustrates a series of steps for a method of manufacturing an electrostatic puck according to the present invention, wherein FIG. 2a is a cross-sectional view of a lower substrate, FIG. 2b shows the lower substrate of FIG. 2a having a trench, FIG. 2c shows the lower substrate of FIG. 2b having an electrode material layer deposited in the trench on the outer surface of the lower substrate, FIG. 2d shows the electrode material layer removed from the outer surface of the lower substrate in FIG. 2c, FIG. 2e shows the upper substrate deposited on the outer surface of the lower substrate and at least one electrode element in the lower substrate of FIG. 2d, FIG. 2f shows the upper substrate thinned and smoothed to form an electrostatic puck in the lower substrate of FIG. 2e, FIG. 2g shows the lower substrate of the lower substrate in FIG. 2d FIG. 2H shows a dielectric plate bonded to an outer surface and at least one electrode element, FIG. 2H shows the dielectric plate being thinned and smoothed to form a ceramic substrate for an electrostatic puck on the lower substrate of FIG. 2G, FIG. 2I shows a mesas formed on the outer surface of the electrostatic puck of FIG. 2F and the electrostatic puck of FIG. 2H, and FIG. 2J shows an enlarged view of the 2J portion of FIG. 2I. FIG. 3 shows a plan view of a ceramic substrate having trenches filled with electrode material and standoff features between the trenches according to the present invention. FIG. 4 shows a perspective view of a ceramic substrate according to the present invention, showing a mesas extending from the outer substrate of the ceramic substrate. The drawings herein are for illustrative purposes only and are not intended to limit the scope of the invention in any way. Specific details for implementing the invention

[0021] The following description is by nature merely illustrative and is not intended to limit the invention, its applications, or uses. It should be understood that corresponding reference numerals in the drawings refer to similar or corresponding parts and features. The embodiments are provided to fully inform those skilled in the art of the scope of the invention. Various specific details, such as specific components, types of apparatus, and methods, are provided for understanding variations of the invention. Those skilled in the art will understand that specific details are not necessarily required to be adopted, and that the embodiments provided herein encompass alternative embodiments and are not intended to limit the scope of the invention. In some embodiments, well-known processes, well-known apparatus structures, and well-known technologies are not described in detail.

[0022] FIG. 1 illustrates an electrostatic chuck (10) having an electrostatic puck (100) manufactured according to the present invention. In one form, the electrostatic chuck (10) comprises an electrostatic puck (100), a heater (130), and a cooling plate (150). The heater (130) is bonded to the electrostatic puck (100) by a bonding layer (132), and the cooling plate (150) is bonded to the heater (130) by a bonding layer (154). The heater (130) includes a heating layer (132) for generating heat transferred to a semiconductor wafer (W) that is electrostatically maintained in the electrostatic chuck (10) by the electrostatic puck (100). Additionally, the cooling plate (150) may include at least one cooling channel (not shown) for releasing heat from the heater (130). As illustrated, the electrostatic chuck (10) is used as part of a support pedestal in a semiconductor process. However, it should be understood that the electrostatic puck (100) may be adopted in other applications as long as it falls within the scope of the present invention.

[0023] The electrostatic puck (100) comprises a ceramic substrate (110) having a first surface (112) (also referred to as the “upper surface”) on which a wafer (W) is placed and a lower surface (114) that is bonded to a heater (130). An electrode layer (124) having at least one electrode element (125) (also referred to simply as the “electrode”) is embedded within the ceramic substrate (110). To form a support base, a tubular shaft (not shown) is bonded to the lower surface (152) of a cooling plate (150) and surrounds wires connected to the bonding layer (132) and at least one electrode element (125). When operating, the wafer (W) is placed on the upper surface (112) of the ceramic substrate (110) and is maintained in a desired position by an electrostatic force generated between the wafer (W) and at least one electrode element (125) embedded within the ceramic substrate (110).

[0024] Referring to FIGS. 2a to 2f, a method for manufacturing an electrostatic puck (100) is illustrated therein.

[0025] As illustrated in FIG. 2a, the method provides a ceramic plate member (110') (also referred to herein as a "lower substrate") by means of an upper surface (113) located opposite the lower surface (114) in step (202). Non-limiting examples of the lower substrate (110') include, among others, aluminum nitride substrates and aluminum oxide substrates.

[0026] As illustrated in FIG. 2b, in step (204), at least one trench (116) is formed on the upper surface (113) of the lower substrate (110'). That is, at least one trench (116) extends from the upper surface (113) toward the lower surface (114) (in the -z direction). By forming each trench (116), a pair of adjacent standoff portions or step portions (115) are created. It should be understood that at least one trench (116) may be formed using any known material removal technique or a material removal technique not yet developed. Non-limiting examples of material removal techniques include, among others, grinding, laser cutting, etching, machining, photolithography, laser cutting, etching, and sand or grit blasting. Additionally, it should be understood that in at least one variant of the present invention, the standoff portions (115) are within at least one trench (116). For example, in one variant, the at least one trench (116) shown in FIG. 2b is a single trench (116), and the standoff portions (115) are within the trench (116).

[0027] As illustrated in FIG. 2c, in step (206), electrode material (120) is deposited on the upper surface (113) and standoff portions (115) of the lower substrate (110') and in at least one trench (116) to form an electrode material layer (122). Non-limiting examples of electrode materials include, among others, titanium, molybdenum, tungsten, nickel, aluminum, and alloys thereof. It should be understood that the electrode material layer (122) and other layers disclosed herein may be deposited using any known material layer deposition technique or a material layer deposition technique not yet developed. Non-limiting examples of material layer deposition techniques include, among others, cathodic arc discharge, cold spray, chemical vapor deposition (CVD) techniques, physical vapor deposition (PVD) techniques, sputtering, and vacuum plasma spray. Additional non-limiting examples of material layer deposition techniques include layered processes such as thick films, thin films, thermal spray, and sol-gel. In one variation, the electrode material layer (122) is deposited using a thermal spray.

[0028] As illustrated in FIG. 2d, at least a portion or thickness portion (z-direction) (i.e., excess electrode material (120)) of the electrode material layer (122) deposited on or extending over the standoff portion (115) in step (208) is removed. In some embodiments, the electrode material layer (122) is substantially removed from the standoff portions (115). However, as illustrated in the figure, the electrode material (120) remains within at least one trench (116) to form the at least one electrode element (125). It should be understood that the electrode material layer (122) and other layers disclosed herein may be removed using any known or yet-to-be-developed layer removal technique. Non-limiting examples of layer removal techniques include, among others, lapping, polishing, and chemical mechanical polishing (CMP). Additionally, the standoff portions (115) prevent or reduce dishing of the electrode material (120) within the at least one lower surface (114) during the removal of excess electrode material (120), thereby producing a smooth and flat electrode element (125) (in the xy plane). The term “disshing” as used herein refers to overpolishing or removal within a trench (e.g., in the z-direction in the drawings) where the outer surface of the electrode is not provided flat. In at least one variation of the invention, the electrode (125) is flat within approximately 5 μm, e.g., 2 μm, with respect to a planar surface extending parallel to the upper surface (113).

[0029] As illustrated in FIGS. 2e and 2f, in at least one embodiment of the present invention, a dielectric layer (118) (also referred to herein as an "upper substrate") is formed by depositing a dielectric material (117) on a lower substrate (110') as illustrated in FIGS. 2e and 2f. Specifically, in step (210) (FIG. 2e), the dielectric material (117) is deposited on at least one electrode element (125) and adjacent standoff portions (115) to form a precursor upper substrate (118'). Then, the precursor upper substrate (118') is thinned and smoothed to form an upper substrate (118), and in step (212) (FIG. 2f), a ceramic substrate (110) having an upper surface (112) is produced. Accordingly, the upper substrate (118) is fixed to the lower substrate (110') without hot-pressing between the two substrates (110', 118), and the at least one electrode (125) is embedded within the ceramic substrate (110) as shown in FIG. 2f. In at least one variation, fixing the upper substrate (118) to the lower substrate (110') involves, among other things, depositing a dielectric material (117) using a layering process such as a thick film, a thin film, a thermal spray, and a sol-gel. As a non-limiting example of the thickness of the at least one electrode (125), the thickness is in the range of 5 μm to 125 μm, for example, between 10 μm and 50 μm. As a non-limiting example of the upper substrate (118), the thickness is in the range of 25 μm to 500 μm, for example, between 100 μm and 300 μm.

[0030] As illustrated in FIG. 2g and FIG. 2h, in at least another embodiment of the present invention, an upper substrate (118) (Fig. 2h) is formed by bonding a dielectric plate (111) onto a lower substrate (110'). Specifically, in step (214) (Fig. 2g), the dielectric plate (111) is bonded onto the at least one electrode (125) and / or adjacent standoff portions (115) to form a precursor upper substrate (111') in step (214) (Fig. 2g). Then, the precursor upper substrate (111') is thinned and smoothed to form an upper substrate (118), and in step (216) (Fig. 2h), a ceramic substrate (110) having an upper surface (112) is produced. In at least one variant, the upper substrate (118) is bonded to the lower substrate (110'), and a bonded portion (111b) is formed by this bonding. In one variant, the bonded portion (111b) is indented to form a recess (in the +z direction) from the lower surface (118') of the upper substrate (118). As a variant, the upper surface (113) of the lower substrate (110') and the lower surface (118') of the upper substrate (118) are bonded at a distance of approximately 5 μm from each other. Thus, the upper substrate (118) is fixed to the lower substrate (110') without hot-pressing the two substrates (110', 118) together, and the at least one electrode (125) is embedded within the ceramic substrate (110) as shown in FIG. 2h. The dielectric plate (111) may be bonded to the at least one electrode (125) and / or adjacent standoff portions (115) using known or undeveloped bonding techniques. Non-limiting examples of bonding techniques include, among others, adhesives, brazing, and transient liquid phase bonding.

[0031] In any embodiment of the present invention, the ceramic substrate (110) having at least one embedded electrode (125) as illustrated in FIG. 2f and / or 2h may be further processed as illustrated in FIG. 2i, so that mesas (112') are formed on or within the upper surface (112) of the ceramic substrate (110) (i.e., on the outer surface (+z direction) of the upper substrate (118). The term “mesas” as used herein refers to a ledge or step that provides a gap or space between the electrostatic puck (100) and the semiconductor wafer (W). Mesas may be formed on or within the upper surface (112) using the same material removal technique as described above. It should be understood that the mesas (112') provide a plurality of gaps or spaces (119) between the ceramic substrate (110) and the wafer (W).

[0032] Compared to the case where there is no gap (119) on the upper surface (112) of the electrostatic puck (100), removing the wafer (W) from the electrostatic puck (100) becomes easier and / or more convenient.

[0033] Referring to FIG. 2j, in some embodiments of the present invention, an upper surface (112) including a mesas (112') is coated with an oxide layer (160) so that chemical erosion of the upper surface (112) and / or the mesas (112') is reduced during semiconductor processing of the wafer (W). The oxide layer (160) can be deposited on the upper surface (112) (and the mesas (112')) of the upper substrate (118) using the same material layer deposition technique as described above, and the thickness of the oxide layer is a non-limiting range between approximately 500 nm and approximately 10 µm, for example between approximately 1 µm and approximately 10 µm, between approximately 2 µm and approximately 8 µm, and between approximately 3 µm and 7 µm. Non-limiting examples of oxides forming the oxide layer (160) include, among others, yttria, alumina, sapphire, silica, and SiC.

[0034] Referring to FIG. 3, a plan view of a ceramic substrate (110) is shown, comprising a plurality of electrodes (125) disposed within a plurality of trenches (no reference number) between a plurality of standoff features (115). As shown in FIG. 3, an electrode (125R) on the right side (+x direction) of the ceramic substrate (110) is isolated from an electrode (125L) on the left side (-x direction) of the ceramic substrate (110) by the standoff features (115R, 115L), thereby providing a bipolar electrode design having one of a negative electrode (125) and another positive electrode (125).

[0035] Referring to FIG. 4, a perspective view of a ceramic substrate (110) having a plurality of mesas (112') on an upper surface (112) is shown. The plurality of mesas (112') extend upward (+z direction) from the upper surface (112) and support a wafer attached to the upper substrate (118) in an electrostatic manner.

[0036] It should be understood that the present invention provides an electrostatic puck and a method for manufacturing an electrostatic puck. In the method of the present invention, trenches having adjacent standoff features are formed on a lower substrate, and electrode material is deposited in the trenches. Excess electrode material deposited on the standoff features is removed, and the standoff features prevent and / or reduce dishing of the electrode material within the trenches, thereby providing a flat outer surface of the electrode. An upper substrate is formed on the lower substrate and the electrode without hot-pressing, and the electrode is embedded within the electrostatic puck ceramic substrate. Thus, an electrode having a uniform thickness and a "flatness" of approximately 2 μm or less is provided embedded within the electrostatic puck ceramic substrate. It should be understood that due to the uniform thickness and flatness of the electrode, an improved (e.g., more uniform) electrostatic force is provided between the electrode embedded within the electrostatic puck and the wafer during the semiconductor process of the wafer.

[0037] Where it is stated that one component or layer is "on," "combined to," or "placed on" another component or layer, this may mean that it is directly placed, combined, connected, or placed on the other component or layer, and that there may be an interposed component or layer between them. In contrast, where it is stated that one component is "directly on," "directly combined to," or "directly placed on" another component or layer, there may be no interposed component or layer between them. Terms used to describe the compositional relationship between components (e.g., "directly between" as opposed to "between," "directly adjacent" as opposed to "adjacent," etc.) should be interpreted in a similar manner. Where the expression "and / or" is used herein, this means that one or more of the associated listed items are included individually and in all combinations.

[0038] Terms relating to relative space, such as "inside," "outside," "below," "above," "lower side," and "upper side," may be used for convenience of explanation to describe the relationship between one component or feature shown in the drawings and another component or feature. Terms relating to relative space may be intended to encompass various orientations of the device during use or operation in addition to the orientations shown in the drawings. For example, if the device is inverted, the component may have an orientation that is "above" the other component or feature, as it is "below" the other component or feature. Therefore, the exemplary term "below" herein may encompass both upper and lower orientations. The device may have other orientations (such as being rotated 90 degrees), and the descriptions relating to relative space provided herein should be interpreted accordingly.

[0039] The phrase “at least one of A, B, and C” written herein should be considered to mean [A or B or C] logically using the non-exclusive logical operator OR, and should not be considered to mean “at least one of the A’s,” “at least one of the B’s,” and “at least one of the C’s.”

[0040] Unless explicitly stated otherwise, all numerical values ​​representing mechanical / thermal properties, compositional percentages, dimensions, and / or tolerances, or other properties should be understood to imply "approximately" or "roughly" in defining the scope of the invention. Such an interpretation is desired for various reasons, including industrial practice, manufacturing technology, and testing capabilities.

[0041] The terms used herein are intended to describe only specific embodiments and are not intended to limit the invention. Components, etc., described in the singular form are intended to encompass plural components unless otherwise evident from the description. Terms such as "comprising" and "comprising" have a comprehensive meaning and specify the presence of the described features, integers, steps, operations, components, and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, components, parts, and / or groups thereof. The steps, processes, and operations of the method described herein should not be understood as necessarily being described or written in a specific order unless specified in the order of function. It should also be understood that additional or alternative steps may be adopted.

[0042] The description of the present invention is by nature merely illustrative, and examples that do not depart from the essence of the invention are intended to be within the scope of the invention. Such examples should not be considered as departing from the scope and spirit of the invention. The broad spirit of the invention may be embodied in various forms. Accordingly, although the invention includes specific examples, other variations will become apparent by carefully reading the drawings, the detailed description, and the claims, and the true scope of the invention is not limited to such examples.

Claims

Claim 1 A method for manufacturing an electrostatic puck configured to operate between 300 and 12,000 volts during semiconductor operation, wherein the electrostatic puck manufacturing method comprises: forming at least one trench within the upper surface of a lower substrate; depositing an electrode material on the upper surface of the lower substrate and within the at least one trench; forming an electrode by removing excess electrode material from the lower substrate and leaving electrode material within the at least one trench of the lower substrate; and fixing an upper substrate to the lower substrate without hot pressing, wherein the upper substrate is formed by depositing a ceramic material using a layered process; wherein the electrostatic puck is manufactured without hot pressing. Claim 2 A method for fabricating an electrostatic puck according to claim 1, wherein the excess electrode material is removed by a process selected from the group consisting of chemical-mechanical planarization / polishing (CMP), etching, and polishing. Claim 3 A method for manufacturing an electrostatic puck according to claim 1, wherein at least one standoff portion is further included within the at least one trench. Claim 4 A method for manufacturing an electrostatic puck according to claim 1, further comprising depositing an oxide layer on the upper surface of the lower substrate. Claim 5 A method for manufacturing an electrostatic puck according to claim 1, wherein the step of fixing an upper substrate to a lower substrate includes bonding the upper substrate to the lower substrate such that a bond area is formed by bonding, and the bond area is indented in a recessed shape from the lower surface of the upper substrate. Claim 6 A method for fabricating an electrostatic puck according to claim 1, wherein the step of fixing an upper substrate to a lower substrate comprises depositing a material using a layered process selected from the group consisting of a thick film, a thin film, a thermal spray, and a sol-gel. Claim 7 In claim 6, the above-mentioned layered process is a thermal spray, a method for manufacturing an electrostatic puck. Claim 8 In claim 1, the electrode is a flat electrostatic puck manufacturing method. Claim 9 A method for manufacturing an electrostatic puck according to claim 1, further comprising forming a mesas on the outer surface of the upper substrate. Claim 10 A method for manufacturing an electrostatic puck according to claim 9, further comprising depositing a yttria layer on the outer surface of the mesas and the upper substrate. Claim 11 A method for manufacturing an electrostatic puck according to claim 1, wherein at least one trench is formed by a process selected from the group consisting of a laser removal process, a bead blasting process, machining, 3D sintering / printing / additive manufacturing method, green state, molding, water jet, hybrid laser / water, and dry plasma etching. Claim 12 A method for manufacturing an electrostatic puck according to any one of claims 1 to 11, wherein the electrode material is deposited in the at least one trench and on the lower substrate by a layering process. Claim 13 In claim 12, the above layering process is a method for fabricating an electrostatic puck selected from the group consisting of thick films, thin films, thermal sprays, and sol-gels. Claim 14 A method for manufacturing an electrostatic puck according to claim 1, wherein the electrode material is deposited by melting a metal foil in at least one trench. Claim 15 A method for manufacturing an electrostatic puck according to claim 1, wherein the lower substrate is a ceramic selected from the group consisting of aluminum nitride and aluminum oxide, and the electrode material is selected from the group consisting of titanium, molybdenum, tungsten, nickel, aluminum, and alloys thereof.

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