Broadcasting method and system for field-programmable gate array accelerator cluster
By adopting a three-stage broadcasting method in a distributed field programmable gate array accelerator cluster network, combining sniffing, topology filling and formal broadcasting, the high delay and high energy consumption problems caused by routing link agnosticity are solved, and the low Delay and energy efficient directional broadcast.
Patent Information
- Application Number
- PCT/CN2024/081249
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-16
- Filing Date
- 2024-03-12
- Publication Date
- 2024-12-19
AI Technical Summary
In the traditional distributed field programmable gate array accelerator cluster network, because the traditional routing link is agnostic about the direct link between the field programmable gate array accelerators, it is easy to cause routing link blockage and ring broadcast during directional broadcasting. Storms lead to problems of high delay and high energy consumption.
Three-stage broadcasting method is adopted: the sniffing broadcasting stage uses the control server to sniff all nodes in the subnet, the topology filling stage uploads and records node information through direct links, and the official broadcasting stage uses direct broadcasting based on the sniffing results. The combination of links and routing links avoids ring broadcast storms and network blockage.
It effectively reduces directional broadcast delay, improves the utilization rate of communication links, avoids the problems of high delay and high energy consumption, and realizes energy consumption saving of communication links.
Smart Images

Figure CN2024081249_19122024_PF_FP_ABST
Abstract
Description
Broadcasting method and system for field programmable gate array accelerator cluster
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to Chinese patent application number 2023107219644, filed with the China Patent Office on June 16, 2023, entitled “Broadcasting Method and System for Field Programmable Gate Array Accelerator Clusters,” the entire contents of which are incorporated herein by reference. Technical Field
[0003] Embodiments of the present application relate to the field of communications, and in particular to a broadcasting method, system, non-volatile readable storage medium, and electronic device for a field programmable gate array accelerator cluster. Background Art
[0004] In traditional distributed FPGA accelerator cluster networks, traditional routing links are unaware of direct links between FPGA accelerators, leading to routing link congestion during directed broadcasts. When direct links are unavailable, repeated retransmissions can lead to high latency and energy consumption. Furthermore, even with direct links, ring broadcast storms can easily occur, resulting in high energy consumption and latency due to link congestion and repeated retransmissions.
[0005] Summary of the Invention
[0006] The purpose of the embodiments of the present application is to provide a field programmable gate array accelerator cluster and its broadcast method, broadcast system, non-volatile readable storage medium and electronic device, which can reduce the delay of directional broadcast.
[0007] To solve the above technical problems, an embodiment of the present application provides a broadcast method for a field programmable gate array accelerator cluster, comprising:
[0008] During the sniffing broadcast phase, the control server performs sniffing broadcasts on all nodes in the managed subnets through all communication links; the nodes include routers and field programmable gate array accelerators;
[0009] During the topology filling phase, the two FPGA accelerators that forwarded the sniff broadcast message via the direct link during the sniff broadcast phase are considered connected FPGAs, and information about the connected FPGA accelerators is uploaded to the router of the local subnet; the router of the local subnet records the information about the connected FPGA accelerators in the direct link table;
[0010] During the formal broadcast phase, the control server performs directional broadcasting to the target nodes it manages according to the broadcast requirements.
[0011] The control server performs sniffing broadcasts on all nodes in all subnets managed by the control server through all communication links, including:
[0012] After the direct link information between all field programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of the subnet to which it belongs, each node forwards the sniffing broadcast according to the forwarding rule during forwarding. The forwarding rule is to compare the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the perception phase to obtain a comparison result, which is used to guide the node whether to forward the sniffing broadcast.
[0013] Each node forwards the sniffing broadcast according to the forwarding rules, including:
[0014] When each node receives a sniff broadcast message, it records the arrival time of the sniff broadcast message and records it in the broadcast statistics table maintained by itself;
[0015] Parse and sniff broadcast messages to obtain broadcast field values;
[0016] Compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;
[0017] If the broadcast field value is found in the broadcast statistics table, the forwarding of the sniffed broadcast message is stopped;
[0018] When it is determined that the broadcast field value does not exist in the broadcast statistics table, the broadcast field value is recorded in the broadcast statistics table, and the sniffed broadcast message is forwarded to other nodes in the directional broadcast subnet domain.
[0019] The nodes that forward the sniffing broadcast message to other nodes in the directed broadcast subnet include:
[0020] If the node is a router, it forwards the sniffed broadcast message to other nodes within the directed broadcast subnet except the previous hop node.
[0021] The nodes that forward the sniffing broadcast message to other nodes in the directed broadcast subnet include:
[0022] If the node is a field programmable gate array accelerator, when the previous node is a field programmable gate array accelerator, the sniffed broadcast message is uploaded to the router of the subnet to which it belongs through the routing link;
[0023] When the previous hop node is a router of the subnet, it is determined whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link;
[0024] If there is a direct link and the connected FPGA accelerator is within the directed broadcast subnet, the sniffed broadcast message is forwarded;
[0025] If there is no direct link, or if there is a direct link but the connected FPGA accelerator is not within the range of the directed broadcast subnet, stop forwarding the sniffing broadcast message.
[0026] Among them, also include:
[0027] During the sniffing broadcast phase, all nodes except the control server forward the sniffing broadcast according to the forwarding rules.
[0028] When the control server performs a directed broadcast to the target node under management according to the broadcast demand, the control server also includes:
[0029] The node records the broadcast reception time of the directed broadcast message, parses the Internet Protocol address of the broadcast source of the directed broadcast message, and updates the reception time to the broadcast statistics table maintained by itself;
[0030] According to the sniffing broadcast start time of the sniffing broadcast phase and the Internet Protocol address, the broadcast statistics table during the sniffing broadcast phase is searched to obtain the broadcast end time;
[0031] Determine the broadcast message transmission delay based on the broadcast end time;
[0032] Determine the current broadcast message transmission delay of the current node in the formal broadcast phase according to the broadcast start time and broadcast end time;
[0033] If the broadcast message transmission delay is greater than the current broadcast message transmission delay, the broadcast message will not be forwarded;
[0034] If the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay, continue to forward the broadcast message.
[0035] Among them, if the broadcast statistics table of the sniffing broadcast stage is queried based on the sniffing broadcast start time and the Internet Protocol address during the sniffing broadcast stage, the broadcast end time cannot be queried. It also includes:
[0036] It is determined that a link anomaly occurs on the node during the sniffing broadcast phase, and the Internet Protocol address, the directed broadcast start time, and the directed broadcast reception time are stored in a broadcast statistics table.
[0037] After the control server sniffs and broadcasts the nodes in all subnets it manages through all communication links, the control server also includes:
[0038] Determine the shortest broadcast delay corresponding to each node.
[0039] Among them, also include:
[0040] Each node generates and maintains its own broadcast statistics table; the broadcast statistics table contains the Internet Protocol address of the broadcast source, the broadcast start time, and the broadcast arrival time.
[0041] Among them, also include:
[0042] The router of the local subnet generates a direct link table; the direct link table includes the local FPGA accelerator Internet Protocol address and the directly connected FPGA accelerator Internet Protocol address.
[0043] The formal broadcasting phase also includes:
[0044] The formal broadcast forwarding rule is set. The formal broadcast forwarding rule is that when the control server performs a directed broadcast, in addition to all nodes in the target directed subnet, the forwarding router and the field programmable gate array accelerator under the forwarding router that has a direct link with the field programmable gate array accelerator in the directed subnet can also participate in the forwarding of the directed broadcast.
[0045] If the broadcast message transmission delay is greater than the current broadcast message transmission delay, the following further includes:
[0046] It is determined that the broadcast message received by the current node at the broadcast arrival time originates from a communication link that takes a long time.
[0047] If the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay, the following further includes:
[0048] Update the broadcast end time in the broadcast statistics table to the broadcast arrival time.
[0049] Among them, also include:
[0050] After the formal broadcast phase ends, each node clears its own broadcast statistics table, and the router clears its own direct link table.
[0051] Before sniffing the broadcast phase, it also includes:
[0052] Build a FPGA accelerator cluster consisting of a control server, a router, and FPGA accelerators;
[0053] Among them, routing links are set between the control server, router and field programmable gate array accelerator, and direct links are set between the field programmable gate array accelerators belonging to different routers; the control server is configured to manage the field programmable gate array accelerator cluster; the field programmable gate array accelerator is configured to perform network communication and application computing.
[0054] Among them, the field programmable gate array accelerator includes:
[0055] The communication sub-core is configured for network communication, the calculation sub-core is configured for application calculation, and the control sub-core is configured for logic control.
[0056] The present application also provides a broadcast system for a field programmable gate array accelerator cluster, including:
[0057] The sniffing broadcast module is configured to control the server to perform sniffing broadcasts on nodes in all managed subnets through all communication links during the sniffing broadcast phase; the nodes include routers and field programmable gate array accelerators;
[0058] The topology filling module is configured to, during the topology filling phase, identify two field programmable gate array accelerators that forwarded sniff broadcast messages via direct links during the sniff broadcast phase as connected field programmable gate arrays, and upload information about the connected field programmable gate array accelerators to a router of a local subnet; the router of the local subnet records the information about the connected field programmable gate array accelerators in a direct link table;
[0059] The formal broadcast module is configured to control the server to perform directional broadcasting to the managed target nodes according to broadcast requirements during the formal broadcast phase.
[0060] Among them, the sniffing broadcast module includes:
[0061] The forwarding submodule is configured to forward the sniffing broadcast according to the forwarding rules after the direct link information between all field programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of the subnet to which it belongs. The forwarding rule is to compare the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the perception phase to obtain a comparison result, which is used to guide the node whether to forward the sniffing broadcast.
[0062] The forwarding submodule includes:
[0063] The recording unit is configured to record the arrival time of the sniffing broadcast message when each node receives the sniffing broadcast message, and record it in the broadcast statistics table maintained by itself;
[0064] A parsing unit is configured to parse the sniffed broadcast message and obtain a broadcast field value;
[0065] A judgment unit is configured to compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;
[0066] The stop forwarding unit is configured to stop forwarding the sniffed broadcast message if the broadcast field value exists in the broadcast statistics table;
[0067] The forwarding unit is configured to record the broadcast field value in the broadcast statistics table if the broadcast field value does not exist in the broadcast statistics table, and forward the sniffed broadcast message to other nodes in the directed broadcast subnet domain.
[0068] The forwarding unit includes:
[0069] The first forwarding subunit is configured to forward the sniffed broadcast message to other nodes within the range of the directed broadcast subnet except the previous hop node if the node is a router.
[0070] The forwarding unit includes:
[0071] The upload subunit is configured to upload the sniffed broadcast message to the router of the subnet through the routing link if the node is a field programmable gate array accelerator and the previous node is a field programmable gate array accelerator;
[0072] The judging subunit is configured to judge whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link when the previous hop node is a router of the subnet;
[0073] The second forwarding subunit is configured to forward the sniffed broadcast message if a direct link exists and the connected field programmable gate array accelerator is within the range of the directed broadcast subnet;
[0074] The stop forwarding subunit is configured to stop forwarding the sniffed broadcast message if there is no direct link, or if there is a direct link but the connected field programmable gate array accelerator is not within the range of the directed broadcast subnet.
[0075] Among them, also include:
[0076] The forwarding module is configured to forward the sniffing broadcast according to the forwarding rules at all nodes except the control server during the sniffing broadcast phase.
[0077] Among them, also include:
[0078] The first updating module is configured to control the server to perform a directed broadcast to the managed target node according to the broadcast demand, so that the node records the broadcast reception time of the directed broadcast message, parses the Internet Protocol address of the broadcast source of the directed broadcast message, and updates the reception time to the broadcast statistics table maintained by itself;
[0079] The first determining module is configured to query the broadcast statistics table during the sniffing broadcast phase according to the sniffing broadcast start time and the Internet Protocol address in the sniffing broadcast phase to obtain the broadcast end time;
[0080] A second determining module is configured to determine a broadcast message transmission delay according to a broadcast end time;
[0081] A third determining module is configured to determine a current broadcast message transmission delay of a current node in a formal broadcast phase according to a broadcast start time and a broadcast end time;
[0082] The stop forwarding module is configured to stop forwarding broadcast messages if the broadcast message transmission delay is greater than the current broadcast message transmission delay;
[0083] The continuing forwarding module is configured to continue forwarding the broadcast message if the transmission delay of the broadcast message is less than or equal to the current transmission delay of the broadcast message.
[0084] Among them, also include:
[0085] The storage module is configured to determine that a link abnormality occurs on the node during the sniffing broadcast phase if the broadcast end time cannot be found when querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address during the sniffing broadcast phase, and store the Internet Protocol address, the directional broadcast start time and the directional broadcast reception time in the broadcast statistics table.
[0086] Among them, also include:
[0087] The first generation module is configured to generate a broadcast statistics table for each node to maintain itself; the broadcast statistics table includes the Internet Protocol address of the broadcast source, the broadcast start time and the broadcast arrival time.
[0088] An embodiment of the present application further provides a non-volatile readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the above method are implemented.
[0089] An embodiment of the present application also provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the steps of the above method are implemented when the processor calls the computer program in the memory.
[0090] An embodiment of the present application provides a broadcast method for a field programmable gate array (FPGA) accelerator cluster, comprising: in a sniff broadcast phase, a control server performs sniff broadcasts on nodes in all managed subnets via all communication links; the nodes include routers and FPGA accelerators; in a topology filling phase, two FPGA accelerators that forwarded sniff broadcast messages via direct links during the sniff broadcast phase are considered connected FPGAs, and information about the connected FPGA accelerators is uploaded to a router of a local subnet; the router of the local subnet records the information about the connected FPGA accelerators in a direct link table; and in a formal broadcast phase, the control server performs a directed broadcast to the managed target nodes according to broadcast requirements.
[0091] In the embodiment of the present application, since each FPGA accelerator only needs to upload to the router of the local subnet after completing the sniffing and sensing of all communication links in the sniffing and broadcasting phase, the router topology expansion phase takes the shortest time. However, the sniffing and broadcasting phase requires completing the broadcast of all directional subnets controlled by the control server as the broadcast source, and the network situation is relatively complex, so it is relatively long. The actual broadcasting phase takes much longer than the time of the above two phases. This is because when performing actual broadcasting, there is uncertainty about the arrival of the broadcast task, so the actual broadcasting time is much longer than the above two phases. The topology filling phase can effectively perceive the dynamic changes of the FPGA accelerator cluster network in real time, so as to adjust the broadcast link in real time. Therefore, the embodiment of the present application solves the problem that the routing links of the distributed FPGA accelerator cluster network are unaware of the routing links between FPGA accelerators. While introducing direct links, it avoids the occurrence of ring broadcast storms. It solves the problems of high latency and high energy consumption caused by network congestion and repeated retransmission of data packets.
[0092] The embodiments of the present application also provide a broadcast system for a field programmable gate array accelerator cluster, a non-volatile readable storage medium, and an electronic device, which have the above-mentioned beneficial effects and are not further described here. BRIEF DESCRIPTION OF THE DRAWINGS
[0093] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.
[0094] FIG1 is a schematic diagram of the structure of a field programmable gate array accelerator cluster provided in an embodiment of the present application;
[0095] FIG2 is a schematic diagram of the structure of a field programmable gate array accelerator provided in an embodiment of the present application;
[0096] FIG3 is a flow chart of a broadcasting method for a field programmable gate array accelerator cluster provided in an embodiment of the present application;
[0097] FIG4 is a schematic diagram of a broadcast process of a three-stage field programmable gate array accelerator cluster provided in an embodiment of the present application;
[0098] FIG5 is a schematic diagram of the broadcast system structure of the field programmable gate array accelerator cluster provided in an embodiment of the present application;
[0099] FIG6 is a structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0100] To make the purpose, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the embodiments of the present application.
[0101] To better understand the broadcast process of the field programmable gate array accelerator cluster provided in the embodiment of the present application, please refer to FIG1 . FIG1 is a schematic diagram of the structure of a field programmable gate array accelerator cluster provided in the embodiment of the present application. The field programmable gate array accelerator cluster includes:
[0102] Control servers, routers, and field programmable gate array accelerator clusters consisting of field programmable gate array accelerators;
[0103] Routing links are provided between the control server, the router and the field programmable gate array accelerator, and direct links are provided between the field programmable gate array accelerators belonging to different routers;
[0104] The control server is configured to manage the FPGA accelerator cluster and perform directed broadcasting to the routers and the FPGA accelerators;
[0105] The router is configured to perform data communication between the controller and the field programmable gate array accelerator;
[0106] A field-programmable gate array accelerator is configured to perform network communications and application computations.
[0107] This embodiment addresses the issue of excessive energy consumption and latency in directional broadcasts to FPGA accelerators within the managed subnets of a control server acting as a broadcast source in a distributed FPGA accelerator cluster network. Furthermore, in traditional distributed FPGA accelerator cluster networks, the lack of knowledge of direct links between FPGA accelerators by traditional routing links can easily lead to routing link congestion during directional broadcasts. When direct links are unavailable, repeated retransmissions can lead to high latency and energy consumption. Furthermore, even if direct links are introduced, ring broadcast storms can easily occur, potentially leading to high energy consumption and latency due to link congestion and repeated retransmissions.
[0108] To this end, Figure 1 is a schematic diagram of the structure of a FPGA accelerator cluster provided by an embodiment of the present application, which enables direct connections between FPGA accelerators in routers on different subnets. In Figure 1, since all FPGA accelerators in a subnet managed by the same router can communicate directly with each other without the need for router forwarding, the rates of routing links and direct links are similar. Therefore, in this embodiment of the present application, there are no direct links between FPGA accelerators in the same subnet.
[0109] The embodiments of the present application propose a multi-element multicast architecture for a distributed FPGA accelerator cluster. This architecture, based on the existing multicast architecture of a distributed FPGA accelerator cluster consisting of FPGA accelerators, routers, and control servers, includes a point-to-point communication architecture for FPGA accelerators that supports high-speed communication between cores.
[0110] Figure 1 mainly includes: a control server, a router and a field programmable gate array accelerator. Taking Figure 1 as an example, the control server is mainly responsible for the daily management of the field programmable gate array accelerator cluster, remote update of application programs and task distribution, etc. As shown in Figure 2, Figure 2 is a structural schematic diagram of a field programmable gate array accelerator provided by an embodiment of the present application. The field programmable gate array accelerator can include multiple sub-cores based on the field programmable gate array core virtualization function. The field programmable gate array accelerator has network communication, application calculation and logic control functions respectively through the design of communication, calculation and control sub-cores. It communicates with the router through a routing link, and the field programmable gate array accelerators under different routing subnets can communicate through a direct link; the router is responsible for the data communication function, and communicates with other routers, field programmable gate array accelerators and the control server through a routing link.
[0111] It should be noted that in the distributed FPGA cluster network proposed in the embodiments of this application, all network terminals, such as FPGA accelerators and control servers, access the network through routers. Each FPGA accelerator is interconnected with other FPGA accelerators to achieve direct communication. Since all FPGA accelerators in the same subnet can be directly interconnected without the need for router forwarding, there are no direct links between all FPGA accelerators in the same subnet. Furthermore, a single FPGA accelerator typically has two optical ports.
[0112] Based on the FPGA accelerator cluster shown in Figure 1, see Figure 2, which is a schematic diagram of the structure of a FPGA accelerator provided in an embodiment of the present application. The FPGA accelerator can include a communication sub-core, a computation sub-core, and a control sub-core. The communication sub-core is configured for network communication, the computation sub-core is configured for application computing, and the control sub-core is configured for logic control.
[0113] The present application proposes a field programmable gate array accelerator cluster. Based on the existing multicast architecture of a distributed field programmable gate array accelerator cluster composed of field programmable gate array accelerators, routers, and control servers, it includes a field programmable gate array accelerator point-to-point communication architecture that supports high-speed communication between cores. Since all field programmable gate array accelerators in a subnet managed by the same router can communicate directly with each other without the need for router forwarding, the routing link and the direct link have similar rates, and there are no direct links between field programmable gate array accelerators in the same subnet. This allows the broadcast method to fully utilize direct links and routing links, effectively solving problems such as routing congestion and ring broadcast storms. While reasonably improving the utilization rate of cluster communication links, it avoids the use of high-latency communication links and the forwarding of broadcast messages. While reducing transmission delay, energy consumption of communication links is saved.
[0114] Based on the above field programmable gate array accelerator cluster, an embodiment of the present application further provides a broadcast method for the field programmable gate array accelerator cluster. See FIG3 , which is a flow chart of the broadcast method for the field programmable gate array accelerator cluster provided in an embodiment of the present application. The broadcast method includes:
[0115] S101: In the sniffing broadcast phase, the control server performs sniffing broadcasts on all nodes in the managed subnets through all communication links; the nodes include routers and field programmable gate array accelerators;
[0116] S102: During the topology filling phase, the two FPGA accelerators that forwarded the sniff broadcast message via the direct link during the sniff broadcast phase are considered connected FPGAs, and information about the connected FPGA accelerators is uploaded to a router of the local subnet; the router of the local subnet records the information about the connected FPGA accelerators in a direct link table.
[0117] S103: In the formal broadcast phase, the control server performs a directional broadcast to the managed target nodes according to the broadcast requirements.
[0118] The broadcast method provided by the embodiment of the present application is divided into a sniff broadcast stage, a topology expansion stage and a formal broadcast stage. In the sniff broadcast stage, the control server mainly performs sniff broadcasts on the nodes in all subnets it manages, and the control server as the broadcast source broadcasts to all nodes managed through all communication links (routing links and direct links), and corresponding forwarding rules can be set for the nodes at the same time. It should be noted that the broadcast method comprising three stages provided by the embodiment of the present application can be executed cyclically, i.e., a cyclic broadcast is performed. In this way, it is possible to obtain a sniff perception of the shortest broadcast time of each node in the case where the directional broadcast subnet node participates in the largest scale and the most complex network while avoiding the loop broadcast storm. In order to solve the problem that each router is unaware of the direct link of the field programmable gate array accelerator in the subnet. Compared with the formal broadcast stage in which only some nodes are required to participate in the directional broadcast, the network situation in the sniff broadcast stage is more complicated and more prone to blocking, link disconnection, etc., so it is easier to fully evaluate the directional broadcast capability of each node, and then obtain the shortest delay when all nodes in all subnets of each node participate in the directional broadcast.
[0119] After the sniff broadcast phase completes, the topology expansion phase is responsible for transmitting information about direct links between FPGA accelerators on all nodes within a directional subnet to the routers of the subnets to which they belong. Based on the sniff broadcast phase results, each FPGA accelerator reports and modifies the information to address situations where the routers are unaware of direct links between FPGA accelerators or when direct links are disconnected, among other real-time conditions. After completing the sniff broadcast and topology expansion phases of this broadcast cycle, the server serving as the broadcast source can proceed with the actual broadcast as needed.
[0120] During the actual broadcast phase, the control server, acting as the controller and manager of the FPGA accelerator cluster, needs to conduct targeted broadcasts based on actual business needs. Therefore, the node size of the actual targeted broadcast subnet is generally lower than during the sniffing broadcast phase, when all subnets participate in the broadcast. Furthermore, during this phase, each node compares its actual transmission latency during the broadcast with the latency value obtained during the sensing phase to determine whether to forward the message. This achieves the goals of low latency and high energy efficiency for FPGA accelerator cluster broadcasts.
[0121] Furthermore, of the three phases described above, the router topology expansion phase is the shortest, as each FPGA accelerator only needs to upload information to the local subnet router after completing the sniffing and broadcasting phase to detect all communication links. The sniffing and broadcasting phase, however, requires completing the broadcasts for all directional subnets controlled by the control server acting as the broadcast source, resulting in a relatively complex network environment and, therefore, a relatively long phase. The actual broadcast phase, however, takes significantly longer than the two aforementioned phases. This is because the arrival of broadcast tasks is uncertain during actual broadcasts, resulting in a significantly longer broadcast time. It should be noted that the three phases described above can be executed cyclically, and the topology can effectively perceive the dynamic changes of the FPGA accelerator cluster network in real time, enabling real-time adjustments to broadcast links.
[0122] The embodiments of the present application address the issue of routing links in a distributed FPGA accelerator cluster network being agnostic to the routing links between FPGA accelerators. By introducing direct links, they also avoid the occurrence of ring broadcast storms. They also address the high latency and energy consumption issues caused by network congestion and repeated data packet retransmissions.
[0123] This embodiment of the present application proposes a three-stage cyclic broadcast method for a field programmable gate array (FPGA) accelerator cluster, which is divided into a sniffing broadcast stage, a topology expansion stage, and a formal broadcast stage. As shown in Figure 4, Figure 4 is a schematic diagram of the three-stage FPGA accelerator cluster broadcast process provided by this embodiment of the present application. The above three stages are cyclically deployed in chronological order.
[0124] The three-stage FPGA accelerator cluster cyclic broadcast strategy process proposed in the embodiment of the present application is as follows:
[0125] First, each node (router and FPGA accelerator) in the FPGA accelerator cluster network, except for the control server, maintains a hash table to record the received broadcast messages, which is recorded as the broadcast statistics table. The corresponding key-value pair is in the form of: <(broadcast source IP address, broadcast start time), broadcast arrival time>. Among them, the broadcast source IP address is recorded as brdcst_IP, and the broadcast start time is recorded as Tb send The broadcast arrival time is recorded as Tb rcv In the embodiment of the present application, in order to accurately measure the transmission delay, the length of the sniffing broadcast message and the formal broadcast message are set to the same length in each cyclic broadcast.
[0126] Secondly, the steps corresponding to the three-stage operation of the loop broadcast executed each time are as follows:
[0127] Sniffing broadcast phase:
[0128] During the sniff broadcast phase, after the direct link information between all FPGA accelerators within all directional subnets under the control server is transmitted to the router of its subnet, each node forwards the sniff broadcast according to the forwarding rules. The forwarding rules compare the actual transmission delay of the sniff broadcast with the perceived transmission delay during the sensing phase. The comparison result is used to guide the node's forwarding of the sniff broadcast.
[0129] Optionally, within the time period [T0+(n1-1)*ΔT, T0+n1*ΔT1] (n1 is a positive integer, and ΔT=ΔT1+ΔT2+ΔT3), the control server serving as the broadcast source forwards the sniff broadcast message to all nodes such as field programmable gate array accelerators and routers in all subnets it manages. Optionally, the control server serving as the broadcast source starts performing directed broadcasts to all nodes it controls at time T0+(n1-1)*ΔT. The control server serving as the broadcast source only needs to perform directed broadcasts to some of the nodes it manages. Compared with the directed broadcasts to only some of the managed nodes in the third stage, the network environment caused by the directed broadcasts in the sniff broadcast stage is more complex, and the probability of network congestion and communication link disconnection is greater. Therefore, the broadcast delay of each node in the first stage is greater than the broadcast delay value in the third stage.
[0130] In addition, each receiving FPGA accelerator and router will update the broadcast source Internet Protocol address, broadcast start time, and broadcast arrival time fields of its broadcast statistics table according to the received sniffed broadcast message. Optionally, during the forwarding process, the following forwarding rules are followed:
[0131] When each node receives a sniff broadcast message from a broadcast source, it records the arrival time (denoted as Tb now ), and sniff the broadcast arrival time Tb of the broadcast message rcv The value is updated to Tb now ; Then, parse the sniffed broadcast message to get brscst_IP, Tb send and Tb rcv Then query its own hash table to see if it already exists:
[0132] If it already exists, it means that the current node has already received the current sniffing broadcast message and will no longer process or forward the current sniffing broadcast message;
[0133] If it does not exist, it means that the current node has not received the current sniffing broadcast message, so record <(brdcst_IP, Tb send ), Tb rcv >. After completing the above operations, update this rcvThe sniffed broadcast message of the value is forwarded to other nodes in the directional broadcast subnet. Since the current nodes are divided into two possible types: field programmable gate array accelerators and routers, the forwarding update is Tb rcv The process of sniffing broadcast messages is divided into the following two cases:
[0134] If the node is a field programmable gate array accelerator, when the previous node is a field programmable gate array accelerator, the sniffed broadcast message is uploaded to the router of the subnet to which it belongs through the routing link;
[0135] When the previous hop node is a router of the subnet, it is determined whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link;
[0136] If there is a direct link and the connected FPGA accelerator is within the directed broadcast subnet, the sniffed broadcast message is forwarded;
[0137] If there is no direct link, or if there is a direct link but the connected FPGA accelerator is not within the range of the directed broadcast subnet, stop forwarding the sniffing broadcast message.
[0138] If the node is a router, it forwards the sniffed broadcast message to other nodes within the directed broadcast subnet except the previous hop node, including routers and field programmable gate array accelerators;
[0139] If the current node is a FPGA accelerator, and the previous hop node is also a FPGA accelerator, the sniffed broadcast message will be uploaded to the router of the subnet to which it belongs via the routing link. If the previous hop node is a router of the subnet, it is determined whether this FPGA accelerator communicates with other FPGA accelerators via direct links. If a direct link exists and the connected FPGA accelerator is within the scope of the directed broadcast subnet, the message will be forwarded; otherwise, that is, if there is no direct link or a direct link exists but the connected FPGA accelerator is not within the scope of the directed broadcast subnet, the message will not be forwarded.
[0140] Furthermore, as long as the time period [T0+(n1-1)*ΔT, T0+n1*ΔT1] is within the range, all network nodes except the control server will execute the above broadcast message forwarding rules. It is also important to note that when the control server, as the broadcast source, conducts a directed broadcast to all nodes (routers and FPGA accelerators) within each directed broadcast subnet it manages, each node can participate in the forwarding of the corresponding sniffed broadcast message through both routing links and direct links.
[0141] During the topology expansion phase:
[0142] During the time period [T0+n1*ΔT1, T0+n1*(ΔT1+ΔT2)], the two FPGA accelerators that forward the sniffed broadcast message communication via the direct link in the first phase must upload the information of the connected FPGA accelerator to the router of the local subnet. The router must record this information in another hash table, recorded as the direct link table, with the corresponding key-value pair content being <local FPGA accelerator IP address, direct FPGA accelerator IP address>. The local FPGA accelerator IP address is recorded as local_addr, and the direct FPGA accelerator IP address is recorded as direct_addr.
[0143] During the official broadcast phase:
[0144] During the time period [T0+n1*(ΔT1+ΔT2), T0+n1*ΔT] (n1 is a positive integer, and ΔT=ΔT1+ΔT2+ΔT3), the control server, as the broadcast source, performs a directed broadcast to the nodes in the managed subnets according to service needs. The following three rules can be followed in forwarding directed broadcast messages:
[0145] First, when the control server serving as the broadcast source performs a directed broadcast to the target subnet, in addition to all nodes in the target directed broadcast subnet, the forwarding router and the field programmable gate array accelerators under the forwarding router that have direct links to the field programmable gate array accelerators in the directed subnet can also participate in the forwarding.
[0146] Secondly, during the forwarding process, each node needs to record the current receiving time TB cur , and parse the broadcast message to find the control server IP address of the broadcast source as brdcst_IP_now, and the broadcast start time as TB send_now , the broadcast arrival time is recorded as Tb rcv_now . And Tb rcv_now The value of TB is updated cur Then determine whether to proceed to the next step:
[0147] According to the broadcast start time Tb of the first stage sniffing broadcast message send The value of (i.e., T0+(n1-1)*ΔT) and the brdcst_IP_now obtained by parsing the broadcast message of this node, query the broadcast statistics table stored in the sniffing broadcast phase of this cycle, and obtain the corresponding broadcast end time Tb rcv , according to the following formula (1), the broadcast message transmission delay ΔTb in this cycle is obtained; ΔTb=Tb rcv -Tb send (1)
[0148] It should be noted that when the forwarding router and the nodes in the directional broadcast subnet in the formal broadcast phase cannot find the corresponding information in the broadcast statistics table in the first phase, it means that an extreme situation such as link disconnection occurred in the previous phase. Therefore, it is necessary to set brdcst_IP_now, Tb send_now and TB rcv_now The value of is stored in the broadcast statistics table. And forwarding to the next hop node is performed. If there is no next hop node, no further forwarding is required;
[0149] Combined with the broadcast start time Tb send_now and broadcast arrival time Tb rcv_now The value of the broadcast message transmission delay ΔTb of the current node in the formal broadcast phase is obtained cur , as shown in formula (2): ΔTB cur =Tb rcv_now -Tb send_now (2)
[0150] Comparison of ΔTb cur And the value of ΔTb:
[0151] If ΔTb cur > ΔTb, the broadcast message will no longer be forwarded, because the control server as the broadcast source in the first stage is a directional broadcast to all subnets it controls, which is more complicated than the communication situation when the directional broadcast is only directed to some subnets in the third stage. This means that the current node is in TB rcv_now The broadcast message received at the moment comes from a more time-consuming and complex communication link. The current node has a high probability of completing the data message forwarding in the broadcast phase of this cycle, so there is no need to forward the broadcast message again, thereby achieving the effect of reducing repeated forwarding of broadcast messages and saving energy;
[0152] If ΔTb cur ≤ΔTb, the broadcast message is forwarded. Since the broadcast arrival time stored in the first stage is the time corresponding to the sniffed broadcast message that arrives at the node earliest through the communication link, this represents the current node in Tb rcv_now The broadcast message received at the moment is transmitted by the relatively optimal communication link verified in the first phase. At the same time, the corresponding Tb in the broadcast statistics table is rcv The value of is updated to Tb rcv_now , Tb send The value of is updated to Tb send_now This ensures that during the formal broadcast phase, the current node is transmitted via the link with the shortest latency, and avoids the high energy consumption caused by forwarding broadcast messages on other high-latency links.
[0153] Finally, after completing the three-stage operation of this cyclic broadcast, each node will clear its own broadcast statistics table and direct link table.
[0154] To better describe the embodiments of the present application, the following describes the broadcast method of the field programmable gate array accelerator cluster provided by the embodiment of the present application using optional routing subnets and Internet Protocol addresses as examples. Taking the first cyclic broadcast as an example, in conjunction with the cross-subnet direct-connected tree-type field programmable gate array accelerator cluster network topology diagram shown in FIG1, it includes a control server used for control management, 4 routers and 8 field programmable gate array accelerators, and a total of 3 routing subnets, which are managed by routers 2#, 3# and 4# respectively. Router 1# is responsible for managing routers 2#, 3# and 4# and control server 1#. The field programmable gate array accelerators in the three routing subnets are interconnected through direct links. Optionally, the field programmable gate array accelerator 3# in the subnet managed by router 2# is interconnected with the field programmable gate array accelerator 4# in the subnet managed by router 3# via a direct link. The field programmable gate array accelerator 6# in the subnet managed by router 3# is interconnected with the field programmable gate array accelerator 7# in the subnet managed by router 4# via a direct link.
[0155] In addition, the subnet range and IP address range of the control server, router, and each field programmable gate array accelerator in the design diagram 1 of the embodiment of the present application are shown in Table 1, and 1# routing subnet, 2# routing subnet, 3# routing subnet, and 4# routing subnet are set respectively. According to Figure 1, 2# routing subnet, 3# routing subnet, and 4# routing subnet are all subnets under 1# routing subnet. According to the address segment 192.168.122.129 / 5 of 1# routing subnet, it can be seen that the IP addresses it contains are 192.168.122.128-192.168.122.159, totaling 32 IP addresses. The address range 192.168.122.137 / 3 for routing subnet 2# is 192.168.122.136-192.168.122.143, for a total of eight IP addresses. Similarly, the address range 192.168.122.145 / 3 for routing subnet 3# is 192.168.122.144-192.168.122.151, for a total of eight IP addresses. The address range 192.168.122.153 / 3 for routing subnet 4# is 192.168.122.152-192.168.122.159, for a total of eight IP addresses. By comparison, the address divisions for routing subnets 2#, 3#, and 4# are all derived from the divisions of routing subnet 1#. See Table 1, which shows the IP addresses of all nodes in the field programmable gate array accelerator cluster network diagram.
[0156] Table 1 IP addresses of all nodes in the FPGA accelerator cluster network diagram
[0157] Assume that the routing link between router 1# and router 3# is interrupted. In this cycle, the first phase duration ΔT1 is set to 200ms, the second phase duration ΔT2 is set to 60ms, and the third phase duration ΔT3 is set to 1500ms. The broadcast start time for this cycle is set to 2023-01:01 00:00:00.000. The time range of the first stage is [2023-01-01 00:00:00.000, 2023-01:01 00:00:00.200], the time range of the second stage is [2023-01-01 00:00:00.200, 2023-01:01 00:00:00.260], and the time range of the third stage is [2023-01-01 00:00:00.260, 2023-01:01 00:00:01.760].
[0158] In addition, since the length of the sniffing broadcast message in each cyclic broadcast is the same as the length of the formal broadcast message, the message body length of the sniffing broadcast message and the formal broadcast message is set to 12 bytes, and the transmission delay of the routing link and the direct link between each node in the sniffing broadcast phase of the first cyclic broadcast is designed as shown in Table 2. Table 2 is the transmission delay table of each link in the sniffing broadcast phase of the first cyclic broadcast:
[0159] Table 2 Transmission delay of each link in the sniffing broadcast phase of the first cyclic broadcast
[0160] Based on Table 2 and the links in the sniff broadcast phase, the arrival time and transmission delay of the sniff broadcast message from the broadcast source control server to each node can be obtained in sequence, as shown in Table 3. It should be noted that since the message body length of the transmitted sniff broadcast message and the formal broadcast message is the same, and the time spent on local replication and calculation by each node in the first and third phases is equal, the relevant time calculation is not included in the relevant calculation.
[0161] Taking router 3# as an example, Table 2 shows that because the routing link between router 1# and router 3# is disconnected, the shortest communication link from the broadcast source, control server 1#, to router 3# is: control server 1# → router 1# → router 4# → FPGA accelerator 7# → FPGA accelerator 6# → FPGA accelerator 3#. The transmission delay for this communication link at router 3# is 10ms + 3ms + 8ms + 3ms + 2ms = 26ms, so the broadcast arrival time is 2023-01-01 00:00:00.026. After receiving the sniffed broadcast message from this communication link according to the forwarding rules, router 3# parses the sniffed broadcast message to obtain the IP address of the broadcast source, control server 192.168.122.159, and the broadcast start time 2023-01-01 00:00:00.000, and then queries the broadcast statistics table. The table is empty, so Router 3 stores the corresponding information in the broadcast statistics table <(192.168.122.159, 2023-01-01 00:00:00.000), 2023-01-01 00:00:00.026>. After completing the above operations, the next step is forwarding, which can be forwarded to FPGA accelerators 4 and 5.
[0162] In reality, there are other forwarding links, for example: 1# control server → 1# router → 2# router → 3# FPGA accelerator → 4# FPGA accelerator → 3# FPGA accelerator. The transmission delay of this communication link is 10ms + 5ms + 6ms + 3ms + 14ms = 38ms. Therefore, the broadcast arrival time of this communication link is: 2023-01-01 00:00:00.038.
[0163] After receiving the sniff broadcast message for this communication link, Router 3 parses the sniff broadcast message to obtain the IP address of the broadcast source control server, 192.168.122.159, and the broadcast start time, 2023-01-01 00:00:00.000. It then queries the broadcast statistics table to obtain the previous broadcast arrival time, 2023-01-01 00:00:00.026. This indicates that a communication link with lower transmission delay already existed, and forwarding and other related operations are no longer performed. See Table 3, which shows the arrival time and transmission delay values of the sniff broadcast message for each node during the sniff broadcast phase:
[0164] Table 3 Arrival time and transmission delay of sniffing broadcast messages of each node during sniffing broadcast phase
[0165] During the topology expansion phase, taking router #3 as an example, at least two of the above communication links exist during the sniffing broadcast phase of this cyclic broadcast. The direct link between FPGA accelerator #3 and FPGA accelerator #4, and the direct link between FPGA accelerator #6 and FPGA accelerator #7, are used. This is unknown to FPGA accelerator #3. Therefore, during the topology expansion phase, FPGA accelerator #4 and FPGA accelerator #6 must upload these links to router #3 and record them in the direct link table, as shown in Table 4. Table 4 shows the direct link table for router #3 during the direct link expansion phase of the first cyclic broadcast.
[0166] Table 4: Direct link table of router 3 in the direct connection expansion phase of the first cyclic broadcast
[0167] After completing the first two phases of communication link sniffing and topology expansion during the first broadcast cycle, assume that control server 1#, acting as the broadcast source, begins broadcasting to all nodes within routing subnet 3# at 00:00:00.260 on January 1, 2023, and assume that the transmission delay during the formal broadcast phase is as shown in Table 5. As shown in Table 5, the routing link between router 1# and router 3# is still blocked or disconnected, so routers 2# and 4# need to be used as forwarding routers.
[0168] Based on this, taking router #3 as an example, we can conclude that there are still two communication links that can transmit the official broadcast message to router #3, which are denoted as communication link A and communication link B. Communication link A is 1# control server → 1# router → 4# router → 7# FPGA accelerator → 6# FPGA accelerator → 3# FPGA accelerator, and the corresponding transmission delay ΔTb cur The value is 10ms+3ms+5ms+3ms+2ms=23ms. Communication link B is: 1# control server → 1# router → 1# router → 3# FPGA accelerator → 4# FPGA accelerator → 3# FPGA accelerator, and the corresponding transmission delay ΔTb cur The value is 10ms + 2ms + 3ms + 3ms + 2ms = 20ms. Therefore, we can know that the official broadcast message transmitted through communication link B reaches router 3 before the communication link A.
[0169] When the formal broadcast message reaches 3# router through link B, the IP address of the broadcast source control server 192.168.122.159 is obtained according to the sniffed broadcast message, and the broadcast start time Tb of the sniffed broadcast phase of this cyclic broadcast is obtained according to the sniffed broadcast message. sendThe value is 2023-01-01 00:00:00.000. By querying the broadcast statistics table, we can get the corresponding broadcast arrival time Tb of the sniffed broadcast message. rcv The value is 2023-01-01 00:00:00.026, and the transmission delay ΔTb of the sniffing broadcast message of router 3# in the sniffing broadcast phase is 26ms. Because ΔTb cur <ΔTb, so it is necessary to change Tb in the broadcast statistics table send The value of 2023-01-01 00:00:00.000 is updated to Tb send_now The value of 2023-01-01 00:00:00.260, the corresponding Tb rcv The value of 2023-01-01 00:00:00.026 is updated to 2023-01-01 00:00:00.280.
[0170] Then, when the formal broadcast message reaches 3# router through link A, the IP (Internet Protocol) address 192.168.122.159 of the broadcast source control server is obtained according to the sniffed broadcast message, and the broadcast start time Tb of the sniffed broadcast phase of this cyclic broadcast is obtained according to the sniffed broadcast message. send The value is 2023-01-01 00:00:00.260. By querying the broadcast statistics table, we can get the corresponding broadcast arrival time Tb of the sniffed broadcast message. rcv The value of is 2023-01-01 00:00:00.280, and the transmission delay ΔTb of the broadcast message is 20ms. cur is 23ms, that is, ΔTb cur >ΔTb. Therefore, no forwarding is required. Therefore, the minimum transmission delay of node 3's official broadcast message is 20ms. This saves energy and time caused by repeated retransmissions of broadcast messages. See Table 5, which shows the transmission delay of each link during the sniffing broadcast phase of the first broadcast loop.
[0171] Table 5 Transmission delay of each link in the sniffing broadcast phase of the first cyclic broadcast
[0172] After the first three-phase broadcast cycle is completed, each FPGA accelerator and router will clear the broadcast routing table, and each router will also clear the contents of the direct link table.
[0173] Referring to FIG. 5 , FIG. 5 is a schematic diagram illustrating the structure of a broadcast system for a field programmable gate array accelerator cluster provided in an embodiment of the present application. This embodiment of the present application also provides a broadcast system for a field programmable gate array accelerator cluster, including:
[0174] The sniffing broadcast module is configured to control the server to perform sniffing broadcasts on nodes in all managed subnets through all communication links during the sniffing broadcast phase; the nodes include routers and field programmable gate array accelerators;
[0175] The topology filling module is configured to, during the topology filling phase, identify two field programmable gate array accelerators that forwarded sniff broadcast messages via direct links during the sniff broadcast phase as connected field programmable gate arrays, and upload information about the connected field programmable gate array accelerators to a router of a local subnet; the router of the local subnet records the information about the connected field programmable gate array accelerators in a direct link table;
[0176] The formal broadcast module is configured to control the server to perform directional broadcasting to the managed target nodes according to broadcast requirements during the formal broadcast phase.
[0177] Based on the above embodiment, the sniffing broadcast module includes:
[0178] The forwarding submodule is configured to forward the sniffing broadcast according to the forwarding rules after the direct link information between all field programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of the subnet to which it belongs. The forwarding rule is to compare the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the perception phase to obtain a comparison result, which is used to guide the node whether to forward the sniffing broadcast.
[0179] Based on the above embodiment, the forwarding submodule includes:
[0180] The recording unit is configured to record the arrival time of the sniffing broadcast message when each node receives the sniffing broadcast message, and record it in the broadcast statistics table maintained by itself;
[0181] A parsing unit is configured to parse the sniffed broadcast message and obtain a broadcast field value;
[0182] A judgment unit is configured to compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table;
[0183] The stop forwarding unit is configured to stop forwarding the sniffed broadcast message if the broadcast field value exists in the broadcast statistics table;
[0184] The forwarding unit is configured to record the broadcast field value in the broadcast statistics table if the broadcast field value does not exist in the broadcast statistics table, and forward the sniffed broadcast message to other nodes in the directed broadcast subnet domain.
[0185] Based on the above embodiment, the forwarding unit includes:
[0186] The first forwarding subunit is configured to forward the sniffed broadcast message to other nodes within the range of the directed broadcast subnet except the previous hop node if the node is a router.
[0187] Based on the above embodiment, the forwarding unit includes:
[0188] The upload subunit is configured to upload the sniffed broadcast message to the router of the subnet through the routing link if the node is a field programmable gate array accelerator and the previous node is a field programmable gate array accelerator;
[0189] The judging subunit is configured to judge whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link when the previous hop node is a router of the subnet;
[0190] The second forwarding subunit is configured to forward the sniffed broadcast message if a direct link exists and the connected field programmable gate array accelerator is within the range of the directed broadcast subnet;
[0191] The stop forwarding subunit is configured to stop forwarding the sniffed broadcast message if there is no direct link, or if there is a direct link but the connected field programmable gate array accelerator is not within the range of the directed broadcast subnet.
[0192] Based on the above embodiment, the present invention further includes:
[0193] The forwarding module is configured to forward the sniffing broadcast according to the forwarding rules at all nodes except the control server during the sniffing broadcast phase.
[0194] Based on the above embodiment, the present invention further includes:
[0195] The first updating module is configured to control the server to perform a directed broadcast to the managed target node according to the broadcast demand, so that the node records the broadcast reception time of the directed broadcast message, parses the Internet Protocol address of the broadcast source of the directed broadcast message, and updates the reception time to the broadcast statistics table maintained by itself;
[0196] The first determining module is configured to query the broadcast statistics table during the sniffing broadcast phase according to the sniffing broadcast start time and the Internet Protocol address in the sniffing broadcast phase to obtain the broadcast end time;
[0197] A second determining module is configured to determine a broadcast message transmission delay according to a broadcast end time;
[0198] A third determining module is configured to determine a current broadcast message transmission delay of a current node in a formal broadcast phase according to a broadcast start time and a broadcast end time;
[0199] The stop forwarding module is configured to stop forwarding broadcast messages if the broadcast message transmission delay is greater than the current broadcast message transmission delay;
[0200] The continuing forwarding module is configured to continue forwarding the broadcast message if the transmission delay of the broadcast message is less than or equal to the current transmission delay of the broadcast message.
[0201] Based on the above embodiment, the present invention further includes:
[0202] The storage module is configured to determine that a link abnormality occurs on the node during the sniffing broadcast phase if the broadcast end time cannot be found when querying the broadcast statistics table during the sniffing broadcast phase based on the sniffing broadcast start time and the Internet Protocol address during the sniffing broadcast phase, and store the Internet Protocol address, the directional broadcast start time and the directional broadcast reception time in the broadcast statistics table.
[0203] Based on the above embodiment, the present invention further includes:
[0204] The first generation module is configured to generate a broadcast statistics table for each node to maintain itself; the broadcast statistics table includes the Internet Protocol address of the broadcast source, the broadcast start time and the broadcast arrival time.
[0205] Based on the above embodiment, the present invention further includes:
[0206] The second generating module is set as a router of the local subnet to generate a direct link table; the direct link table includes the local field programmable gate array accelerator Internet Protocol address and the direct field programmable gate array accelerator Internet Protocol address.
[0207] Based on the above embodiment, the present invention further includes:
[0208] The formal broadcast forwarding rule setting module is configured to set the formal broadcast forwarding rule during the formal broadcast phase. The formal broadcast forwarding rule is that when the control server performs a directed broadcast, in addition to all nodes in the target directed subnet, the forwarding routers and the field programmable gate array accelerators under the forwarding routers that have a direct link with the field programmable gate array accelerators in the directed subnet can also participate in the forwarding of the directed broadcast.
[0209] Based on the above embodiment, the present invention further includes:
[0210] The fourth determining module is configured to determine that the broadcast message received by the current node at the broadcast arrival time originates from a communication link that consumes a longer time if the broadcast message transmission delay is greater than the current broadcast message transmission delay.
[0211] Based on the above embodiment, the present invention further includes:
[0212] The second updating module is configured to update the broadcast end time in the broadcast statistics table to the broadcast arrival time if the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay.
[0213] Based on the above embodiment, the present invention further includes:
[0214] The clearing module is configured so that after the formal broadcast phase ends, each node clears its own broadcast statistics table and the router clears its own direct link table.
[0215] The present application also provides a non-volatile readable storage medium having a computer program stored thereon, which, when executed, can implement the steps provided in the above embodiment. The non-volatile readable storage medium may include: a USB flash drive, a mobile hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, among other media capable of storing program code.
[0216] An embodiment of the present application further provides an electronic device. Referring to FIG. 6 , a structural diagram of an electronic device provided in an embodiment of the present application, as shown in FIG. 6 , may include a processor 1410 and a memory 1420 .
[0217] The processor 1410 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 1410 may be implemented in at least one of the following hardware forms: a DSP (Digital Signal Processing), an FPGA (Field-Programmable Gate Array), or a PLA (Programmable Logic Array). The processor 1410 may also include a main processor and a coprocessor. The main processor is a processor configured to process data in an awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor configured to process data in a standby state. In some embodiments, the processor 1410 may be integrated with a GPU (Graphics Processing Unit), which is configured to render and draw the content to be displayed on the display screen. In some embodiments, the processor 1410 may also include an AI (Artificial Intelligence) processor configured to handle computing operations related to machine learning.
[0218] The memory 1420 may include one or more non-volatile readable storage media, which may be non-transitory. The memory 1420 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 1420 is at least configured to store the following computer program 1421, wherein the computer program can implement the relevant steps of the method disclosed in any of the aforementioned embodiments after being loaded and executed by the processor 1410. In addition, the resources stored in the memory 1420 may also include an operating system 1422 and data 1423, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 1422 may include Windows, Linux, Android, etc.
[0219] In some embodiments, the electronic device may further include a display screen 1430 , an input / output interface 1440 , a communication interface 1450 , a sensor 1460 , a power supply 1470 , and a communication bus 1480 .
[0220] Of course, the structure of the electronic device shown in FIG6 does not constitute a limitation on the electronic device in the embodiment of the present application. In actual applications, the electronic device may include more or fewer components than those shown in FIG6, or combine certain components.
[0221] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. For the systems provided in the embodiments, since they correspond to the methods provided in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method description.
[0222] Optional examples are used herein to illustrate the principles and implementation methods of the embodiments of the present application. The description of the above embodiments is only intended to help understand the methods and core concepts of the embodiments of the present application. It should be noted that for those skilled in the art, without departing from the principles of the embodiments of the present application, several improvements and modifications can be made to the embodiments of the present application, and such improvements and modifications also fall within the scope of protection of the claims of the embodiments of the present application.
[0223] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
Claims
1. A method for broadcasting a field programmable gate array accelerator cluster, characterized in that: include: In the sniffing broadcast stage, the control server performs sniffing broadcasts on nodes in all managed subnets through all communication links; the nodes include routers and field programmable gate array accelerators; In the topology filling stage, the two field programmable gate array accelerators that forward the sniff broadcast message through the direct link in the sniff broadcast stage are regarded as connected field programmable gate arrays, and the information of the connected field programmable gate array accelerators is uploaded to the router of the local subnet; the router of the local subnet records the information of the connected field programmable gate array accelerator into the direct link table; In the formal broadcast stage, the control server performs directional broadcasting to the managed target nodes according to broadcast requirements.
2. The broadcasting method according to claim 1, characterized in that: The control server sniffs and broadcasts the nodes in all subnets it manages through all communication links, including: After the direct link information between all field programmable gate array accelerators in all directional subnets under the control server is transmitted to the router of the subnet to which it belongs, each of the nodes forwards the sniffing broadcast according to the forwarding rule when forwarding; the forwarding rule is to compare the actual transmission delay of the sniffing broadcast with the perceived transmission delay in the perception stage to obtain a comparison result, and the comparison result is used to guide the node whether to forward the sniffing broadcast.
3. The broadcasting method according to claim 2, characterized in that: Each of the nodes forwards the sniff broadcast according to the forwarding rule during forwarding, including: When each of the nodes receives a sniff broadcast message, it records the arrival time of the sniff broadcast message and records it in the broadcast statistics table maintained by itself; Parsing the sniffed broadcast message to obtain a broadcast field value; Compare the broadcast field value with the broadcast statistics table to determine whether the broadcast field value exists in the broadcast statistics table; If it is determined that the broadcast field value exists in the broadcast statistics table, stop forwarding the sniffed broadcast message; When it is determined that the broadcast field value does not exist in the broadcast statistics table, the broadcast field value is recorded in the broadcast statistics table, and the sniffed broadcast message is forwarded to other nodes in the directional broadcast subnet domain.
4. The broadcasting method according to claim 3, characterized in that: Forwarding the sniffed broadcast message to other nodes in the directional broadcast subnet domain includes: If the node is a router, the sniff broadcast message is forwarded to other nodes within the scope of the directional broadcast subnet except the previous hop node.
5. The broadcasting method according to claim 4, characterized in that: Forwarding the sniffed broadcast message to other nodes in the directional broadcast subnet domain includes: If the node is a field programmable gate array accelerator, when the previous node is a field programmable gate array accelerator, uploading the sniffed broadcast message to the router of the subnet to which it belongs through the routing link; When the previous hop node is a router of the subnet, it is determined whether the field programmable gate array accelerator communicates with other field programmable gate array accelerators through a direct link; If there is a direct link and the connected field programmable gate array accelerator is within the range of the directed broadcast subnet, forwarding the sniffed broadcast message; If the direct link does not exist, or if the direct link exists but the connected field programmable gate array accelerator is not within the range of the directional broadcast subnet, forwarding of the sniff broadcast message is stopped.
6. The broadcasting method according to claim 1, characterized in that: Also includes: In the sniff broadcast phase, all the nodes except the control server forward the sniff broadcast according to the forwarding rule.
7. The broadcasting method according to claim 1, characterized in that: When the control server performs directional broadcasting to the managed target node according to the broadcasting demand, it also includes: The node records the broadcast reception time of the directional broadcast message, parses the Internet Protocol address of the broadcast source of the directional broadcast message, and updates the reception time to the broadcast statistics table maintained by itself; Obtaining a broadcast end time according to the sniff broadcast start time of the sniff broadcast phase and the broadcast statistics table when querying the sniff broadcast phase by the Internet Protocol address; Determine the broadcast message transmission delay according to the broadcast end time; Determine the current broadcast message transmission delay of the current node in the formal broadcast phase according to the broadcast start time and the broadcast end time; If the broadcast message transmission delay is greater than the current broadcast message transmission delay, no longer forwarding the broadcast message; If the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay, continue to forward the broadcast message.
8. The broadcasting method according to claim 7, characterized in that: If the broadcast end time cannot be found when searching the broadcast statistics table in the sniffing broadcast stage according to the sniffing broadcast start time in the sniffing broadcast stage and the Internet Protocol address, the method further includes: It is determined that a link anomaly occurs in the node during the sniff broadcast phase, and the Internet Protocol address, the directional broadcast start time, and the directional broadcast reception time are stored in the broadcast statistics table.
9. The broadcasting method according to claim 7, characterized in that: After the control server performs sniffing broadcasting on nodes in all subnets managed by the control server through all communication links, the control server further includes: Determine the shortest broadcast delay corresponding to each of the nodes.
10. The broadcasting method according to claim 3, characterized in that: Also includes: Each of the nodes generates the broadcast statistics table maintained by itself; The broadcast statistics table includes the Internet Protocol address of the broadcast source, the broadcast start time and the broadcast arrival time.
11. The broadcasting method according to claim 1, characterized in that: Also includes: The router of the local subnet generates the direct link table; The direct link table includes a local field programmable gate array accelerator Internet Protocol address and a direct field programmable gate array accelerator Internet Protocol address.
12. The broadcasting method according to claim 1, characterized in that: During the formal broadcast phase, the following also apply: A formal broadcast forwarding rule is set, wherein when the control server performs a directed broadcast, in addition to all nodes in the target directed subnet, the forwarding router and the field programmable gate array accelerator under the forwarding router that has a direct link with the field programmable gate array accelerator in the directed subnet can also participate in the forwarding of the directed broadcast.
13. The broadcasting method according to claim 1, characterized in that: If the broadcast message transmission delay is greater than the current broadcast message transmission delay, the method further includes: It is determined that the broadcast message received by the current node at the broadcast arrival time originates from a communication link that takes a long time.
14. The broadcasting method according to claim 1, characterized in that: If the broadcast message transmission delay is less than or equal to the current broadcast message transmission delay, the method further includes: The broadcast end time in the broadcast statistics table is updated to the broadcast arrival time.
15. The broadcasting method according to claim 1 or 8, characterized in that: Also includes: After the formal broadcast phase ends, each of the nodes clears its own broadcast statistics table, and the router clears its own direct link table.
16. The broadcasting method according to claim 1, characterized in that: Before the sniffing broadcast stage, it also includes: Building a field programmable gate array accelerator cluster consisting of the control server, the router and the field programmable gate array accelerator; Among them, a routing link is provided between the control server, the router and the field programmable gate array accelerator, and the direct link is provided between the field programmable gate array accelerators belonging to different routers; the control server is configured to manage the field programmable gate array accelerator cluster; and the field programmable gate array accelerator is configured to perform network communication and application computing.
17. The broadcasting method according to claim 16, characterized in that: The field programmable gate array accelerator comprises: A communication sub-kernel, a calculation sub-kernel and a control sub-kernel; the communication sub-kernel is configured for network communication, the calculation sub-kernel is configured for application calculation, and the control sub-kernel is configured for executing logic control.
18. A broadcast system for a field programmable gate array accelerator cluster, characterized in that: include: The sniffing broadcast module is configured to control the server to perform sniffing broadcast on nodes in all managed subnets through all communication links during the sniffing broadcast phase; the nodes include routers and field programmable gate array accelerators; The topology filling module is configured to, in the topology filling phase, regard the two field programmable gate array accelerators that forward the sniff broadcast message through the direct link in the sniff broadcast phase as connected field programmable gate arrays, and upload the information of the connected field programmable gate array accelerators to the router of the local subnet; the router of the local subnet records the information of the connected field programmable gate array accelerators into the direct link table; The formal broadcast module is configured so that during the formal broadcast phase, the control server performs directional broadcasting to the managed target nodes according to broadcast requirements.
19. A non-volatile readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 17 are implemented.
20. An electronic device, characterized in that: The method comprises a memory and a processor, wherein a computer program is stored in the memory, and when the processor calls the computer program in the memory, the steps of the method according to any one of claims 1 to 17 are implemented.
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