Display panel and display device

Abstract

The present disclosure relates to a display panel. The display panel comprises a functional layer group; the side of the functional layer group away from a base substrate comprises at least one area where a pattern is to be formed and other areas; the other areas are located on the periphery of said areas; at least some of the other areas are higher than said areas; and the distance between the at least some of the other areas and the base substrate is greater than the distance between said areas and the base substrate. A step is formed between other areas and areas where patterns are to be formed, the areas where patterns are to be formed are not scratched when a fine mask moves, and formation of particle foreign matters in the areas where patterns are to be formed is avoided, improving the recognition accuracy of a test device, and thus improving the vapor deposition yield. The present disclosure further provides a display device comprising the display panel.

Description

Display panel and display device

[0001] Cross-references

[0002] This disclosure claims priority to Chinese patent application number 202310735708.0, filed on June 20, 2023, entitled “Display Panel and Display Device,” and the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0004] By monitoring the offset of the center of the pattern area to be formed relative to the center of the alignment mark, the offset of the entire fine metal mask can be estimated.

[0005] When the fine metal mask plate fluctuates, it is easy to scratch the area on the backplane where the pattern is to be formed, forming particle foreign matter in the area where the pattern is to be formed, reducing the recognition accuracy of the test device and affecting the evaporation yield.

[0006] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0007] Summary of the Invention

[0008] The purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art and to provide a display panel and a display device.

[0009] According to one aspect of the present disclosure, a display panel is provided, comprising a display area and a non-display area located periphery of the display area, the display panel comprising a base substrate and a functional layer group; the functional layer group is arranged on one side of the base substrate, and the side of the functional layer group away from the base substrate comprises at least one area to be patterned and other areas, at least one area to be patterned is located in the non-display area, the other areas are located periphery of the area to be patterned, and the distance between at least part of the other areas and the base substrate is greater than the distance between the area to be patterned and the base substrate.

[0010] In one embodiment of the present disclosure, the functional layer group includes a planarization layer group, a first electrode, and a pixel defining layer, the planarization layer group includes a first planarization layer and a second planarization layer, the first planarization layer is arranged on one side of the base substrate, and the second planarization layer is located on the side of the first planarization layer away from the base substrate; the first electrode is arranged on the side of the planarization layer group away from the base substrate; the pixel defining layer is arranged on the side of the first electrode away from the base substrate, the pixel defining layer is provided with a pixel opening, and the pixel opening exposes the first electrode.

[0011] In one embodiment of the present disclosure, the other areas include an alignment pattern area, which is located in the non-display area and is arranged adjacent to the pattern area to be formed. The functional layer group includes an alignment pattern, and the orthographic projection of the alignment pattern on the base substrate is at least partially located within the orthographic projection of the alignment pattern area on the base substrate.

[0012] In one embodiment of the present disclosure, the other areas also include a supporting area, which is arranged at the periphery of the alignment pattern area, and the distance between the supporting area and the base substrate is greater than the distance between the pattern area to be formed and the alignment pattern area and the base substrate.

[0013] In one embodiment of the present disclosure, the alignment pattern and the first electrode are provided in the same layer and made of the same material.

[0014] In one embodiment of the present disclosure, the functional layer group further includes a spacer layer, which is located on the side of the pixel defining layer away from the base substrate. The spacer layer includes a supporting portion. The pattern area to be formed is located on the side of the pixel defining layer away from the base substrate, and the supporting area is located on the side of the supporting portion away from the base substrate.

[0015] In one embodiment of the present disclosure, the functional layer group is provided with a first opening in the non-display area, the first opening passes through at least a portion of the pixel defining layer, the pattern area to be formed is located in the first opening, and the alignment pattern area is provided on the surface of the pixel defining layer away from the base substrate.

[0016] In one embodiment of the present disclosure, the first opening includes a first opening segment passing through the pixel defining layer, or a first opening segment passing through the pixel defining layer and a second opening segment passing through the second planarization layer, and the orthographic projection of the first opening segment on the base substrate coincides with the orthographic projection of the second opening segment on the base substrate.

[0017] In one embodiment of the present disclosure, the functional layer group is provided with a second opening in the non-display area, the second opening passes through at least a portion of the pixel defining layer, the pattern area to be formed and the alignment pattern area are both located within the second opening, and the support area is located on the side of the pixel defining layer away from the base substrate.

[0018] In one embodiment of the present disclosure, the functional layer group further includes a source-drain metal layer, which is located between the first planarization layer and the base substrate, and / or between the first planarization layer and the second planarization layer, and the alignment pattern is set in the same layer and material as the source-drain metal layer.

[0019] In one embodiment of the present disclosure, the functional layer group is provided with a third opening in the non-display area, the third opening passes through at least a portion of the second planarization layer, the pattern area to be formed and the alignment pattern area are both located within the third opening, the third opening includes a first sub-opening area and a second sub-opening area, the alignment pattern is provided in the first sub-opening area, the pixel defining layer covers the second sub-opening area, and covers the side of the alignment pattern and the second planarization layer away from the base substrate, the alignment pattern area overlaps with the orthographic projection of the first sub-opening area on the pixel defining layer, and the pattern area to be formed overlaps with the orthographic projection of the second sub-opening area on the pixel defining layer.

[0020] In one embodiment of the present disclosure, the non-display area includes a recognition area, the alignment pattern and the pattern area to be formed constitute a pattern group to be recognized, the pattern group to be recognized is located in the recognition area, the support portion is arranged around the pattern group to be recognized, and the support portion is located outside the recognition area or inside the recognition area.

[0021] In one embodiment of the present disclosure, when the support portion is located outside the identification area, the distance between the support portion and the edge of the identification area is less than 1 mm.

[0022] In one embodiment of the present disclosure, the size of the support portion along the first direction is not equal to the size of the support portion along the second direction. The first direction and the second direction are both located on the surface of the substrate, and the second direction is perpendicular to the first direction.

[0023] In one embodiment of the present disclosure, a size of the support portion along the first direction is 50 μm to 100 μm.

[0024] In one embodiment of the present disclosure, the height difference between the support area and the area to be patterned is 1 μm to 2 μm.

[0025] In one embodiment of the present disclosure, at least one first groove is provided on the support portion, and an extending direction of the first groove is the same as an extending direction of the support portion.

[0026] In one embodiment of the present disclosure, the support portion is a continuous and closed structure, and the outline of the orthographic projection of the support portion on the base substrate is an ellipse, a circle, or a polygon.

[0027] In one embodiment of the present disclosure, the support portion includes at least one group of support segments, and one group of support segments includes two support segments, and the two support segments are arranged parallel to two opposite sides of the identification area.

[0028] In one embodiment of the present disclosure, the supporting portion includes a plurality of supporting blocks, and the plurality of supporting blocks are distributed along the contour of the identification area.

[0029] In one embodiment of the present disclosure, the shape of the orthographic projection of the support block on the substrate is rectangular, circular or polygonal.

[0030] In one embodiment of the present disclosure, the pattern area to be formed includes a plurality of graphic areas to be formed, and the plurality of graphic areas to be formed are arranged in sequence along a first direction. The alignment pattern includes at least one first alignment mark, a plurality of second alignment marks and a third alignment mark. At least one first alignment mark is set along the first direction and is located on the same straight line as the plurality of graphic areas to be formed; a plurality of second alignment marks are set along the second direction, and the second direction intersects with the first direction, and the plurality of second alignment marks are respectively located on the same straight line as the plurality of graphic areas to be formed along the second direction; the third alignment mark is set at the intersection of the straight line where the first alignment mark is located and the straight line where the second alignment mark is located.

[0031] In one embodiment of the present disclosure, the display panel includes a plurality of pattern groups to be recognized, and the plurality of pattern groups to be recognized are all located in the display area.

[0032] In one embodiment of the present disclosure, a light-emitting functional layer is provided on the side of each pattern area to be formed away from the base substrate, and the distance between at least part of the other areas and the base substrate is greater than the distance between the light-emitting functional layer and the base substrate.

[0033] According to another aspect of the present disclosure, a display device is provided, including the display panel provided by one aspect of the present disclosure.

[0034] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0036] FIG1 is a planar schematic diagram showing the distribution of a group of patterns to be recognized on a display panel according to an embodiment of the present disclosure.

[0037] FIG2 is a partial enlarged view of portion A in FIG1 .

[0038] FIG3 is a plan view schematically illustrating the positional relationship between the pattern area to be formed and the alignment pattern in the pattern group to be identified according to an embodiment of the present disclosure.

[0039] FIG4 is a cross-sectional schematic diagram illustrating a situation in which a fine metal mask plate and a back plate according to an embodiment of the present disclosure are scratched.

[0040] FIG5 is a cross-sectional schematic diagram of another situation in which the fine metal mask plate and the back plate involved in the embodiment of the present disclosure are scratched.

[0041] FIG6 is a planar schematic diagram of the fine metal mask plate and the back plate involved in the embodiment of the present disclosure when they are scratched.

[0042] 7 is a schematic cross-sectional view of the display panel according to an embodiment of the present disclosure, when the supporting portion is located on the spacer layer and the supporting area is a side of the supporting portion away from the base substrate.

[0043] FIG8 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure, wherein the supporting portion is located on the pixel defining layer and the supporting area is a side of the supporting portion away from the base substrate.

[0044] FIG9 is a schematic cross-sectional view of the display panel when a first groove is provided on a side of the support portion away from the base substrate in FIG7 .

[0045] FIG10 is a schematic cross-sectional view of the display panel when a first groove is provided on a side of the support portion away from the base substrate in FIG8 .

[0046] FIG11 is a plan view of a supporting portion surrounding a pattern group to be identified according to an embodiment of the present disclosure.

[0047] FIG12 is a plan view of another supporting portion according to an embodiment of the present disclosure surrounding a pattern group to be identified.

[0048] FIG13 is a planar schematic diagram of an embodiment of the present disclosure in which a support portion includes two support segments, and the two support segments are arranged along a first direction.

[0049] FIG14 is a planar schematic diagram of an embodiment of the present disclosure in which a support portion includes two support segments, and the two support segments are arranged along the second direction.

[0050] FIG15 is a plan view of a supporting portion according to an embodiment of the present disclosure, wherein the supporting portion includes a plurality of supporting blocks, and the supporting blocks are rectangular in shape.

[0051] FIG16 is a plan view of a supporting portion according to an embodiment of the present disclosure, wherein the supporting portion includes a plurality of supporting blocks, and the supporting blocks are circular in shape.

[0052] FIG17 is a cross-sectional view of a display panel according to an embodiment of the present disclosure having a first opening and an alignment pattern and a first electrode disposed in the same layer.

[0053] FIG18 is a cross-sectional view of a display panel according to an embodiment of the present disclosure having a first opening and an alignment pattern and a second source electrode disposed in the same layer.

[0054] FIG19 is a cross-sectional view of a display panel according to an embodiment of the present disclosure having a third opening and an alignment pattern located within the third opening.

[0055] Description of reference numerals: 1-fine metal mask, 2-display panel, 201-display area, 202-non-display area, 2021-identification area, 203-cofferdam, 2031-first cofferdam, 2032-second cofferdam, 20-base substrate, 21- Functional layer group, 211-pattern area to be formed, 2111-first pattern area to be formed, 2112-second pattern area to be formed, 2113-third pattern area to be formed, 2114-fourth pattern area to be formed, 2115-fifth pattern area to be formed, 212-alignment pattern area, 213-support area, 214-support portion, 2141-first groove, 2142-support segment, 2143-support block, 215-first opening, 2151-first opening segment, 2152-second opening segment, 216-second opening, 217-third opening, 2171-first sub-opening area, 2172-second sub-opening area, 22-buffer layer, 23-driving circuit layer, 231-thin film transistor, 2311-active layer, 2312-gate insulating layer, 2313-gate, 23 14-interlayer insulating layer, 2315-interlayer dielectric layer, 2316-first source electrode, 2317-drain electrode, 2318-protective layer, 2319-second source electrode, 232-alignment pattern, 2321-first alignment mark, 2322-second alignment mark, 2323-third alignment mark, 24-planarization layer group, 241-first planarization layer, 242-second planarization layer, 25-pixel definition layer, 251-pixel opening, 26-pixel layer, 261-first electrode, 262-light-emitting layer group, 2621-patterned layer, 2622-common layer, 263-second electrode, 265-light-emitting functional layer, 27-encapsulation layer, 271-first inorganic encapsulation layer, 272-organic encapsulation layer, 273-second inorganic encapsulation layer, 28-spacer layer, 281-spacer column, 29-backplane. DETAILED DESCRIPTION

[0056] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0057] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one illustrated component to another, these terms are used herein for convenience only, such as in accordance with the orientation of the illustrations in the accompanying drawings. It will be understood that if the illustrated device were flipped upside down, the component described as "upper" would become the component "lower." When a structure is referred to as "on" another structure, this may mean that the structure is integrally formed with the other structure, that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via the other structure.

[0058] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0059] OLED display devices are currently mainly prepared by evaporating and depositing the light-emitting layer (EL) on the backplane (BP) using a fine metal mask (FMM). In order to ensure that after the evaporation is completed, all the light-emitting materials pass through the pattern openings to be formed on the fine metal mask and fall on the position of the light-emitting unit of the sub-pixel corresponding to the backplane, it is necessary to design a pixel position accuracy test element group (Pixel Position Accuracy TEG, PPA Teg) to monitor the alignment accuracy of the evaporation process. The pixel position accuracy test element group is used to mark the difference between the actual evaporation position of the light-emitting functional layer and the ideal evaporation position, which can be achieved by identifying the light-emitting functional layer.

[0060] As shown in Figures 1 and 2, taking a rectangular display panel as an example, the non-display area 202 of the display panel 2 may include two first sub-non-display areas extending along a first direction and two second sub-non-display areas extending along a second direction, wherein the second sub-non-display area located at the bottom of the display panel is provided with a binding area, and the non-display area 202 is provided with a plurality of identification areas 2021, and the identification area 2021 is provided with a pattern group to be identified, which can be placed in the two first sub-non-display areas, usually in the second sub-non-display area with the binding area. Of course, in some cases, it may also be placed in the second sub-non-display area. It should be noted that the first direction is the x-direction in Figure 1, and the second direction is the y-direction in Figure 1.

[0061] As shown in FIG3 , the pattern group to be identified includes a pattern area 211 to be formed, and the pattern area 211 to be formed includes a first pattern area 2111 to be formed, a second pattern area 2112 to be formed, a third pattern area 2113 to be formed, a fourth pattern area 2114 to be formed, and a fifth pattern area 2115 to be formed. The third pattern area 2113 to be formed, the fourth pattern area 2114 to be formed, the fifth pattern area 2115 to be formed, the first pattern area 2111 to be formed, and the second pattern area 2112 to be formed can be arranged sequentially along a first direction.

[0062] The pattern group to be identified also includes an alignment pattern 232, which includes at least one first alignment mark 2321, multiple second alignment marks 2322 and a third alignment mark 2323. The first alignment mark 2321 is arranged along the first direction and is located on the same straight line as the various graphic areas to be formed; the multiple second alignment marks 2322 are arranged along the second direction, and the second direction intersects with the first direction. The multiple second alignment marks 2322 are respectively located on the same straight line as the various graphic areas to be formed along the second direction; the third alignment mark 2323 is set at the intersection of the straight line where the first alignment mark 2321 is located and the straight line where the second alignment mark 2322 is located.

[0063] An alignment pattern 232 can be set to monitor the position accuracy of various sub-pixel light-emitting layers in the non-display area 202. Multiple alignment marks can calibrate the ideal positions of various graphic areas to be formed. By monitoring the offset between the center of each light-emitting layer and each auxiliary layer and the center of the alignment mark, the overall offset of the fine metal mask plate can be estimated, thereby re-stretching the fine metal mask plate or compensating and correcting the evaporation process.

[0064] There is a problem of scratches between the fine metal mask plate and the backplane. As shown in Figure 4, the display panel includes a backplane, which may include a base substrate 20, a driving circuit layer 23, a planarization layer group 24 and a pixel definition layer 25. The driving circuit layer 23 is arranged on one side of the base substrate 20, the planarization layer group 24 is on the side of the driving circuit layer 23 away from the base substrate 20, and the pixel definition layer 25 is arranged on the side of the planarization layer group 24 away from the base substrate 20. When the pixel layer is evaporated on the pixel definition layer 25, the light-emitting functional layer is formed on the pattern area to be formed in the pixel definition layer. The fine metal mask plate 1 is located on the side of the spacer column 281 of the spacer layer 28 away from the backplane. There is a step difference between the fine metal mask plate 1 and the pattern area to be formed. The fine metal mask plate 1 will fluctuate during the evaporation process (displacement in the direction perpendicular to the backplane and in the direction parallel to the backplane), resulting in scratches between the fine metal mask plate 1 and the backplane, generating particulate foreign matter, and affecting the recognition accuracy of the pixel position accuracy test element group 3.

[0065] As shown in FIG5 , in order to eliminate the step difference between the fine metal mask plate 1 and the back plate, a spacer layer 28 is provided in the area to be patterned, and a light-emitting material layer for forming sub-pixels is formed on the spacer layer 28 so that the side of the fine metal mask plate 1 close to the back plate is flush with the area to be patterned. However, since the fluctuation of the fine metal mask plate 1 still exists (displacement in a direction perpendicular to the back plate and in a direction parallel to the back plate), the fine metal mask plate 1 will still be in direct contact with the area to be patterned, and scratches will also occur, affecting the recognition accuracy of the pixel position accuracy test element group 3. The scratch situation can be referred to FIG6 , where it can be seen that particulate foreign matter is distributed on the back plate 29.

[0066] Based on this, embodiments of the present disclosure provide a display panel. As shown in Figures 7 to 19, the display panel 2 has a display area 201 and a non-display area 202 located outside the display area 201. The display panel 2 includes a base substrate 20 and a functional layer group 21. The functional layer group 21 is disposed on one side of the base substrate 20. The side of the functional layer group 21 away from the base substrate 20 includes at least one area 211 to be patterned and other areas. The at least one area 211 to be patterned is located in the non-display area, and the other areas are located outside the area 211 to be patterned. The distance between at least some of the other areas and the base substrate 20 is greater than the distance between the area 211 to be patterned and the base substrate 20.

[0067] The side of the functional layer group 21 away from the base substrate 20 includes at least one pattern area 211 to be formed and other areas. The other areas are located on the periphery of the pattern area to be formed. At least part of the other areas is higher than the pattern area 211 to be formed. The distance between at least part of the other areas and the base substrate 20 is greater than the distance between the pattern area 211 to be formed and the base substrate 20. A step difference can be formed between the other areas and the pattern area 211 to be formed. When the fine mask plate fluctuates, it will not scratch the pattern area 211 to be formed, thereby avoiding the formation of particulate foreign matter in the pattern area 211 to be formed, thereby improving the recognition accuracy of the test device and thereby improving the evaporation yield.

[0068] It should be noted that the other areas refer to areas of the display panel 2 other than the area 211 to be patterned, and may include areas of the non-display area 202 other than the area 211 to be patterned, and may also include part of the display area 201 .

[0069] The display panel involved in the embodiment of the present disclosure is described in detail below with reference to specific examples.

[0070] As shown in Figures 7 to 10, the display panel 2 includes a base substrate 20 and a functional layer group 21 arranged on one side of the base substrate 20. The display panel 2 has a display area 201 and a non-display area 202 located outside the display area 201. The functional layer group 21 includes a driving circuit layer and a pixel layer. The driving circuit layer is arranged on one side of the base substrate 20, and the pixel layer is arranged on the side of the driving circuit layer away from the base substrate 20.

[0071] The functional layer group 21 includes a planarization layer group 24 . The planarization layer group 24 is disposed between the driving circuit layer and the pixel layer. The planarization layer group 24 may include a first planarization layer. The first planarization layer is disposed on a side of the driving circuit layer away from the base substrate 20 .

[0072] The driving circuit layer may include a plurality of thin film transistors 231. The thin film transistors 231 may be top-gate or bottom-gate. Taking the top-gate thin film transistor 231 as an example, the thin film transistor 231 may include an active layer 2311, a gate insulating layer 2312, a gate 2313, and a source / drain metal layer, wherein:

[0073] The active layer 2311 is disposed on one side of the base substrate 20 . The material of the active layer 2311 may be polysilicon, amorphous silicon, etc. The active layer 2311 may include a channel region and two doping regions of different doping types located on both sides of the channel region.

[0074] The gate insulating layer 2312 may cover the active layer 2311 and the base substrate 20 , and the gate insulating layer 2312 may be made of an insulating material such as silicon oxide.

[0075] The gate 2313 is arranged on the side of the gate insulation layer 2312 away from the base substrate 20 and is opposite to the active layer 2311, that is, the projection of the gate 2313 on the base substrate 20 is located within the projection range of the active layer 2311 on the base substrate 20. For example, the projection of the gate 2313 on the base substrate 20 coincides with the projection of the channel region of the active layer 2311 on the base substrate 20.

[0076] The thin film transistor 231 further includes an interlayer insulating layer 2314, which covers the gate electrode 2313 and the gate insulating layer 2312. The thin film transistor 231 further includes an interlayer dielectric layer 2315, which is disposed on a side of the interlayer insulating layer 2314 away from the base substrate 20. The interlayer insulating layer 2314 and the interlayer dielectric layer 2315 are both made of insulating materials, but the materials of the interlayer insulating layer 2314 and the interlayer dielectric layer 2315 can be different.

[0077] The source-drain metal layer may include a first source-drain metal layer, which is arranged on the surface of the interlayer dielectric layer 2315 away from the base substrate 20, and the first source-drain metal layer includes a first source 2316 and a drain 2317, and the first source 2316 and the drain 2317 are connected to the active layer 2311. For example, the first source 2316 and the drain 2317 are respectively connected to the two doped regions of the corresponding active layer 2311 through vias.

[0078] A protective layer 2318 is provided on the side of the first source electrode 2316 away from the base substrate 20. The protective layer 2318 covers the first source electrode 2316 and the drain electrode 2317. A first planarization layer 24 is provided on the side of the first source / drain metal layer away from the base substrate 20. The first planarization layer 24 is provided on the side of the protective layer 2318 away from the base substrate 20. The first planarization layer 24 covers the protective layer 2318, and the surface of the first planarization layer 24 away from the base substrate 20 is flat.

[0079] The source-drain metal layer can also include a second source-drain metal layer, the second source-drain metal layer includes a second source 2319, and a second planarization layer 242 is provided on the side of the second source 2319 away from the base substrate 20. The second planarization layer covers the second source 2319 and the first planarization layer 24. The second source 2319 is connected to the first source 2316 through a via.

[0080] It should be noted that a buffer layer 22 is usually provided between the base substrate 20 and the driving circuit layer.

[0081] A pixel definition layer 25 and a pixel layer 26 may be provided on the side of the driving backplane away from the base substrate 20. The pixel definition layer 25 has a plurality of pixel openings 251, and the pixel layer 26 includes a plurality of sub-pixels, each of which is disposed within the plurality of pixel openings 251. An array of multiple sub-pixels is distributed on the side of the driving backplane away from the base substrate 20. Specifically, the sub-pixels may be located on the side of the first planarization layer 24 or the second planarization layer away from the base substrate 20. It should be noted that the sub-pixels may include red, green, or blue sub-pixels, depending on the color of the emitted light.

[0082] Each sub-pixel may include a first electrode 261, a light-emitting layer group 262, and a second electrode 263. The first electrode 261 is located on the surface of the driving backplane away from the base substrate 20, the light-emitting layer group 262 is located on the surface of the first electrode 261 away from the base substrate 20, and the second electrode 263 is located on the surface of the light-emitting layer group 262 away from the base substrate 20. The first electrode 261 and the second electrode 263 can drive the pixel layer to emit light to display an image.

[0083] The first electrode 261 is connected to the first source electrode 2316 or the second source electrode 2319. When the thin film transistor 231 includes only the first source electrode 2316, the first electrode 261 is connected to the first source electrode 2316, and a pixel defining layer 25 is provided to cover the first electrode 261 and the first planarization layer 24. When the thin film transistor 231 also includes the second source electrode 2319, the first electrode 261 is connected to the second source electrode 2319, and a pixel defining layer 25 is provided to cover the first electrode 261 and the fourth planarization layer.

[0084] The second electrode 263 can be used as a cathode, and the first electrode 261 can be used as an anode. The light-emitting layer group 262 can be driven to emit light by applying a signal to the first electrode 261. The specific light-emitting principle will not be described in detail here.

[0085] The light-emitting layer group 262 may include an electroluminescent organic light-emitting material. For example, the light-emitting layer group 262 may include a patterned layer 2621 and a common layer 2622 stacked on the first electrode 261. The patterned layer 2621 may include a first patterned portion and a second patterned portion. The first patterned portion is located on a side of the first electrode 261 away from the base substrate 20, and the second patterned portion is located on a side of the pixel defining layer 25 away from the base substrate 20. The orthographic projection of the common layer 2622 on the base substrate 20 covers the orthographic projections of each first electrode 261 on the base substrate 20, as well as the portion of the pixel defining layer 25 located between any two adjacent first electrodes 261.

[0086] The patterned layer 2621 may include an auxiliary layer and a light-emitting layer. The auxiliary layer typically includes a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. The common layer 2622 is typically a charge generation layer. A patterned area is typically provided on a mask, and a process such as evaporation is used to form the auxiliary layer and light-emitting layers for different color sub-pixels.

[0087] In addition, the display panel 2 of the present disclosure may further include an encapsulation layer 27. The encapsulation layer 27 is disposed on a side of the pixel layer 26 away from the base substrate 20, thereby encapsulating the pixel layer 26 and preventing corrosion by water and oxygen. The encapsulation layer 27 may have a single-layer or multi-layer structure, and the material of the encapsulation layer 27 may include organic or inorganic materials, which are not particularly limited herein.

[0088] In this embodiment, the encapsulation layer 27 may include a first inorganic encapsulation layer 271, an organic encapsulation layer 272, and a second inorganic encapsulation layer 273. The first inorganic encapsulation layer 271 is provided on a side of the pixel layer 26 away from the base substrate 20, the organic encapsulation layer 272 is provided on a side of the first inorganic encapsulation layer 271 away from the base substrate 2020, and the second inorganic encapsulation layer 273 is provided on a side of the organic encapsulation layer 272 away from the base substrate 20. The inorganic encapsulation layer 271 and the second inorganic encapsulation layer 273 may be formed by vapor deposition, and the organic encapsulation layer 272 may be formed by inkjet printing and leveling.

[0089] Because the flow of liquid organic encapsulating material can easily cause it to overflow, to prevent it from overflowing, especially at the lower frame, a weir has traditionally been provided in the non-display area 202 away from the display area 201 to act as a barrier. The cross-sectional shape of the weir can be rectangular as shown in the figure, or trapezoidal, with at least one side of the weir near the display area 201 being inclined, without limitation.

[0090] The non-display area 202 is provided with a plurality of cofferdams 203 which are sequentially away from the display area 201 . The plurality of cofferdams 203 may include a first cofferdam 2031 and a second cofferdam 2032 . The first cofferdam 2031 is provided around the display area 201 ; the second cofferdam 2032 is provided around the first cofferdam 2031 .

[0091] As shown in Figure 7, the pattern area 211 to be formed is arranged on the side of the pixel defining layer away from the base substrate 20, and the side of the functional layer group 21 away from the base substrate 20 also includes other areas located outside the pattern area 211. The other areas include an alignment pattern area 212. The alignment pattern area 212 is located in the non-display area 202 and is arranged adjacent to the pattern area 211 to be formed. The alignment pattern area 212 is also located on the side of the pixel defining layer away from the base substrate 20.

[0092] The alignment pattern region 212 is provided with an alignment opening, and the alignment marks of the alignment pattern 232 are disposed within the alignment opening. Referring to the figure, the second alignment mark 2322 and the third alignment mark 2323 are both located within the alignment pattern region 212. It will be appreciated that the orthographic projection of the alignment pattern 232 on the base substrate 20 is at least partially located within the orthographic projection of the alignment pattern region 212 on the base substrate 20. The alignment pattern 232 can be disposed on a side of the second planarization layer away from the base substrate 20, and can be provided in the same layer and material as the first electrode 261.

[0093] Other areas include a support region 213, which is located outside the alignment pattern region 212. The support region 213 includes a support portion 214, which is located in the spacer layer 28 and is made of the same layer and material as the spacer pillars 281. The support region 213 is located on the side of the support portion 214 away from the base substrate 20. The distance between the support region 213 and the base substrate 20 is greater than the distance between the pattern region 211 to be formed and the base substrate 20, and the distance between the support region 213 and the base substrate 20 is greater than the distance between the alignment pattern region 212 and the base substrate 20. When the fine mask contacts the spacer pillars 281, the opening in the pattern region to be formed will not scratch the pattern region to be formed.

[0094] As shown in FIG8 , the difference from FIG7 is that the alignment pattern 232 is provided on the same layer as the first or second source electrode 2319. That is, the alignment pattern 232 can be provided between the interlayer dielectric layer and the first planarization layer, or between the first planarization layer and the second planarization layer. A second opening 216 is provided in the non-display area 202 . The second opening 216 penetrates the pixel definition layer, exposing the second planarization layer. The pattern area 211 to be formed and the alignment pattern area 212 are both located within the second opening 216. The remaining portion of the pixel definition layer in the non-display area 202 serves as a support portion 214.

[0095] It can be understood that the pattern area 211 to be formed and the alignment pattern area 212 are both located on the side of the second planarization layer away from the base substrate 20, and the support area 213 is located on the side of the pixel definition layer away from the base substrate 20. Therefore, the distance between the support area 213 and the base substrate 20 is greater than the distance between the pattern area to be formed and the base substrate 20. A step is formed between the support area 213 and the pattern area to be formed. When the fine mask plate contacts the spacer pillars 281, the opening of the pattern area to be formed will not scratch the pattern area to be formed.

[0096] As shown in Figures 9 and 10, generally, the larger the width of the supporting portion 214, the greater the supporting strength. In order to simultaneously ensure the width of the supporting portion 214 and minimize the contact area between the supporting portion 214 and the fine mask plate, whether it is the display panel 2 in Figure 7 or the display panel 2 in Figure 8, a first groove 2141 can be set on the side of the supporting portion 214 away from the base substrate 20. The extension direction of the first groove 2141 is the same as the extension direction of the supporting portion 214. The number of first grooves 2141 on the supporting portion 214 can be single or multiple.

[0097] The pixel layer 26 located in the display area 201 may generally include a plurality of red sub-pixels, a plurality of green sub-pixels, and a plurality of blue sub-pixels. The blue sub-pixels may include a blue sub-pixel light-emitting layer, the red sub-pixels may include a red sub-pixel auxiliary layer and a red sub-pixel light-emitting layer, and the green sub-pixels may include a green sub-pixel auxiliary layer and a green sub-pixel light-emitting layer.

[0098] The pixel layer 26 of the display area 201 is typically formed layer by layer by vapor deposition on the drive circuit layer using a mask plate 1. When forming the pixel layer 26 on the drive circuit layer, the blue sub-pixel light-emitting layer is generally evaporated first, followed by the red sub-pixel auxiliary layer, then the red sub-pixel light-emitting layer, then the green sub-pixel auxiliary layer, and finally the green sub-pixel light-emitting layer, forming red sub-pixels, green sub-pixels, and blue sub-pixels.

[0099] The red pixel auxiliary layer is located on the side of the red pixel light-emitting layer close to the drive circuit layer, and is used to conduct light when the red pixel emits light. The green pixel auxiliary layer is located on the side of the green pixel light-emitting layer close to the drive backplane, and is used to conduct light when the green pixel emits light. Due to the material of the blue pixel, the blue pixel does not need auxiliary pixels to conduct light when it emits light, so there is no need to produce an auxiliary blue auxiliary layer.

[0100] Because the red sub-pixel light-emitting layer, green sub-pixel light-emitting layer, blue sub-pixel light-emitting layer, red sub-pixel auxiliary layer, and green sub-pixel auxiliary layer are evaporated in different evaporation chambers, it is usually necessary to monitor the evaporation accuracy of the red sub-pixel light-emitting layer, green sub-pixel light-emitting layer, blue sub-pixel light-emitting layer, red sub-pixel auxiliary layer, and green sub-pixel auxiliary layer. Based on this, the light-emitting functional layer 265 is usually formed in each area to be patterned in the non-display area 202. The light-emitting functional layer 265 can be provided in the same layer and material as the patterned layer 2621.

[0101] A fine mask is used to define a light-emitting functional pattern on the side of the driver circuit layer away from the base substrate 20. This light-emitting functional pattern includes multiple light-emitting functional layers 265 spaced apart from each other. Light-emitting layers and auxiliary layers for various sub-pixels are formed within each light-emitting functional layer 265. A spacer layer 28 can be provided between the pixel layer and the pixel defining layer. The spacer layer 28 includes multiple spacer columns 281, which are positioned around the periphery of the pixel opening 251. The spacer columns 281 are used to support the fine mask during evaporation.

[0102] The light-emitting functional layer 265 may include a first pattern to be formed, a second pattern to be formed, a third pattern to be formed, a fourth pattern to be formed and a fifth pattern to be formed. The first pattern to be formed can be set in the same layer and material as the red sub-pixel light-emitting layer, the second pattern to be formed can be set in the same layer and material as the green sub-pixel light-emitting layer, the third pattern to be formed can be set in the same layer and material as the blue sub-pixel light-emitting layer, the fourth pattern to be formed can be set in the same layer and material as the red sub-pixel auxiliary layer, and the fifth pattern to be formed can be set in the same layer and material as the green sub-pixel auxiliary layer, and the first pattern to be formed, the second pattern to be formed, the third pattern to be formed, the fourth pattern to be formed and the fifth pattern to be formed are set so as not to overlap with each other.

[0103] As shown in Figures 11 to 16, multiple regions to be patterned are provided, and the multiple regions to be patterned are arranged sequentially along a first direction. The multiple regions to be patterned are divided into regions to be patterned in the auxiliary layer and regions to be patterned in the light-emitting layer. The regions to be patterned in the auxiliary layer include regions to be patterned in the red sub-pixel auxiliary layer, regions to be patterned in the green sub-pixel auxiliary layer, regions to be patterned in the red sub-pixel light-emitting layer, regions to be patterned in the green sub-pixel light-emitting layer, and regions to be patterned in the blue sub-pixel light-emitting layer.

[0104] A red sub-pixel auxiliary layer is formed in the area where the pattern is to be formed on the red sub-pixel auxiliary layer, a green sub-pixel auxiliary layer is formed in the area where the pattern is to be formed on the green sub-pixel auxiliary layer, a red sub-pixel light-emitting layer is formed in the area where the pattern is to be formed on the red sub-pixel light-emitting layer, a green sub-pixel light-emitting layer is formed in the area where the pattern is to be formed on the green sub-pixel light-emitting layer, and a blue sub-pixel light-emitting layer is formed in the area where the pattern is to be formed on the blue sub-pixel light-emitting layer.

[0105] By monitoring the evaporation positions of the red sub-pixel light-emitting layer, green sub-pixel light-emitting layer, blue sub-pixel light-emitting layer, red sub-pixel auxiliary layer, and green sub-pixel auxiliary layer in the non-display area 202, the evaporation positions of the red sub-pixel light-emitting layer, green sub-pixel light-emitting layer, blue sub-pixel light-emitting layer, red sub-pixel auxiliary layer, and green sub-pixel auxiliary layer in the display area 201 can be determined.

[0106] Referring to Figure 6, the graphic area to be formed of the red sub-pixel auxiliary layer is the first graphic area to be formed 2111, the graphic area to be formed of the green sub-pixel auxiliary layer is the second graphic area to be formed 2112, the graphic area to be formed of the red sub-pixel light-emitting layer is the third graphic area to be formed 2113, the graphic area to be formed of the green sub-pixel light-emitting layer is the fourth graphic area to be formed 2114, and the graphic area to be formed of the blue sub-pixel light-emitting layer is the fifth graphic area to be formed 2115.

[0107] The alignment mark 234 includes at least one first alignment mark 2321 arranged along the first direction, a second alignment mark 2322 arranged along the second direction and corresponding one-to-one to the five graphic areas to be formed, and a third alignment mark 2323 aligned with the position of the first alignment mark 2321 and the position of the second alignment mark 2322. The first alignment mark 2321 is arranged between the fifth graphic area to be formed 2115 and the first graphic area to be formed 2111, and the five second alignment marks 2322 are respectively arranged along the second direction on the same side of the first graphic area to be formed 2111, the second graphic area to be formed 2112, the third graphic area to be formed 2113, the fourth graphic area to be formed 2114, and the fifth graphic area to be formed 2115. The third alignment mark 2323 is located on the same straight line with the five second alignment marks 2322 along the second direction, and the third alignment mark 2323 is arranged between the first alignment mark 2321 corresponding to the fifth graphic area 2115 and the first alignment mark 2321 corresponding to the first graphic area to be formed 2111.

[0108] The non-display area 202 includes an identification area 2021. The alignment pattern 232 and the light-emitting functional layer 265 of the pattern-to-be-formed area 211 form a pattern group to be identified. The pattern group to be identified is located within the identification area 2021. The support portion 214 surrounds the pattern group to be identified. The support portion 214 is located outside or within the identification area 2021. Referring to Figures 1 and 2, to ensure monitoring accuracy, the display panel 2 includes multiple pattern groups to be identified. Each of the multiple pattern groups to be identified is identified by a test element group. The distance between the edge of the pattern-to-be-formed area 211 and the edge of the display area 201 is less than 2 mm.

[0109] When the support portion 214 is within the identification area 2021, in order to ensure the supporting effect while minimizing the impact on the identification process, the size of the support portion 214 along the first direction is not equal to the size of the support portion 214 along the second direction. The first direction is parallel to the surface of the base substrate 20, and the second direction is perpendicular to the surface of the base substrate 20. The size of the support portion 214 along the first direction is 50μm~100μm.

[0110] When the support portion 214 is located outside the identification area 2021, the closer the support portion 214 is to the identification area 2021, the better the support effect. To ensure that the support portion 214 effectively supports the identification area 2021, the support portion 214 cannot be too far away from the identification area 2021. Generally, the distance between the support portion 214 and the edge of the identification area 2021 is less than 1 mm, and this distance can be adjusted according to actual needs.

[0111] The size of the support portion 214 along the first direction is not equal to the size of the support portion 214 along the second direction. The size of the support portion 214 along the first direction is 50 μm to 100 μm. The first direction and the second direction are both located on the surface of the base substrate 20, and the second direction is perpendicular to the first direction.

[0112] It should be emphasized that the distance between the support area 213 and the base substrate 20 is greater than the distance between the area to be patterned 211 and the base substrate 20. It is understood that the height difference between the support area 213 and the area to be patterned 211 is 1 μm to 2 μm to ensure that the support portion 214 plays a protective supporting role.

[0113] As shown in FIG. 11 and FIG. 12 , the support portion 214 is a continuous and closed structure. The outline of the orthographic projection of the support portion 214 on the base substrate 20 may be an ellipse, a circle, a rectangle, or other polygons.

[0114] As shown in Figures 13 and 14, the shape of the support portion 214 can also be a non-closed fully enclosed structure. The support portion 214 includes at least one group of support segments 2142. A group of support segments 2142 includes two support segments 2142. The two support segments 2142 are arranged parallel to the two opposite sides of the identification area 2021. The two support segments 2142 can be arranged on the two sides of the identification area 2021 extending along the first direction, or on the two sides of the identification area 2021 extending along the second direction.

[0115] As shown in Figures 15 and 16, the support portion 214 also includes a plurality of support blocks 2143 arranged along the outline of the identification area 2021. These support blocks 2143 provide a support effect around the area where the pattern is to be formed. The larger the area of ​​the support blocks 2143, the better the support effect. The support blocks 2143 are rectangular, cylindrical, or prism-shaped. The orthographic projection of the support blocks 2143 on the base substrate 20 is rectangular, circular, or polygonal. When the support blocks 2143 are rectangular, the orthographic projection of the support blocks 2143 on the base substrate 20 is a 30×30 μm rectangle.

[0116] As shown in Figures 17 and 18, the difference from Figure 7 is that the display panel 2 is not provided with a support portion 214, and the non-display area 202 is provided with a first opening 215, and the first opening 215 at least passes through a portion of the pixel defining layer. The first opening 215 may include a first opening segment 2151 located in the pixel defining layer, or a first opening segment 2151 located in the pixel defining layer and a second opening segment 2152 located in the second planarization layer. The orthographic projection of the first opening segment 2151 on the base substrate 20 coincides with the orthographic projection of the second opening segment 2152 on the base substrate 20.

[0117] The pattern area 211 to be formed is located within the first opening 215. The bottom of the first opening 215 is the pattern area to be formed. Therefore, the pattern area to be formed is located on the side of the first planarization layer or the second planarization layer away from the base substrate 20. The alignment pattern area 212 is provided on the surface of the pixel definition layer away from the base substrate 20. It can be understood that the distance between the alignment pattern area 212 and the base substrate 20 is greater than the distance between the pattern area to be formed and the base substrate 20. A step is formed between the alignment pattern area 212 and the pattern area to be formed. When the fine mask plate contacts the spacer column 281, the opening of the pattern area to be formed will not scratch the pattern area to be formed.

[0118] In Figure 17 , the alignment pattern 232 can be located on the side of the second planarization layer away from the base substrate 20 . The alignment pattern 232 can be provided in the same layer and material as the first electrode 261 . In Figure 18 , the alignment pattern 232 is provided in the same layer and material as the second source electrode 2319 , meaning that the alignment pattern 232 is provided between the first and second planarization layers. The alignment pattern 232 can also be provided in the same layer and material as the first source electrode, meaning that the alignment pattern 232 can be provided between the interlayer dielectric layer and the first planarization layer.

[0119] As shown in FIG. 19 , the difference from FIG. 19 is that the second planarization layer is provided with a third opening 217, which passes through the second planarization layer, exposing the first planarization layer. The area of ​​the first planarization layer located at the third opening 217 includes a first sub-opening area 2171 and a second sub-opening area 2172. An alignment pattern 232 is provided in the first sub-opening area 2171, and the pixel defining layer covers the second sub-opening area 2172. The alignment pattern 232 is also provided in the first sub-opening area 2171. The pixel defining layer covers the second sub-opening area 2172, as well as the alignment pattern 232 and the side of the second planarization layer away from the base substrate 20. The alignment pattern area 212 overlaps with the orthographic projection of the first sub-opening area 2171 on the pixel defining layer, and the pattern area 211 to be formed overlaps with the orthographic projection of the second sub-opening area 2172 on the pixel defining layer. It should be noted that the second sub-opening is the area within the first sub-opening area 2171 excluding the first sub-opening area 2171.

[0120] It should be noted that the identification area 2021 may also be provided on the side of the second cofferdam 2032 in the non-display area 202 away from the display area 201. It is understandable that the identification area 2021 may be provided in any location within the non-display area 202.

[0121] As shown in Figures 7 and 9, when the light-emitting functional layer 265 is located on the side of the pixel defining layer away from the substrate, the distance between the side of the light-emitting functional layer 265 away from the substrate and the substrate is smaller than the distance between the side of the support portion away from the substrate and the substrate. The distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the second patterned portion away from the substrate is 0 mm, and the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the first patterned portion away from the substrate is 1 to 2 mm.

[0122] As shown in Figures 8 and 10 , when the light-emitting functional layer 265 is located within the second opening, it can be located on the side of the second planarization layer away from the substrate. The distance between the side of the light-emitting functional layer 265 away from the substrate and the substrate is smaller than the distance between the side of the pixel defining layer away from the substrate and the substrate. The thickness of the pixel defining layer is between 1 and 2 mm. Therefore, the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the second patterned portion away from the substrate is -1 to -2 mm, and the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the first patterned portion away from the substrate is 0 mm.

[0123] As shown in Figures 17 and 18, when the light-emitting functional layer 265 is to be formed within the first opening, it can be located on the side of the protective layer away from the substrate, on the side of the first planarization layer away from the substrate, or on the side of the second planarization layer away from the substrate. The distance between the side of the light-emitting functional layer 265 away from the substrate and the substrate is less than the distance between the side of the pixel defining layer located outside the first opening away from the substrate and the substrate. The thickness of the first planarization layer, the second planarization layer, and the pixel defining layer ranges from 1 to 2 mm. Therefore, the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the second patterned portion away from the substrate is -1 to -6 mm, and the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the first patterned portion away from the substrate is -1 to -4 mm.

[0124] As shown in FIG19 , when the light-emitting functional layer 265 is formed within the third opening, it is located on the side of the pixel defining layer away from the substrate. The pixel defining layer can be located on the side of the protective layer away from the substrate, on the side of the first planarization layer away from the substrate, or on the side of the second planarization layer away from the substrate. The distance between the side of the light-emitting functional layer 265 away from the substrate and the substrate is less than the distance between the side of the pixel defining layer located outside the third opening away from the substrate and the substrate. The distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the second patterned portion away from the substrate is -1 to -4 mm, and the distance between the side of the light-emitting functional layer 265 away from the substrate and the side of the first patterned portion away from the substrate is -2 to 0 mm.

[0125] The present disclosure also provides a display device. The display device may include any of the display panels described above. The specific structure and beneficial effects of the display panel have been described in detail above and are therefore not further elaborated here.

[0126] It should be noted that, in addition to the display panel, the display device also includes other necessary components and components, such as circuit boards, power cords, etc. Those skilled in the art can make corresponding supplements based on the specific usage requirements of the display device, which will not be repeated here.

[0127] When the display panel has the structure shown in the figure, the display device can be a traditional electronic device, such as a mobile phone, a computer, a television, and a camcorder, or it can be an emerging wearable device, such as a virtual reality device and an augmented reality device, which are not listed here one by one.

[0128] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.

Claims

1. A display panel having a display area and a non-display area located outside the display area, wherein: The display panel comprises: substrate substrate; A functional layer group is arranged on one side of the base substrate, and the side of the functional layer group away from the base substrate includes at least one pattern area to be formed and other areas, the at least one pattern area to be formed is located in the non-display area, the other areas are located at the periphery of the pattern area to be formed, and the distance between at least part of the other area and the base substrate is greater than the distance between the pattern area to be formed and the base substrate.

2. The display panel according to claim 1, wherein: The functional layer group includes: A planarization layer group, comprising a first planarization layer and a second planarization layer, wherein the first planarization layer is disposed on one side of the substrate, and the second planarization layer is located on a side of the first planarization layer away from the substrate; A first electrode is disposed on a side of the planarization layer group away from the base substrate; The pixel defining layer is arranged on a side of the first electrode away from the base substrate. The pixel defining layer is provided with a pixel opening, and the pixel opening exposes the first electrode.

3. The display panel according to claim 2, wherein: The other areas include an alignment pattern area, which is located in the non-display area and is arranged adjacent to the pattern area to be formed. The functional layer group includes an alignment pattern, and the orthographic projection of the alignment pattern on the base substrate is at least partially located within the orthographic projection of the alignment pattern area on the base substrate.

4. The display panel according to claim 3, wherein: The other regions also include a supporting region, which is arranged at the periphery of the alignment pattern region, and the distance between the supporting region and the base substrate is greater than the distance between the pattern region to be formed and the alignment pattern region and the base substrate.

5. The display panel according to claim 3, wherein: The alignment pattern and the first electrode are provided in the same layer and made of the same material.

6. The display panel according to claim 3, wherein: The functional layer group also includes a spacer layer, which is located on a side of the pixel defining layer away from the base substrate. The spacer layer includes a supporting portion, the pattern area to be formed is located on a side of the pixel defining layer away from the base substrate, and the supporting area is located on a side of the supporting portion away from the base substrate.

7. The display panel according to claim 3, wherein: The functional layer group has a first opening in the non-display area, the first opening at least passes through a portion of the pixel defining layer, the pattern area to be formed is located in the first opening, and the alignment pattern area is located on a surface of the pixel defining layer away from the base substrate.

8. The display panel according to claim 7, wherein: The first opening includes a first opening segment passing through the pixel defining layer, or a first opening segment passing through the pixel defining layer and a second opening segment passing through the second planarization layer, and an orthographic projection of the first opening segment on the base substrate coincides with an orthographic projection of the second opening segment on the base substrate.

9. The display panel according to claim 4, wherein: The functional layer group is provided with a second opening in the non-display area, and the second opening at least passes through a portion of the pixel defining layer. The pattern area to be formed and the alignment pattern area are both located in the second opening, and the support area is located on a side of the pixel defining layer away from the base substrate.

10. The display panel according to claim 9, wherein: The functional layer group also includes a source-drain metal layer, which is located between the first planarization layer and the base substrate, and / or between the first planarization layer and the second planarization layer. The alignment pattern is provided in the same layer and material as the source-drain metal layer.

11. The display panel according to claim 3, wherein: The functional layer group is provided with a third opening in the non-display area, and the third opening at least passes through a portion of the second planarization layer. The pattern area to be formed and the alignment pattern area are both located in the third opening. The third opening includes a first sub-opening area and a second sub-opening area. The alignment pattern is provided in the first sub-opening area. The pixel defining layer covers the second sub-opening area and covers the alignment pattern and a side of the second planarization layer away from the base substrate. The alignment pattern area overlaps with the orthographic projection of the first sub-opening area on the pixel defining layer, and the pattern area to be formed overlaps with the orthographic projection of the second sub-opening area on the pixel defining layer.

12. The display panel according to claim 6, wherein: The non-display area includes a recognition area, the alignment pattern and the pattern area to be formed constitute a pattern group to be recognized, the pattern group to be recognized is located in the recognition area, the support portion is arranged around the pattern group to be recognized, and the support portion is located outside the recognition area or inside the recognition area.

13. The display panel according to claim 12, wherein: When the support portion is located outside the identification area, the distance between the support portion and the edge of the identification area is less than 1 mm.

14. The display panel according to claim 6, wherein: The size of the support portion along the first direction is not equal to the size of the support portion along the second direction. The first direction and the second direction are both located on the surface of the substrate. The second direction is perpendicular to the first direction.

15. The display panel according to claim 14, wherein: The size of the support portion along the first direction is 50 μm to 100 μm.

16. The display panel according to claim 6, wherein: The height difference between the support area and the area to be patterned is 1 μm to 2 μm.

17. The display panel according to claim 12, wherein: The support portion is provided with at least one first groove, and an extending direction of the first groove is the same as an extending direction of the support portion.

18. The display panel according to claim 12, wherein: The support portion is a continuous and closed structure, and the contour shape of the orthographic projection of the support portion on the base substrate is an ellipse, a circle or a polygon.

19. The display panel according to claim 12, wherein: The support portion includes at least one group of support segments, one group of support segments includes two support segments, and the two support segments are arranged parallel to two opposite sides of the identification area.

20. The display panel according to claim 12, wherein: The supporting portion includes a plurality of supporting blocks, and the plurality of supporting blocks are distributed along the contour of the identification area.

21. The display panel according to claim 20, wherein: The shape of the orthographic projection of the support block on the substrate is rectangular, circular or polygonal.

22. The display panel according to claim 3, wherein: The pattern area to be formed includes a plurality of pattern areas to be formed, and the plurality of pattern areas to be formed are arranged in sequence along a first direction, and the alignment pattern includes: At least one first alignment mark is arranged along the first direction and is located on the same straight line as the plurality of graphic areas to be formed; A plurality of second alignment marks are arranged along a second direction, the second direction intersects the first direction, and the plurality of second alignment marks are respectively located on the same straight line along the second direction as the plurality of graphic areas to be formed; A third alignment mark is provided between the straight line where the first alignment mark is located and The intersection of the straight line where the second alignment mark is located.

23. The display panel according to claim 12, wherein: The display panel includes a plurality of pattern groups to be recognized, and the plurality of pattern groups to be recognized are all located in the display area.

24. The display panel according to claim 1, wherein: A light-emitting functional layer is provided on a side of each of the regions to be patterned away from the base substrate, and a distance between at least a portion of the other regions and the base substrate is greater than a distance between the light-emitting functional layer and the base substrate.

25. A display device, wherein: A display panel comprising any one of claims 1 to 24.

Images