Direct-current motor driving control circuit and control method for hydraulic oil pump of rolling stock

Abstract

Disclosed in the present invention are a direct-current motor driving control circuit and control method for a hydraulic oil pump of rolling stock. The circuit comprises a field effect transistor Q1, a triode Q2, a resistor R1, a resistor R2, a resistor R3, an NAND gate UA, a comparator A, a comparator B, a diode D1, a diode D2, an EBCU, an optical coupler I, an optical coupler II, a sawtooth wave generation circuit, a start control configuration circuit, a reference voltage source, an overheating detection circuit, an overvoltage and undervoltage detection circuit, a current measurement circuit, an MOS driving chip, an amplification circuit, and a motor M. The present invention uses two protection mechanisms of different principles so as to more reliably achieve overcurrent protection, and uses various fault indications to accurately and effectively diagnose motor faults. When being applied to hydraulic braking systems of urban rail transit vehicles, the circuit can markedly improve the reliability and safety of motor control for hydraulic oil pumps.

Description

A rail vehicle hydraulic oil pump DC motor drive control circuit and control method Technical Field

[0001] The present invention relates to the field of rail vehicle hydraulic brake control, and in particular to a rail vehicle hydraulic oil pump DC motor drive control circuit and control method. Background Art

[0002] Rail vehicle hydraulic systems typically use hydraulic pumps to provide power, which in turn require a drive method. A common drive method is a DC motor. The operating principle of a DC motor-driven hydraulic pump is as follows: The DC motor is supplied with electrical energy from a power source, generating a magnetic field within the rotor, causing the motor to rotate. The motor shaft is connected to the hydraulic pump shaft. When the motor rotates, the hydraulic pump's rotor also rotates. The movement of the hydraulic pump's rotor causes the hydraulic oil to flow, thereby providing power to the rail vehicle's hydraulic system.

[0003] Currently, the hydraulic pump motors used in rail vehicle hydraulic brakes are often driven directly by power switches. This can easily cause battery voltage fluctuations during startup, impacting the operation of other equipment. High starting currents can also damage motor insulation and reduce motor life. Short circuits in the hydraulic pump's DC motor wiring or due to internal insulation damage are common overcurrent faults, requiring accurate and timely overcurrent monitoring. Therefore, designing a circuit that can easily configure a soft-start function while also providing overcurrent and overheating protection is crucial.

[0004] Currently, no effective solutions have been proposed for the problems in related technologies.

[0005] Summary of the Invention

[0006] In response to the problems in the related art, the present invention proposes a rail vehicle hydraulic oil pump DC motor drive control circuit and control method to overcome the above technical problems existing in the existing related art.

[0007] To this end, the specific technical solutions adopted in the present invention are as follows:

[0008] According to one aspect of the present invention, a rail vehicle hydraulic oil pump DC motor drive control circuit is provided, the circuit including a field effect transistor Q1, a transistor Q2, a resistor R1, a resistor R2, a resistor R3, a NAND gate UA, a comparator A, a comparator B, a diode D1, a diode D2, an EBCU, a first photoelectric isolator, a second photoelectric isolator, a sawtooth wave generating circuit, a startup control configuration circuit, a reference voltage source, an overheat detection circuit, an overvoltage and undervoltage detection circuit, a current detection circuit, a MOS driver chip, an amplifier circuit, and a motor M;

[0009] The output end of the EBCU is connected to the input end of the startup control configuration circuit through the optoelectronic isolator 1. The output end of the startup control configuration circuit is respectively connected to the inverting input end of the comparator B and the anode of the diode D1. The cathode of the diode D1 is connected to the output end of the comparator A. The non-inverting input end of the comparator A is connected to the reference voltage source. The inverting input end of the comparator A is connected to the output end of the amplifier circuit. The input end of the amplifier circuit is respectively connected to one end of the resistor R1 and the source of the field effect transistor Q1. The gate of the field effect transistor Q1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the OUT end of the MOS driver chip. The CS end of the MOS driver chip is connected to the current detection circuit. The ERR end of the MOS driver chip is respectively connected to the optoelectronic isolator 2 and the first pin of the NAND gate UA. The input end of the MOS driver chip is respectively connected to the output end of the comparator B and the collector of the transistor Q2. The non-inverting input end of the comparator B is connected to the sawtooth wave generating circuit.

[0010] The drain of the field effect transistor Q1 is respectively connected to the input end of the current detection circuit, the positive electrode of the diode D2 and one end of the motor M. The other end of the motor M is respectively connected to the negative electrode of the diode D2 and the input end of the over-voltage and under-voltage detection circuit and is connected to 24V. The output end of the over-voltage and under-voltage detection circuit is respectively connected to the second pin of the NAND gate UA and the photoelectric isolator 2. The third pin of the NAND gate UA is connected to the overheat detection circuit. The overheat detection circuit is connected to the input end of the EBCU through the photoelectric isolator 2. The output end of the NAND gate UA is connected to one end of the resistor R3. The other end of the resistor R3 is connected to the base of the transistor Q2. The emitter of the transistor Q2 is grounded.

[0011] Furthermore, the sawtooth wave generating circuit generates a waveform with a frequency of 15 kHz, a peak value of 4.3 V, and a valley value of 0.7 V.

[0012] Furthermore, the startup control configuration circuit includes a square wave generator UE, a dual D flip-flop UD, a NAND gate UB, a transistor Q3, a transistor Q4, an inverter UC, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a diode D3, a capacitor C1, and a capacitor C2;

[0013] The output end of the photoelectric isolator 1 is connected to the DO end of the dual D flip-flop and the base of the transistor Q4 respectively. The emitter of the transistor Q4 is connected to one end of the capacitor C1 and is connected to the power supply Vcc. The other end of the capacitor C1 is connected to one end of the resistor R7 and the input end of the inverter UC respectively. The other end of the resistor R7 is connected to the collector of the transistor Q4 and one end of the resistor R8 respectively. The other end of R8 is grounded.

[0014] The output end of the inverter UC is connected to one end of the resistor R9. The other end of the resistor R9 is connected to the anode of the diode D3, the resistor R10, the resistor R6, and one end of the capacitor C2. The cathode of the diode D3 is connected to the power supply Vcc1. The other end of the capacitor C2 is connected to the other end of the resistor R10 and to ground.

[0015] The other end of the resistor R6 is connected to the collector of the transistor Q3, the emitter of the transistor Q3 is connected to the power supply Vcc, the base of the transistor Q3 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the output end of the NAND gate UB, and the input end of the NAND gate UB is connected to the Q0 end and the Q1 end of the dual D flip-flop respectively. The CP end of the dual D flip-flop is connected to the square wave generator UE, and the dual D flip-flop The end is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the power supply Vcc.

[0016] Furthermore, the square wave generated by the square wave generator UE is a 15.625 kHz square wave.

[0017] Furthermore, the power supply Vcc is 12V, and the power supply Vcc1 is 5V.

[0018] Furthermore, the D0 terminal represents the first input terminal of the dual D flip-flop; the D1 terminal represents the second input terminal of the dual D flip-flop; the Q0 terminal represents the first positive phase output terminal of the dual D flip-flop; the CP terminal represents the clock pulse input terminal of the dual D flip-flop; The terminal indicates the reset terminal; The terminal represents the second inverting output terminal of the dual D flip-flop.

[0019] According to another aspect of the present invention, a method for controlling a DC motor drive of a hydraulic oil pump for a rail vehicle is provided, the method comprising the following steps:

[0020] S1, outputs the start signal A through the EBCU, enters the start control configuration circuit after the photoelectric isolation, and generates the voltage Vb;

[0021] S2. Compare the voltage Vb with the sawtooth wave voltage generated by the sawtooth wave generating circuit through the comparator A to generate a PWM drive signal;

[0022] S3 and PWM drive signals pass through the MOS driver chip and control the on and off of the field effect tube Q1 to realize the drive control of the motor M.

[0023] Furthermore, the start signal is outputted by the EBCU, enters the start control configuration circuit after being optically isolated, and generates the voltage Vb, which includes the following steps:

[0024] S11. If the start signal A is a switch control signal, the switch control signal establishes the Vb voltage through channel I;

[0025] S12. If the start signal A is a frequency signal, the frequency signal establishes the Vb voltage through channel II.

[0026] Furthermore, the voltage Vb is compared with the sawtooth wave voltage generated by the sawtooth wave generating circuit through a comparator A to generate a PWM drive signal, including the following steps:

[0027] S21. If the voltage Vb is greater than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is high;

[0028] S22. If the voltage Vb is less than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is low.

[0029] Furthermore, the frequency signal is 100 Hz-2 kHz.

[0030] The beneficial effects of the present invention are:

[0031] 1. The present invention provides a rail vehicle hydraulic oil pump DC motor drive control circuit, which solves the problem of vehicle battery voltage fluctuation caused by hydraulic brake oil pump motor starting and frequent starting reducing its own life. The soft start circuit is simple, reliable and low-cost.

[0032] 2. The present invention controls the soft-start speed of the DC motor and controls the duty cycle and equivalent voltage of the driving motor after the startup is completed by controlling signals of different specifications, so as to adapt to the pump DC motor load with different power and starting characteristics. In addition, through two overcurrent protection mechanisms with different mechanisms, accurate monitoring and timely protection of overcurrent conditions are achieved, various fault conditions are identified and the output of the power switch is shut down in time, and the relevant fault status is sent to the electronic brake control unit, which facilitates the electronic brake control unit to carry out fault diagnosis.

[0033] 3. The present invention adopts different types of control signals to flexibly control the soft-start speed and the drive waveform after starting to adapt to different DC motor loads. It has the characteristics of simple circuit design and flexible use. The adoption of two different protection mechanisms can more reliably implement overcurrent protection, and through multiple fault indications, it can accurately and effectively diagnose motor faults. Applying this circuit to the hydraulic brake system of urban rail transit vehicles can significantly improve the reliability and safety of hydraulic oil pump motor control. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0035] 1 is a circuit diagram of a rail vehicle hydraulic oil pump DC motor drive control circuit according to an embodiment of the present invention;

[0036] 2 is a circuit diagram of a startup control configuration circuit in a rail vehicle hydraulic oil pump DC motor drive control circuit according to an embodiment of the present invention;

[0037] FIG3 is a flow chart of a method for controlling a driving method of a DC motor of a hydraulic oil pump for a rail vehicle according to an embodiment of the present invention. DETAILED DESCRIPTION

[0038] To further illustrate each embodiment, the present invention provides drawings, which are part of the disclosure of the present invention. They are mainly used to illustrate the embodiments and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. By referring to these contents, ordinary technicians in this field should be able to understand other possible implementation methods and the advantages of the present invention.

[0039] According to an embodiment of the present invention, a rail vehicle hydraulic oil pump DC motor drive control circuit and control method are provided.

[0040] The present invention will now be further described with reference to the accompanying drawings and specific embodiments. As shown in FIG1 , a rail vehicle hydraulic oil pump DC motor drive control circuit according to an embodiment of the present invention includes a field effect transistor Q1, a transistor Q2, a resistor R1, a resistor R2, a resistor R3, a NAND gate UA, a comparator A, a comparator B, a diode D1, a diode D2, an EBCU, a photoelectric isolator 1, a photoelectric isolator 2, a sawtooth wave generating circuit, a startup control configuration circuit, a reference voltage source, an overheating detection circuit, an overvoltage and undervoltage detection circuit, a current detection circuit, a MOS driver chip, an amplifier circuit, and a motor M.

[0041] The output end of the EBCU is connected to the input end of the startup control configuration circuit through the optoelectronic isolator 1. The output end of the startup control configuration circuit is respectively connected to the inverting input end of the comparator B and the anode of the diode D1. The cathode of the diode D1 is connected to the output end of the comparator A. The non-inverting input end of the comparator A is connected to the reference voltage source. The inverting input end of the comparator A is connected to the output end of the amplifier circuit. The input end of the amplifier circuit is respectively connected to one end of the resistor R1 and the source of the field effect transistor Q1. The gate of the field effect transistor Q1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the OUT end of the MOS driver chip. The CS end of the MOS driver chip is connected to the current detection circuit. The ERR end of the MOS driver chip is respectively connected to the optoelectronic isolator 2 and the first pin of the NAND gate UA. The input end of the MOS driver chip is respectively connected to the output end of the comparator B and the collector of the transistor Q2. The non-inverting input end of the comparator B is connected to the sawtooth wave generating circuit.

[0042] The drain of the field effect transistor Q1 is respectively connected to the input end of the current detection circuit, the positive electrode of the diode D2 and one end of the motor M. The other end of the motor M is respectively connected to the negative electrode of the diode D2 and the input end of the over-voltage and under-voltage detection circuit and is connected to 24V. The output end of the over-voltage and under-voltage detection circuit is respectively connected to the second pin of the NAND gate UA and the photoelectric isolator 2. The third pin of the NAND gate UA is connected to the overheat detection circuit. The overheat detection circuit is connected to the input end of the EBCU through the photoelectric isolator 2. The output end of the NAND gate UA is connected to one end of the resistor R3. The other end of the resistor R3 is connected to the base of the transistor Q2. The emitter of the transistor Q2 is grounded.

[0043] Specifically, the EBCU (Electronic Brake Control Unit) is a key component in modern vehicles that controls the braking system. It adjusts braking force distribution based on information such as vehicle speed and brake pressure to improve braking effectiveness and stability.

[0044] Specifically, resistor R1 is a sampling resistor. The collected voltage is amplified and compared with the reference voltage source Vc. If it is higher than Vc, a low level is output, and the Vb voltage is pulled down to VD1 (VD1≤0.7V). After being compared with the sawtooth wave generating circuit, VD1 is always at a low level, thereby shutting down the drive signal and realizing overcurrent monitoring protection.

[0045] Specifically, the CS terminal of the MOS driver chip can monitor the conduction voltage of the field-effect transistor Q1 (N-channel enhancement type field-effect transistor) by starting the control configuration circuit. When an overcurrent occurs, the VDS of the field-effect transistor Q1 increases, and after voltage division, it exceeds the detection threshold of the MOS driver chip's CS terminal, thus identifying an overcurrent. The MOS driver chip will shut down the output to implement the overcurrent protection function. At the same time, the ERR terminal of the MOS driver chip quickly becomes high, turning on transistor Q2 and cutting off the control signal. Among them, the out terminal of the MOS driver chip is the output terminal, the CS terminal is the current detection terminal, and the ERR terminal is the overcurrent fault output terminal.

[0046] Specifically, the overheat detection circuit can implement overheat protection. When the overheat detection circuit recognizes that the temperature is too high, it outputs a high level, the transistor Q2 is turned on, and the control signal is cut off.

[0047] Specifically, the over-voltage and under-voltage detection circuit implements over-voltage and under-voltage protection. When the power supply voltage exceeds the normal voltage range, the current detection circuit outputs a high level, the transistor Q2 is turned on, and the control signal is cut off.

[0048] Specifically, the overheat detection circuit, overvoltage and undervoltage detection circuit, and current detection circuit not only cut off the control signal, but also output relevant fault signals, which are transmitted to the EBCU through optoelectronic isolation, facilitating fault diagnosis and maintenance by the EBCU.

[0049] The sawtooth wave generating circuit generates a waveform with a frequency of 15 kHz, a peak value of 4.3 V, and a valley value of 0.7 V.

[0050] As shown in Figure 2, the startup control configuration circuit includes a square wave generator UE, a dual D flip-flop UD, a NAND gate UB, a transistor Q3, a transistor Q4, an inverter UC, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a diode D3, a capacitor C1, and a capacitor C2.

[0051] Specifically, transistor Q3 is a PNP transistor; resistor R5 is a base resistor; resistor R6 and resistor R8 are both collector resistors R6; transistor Q4 is a PNP transistor; resistor R7 is a discharge resistor R7; resistor R9 and resistor R10 are both voltage divider resistors.

[0052] The output end of the optoelectronic isolator 1 is connected to the DO end of the dual D flip-flop and the base of the transistor Q4 respectively. The emitter of the transistor Q4 is connected to one end of the capacitor C1 and is connected to the power supply Vcc. The other end of the capacitor C1 is connected to one end of the resistor R7 and the input end of the inverter UC respectively. The other end of the resistor R7 is connected to the collector of the transistor Q4 and one end of the resistor R8 respectively. The other end of R8 is grounded.

[0053] The output end of the inverter UC is connected to one end of the resistor R9. The other end of the resistor R9 is respectively connected to the anode of the diode D3, the resistor R10, the resistor R6 and one end of the capacitor C2. The cathode of the diode D3 is connected to the power supply Vcc1. The other end of the capacitor C2 is connected to the other end of the resistor R10 and is grounded.

[0054] The other end of the resistor R6 is connected to the collector of the transistor Q3, the emitter of the transistor Q3 is connected to the power supply Vcc, the base of the transistor Q3 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the output end of the NAND gate UB, and the input end of the NAND gate UB is connected to the Q0 end and the Q1 end of the dual D flip-flop respectively. The CP end of the dual D flip-flop is connected to the square wave generator UE, and the dual D flip-flop The end is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the power supply Vcc.

[0055] The square wave generated by the square wave generator UE is a 15.625kHz square wave.

[0056] Among them, the power supply Vcc is 12V, and the power supply Vcc1 is 5V.

[0057] Among them, the D0 terminal represents the first input terminal of the dual D flip-flop; the D1 terminal represents the second input terminal of the dual D flip-flop; the Q0 terminal represents the first positive phase output terminal of the dual D flip-flop; the CP terminal represents the clock pulse input terminal of the dual D flip-flop; The terminal indicates the reset terminal; The terminal represents the second inverting output terminal of the dual D flip-flop; Represents the first inverting output terminal of the dual D flip-flop.

[0058] As shown in FIG3 , according to another embodiment of the present invention, a method for controlling a driving control of a DC motor of a hydraulic oil pump for a rail vehicle is provided. The method comprises the following steps:

[0059] S1, outputs the start signal A through EBCU, enters the start control configuration circuit after optical isolation, and generates voltage Vb.

[0060] The process of outputting a start signal through the EBCU, passing through the photoelectric isolation circuit, and then entering the start control configuration circuit to generate the voltage Vb includes the following steps:

[0061] S11. If the start signal A is a switch control signal, the switch control signal establishes the Vb voltage through channel I.

[0062] Specifically, as shown in Figure 2, when start signal A is a switching control signal, the signal primarily establishes the Vb voltage via channel I. When the switching value is high (greater than or equal to Vcc), transistor Q4 is turned off, Vcc charges capacitor C1. Once capacitor C1 is fully charged, the voltage at Va is zero, and inverter Uc outputs a high level. This charges capacitor C2 via resistor R9, generating a stable voltage Vb. Since start signal A is a switching value, after the dual D flip-flop UD operates, only during the first f0 cycle (64µs) when the switching value transitions from low to high does NAND gate UB output a low level, transistor Q3 conduct, and Vcc charges capacitor C2 via resistor R6. In all other cases, NAND gate UB outputs a high level, transistor Q3 is turned off, and capacitor C2 is not charged. Because the charging time is extremely short, channel II has little effect on the Vb voltage waveform. For example, if Vcc = 12V and Vcc1 = 5V, Vb will slowly charge and rise to 5.7V.

[0063] S12. If the start signal A is a frequency signal, the frequency signal establishes the Vb voltage through channel II.

[0064] Among them, the frequency signal is 100Hz-2kHz.

[0065] Specifically, when the start signal A is a frequency signal (100Hz-2kHz), the signal is mainly generated by channel II to establish the Vb voltage. For channel I, when the input is low, transistor Q4 is turned on, and capacitor C1 discharges through resistor R7. When the input becomes high, transistor Q4 is turned off, and Vcc charges capacitor C1 through resistors R7 and R8. Designing resistor R8>>resistor R7 - 100 ohms (more than 1000 times), capacitor C1 charges slowly but discharges quickly, and the voltage across capacitor C1 hardly changes significantly, that is, Va is approximately equal to Vcc. Therefore, for the frequency input signal UC, the output is always low, and channel I has no effect on the voltage at point Vb.

[0066] Specifically, for channel II, the control signal f A Taking the frequency of 1kHz as an example, after the timing operation of the dual D flip-flop UD, the NAND gate UB outputs a frequency signal of 1kHz, where the low level time is 1 / f0 and the high level time is 1 / f A-1 / f0. When NAND gate UB outputs a low level, transistor Q3 turns on, and Vcc charges capacitor C2 through resistor R6. When NAND gate UB outputs a high level, transistor Q3 turns off, and capacitor C2 discharges through resistors R9 and R10. By properly designing the parameters of capacitors C2, R6, R9, and R10, the Vb voltage can be slowly increased, achieving dynamic equilibrium. Control signals of different frequencies have fixed charging and discharging times within a single cycle, resulting in different waveforms for the VB voltage and different post-dynamic equilibrium voltages.

[0067] S2. Compare the voltage Vb with the sawtooth wave voltage generated by the sawtooth wave generating circuit through a comparator A to generate a PWM drive signal.

[0068] The voltage Vb is compared with the sawtooth wave voltage generated by the sawtooth wave generating circuit through the comparator A to generate the PWM drive signal, which includes the following steps:

[0069] S21. If the voltage Vb is greater than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is high;

[0070] S22. If the voltage Vb is less than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is low.

[0071] S3 and PWM drive signals pass through the MOS driver chip and control the on and off of the field effect tube Q1 to realize the drive control of the motor M.

[0072] In addition, the present invention provides a rail vehicle hydraulic oil pump DC motor drive control circuit that implements a fixed soft-start control function or an adjustable soft-start function under the influence of different types of input signals. When receiving a continuous high-level switching signal from the electronic brake control unit (EBCU), the power switch is intermittently turned on during the soft-start process, and the on-time gradually increases. After the start-up is completed, the power switch is continuously turned on, and the DC24V directly drives the motor to operate. When receiving a PWM signal of a certain frequency, the power switch is intermittently turned on, and the on-time gradually increases. Different control frequencies can achieve different soft-start speeds. Different control frequencies can also achieve different duty cycles and equivalent voltages of the drive motor after the start-up is completed, so as to adapt to pump DC motor loads with different power and starting characteristics.

[0073] This is achieved by designing two distinct overcurrent protection circuits. One utilizes a current detection circuit configured with a MOS driver chip. When overcurrent occurs, the voltage drop across the N-channel enhancement mode field effect transistor (FET) Q1 of the power switch increases, causing the MOS driver chip's current detection circuit to detect and shut down the output. The other circuit utilizes a sampling circuit. When the current exceeds a certain threshold, it directly intervenes in the motor start signal and shuts down the output, thus protecting the oil pump motor from overcurrent. These two distinct overcurrent protection mechanisms ensure accurate monitoring and timely protection against overcurrent conditions.

[0074] At the same time, fault conditions such as overcurrent, overvoltage, undervoltage, and overheating are identified, the output of the power switch is shut down in time, and the relevant fault status is sent to the electronic brake control unit through a hard-wired signal, so that the electronic brake control unit can carry out fault diagnosis and other tasks.

[0075] In summary, with the aid of the above-mentioned technical solution of the present invention, the present invention provides a rail vehicle hydraulic oil pump DC motor drive control circuit, which solves the problem of vehicle battery voltage fluctuation caused by starting the hydraulic brake oil pump motor and frequent starting reducing its own life. The soft start circuit is simple, reliable and low in cost.

[0076] The present invention controls the soft-start speed of the DC motor and realizes different duty cycles and equivalent voltages of the driving motor after the startup is completed by controlling signals of different specifications, so as to adapt to the pump DC motor load with different power and starting characteristics. In addition, through two overcurrent protection mechanisms with different mechanisms, accurate monitoring and timely protection of overcurrent conditions are achieved, various fault conditions are identified and the output of the power switch is shut down in time, and the relevant fault status is sent to the electronic brake control unit, which facilitates the electronic brake control unit to carry out fault diagnosis.

[0077] The present invention adopts different types of control signals to flexibly control the soft-start speed and the drive waveform after starting to adapt to different DC motor loads. It has the characteristics of simple circuit design and flexible use. The adoption of two different protection mechanisms can more reliably implement overcurrent protection, and through multiple fault indications, it can accurately and effectively diagnose motor faults. The application of this circuit to the hydraulic braking system of urban rail transit vehicles can significantly improve the reliability and safety of hydraulic oil pump motor control.

[0078] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A rail vehicle hydraulic oil pump DC motor drive control circuit, characterized in that: The circuit includes a field effect transistor Q1, a transistor Q2, a resistor R1, a resistor R2, a resistor R3, a NAND gate UA, a comparator A, a comparator B, a diode D1, a diode D2, an EBCU, a photoelectric isolation 1, a photoelectric isolation 2, a sawtooth wave generating circuit, a start control configuration circuit, a reference voltage source, an overheat detection circuit, an over-voltage and under-voltage detection circuit, a current detection circuit, a MOS driving chip, an amplifier circuit and a motor M; The output end of the EBCU is connected to the input end of the startup control configuration circuit through the photoelectric isolation 1, the output end of the startup control configuration circuit is respectively connected to the inverting input end of the comparator B and the positive electrode of the diode D1, the negative electrode of the diode D1 is connected to the output end of the comparator A, the positive input end of the comparator A is connected to the reference voltage source, the inverting input end of the comparator A is connected to the output end of the amplifier circuit, the input end of the amplifier circuit is respectively connected to one end of the resistor R1 and the source of the field effect transistor Q1, the gate of the field effect transistor Q1 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the OUT end of the MOS driver chip, the CS end of the MOS driver chip is connected to the current detection circuit, the ERR end of the MOS driver chip is respectively connected to the photoelectric isolation 2 and the first pin of the NAND gate UA, the input end of the MOS driver chip is respectively connected to the output end of the comparator B and the collector of the transistor Q2, and the positive input end of the comparator B is connected to the sawtooth wave generating circuit; The drain of the field effect transistor Q1 is respectively connected to the input end of the current detection circuit, the positive electrode of the diode D2 and one end of the motor M, the other end of the motor M is respectively connected to the negative electrode of the diode D2 and the input end of the over-voltage and under-voltage detection circuit and connected to 24V, the output end of the over-voltage and under-voltage detection circuit is respectively connected to the second pin of the NAND gate UA and the photoelectric isolation 2, the third pin of the NAND gate UA is connected to the overheat detection circuit, the overheat detection circuit is connected to the input end of the EBCU through the photoelectric isolation 2, the output end of the NAND gate UA is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the base of the transistor Q2, and the emitter of the transistor Q2 is grounded.

2. A rail vehicle hydraulic oil pump DC motor drive control circuit according to claim 1, characterized in that: The sawtooth wave generating circuit generates a waveform with a frequency of 15kHz, a peak value of 4.3V, and a trough value of 0.7V.

3. A rail vehicle hydraulic oil pump DC motor drive control circuit according to claim 2, characterized in that: The startup control configuration circuit includes a square wave generator UE, a dual D flip-flop UD, a NAND gate UB, a transistor Q3, a transistor Q4, an inverter UC, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a diode D3, a capacitor C1, and a capacitor C2; The output end of the photoelectric isolator 1 is respectively connected to the DO end of the dual D flip-flop and the base of the transistor Q4, the emitter of the transistor Q4 is connected to one end of the capacitor C1 and is connected to the power supply Vcc, the other end of the capacitor C1 is respectively connected to one end of the resistor R7 and the input end of the inverter UC, the other end of the resistor R7 is respectively connected to the collector of the transistor Q4 and one end of the resistor R8, and the other end of R8 is grounded; The output end of the inverter UC is connected to one end of the resistor R9, the other end of the resistor R9 is respectively connected to the positive electrode of the diode D3, the resistor R10, the resistor R6 and one end of the capacitor C2, the cathode of the diode D3 is connected to the power supply Vcc1, and the other end of the capacitor C2 is connected to the other end of the resistor R10 and grounded; The other end of the resistor R6 is connected to the collector of the transistor Q3, the emitter of the transistor Q3 is connected to the power supply Vcc, the base of the transistor Q3 is connected to one end of the resistor R5, the other end of the resistor R5 is connected to the output end of the NAND gate UB, and the input end of the NAND gate UB is respectively connected to the Q0 end, The CP end of the dual D flip-flop is connected to the square wave generator UE, and the The end is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the power supply Vcc.

4. A rail vehicle hydraulic oil pump DC motor drive control circuit according to claim 3, characterized in that: The square wave generated by the square wave generator UE is a 15.625kHz square wave.

5. A rail vehicle hydraulic oil pump DC motor drive control circuit according to claim 4, characterized in that: The power supply Vcc is 12V, and the power supply Vcc1 is 5V.

6. A rail vehicle hydraulic oil pump DC motor drive control circuit according to claim 5, characterized in that: The D0 terminal represents the first input terminal of the dual D flip-flop; the D1 terminal represents the second input terminal of the dual D flip-flop; the Q0 terminal represents the first positive phase output terminal of the dual D flip-flop; the CP terminal represents the clock pulse input terminal of the dual D flip-flop; The terminal represents a reset terminal; The terminal represents the second inverting output terminal of the dual D flip-flop.

7. A rail vehicle hydraulic oil pump DC motor drive control method, used to implement the rail vehicle hydraulic oil pump DC motor drive control circuit according to any one of claims 1 to 6, characterized in that: The method comprises the following steps: S1, output the start signal A through EBCU, and enter the start control configuration circuit after photoelectric isolation. circuit, and generates a voltage Vb; S2, compare the voltage Vb with the sawtooth wave voltage generated by the sawtooth wave generating circuit through a comparator A to generate a PWM drive signal; S3, PWM drive signal passes through the MOS drive chip and controls the on and off of the field effect tube Q1 to realize the drive control of the motor M.

8. A rail vehicle hydraulic oil pump DC motor drive control method according to claim 7, characterized in that: The method of outputting a start signal through the EBCU, entering the start control configuration circuit after photoelectric isolation, and generating a voltage Vb includes the following steps: S11, if the start signal A is a switch control signal, the switch control signal establishes the Vb voltage through channel I; S12. If the start signal A is a frequency signal, the frequency signal establishes the Vb voltage through channel II.

9. A rail vehicle hydraulic oil pump DC motor drive control method according to claim 8, characterized in that: The step of comparing the voltage Vb with the sawtooth wave voltage generated by the sawtooth wave generating circuit through a comparator A to generate a PWM drive signal comprises the following steps: S21, if the voltage Vb is greater than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is high; S22. If the voltage Vb is less than the sawtooth wave voltage, it indicates that the output of the PWM drive signal is low.

10. A rail vehicle hydraulic oil pump DC motor drive control method according to claim 9, characterized in that: The frequency signal is 100 Hz-2 kHz.

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