Fabry-perot interference filter

Abstract

This Fabry-Perot interference filter comprises: a first laminate having a first mirror part; and a second laminate having a second mirror part facing the first mirror part with a gap therebetween. A reference laminate, which is one of the first laminate and the second laminate, has a first low-resistance layer, a second low-resistance layer, and a first insulating layer disposed between the first low-resistance layer and the second low-resistance layer. The specific resistance of a material constituting the first low-resistance layer and the second low-resistance layer is less than the specific resistance of a material constituting the first insulating layer. The first insulating layer has a first body part located on the first low-resistance layer, a first covering part covering the outer edge of the first low-resistance layer, and a first peripheral edge part located outside the first low-resistance layer. The first body part, the first covering part, and the first peripheral edge part are integrally formed.

Description

Fabry-Perot interference filter

[0001] One aspect of the present disclosure relates to a Fabry-Perot interference filter.

[0002] Patent Document 1 describes a Fabry-Perot interference filter in which a first stack, an intermediate layer, and a second stack are stacked in this order on a substrate. Each of the first stack and the second stack is composed of a plurality of polysilicon layers and a plurality of silicon nitride layers alternately stacked. Portions of the first stack and the second stack function as a first mirror portion and a second mirror portion, respectively. In the Fabry-Perot interference filter, the wavelength of light transmitted through the Fabry-Perot interference filter can be appropriately selected by adjusting the voltage applied between the first mirror portion and the second mirror portion to adjust the distance between the first mirror portion and the second mirror portion.

[0003] International Publication No. 2019 / 098142

[0004] When manufacturing the above-described Fabry-Perot interference filter, the first and second stacked bodies are formed, for example, by etching. During this formation, the position of the resist used as an etching mask may be misaligned, which may result in a leak path occurring at the edge of the first or second stacked body. For example, if the outer edge of a silicon nitride layer located between two polysilicon layers is removed by a larger amount than intended, the polysilicon layers may come into contact with each other at the outer edge, potentially creating a leak path between the polysilicon layers. Alternatively, if the outer edge of a polysilicon layer is formed further outward than intended, causing the outer edge of that polysilicon layer to come into contact with the outer edge of the underlying polysilicon layer, a leak path may also occur between the polysilicon layers. In order to accurately adjust the voltage applied between the first and second mirror sections and accurately adjust the distance between the first and second mirror sections, it is necessary to suppress the occurrence of such leak paths.

[0005] An object of one aspect of the present disclosure is to provide a Fabry-Perot interference filter that can accurately control the distance between a first mirror portion and a second mirror portion.

[0006] A Fabry-Perot interference filter according to one aspect of the present disclosure includes: [1] "a substrate; a first stack having a first mirror portion disposed on the substrate; a second stack having a second mirror portion facing the first mirror portion across a gap on an opposite side of the substrate from the first mirror portion; and an intermediate layer defining the gap between the first stack and the second stack; wherein a reference stack which is one of the first stack and the second stack includes a first low resistance layer and a second low resistance layer disposed on an opposite side of the substrate from the first low resistance layer." and a first insulating layer disposed between the first low-resistance layer and the second low-resistance layer, wherein the resistivity of the material constituting the first low-resistance layer and the second low-resistance layer is smaller than the resistivity of the material constituting the first insulating layer, and the first insulating layer has a first main body portion located on the first low-resistance layer, a first covering portion covering the outer edge of the first low-resistance layer, and a first peripheral portion located outside the first low-resistance layer when viewed from a direction perpendicular to the substrate, and the first main body portion, the first covering portion, and the first peripheral portion are integrally formed.

[0007] In this Fabry-Perot interference filter, in a reference stack, which is one of the first stack and the second stack, the first insulating layer has a first body portion located on the first low-resistivity layer, a first covering portion covering the outer edge of the first low-resistivity layer, and a first peripheral portion located outside the first low-resistivity layer when viewed from a direction perpendicular to the substrate, and the first body portion, first covering portion, and first peripheral portion are integrally formed. This prevents the second low-resistivity layer from contacting the first low-resistivity layer by the first covering portion and the first peripheral portion of the first insulating layer, thereby suppressing the occurrence of a leak path due to the second low-resistivity layer contacting the first low-resistivity layer. Therefore, this Fabry-Perot interference filter allows the distance between the first mirror portion and the second mirror portion to be adjusted with high precision.

[0008] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [2] "the Fabry-Perot interference filter according to [1], wherein the reference stack has a third low-resistance layer arranged on the substrate side with respect to the first low-resistance layer, and a second insulating layer arranged between the first low-resistance layer and the third low-resistance layer, and the resistivity of a material constituting the third low-resistance layer is lower than the resistivity of a material constituting the second insulating layer." Even with this configuration, the distance between the first mirror portion and the second mirror portion can be adjusted with high precision.

[0009] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [3] "the Fabry-Perot interference filter according to [2], wherein the first covering covers an outer edge of the first low-resistance layer, an outer edge of the third low-resistance layer, and an outer edge of the second insulating layer." In this case, it is possible to prevent the second low-resistance layer from contacting the first low-resistance layer, and also to prevent the first low-resistance layer from contacting the third low-resistance layer, thereby further suppressing the occurrence of leak paths.

[0010] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [4] "the Fabry-Perot interference filter according to [2] or [3], wherein the second low-resistivity layer extends so as to cover the first covering portion of the first insulating layer." In this case, for example, compared to when the second low-resistivity layer is formed so as to cover only the first body portion of the first insulating layer, the step formed in the reference stack can be made gentler. By making the step formed in the reference stack gentler, for example, it is possible to suppress the occurrence of uneven application of resist when applying etching, thereby improving manufacturing stability.

[0011] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [5] "the Fabry-Perot interference filter according to [1], wherein the reference stack further includes a third insulating layer disposed on the opposite side of the second low-resistivity layer from the substrate, the third insulating layer including a second main body portion located on the second low-resistivity layer, a second covering portion covering an outer edge of the second low-resistivity layer, and a second peripheral portion located outside the second low-resistivity layer when viewed from a direction perpendicular to the substrate, the second main body portion, the second covering portion, and the second peripheral portion being integrally formed." In this case, for example, it is possible to prevent the low-resistivity layer stacked on the second insulating layer from contacting the second low-resistivity layer, thereby further suppressing the occurrence of a leak path.

[0012] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [6] "the Fabry-Perot interference filter according to [5], wherein the second peripheral portion is in contact with the first peripheral portion." In this case, contact between the low-resistance layers can be more reliably prevented, and the occurrence of leak paths can be further suppressed.

[0013] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [7] "the Fabry-Perot interference filter according to [5] or [6], wherein the reference stack further includes a fourth low-resistivity layer disposed on the opposite side of the third insulating layer from the substrate." In this case, the second covering portion and the second peripheral portion of the third insulating layer can prevent the fourth low-resistivity layer from contacting the second low-resistivity layer.

[0014] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [8] "the Fabry-Perot interference filter according to any one of [1] to [7], wherein at least one of the first low-resistance layer and the second low-resistance layer is electrically connected to an electrode." In such a configuration, it is particularly important to suppress the occurrence of a leak path between the first low-resistance layer and the second low-resistance layer. With this Fabry-Perot interference filter, as described above, it is possible to suppress the occurrence of a leak path due to contact between the first low-resistance layer and the second low-resistance layer.

[0015] A Fabry-Perot interference filter according to one aspect of the present disclosure may be [9] "the Fabry-Perot interference filter according to any one of [1] to [8], wherein the intermediate layer has a third main body portion located on the first laminate, a third covering portion that covers the outer edge of the first laminate, and a third peripheral edge portion that is located outside the first laminate when viewed from a direction perpendicular to the substrate, and the third main body portion, the third covering portion, and the third peripheral edge portion are integrally formed." In this case, because the outer edge of the first laminate is covered by the intermediate layer, peeling of the first laminate can be suppressed.

[0016] A Fabry-Perot interference filter according to one aspect of the present disclosure may be

[10] "the Fabry-Perot interference filter according to any one of [1] to [9], wherein the reference stack is the first stack, and the second stack has a fourth main body portion located on the intermediate layer, a fourth covering portion covering an outer edge of the intermediate layer, and a fourth peripheral edge portion located outside the intermediate layer when viewed from a direction perpendicular to the substrate, and the fourth main body portion, the fourth covering portion, and the fourth peripheral edge portion are integrally formed." In this case, because the outer end surface of the intermediate layer is covered by the second stack, peeling of the first stack and the intermediate layer can be suppressed.

[0017] A Fabry-Perot interference filter according to one aspect of the present disclosure may be

[11] "the Fabry-Perot interference filter according to any one of [1] to

[10] , wherein the first low-resistance layer and the second low-resistance layer are formed of polysilicon, and the first insulating layer is formed of silicon nitride." In this case, desired mirror characteristics can be achieved.

[0018] A Fabry-Perot interference filter according to one aspect of the present disclosure may be

[12] "the Fabry-Perot interference filter according to any one of [1] to

[11] , wherein the other of the first laminate and the second laminate has a fifth low-resistance layer, a sixth low-resistance layer arranged on the opposite side of the fifth low-resistance layer from the substrate, and a fourth insulating layer arranged between the fifth low-resistance layer and the sixth low-resistance layer, wherein the resistivity of a material constituting the fifth low-resistance layer and the sixth low-resistance layer is lower than the resistivity of a material constituting the fourth insulating layer, and the fourth insulating layer has a fifth main body portion located on the fifth low-resistance layer, a fifth covering portion covering an outer edge of the fifth low-resistance layer, and a fifth peripheral portion located outside the fifth low-resistance layer when viewed from a direction perpendicular to the substrate, and the fifth main body portion, the fifth covering portion, and the fifth peripheral portion are integrally formed." In this case, the fifth covering portion and fifth peripheral portion of the fourth insulating layer can prevent the sixth low-resistance layer from contacting the fifth low-resistance layer, thereby suppressing the occurrence of a leak path due to the sixth low-resistance layer contacting the fifth low-resistance layer.

[0019] A Fabry-Perot interference filter according to one aspect of the present disclosure may be

[13] "the Fabry-Perot interference filter according to any one of [1] to

[12] , wherein the reference stack is the first stack." In this case, it is possible to suppress the occurrence of a leak path in the first stack.

[0020] A Fabry-Perot interference filter according to one aspect of the present disclosure may be

[14] "the Fabry-Perot interference filter according to any one of [1] to

[12] , wherein the reference stack is the second stack." In this case, the occurrence of a leak path in the second stack can be suppressed.

[0021] According to one aspect of the present disclosure, it is possible to provide a Fabry-Perot interference filter that can accurately control the distance between the first mirror portion and the second mirror portion.

[0022] Fig. 1 is a plan view of a Fabry-Perot interference filter according to an embodiment; Fig. 2 is a bottom view of the Fabry-Perot interference filter; Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1; Fig. 4 is a cross-sectional view showing an enlarged portion of the Fabry-Perot interference filter; Fig. 5 is a cross-sectional view of a Fabry-Perot interference filter according to a first modified example; Fig. 6 is a cross-sectional view of a Fabry-Perot interference filter according to a second modified example; Fig. 7 is a cross-sectional view of a Fabry-Perot interference filter according to a third modified example;

[0023] Hereinafter, an embodiment of one aspect of the present disclosure will be described in detail with reference to the drawings. In the following description, the same or corresponding elements will be designated by the same reference numerals, and redundant description will be omitted. [Configuration of Fabry-Perot interference filter]

[0024] 1 to 3, the Fabry-Perot interference filter 1 includes a substrate 11. The substrate 11 has a first surface 11a and a second surface 11b opposite the first surface 11a. An antireflection layer 21, a first stacked body 22 (reference stacked body), an intermediate layer 23, and a second stacked body 24 are stacked in this order on the first surface 11a. A space (in other words, an air gap) S is defined between the first stacked body 22 and the second stacked body 24 by the frame-shaped intermediate layer 23.

[0025] The shapes and positional relationships of the various parts when viewed from a direction perpendicular to the first surface 11a (in other words, in a plan view) are as follows. The outer edge of the substrate 11 is, for example, rectangular with a side length of several hundred μm to several tens of mm. The outer edge of the substrate 11 and the outer edge of the second stack 24 coincide with each other. The outer edge of the antireflection layer 21 and the outer edge of the first stack 22 coincide with each other. The outer edge of the intermediate layer 23 is located outside the outer edges of the antireflection layer 21 and the first stack 22 (in other words, on the opposite side from the center of the gap S), and inside the outer edges of the substrate 11 and the second stack 24 (in other words, closer to the center of the gap S). That is, the substrate 11 has an outer edge portion 11c located outside the outer edge of the intermediate layer 23. The outer edge portion 11c is, for example, frame-shaped and surrounds the intermediate layer 23 in a plan view. The gap S is, for example, circular. The outer edge of the antireflection layer 21 may be located outside the outer edge of the intermediate layer 23, or the outer edge of the antireflection layer 21 may coincide with the outer edge of the intermediate layer 23. The antireflection layer 21 and the intermediate layer 23 may be integrated with each other.

[0026] The Fabry-Perot interference filter 1 transmits light having a predetermined wavelength through a light-transmitting region 1a defined in the center thereof. The light-transmitting region 1a is, for example, a cylindrical region. The substrate 11 is made of, for example, silicon, quartz, or glass. When the substrate 11 is made of silicon, the anti-reflection layer 21 and intermediate layer 23 are made of, for example, silicon oxide. The intermediate layer 23 has insulating properties. The thickness of the intermediate layer 23 is, for example, several tens of nanometers to several tens of micrometers.

[0027] A portion of the first stack 22 corresponding to the light-transmitting region 1a (e.g., a portion overlapping the gap S in a plan view) functions as a first mirror portion 31. The first mirror portion 31 is a fixed mirror. The first mirror portion 31 is disposed on the first surface 11a via an antireflection layer 21. The first stack 22 is formed, for example, by alternately stacking multiple polysilicon layers 50 and multiple silicon nitride layers 60. In the Fabry-Perot interference filter 1, the polysilicon layer 51, the silicon nitride layer 61, the polysilicon layer 52, the silicon nitride layer 62, and the polysilicon layer 53 are stacked in this order on the antireflection layer 21. The optical thickness of each of the polysilicon layer 50 and the silicon nitride layer 60 constituting the first mirror portion 31 is preferably an integer multiple of ¼ of the central transmission wavelength. The first mirror portion 31 may also be disposed directly on the first surface 11a without the antireflection layer 21.

[0028] A portion of the second stack 24 corresponding to the light-transmitting region 1a (e.g., a portion overlapping the gap S in a plan view) functions as a second mirror section 32. The second mirror section 32 is a movable mirror. The second mirror section 32 faces the first mirror section 31 across the gap S on the opposite side of the substrate 11 from the first mirror section 31. The direction in which the first mirror section 31 and the second mirror section 32 face each other is perpendicular to the first surface 11a. The second stack 24 is disposed on the first surface 11a via the antireflection layer 21, the first stack 22, and the intermediate layer 23. The second stack 24 is formed, for example, by alternately stacking multiple polysilicon layers 50 and multiple silicon nitride layers 60 one by one. In the Fabry-Perot interference filter 1, a polysilicon layer 54, a silicon nitride layer 64, a polysilicon layer 55, a silicon nitride layer 65, and a polysilicon layer 56 are stacked in this order on the intermediate layer 23. The optical thickness of each of the polysilicon layer 50 and silicon nitride layer 60 constituting the second mirror section 32 is preferably an integral multiple of ¼ of the central transmission wavelength. The thickness of the first stacked body 22 and the second stacked body 24 is, for example, about 1 μm, and the thickness of each of the polysilicon layer 50 and silicon nitride layer 60 constituting the first stacked body 22 and the second stacked body 24 is, for example, about 0.01 μm to 0.5 μm.

[0029] The polysilicon layer 50 is a low-resistance layer, and the silicon nitride layer 60 is an insulating layer. The resistivity of the material constituting the low-resistance layer (polysilicon layer 50) is lower than the resistivity of the material constituting the insulating layer (silicon nitride layer 60). In this example, the resistivity of the polysilicon constituting the polysilicon layer 50 is 1.0×10 ５ Ωcm to 1.0 x 10 ６ The resistivity of the silicon nitride constituting the silicon nitride layer 60 is about 1.0×10 ８ As will be described later, in this example, the electrode portions (drive electrode 12, compensation electrode 13, and drive electrode 14) are formed by partially reducing the resistance of the polysilicon layer 50 by doping impurities, but as described above, the resistivity of the polysilicon layer 50 is smaller than the resistivity of the silicon nitride layer 60 even before the reduction in resistance.

[0030] A plurality of through holes (not shown) are formed in a portion of the second laminate 24 that corresponds to the void S (for example, a portion that overlaps with the void S in a plan view). These through holes extend from the surface 24a of the second laminate 24 opposite the intermediate layer 23 to the void S. These through holes are formed to an extent that they do not substantially affect the function of the second mirror section 32. These through holes are used, for example, to form the void S by removing a portion of the intermediate layer 23 by etching.

[0031] 3, the first mirror section 31 is provided with a driving electrode 12 and a compensation electrode 13. The driving electrode 12 has, for example, a circular ring shape in a plan view and surrounds the light-transmitting region 1a. The driving electrode 12 is formed, for example, in a polysilicon layer 53 that constitutes the first stacked body 22. The polysilicon layer 53 is the layer that contacts the intermediate layer 23 among the layers that constitute the first stacked body 22; in other words, it is the layer that is located furthest from the substrate 11. The driving electrode 12 is formed, for example, by doping the polysilicon layer 53 with an impurity to reduce its resistance.

[0032] The compensation electrode 13 has, for example, a circular shape in a plan view and overlaps with the light-transmitting region 1a. The size of the compensation electrode 13 may be a size that includes the entire light-transmitting region 1a, or may be approximately the same as the size of the light-transmitting region 1a. The compensation electrode 13 is formed on the polysilicon layer 53 on which the driving electrode 12 is formed. The compensation electrode 13 is formed, for example, by doping impurities into the polysilicon layer 53 to reduce its resistance.

[0033] The second mirror section 32 is provided with a driving electrode 14. The driving electrode 14 has, for example, a circular shape in a plan view and faces the driving electrode 12 and the compensation electrode 13 across a gap S. The driving electrode 14 is formed, for example, on a polysilicon layer 54 that constitutes the second stack 24. The polysilicon layer 54 is the layer that contacts the intermediate layer 23 among the layers that constitute the second stack 24, in other words, the layer that is located closest to the substrate 11. The driving electrode 14 is formed, for example, by doping the polysilicon layer 54 with impurities to reduce its resistance.

[0034] The Fabry-Perot interference filter 1 further includes a pair of terminals 15 and a pair of terminals 16. The terminals 15 and 16 are provided outside the light-transmitting region 1a in a plan view. The terminals 15 and 16 are formed of a metal film such as aluminum or an alloy thereof. The terminals 15 face each other across the light-transmitting region 1a, and the terminals 16 face each other across the light-transmitting region 1a. The direction in which the terminals 15 face each other is perpendicular to the direction in which the terminals 16 face each other (see FIG. 1 ).

[0035] The terminal 15 is disposed in a through hole H1 extending from the surface 24a of the second stack 24 to the first stack 22. The terminal 15 is electrically connected to the driving electrode 12 via a wiring portion 17. The wiring portion 17 is formed in the polysilicon layer 53. The polysilicon layer 53 is electrically connected to the driving electrode 12 via the wiring portion 17. The wiring portion 17 is formed, for example, by doping the polysilicon layer 53 with an impurity to reduce the resistance of the polysilicon layer 53. The terminal 15 has an opening 15a that opens on the side opposite the substrate 11. The intermediate layer 23 has an inner surface 23a that defines the through hole H1. In a plan view, an opening edge 15b of the opening 15a is located inside the inner surface 23a along the entire periphery (in other words, at any position on the opening edge 15b).

[0036] The terminal 16 is disposed in a through hole H2 that extends from the surface 24a of the second laminate 24 to the interior of the intermediate layer 23. The terminal 16 is electrically connected to the compensation electrode 13 and the driving electrode 14 via a wiring portion 18. As a result, when the Fabry-Perot interference filter 1 is driven, the compensation electrode 13 has the same potential as the driving electrode 14. The wiring portion 18 has, for example, a wiring portion 18a formed in the polysilicon layer 52, a wiring portion 18b formed in the polysilicon layer 53, and a wiring portion 18c formed in the polysilicon layer 54. The wiring portion 18a is electrically connected to the compensation electrode 13. The polysilicon layer 52 is electrically connected to the compensation electrode 13 and the driving electrode 14 via the wiring portion 18a. The wiring portion 18c is electrically connected to the driving electrode 14. The wiring portion 18b is in contact with the wiring portions 18a and 18c, and the wiring portions 18a to 18c are electrically connected to one another. For example, when the polysilicon layers 52, 53, and 54 are polysilicon layers, the wiring portions 18a to 18c are formed by doping impurities into the polysilicon layers 52, 53, and 54 to reduce their resistance. The terminal 16 has an opening 16a that opens on the side opposite the substrate 11. The intermediate layer 23 has an inner surface 23b that defines the through hole H2. In plan view, the opening edge 16b of the opening 16a is located inside the inner surface 23b along its entire periphery (in other words, at any position on the opening edge 16b). In plan view, the outer edge 16c of the terminal 16 is located outside the inner surface 23b along its entire periphery.

[0037] The first stack 22 has trenches T1 and T2. The trench T1 is formed in the polysilicon layer 53 and extends in an annular shape so as to surround the connection portion of the wiring portion 18 with the terminal 16. The trench T1 electrically insulates the driving electrode 12 from the wiring portion 18. The trench T2 is formed in the polysilicon layer 53 and extends in an annular shape along the boundary between the driving electrode 12 and the compensation electrode 13. The trench T2 electrically insulates the driving electrode 12 from the region inside the driving electrode 12 (i.e., the compensation electrode 13). The trenches T1 and T2 electrically insulate the driving electrode 12 from the compensation electrode 13. The region inside each of the trenches T1 and T2 may be an insulating material or an air gap.

[0038] The second stack 24 includes a trench T3. The trench T3 has a first portion T3a and a second portion T3b. The first portion T3a is formed continuously across the polysilicon layers 55, 56 and the silicon nitride layers 64, 65, and extends in an annular shape to surround the terminal 15. The second portion T3b is formed in the polysilicon layer 54 and extends in an annular shape to surround the terminal 15. The second portion T3b is spaced apart from the first portion T3a. In a plan view, the second portion T3b is located outside the first portion T3a along its entire periphery. The trench T3 electrically insulates the terminal 15 from the drive electrode 14. The region within the trench T3 may be an insulating material or an empty space.

[0039] An antireflection layer 41, a third stacked body 42, an intermediate layer 43, and a fourth stacked body 44 are stacked in this order on the second surface 11b of the substrate 11. The antireflection layer 41 and the intermediate layer 43 have the same configurations as the antireflection layer 21 and the intermediate layer 23, respectively. The third stacked body 42 and the fourth stacked body 44 have stacked structures symmetrical to the first stacked body 22 and the second stacked body 24, respectively, with respect to the substrate 11. The antireflection layer 41, the third stacked body 42, the intermediate layer 43, and the fourth stacked body 44 have the function of suppressing warpage of the substrate 11.

[0040] The third stack 42, the intermediate layer 43, and the fourth stack 44 are thinned along the outer edge of the outer edge portion 11c. That is, the portions of the third stack 42, the intermediate layer 43, and the fourth stack 44 that are along the outer edge of the outer edge portion 11c are thinner than the other portions of the third stack 42, the intermediate layer 43, and the fourth stack 44 excluding the portions that are along the outer edge. In the Fabry-Perot interference filter 1, the third stack 42, the intermediate layer 43, and the fourth stack 44 are thinned by removing the entire third stack 42, the intermediate layer 43, and the fourth stack 44 in the portions that overlap with a thinned portion 83b (described later) in a plan view.

[0041] The third stack 42, the intermediate layer 43, and the fourth stack 44 have openings 40a that overlap the light-transmitting regions 1a in a plan view. The openings 40a have substantially the same diameter as the light-transmitting regions 1a. The openings 40a are open to the light-emitting side. The bottom surfaces of the openings 40a reach the anti-reflection layer 41.

[0042] A light-shielding layer 45 is formed on the surface of the fourth stack 44 on the light-emitting side. The light-shielding layer 45 is made of a metal film such as aluminum or an alloy thereof. A protective layer 46 is formed on the surface of the light-shielding layer 45 and the inner surface of the opening 40a. The protective layer 46 covers the outer edges of the third stack 42, the intermediate layer 43, the fourth stack 44, and the light-shielding layer 45, and also covers the anti-reflection layer 41 on the outer edge portion 11c. The protective layer 46 is made of aluminum oxide, for example. Note that by setting the thickness of the protective layer 46 to 1 nm to 100 nm (preferably about 30 nm), the optical influence of the protective layer 46 can be ignored.

[0043] In the Fabry-Perot interference filter 1 configured as described above, when a voltage is applied between the drive electrodes 12 and 14 via the terminals 15 and 16, an electrostatic force corresponding to the voltage is generated between the drive electrodes 12 and 14. The electrostatic force attracts the second mirror portion 32 toward the first mirror portion 31 fixed to the substrate 11, thereby adjusting the distance between the first mirror portion 31 and the second mirror portion 32. In this way, in the Fabry-Perot interference filter 1, the distance between the first mirror portion 31 and the second mirror portion 32 is variable.

[0044] The wavelength of light transmitted through the Fabry-Perot interference filter 1 depends on the distance between the first mirror portion 31 and the second mirror portion 32 in the light transmission region 1a. Therefore, the wavelength of light to be transmitted can be appropriately selected by adjusting the voltage applied between the driving electrodes 12 and 14. Here, the compensation electrode 13 has the same potential as the driving electrode 14. Therefore, the compensation electrode 13 functions to keep the first mirror portion 31 and the second mirror portion 32 flat in the light transmission region 1a.

[0045] In the Fabry-Perot interference filter 1, for example, a spectrum can be obtained by detecting light transmitted through the light transmission region 1 a of the Fabry-Perot interference filter 1 with a photodetector while changing the voltage applied to the Fabry-Perot interference filter 1 (i.e., while changing the distance between the first mirror portion 31 and the second mirror portion 32).

[0046] 4 is an enlarged cross-sectional view showing a portion of the Fabry-Perot interference filter. In the following description, the side on which the first stacked body 22 is located relative to the substrate 11 (the upper side in FIG. 4 ) will be referred to as the upper side, and the side on which the substrate 11 is located relative to the first stacked body 22 (the lower side in FIG. 4 ) will be referred to as the lower side, but these terms do not limit the manner in which the Fabry-Perot interference filter 1 is used. For example, the Fabry-Perot interference filter 1 may be used in a state in which the first stacked body 22 is located vertically below the substrate 11.

[0047] 4 , in the first stack 22, a polysilicon layer 51 (third low-resistance layer), a silicon nitride layer 61 (second insulating layer), a polysilicon layer 52 (first low-resistance layer), a silicon nitride layer 62 (first insulating layer), and a polysilicon layer 53 (second low-resistance layer) are arranged on the first surface 11a of the substrate 11 in this order from bottom to top. That is, the polysilicon layer 51 (third low-resistance layer) is arranged below the polysilicon layer 52 (first low-resistance layer), and the polysilicon layer 53 (second low-resistance layer) is arranged above the polysilicon layer 52. The silicon nitride layer 61 (second insulating layer) is arranged between the polysilicon layer 51 and the polysilicon layer 52, and the silicon nitride layer 62 (first insulating layer) is arranged between the polysilicon layer 52 and the polysilicon layer 53.

[0048] The silicon nitride layer 62 has a main body portion 62a (first main body portion), a covering portion 62b (first covering portion), and a peripheral portion 62c (first peripheral portion). The main body portion 62a, the covering portion 62b, and the peripheral portion 62c are integrally formed so as to be continuous with one another. The main body portion 62a is located on the polysilicon layer 52 and overlaps the entire polysilicon layer 52 in a plan view. The covering portion 62b is continuous with the main body portion 62a on the outer edge 52c of the polysilicon layer 52. The covering portion 62b covers the outer edge 52c of the polysilicon layer 52, the outer edge 61d of the silicon nitride layer 61, and the outer edge 51a of the polysilicon layer 51, and extends to the anti-reflection layer 21. The peripheral edge portion 62c is continuous with the end of the covering portion 62b facing the substrate 11 and extends from the covering portion 62b outward (in other words, on the opposite side from the center of the gap S) along the first surface 11a of the substrate 11. The peripheral edge portion 62c is located further outward than the polysilicon layer 52 in plan view. The covering portion 62b and the peripheral edge portion 62c are formed in a frame shape (a rectangular frame shape in this example) surrounding the main body portion 62a in plan view. The width L1 of one side of the covering portion 62b and the peripheral edge portion 62c in plan view is, for example, about 2 μm. The width L1 is set to, for example, about 4 to 200 times the thickness of the main body portion 62a (about 0.01 μm to 0.5 μm in this example).

[0049] The polysilicon layer 53 has a main body portion 53a, a covering portion 53b, and a peripheral portion 53c. The main body portion 53a, the covering portion 53b, and the peripheral portion 53c are integrally formed so as to be continuous with one another. The main body portion 53a is located on the silicon nitride layer 62 and overlaps the entire main body portion 62a of the silicon nitride layer 62 in a planar view. The covering portion 53b covers the covering portion 62b and the peripheral portion 62c of the silicon nitride layer 62 and extends to the anti-reflection layer 21. The peripheral portion 53c is continuous with the end of the covering portion 53b on the substrate 11 side and extends outward from the covering portion 53b along the first surface 11a of the substrate 11. The peripheral portion 53c is located outside the silicon nitride layer 62 in a planar view. The covering portion 53b and the peripheral portion 53c are formed in a frame shape (a rectangular frame shape in this example) surrounding the main body portion 53a in a planar view. The width L2 of one side of the covering portion 53b and the peripheral portion 53c in a plan view is, for example, about 4 μm. The width L2 is set to, for example, about 8 to 400 times the thickness of the main body portion 53a (in this example, about 0.01 μm to 0.5 μm). At the outer edge of the first stacked body 22, a step portion 22a is formed by the peripheral portion 62c of the silicon nitride layer 62 and the peripheral portion 53c of the polysilicon layer 53.

[0050] The intermediate layer 23 has a defining portion 71 (third main body portion), a covering portion 72 (third covering portion), and an extending portion 73 (third peripheral portion). The defining portion 71, the covering portion 72, and the extending portion 73 are integrally formed so as to be continuous with one another. The defining portion 71 defines a gap S between the first stack 22 and the second stack 24. In a plan view, the defining portion 71 overlaps with the first stack 22 and the second stack 24. That is, the defining portion 71 is located on the first stack 22.

[0051] The covering portion 72 surrounds the defining portion 71 in a plan view. The covering portion 72 has, for example, a rectangular frame shape in a plan view. The covering portion 72 covers the outer edge portion 21 a of the antireflection layer 21 and the outer edge portion of the first stacked body 22, and extends to the first surface 11 a. In other words, the covering portion 72 covers the outer edges of all layers constituting the first stacked body 22, i.e., the outer edges 51 a, 52 c, and 53 d of the polysilicon layers 51, 52, and 53 and the outer edges 61 d and 62 d of the silicon nitride layers 61 and 62.

[0052] The extending portion 73 surrounds the covering portion 72 in a plan view. The extending portion 73 has, for example, a rectangular frame shape in a plan view. The extending portion 73 extends outward from the covering portion 72 (in other words, on the opposite side from the center of the gap S) in a direction parallel to the first surface 11a. The extending portion 73 is located outward from the first stack 22 in a plan view.

[0053] The second laminate 24 has a main body 81 (fourth main body), a covering 82 (fourth covering), and a peripheral edge 83 (fourth peripheral edge) in addition to the second mirror 32. The second mirror 32, the main body 81, the covering 82, and the peripheral edge 83 are integrally formed so as to have part of the same laminate structure and to be continuous with one another. The second laminate 24 extends to the outer edge of the substrate 11 so that the covering 82 covers the outer end surface 72a of the covering 72 and the outer end surface 73a of the extension 73.

[0054] The main body portion 81 is located on the demarcating portion 71 of the intermediate layer 23 and overlaps the entire demarcating portion 71 in a plan view. The covering portion 82 surrounds the main body portion 81 in a plan view. The covering portion 82 has, for example, a rectangular frame shape in a plan view. The covering portion 82 covers the outer end surface 73 a of the extending portion 73.

[0055] The peripheral edge portion 83 surrounds the covering portion 82 in a plan view. The peripheral edge portion 83 is located outside the intermediate layer 23 in a plan view. The peripheral edge portion 83 has, for example, a rectangular frame shape in a plan view. The peripheral edge portion 83 is located on the first surface 11a at the outer edge portion 11c. The outer edge of the peripheral edge portion 83 coincides with the outer edge of the substrate 11 in a plan view. The peripheral edge portion 83 is thinned along the outer edge of the outer edge portion 11c. That is, the portion of the peripheral edge portion 83 along the outer edge of the outer edge portion 11c is thinner than the other portions of the peripheral edge portion 83 excluding the portion along the outer edge. In this example, the peripheral edge portion 83 is thinned by removing a portion of the polysilicon layers 55, 56 and the silicon nitride layers 64, 65 that constitute the second stack 24. The peripheral edge portion 83 has a non-thinned portion 83a that is continuous with the covering portion 82, and a thinned portion 83b (see FIG. 1) that surrounds the non-thinned portion 83a. In the thinned portion 83b, the polysilicon layers 55 and 56 and the silicon nitride layers 64 and 65 other than the polysilicon layer 54 that is provided directly on the first surface 11a are removed. [Operation and Effects]

[0056] As described above, in the Fabry-Perot interference filter 1, in the first stack 22 (reference stack), the silicon nitride layer 62 (first insulating layer) has a main body portion 62a (first main body portion) located on the polysilicon layer 52 (first low-resistance layer), a covering portion 62b (first covering portion) covering the outer edge 52c of the polysilicon layer 52, and a peripheral portion 62c (first peripheral portion) located outside the polysilicon layer 52 in a planar view. The main body portion 62a, covering portion 62b, and peripheral portion 62c are integrally formed. As a result, the covering portion 62b and peripheral portion 62c of the silicon nitride layer 62 can prevent the polysilicon layer 53 (second low-resistance layer) from contacting the polysilicon layer 52, thereby suppressing the occurrence of a leak path due to the polysilicon layer 53 contacting the polysilicon layer 52. Therefore, the Fabry-Perot interference filter 1 allows the distance between the first mirror portion 31 and the second mirror portion 32 to be adjusted with high precision.

[0057] In the Fabry-Perot interference filter 1, the first stack 22 has a polysilicon layer 51 (third low-resistance layer) arranged on the substrate 11 side of the polysilicon layer 52, and a silicon nitride layer 61 (second insulating layer) arranged between the polysilicon layer 51 and the polysilicon layer 52. The resistivity of the material making up the polysilicon layer 51 is lower than the resistivity of the material making up the silicon nitride layer 61. Even with this configuration, the distance between the first mirror portion 31 and the second mirror portion 32 can be adjusted with high precision.

[0058] In the Fabry-Perot interference filter 1, the covering portion 62b (first covering portion) covers the outer edge 52c of the polysilicon layer 52 (first low-resistance layer), the outer edge 61d of the silicon nitride layer 61 (second insulating layer), and the outer edge 51a of the polysilicon layer 51 (third low-resistance layer). This prevents the polysilicon layer 53 from contacting the polysilicon layer 52 and prevents the polysilicon layer 52 from contacting the polysilicon layer 51, thereby further suppressing the occurrence of leak paths.

[0059] In the Fabry-Perot interference filter 1, the polysilicon layer 53 (second low-resistivity layer) extends to cover the covering portion 62b (first covering portion) of the silicon nitride layer 62 (first insulating layer). This allows the step portion 22a formed in the first stacked body 22 to be gentler than, for example, when the polysilicon layer 53 is formed to cover only the main body portion 62a of the silicon nitride layer 62. By gentler the step portion 22a formed in the first stacked body 22, for example, it is possible to suppress uneven application of resist when applying etching, thereby improving manufacturing stability. As a result, it is possible to suppress a decrease in yield.

[0060] In the Fabry-Perot interference filter 1, the polysilicon layer 52 (first low-resistance layer) is electrically connected to the compensation electrode 13 and the drive electrode 14. The polysilicon layer 53 (second low-resistance layer) is electrically connected to the drive electrode 12. In such a configuration, it is particularly important to suppress the occurrence of a leak path between the polysilicon layer 52 and the polysilicon layer 53. As described above, the Fabry-Perot interference filter 1 can suppress the occurrence of a leak path due to contact between the polysilicon layer 52 and the polysilicon layer 53.

[0061] In the Fabry-Perot interference filter 1, the intermediate layer 23 has a demarcating portion 71 (third main body portion) located on the first laminate 22, a covering portion 72 (third covering portion) that covers the outer edge portion of the first laminate 22, and an extending portion 73 (third peripheral portion) that is located outside the first laminate 22 in a plan view, and the demarcating portion 71, the covering portion 72, and the extending portion 73 are integrally formed. As a result, the outer edge portion of the first laminate 22 is covered by the intermediate layer 23, and peeling of the first laminate 22 can be suppressed.

[0062] In the Fabry-Perot interference filter 1, the second laminate 24 has a main body portion 81 (fourth main body portion) located on the intermediate layer 23, a covering portion 82 (fourth covering portion) that covers the outer end surface 73a of the intermediate layer 23, and a peripheral edge portion 83 (fourth peripheral edge portion) that is located outside the intermediate layer 23 in a plan view, and the main body portion 81, the covering portion 82, and the peripheral edge portion 83 are integrally formed. As a result, the outer end surface 73a of the intermediate layer 23 is covered by the second laminate 24, so peeling of the first laminate 22 and the intermediate layer 23 can be suppressed.

[0063] In the Fabry-Perot interference filter 1, the polysilicon layer 52 (first low-resistance layer) and the polysilicon layer 53 (second low-resistance layer) are made of polysilicon, and the silicon nitride layer 62 (first insulating layer) is made of silicon nitride. This makes it possible to achieve desired mirror characteristics. [First Modification]

[0064] Although one embodiment of the present disclosure has been described above, the present disclosure is not limited to the above embodiment. Fig. 5 is an enlarged cross-sectional view showing a portion of a Fabry-Perot interference filter according to a first modified example. The Fabry-Perot interference filter 101 according to the first modified example differs from the Fabry-Perot interference filter 1 of the above embodiment in that the silicon nitride layer 61 covers the outer edge 51a of the polysilicon layer 51. In the first stacked body 22 according to the first modified example, the polysilicon layer 51 corresponds to the first low-resistance layer, not the third low-resistance layer. In this case, the silicon nitride layer 61 corresponds to the first insulating layer, the polysilicon layer 52 corresponds to the second low-resistance layer, the silicon nitride layer 62 corresponds to the third insulating layer, and the polysilicon layer 53 corresponds to the fourth low-resistance layer.

[0065] The silicon nitride layer 61 in the first modified example has a main body portion 61a (first main body portion), a covering portion 61b (first covering portion), and a peripheral portion 61c (first peripheral portion). The main body portion 61a, covering portion 61b, and peripheral portion 61c are integrally formed so as to be continuous with one another. The main body portion 61a is located on the polysilicon layer 51 and overlaps the entire polysilicon layer 51 in a planar view. The covering portion 61b is continuous with the main body portion 61a at the outer edge 51a of the polysilicon layer 51. The covering portion 61b covers the outer edge 51a of the polysilicon layer 51 and extends to the anti-reflection layer 21. The peripheral portion 61c is continuous with the end of the covering portion 61b facing the substrate 11 and extends outward from the covering portion 61b along the first surface 11a of the substrate 11. The peripheral portion 61c is located outside the polysilicon layer 51 in a planar view. The covering portion 61b and the peripheral portion 61c are formed in a frame shape (a rectangular frame shape in this example) so as to surround the main body portion 61a in a plan view. The width L11 of one side of the covering portion 61b and the peripheral portion 61c in a plan view is, for example, about 2 μm. The width L11 is set to, for example, about 4 to 200 times the thickness of the main body portion 61a (about 0.01 μm to 0.5 μm in this example).

[0066] The polysilicon layer 52 has a main body portion 52a and a covering portion 52b. The main body portion 52a and the covering portion 52b are integrally formed so as to be continuous with each other. The main body portion 52a is located on the main body portion 61a of the silicon nitride layer 61 and overlaps the entire main body portion 61a in a plan view. The covering portion 52b extends outward from the main body portion 52a along the first surface 11a of the substrate 11. The covering portion 52b covers the covering portion 61b of the silicon nitride layer 61 and is located on the peripheral portion 61c and overlaps the peripheral portion 61c in a plan view.

[0067] In the silicon nitride layer 62 of the first modification, the main body portion 62a corresponds to the second main body portion, the covering portion 62b corresponds to the second covering portion, and the peripheral portion 62c corresponds to the second peripheral portion. The peripheral portion 62c is in contact with the peripheral portion 61c. The width L12 of one side of the covering portion 62b and the peripheral portion 62c in a plan view is, for example, about 6 μm. The width L12 is set to, for example, about 12 to 600 times the thickness of the main body portion 62a (in this example, about 0.01 μm to 0.5 μm).

[0068] The polysilicon layer 53 extends so as to cover the silicon nitride layer 62. In the polysilicon layer 53, the width L13 of one side of the covering portion 53b and the peripheral portion 53c in a plan view is, for example, about 8 μm. The width L13 is set to, for example, about 16 to 800 times the thickness of the main body portion 53a (in this example, about 0.01 μm to 0.5 μm). Note that a step portion 22a is formed at the outer edge of the first stack 22 by the peripheral portion 61c of the silicon nitride layer 61, the covering portion 62b and peripheral portion 62c of the silicon nitride layer 62, and the covering portion 53b and peripheral portion 53c of the polysilicon layer 53.

[0069] The Fabry-Perot interference filter 101 of the first modified example also makes it possible to adjust the distance between the first mirror portion 31 and the second mirror portion 32 with high precision, as with the Fabry-Perot interference filter 1 of the above embodiment.

[0070] Furthermore, in the Fabry-Perot interference filter 101, the silicon nitride layer 62 (third insulating layer) has a main body portion 62a (second main body portion) located on the polysilicon layer 52, a covering portion 62b (second covering portion) covering the outer edge 52c of the polysilicon layer 52, and a peripheral portion 62c (second peripheral portion) located outside the polysilicon layer 52 in a planar view, and the main body portion 62a, covering portion 62b, and peripheral portion 62c are integrally formed. This makes it possible to prevent, for example, the polysilicon layer 53 stacked on the silicon nitride layer 62 from contacting the polysilicon layer 52, thereby further suppressing the occurrence of leak paths.

[0071] Furthermore, in the Fabry-Perot interference filter 101, the peripheral edge 62c is in contact with the peripheral edge 61c, which makes it possible to more reliably prevent contact between the polysilicon layers 52 and 53, thereby further suppressing the occurrence of leak paths.

[0072] Furthermore, in the Fabry-Perot interference filter 101, the polysilicon layer 53 (fourth low-resistance layer) is disposed on the opposite side of the substrate from the silicon nitride layer 62. In this case, the covering portion 62b and the peripheral portion 62c of the silicon nitride layer 62 can prevent the polysilicon layer 53 from coming into contact with the polysilicon layer 52.

[0073] Furthermore, in the Fabry-Perot interference filter 101, the polysilicon layer 53 extends so as to cover the silicon nitride layer 62. This makes it possible to gently form the step portion 22a formed in the first stacked body 22. By gently forming the step portion 22a formed in the first stacked body 22, it is possible to suppress the occurrence of uneven application when applying a resist for etching, for example, and improve manufacturing stability.

[0074] In the Fabry-Perot interference filter 101, the polysilicon layer 52 (second low-resistance layer) is electrically connected to the compensation electrode 13 and the drive electrode 14. Even in this configuration, it is important to prevent the occurrence of a leak path between the polysilicon layer 51 and the polysilicon layer 52. For example, if a leak path occurs between the polysilicon layer 51 and the polysilicon layer 52, the compensation electrode 13 and the drive electrode 14 will become conductive with the polysilicon layer 51. In this case, the size of the region in the Fabry-Perot interference filter 101 where the compensation electrode 13 and the drive electrode 14 are conductive becomes larger than expected, which may reduce the accuracy of controlling the distance between the first mirror portion 31 and the second mirror portion 32 by applying voltages to the drive electrode 12 and the drive electrode 14. In contrast, as described above, the Fabry-Perot interference filter 101 can prevent the occurrence of a leak path due to contact between the polysilicon layer 51 and the polysilicon layer 52, thereby preventing such a situation from occurring. [Second Modification]

[0075] 6 is an enlarged cross-sectional view showing a portion of a Fabry-Perot interference filter according to the second modification. The Fabry-Perot interference filter 201 according to the second modification differs from the Fabry-Perot interference filter 101 according to the first modification in that the peripheral edge 62 c is not in contact with the peripheral edge 61 c.

[0076] In the Fabry-Perot interference filter 201, the polysilicon layer 52 further includes a peripheral edge portion 52d in addition to a main body portion 52a and a covering portion 52b. The main body portion 52a, the covering portion 52b, and the peripheral edge portion 52d are integrally formed so as to be continuous with one another. The main body portion 52a is located on the main body portion 61a of the silicon nitride layer 61 and overlaps the entire main body portion 61a in a planar view. The covering portion 52b covers the covering portion 61b and the peripheral edge portion 61c of the silicon nitride layer 61 and extends to the anti-reflection layer 21. The peripheral edge portion 52d is continuous with the end of the covering portion 52b on the substrate 11 side and extends outward from the covering portion 52b along the first surface 11a of the substrate 11. When viewed perpendicular to the first surface 11a, the peripheral edge portion 52d is located outside the main body portion 61a and covering portion 61b of the silicon nitride layer 61. The peripheral edge portion 52d is located between the peripheral edge portion 62c of the silicon nitride layer 62 and the peripheral edge portion 61c of the silicon nitride layer 61. Therefore, unlike the first modification, the peripheral edge portion 62c is not in contact with the peripheral edge portion 61c.

[0077] The Fabry-Perot interference filter 201 of the second modified example also makes it possible to adjust the distance between the first mirror portion 31 and the second mirror portion 32 with high precision, similar to the Fabry-Perot interference filter 1 according to the above embodiment.

[0078] 7 is an enlarged cross-sectional view showing a portion of a Fabry-Perot interference filter according to a third modification. The Fabry-Perot interference filter 301 according to the third modification differs from the Fabry-Perot interference filter 1 of the above embodiment in that, instead of the second stack 24, it has a second stack 124 in which a structure similar to that of the first stack 22 is applied to the edge portion. In the second stack 124, a polysilicon layer 54, a silicon nitride layer 64, a polysilicon layer 55 (fifth low-resistance layer), a silicon nitride layer 65 (fourth insulating layer), and a polysilicon layer 56 (sixth low-resistance layer) are stacked in this order from bottom to top on the intermediate layer 23 and the first surface 11a of the substrate 11. That is, the polysilicon layer 55 (fifth low-resistance layer) is disposed above the polysilicon layer 54. The polysilicon layer 56 (sixth low-resistance layer) is disposed above the polysilicon layer 55 (fifth low-resistance layer). The silicon nitride layer 64 is disposed between the polysilicon layer 54 and the polysilicon layer 55 (fifth low-resistance layer). The silicon nitride layer 65 (fourth insulating layer) is disposed between the polysilicon layer 55 (fifth low-resistance layer) and the polysilicon layer 56 (sixth low-resistance layer).

[0079] The silicon nitride layer 65 has a main body portion 65a (fifth main body portion), a covering portion 65b (fifth covering portion), and a peripheral portion 65c (fifth peripheral portion). The main body portion 65a, covering portion 65b, and peripheral portion 65c are integrally formed and continuous with one another. The main body portion 65a is located on the polysilicon layer 55 and overlaps the entire polysilicon layer 55 in a plan view. The covering portion 65b is continuous with the main body portion 65a at the outer edge 55a of the polysilicon layer 55. The covering portion 65b covers the outer edge 55a of the polysilicon layer 55, the outer edge 64a of the silicon nitride layer 64, and the outer edge 54a of the polysilicon layer 54, and extends to the first surface 11a. The peripheral portion 65c is continuous with the end of the covering portion 65b facing the substrate 11 and extends outward from the covering portion 65b along the first surface 11a of the substrate 11. The peripheral edge portion 65c is located outside the polysilicon layer 55 in a plan view.

[0080] The polysilicon layer 56 has a main body portion 56a, a covering portion 56b, and a peripheral portion 56c. The main body portion 56a, the covering portion 56b, and the peripheral portion 56c are integrally formed and continuous with one another. The main body portion 56a is located on the silicon nitride layer 65 and overlaps the main body portion 65a of the silicon nitride layer 65 in a planar view. The covering portion 56b covers the covering portion 65b and the peripheral portion 65c and extends to the first surface 11a. The peripheral portion 56c is continuous with the end of the covering portion 56b facing the substrate 11 and extends outward from the covering portion 56b along the first surface 11a of the substrate 11. The peripheral portion 56c is located outside the silicon nitride layer 65 in a planar view. The peripheral portion 56c is located on the first surface 11a at the outer edge portion 11c. The outer edge of the peripheral portion 56c coincides with the outer edge of the substrate 11 in a planar view. The polysilicon layer 56 covers the main body portion 65 a, the covering portion 65 b, and the peripheral edge portion 65 c. The covering portion 56 b and the peripheral edge portion 56 c are formed in a frame shape (a rectangular frame shape in this example) so as to surround the main body portion 56 a in a plan view. The peripheral edge portion 65 c of the silicon nitride layer 65 and the covering portion 56 b and the peripheral edge portion 56 c of the polysilicon layer 56 form a step portion 24 c.

[0081] As with the Fabry-Perot interference filter 1 according to the above embodiment, the Fabry-Perot interference filter 301 of the third modified example also makes it possible to accurately adjust the distance between the first mirror portion 31 and the second mirror portion 32. Furthermore, in the Fabry-Perot interference filter 301, the covering portion 65b (fifth covering portion) and the peripheral portion 65c (fifth peripheral portion) of the silicon nitride layer 65 (fourth insulating layer) can prevent the polysilicon layer 55 from contacting the polysilicon layer 56, thereby suppressing the occurrence of a leak path due to the polysilicon layer 56 contacting the polysilicon layer 55.

[0082] The present disclosure is not limited to the above-described embodiment and modifications. For example, the materials and shapes of the components are not limited to those described above, and various materials and shapes can be adopted.

[0083] In the above description of the third modified example, the first stack 22 was considered to be the reference stack, but the second stack 124 can also be considered to be the reference stack. In this case, the second stack 124 includes a polysilicon layer 55 (first low-resistance layer), a polysilicon layer 56 (second low-resistance layer) disposed above the polysilicon layer 55, and a silicon nitride layer 65 (first insulating layer) disposed between the polysilicon layer 55 and the polysilicon layer 56. The resistivity of the material constituting the polysilicon layer 55 and the polysilicon layer 56 is lower than the resistivity of the material constituting the silicon nitride layer 65. The silicon nitride layer 65 includes a main body portion 65a (first main body portion) located on the polysilicon layer 55, a covering portion 65b (first covering portion) covering the outer edge 55a of the polysilicon layer 55, and a peripheral portion 65c (first peripheral portion) located outside the polysilicon layer 55 in a plan view. The main body portion 65a, the covering portion 65b, and the peripheral portion 65c are integrally formed. The first stack 22 also includes a polysilicon layer 52 (fifth low-resistance layer), a polysilicon layer 53 (sixth low-resistance layer) disposed above the polysilicon layer 52, and a silicon nitride layer 62 (fourth insulating layer) disposed between the polysilicon layer 52 and the polysilicon layer 53. The resistivity of the material constituting the polysilicon layer 52 and the polysilicon layer 53 is lower than the resistivity of the material constituting the silicon nitride layer 62. The silicon nitride layer 62 includes a main body portion 62a (fifth main body portion) located on the polysilicon layer 52, a covering portion 62b (fifth covering portion) covering the outer edge of the polysilicon layer 52, and a peripheral portion 62c (fifth peripheral portion) located outside the polysilicon layer 52 in a plan view. The main body portion 62a, the covering portion 62b, and the peripheral portion 62c are integrally formed.

[0084] In the third modification, when the second stack 124 is regarded as a reference stack, the silicon nitride layer 62 of the first stack 22 may not have the covering portion 62 b and the peripheral portion 62 c, and may have only the main portion 62 a. The polysilicon layer 53 of the first stack 22 may not have the covering portion 53 b and the peripheral portion 53 c, ​​and may have only the main portion 53 a.

[0085] In the above embodiment and each modified example, the first stack 22 may not have the polysilicon layer 51 and the silicon nitride layer 61, but may have only the polysilicon layers 52, 53 and the silicon nitride layer 62. Alternatively, the first stack 22 may not have the polysilicon layer 53, but may have only the polysilicon layers 51, 52 and the silicon nitride layers 61, 62. The first stack 22 may have only the polysilicon layers 51, 52 and the silicon nitride layer 61. The intermediate layer 23 may not have the covering portion 72 and the extending portion 73, but may have only the defining portion 71. The second stack 24 may not have the covering portion 82 and the peripheral portion 83. The polysilicon layer 53 may not extend to cover the covering portion 62b of the silicon nitride layer 62, but may extend to cover only the main body portion 62a.

[0086] In the above embodiment and each modification, the polysilicon layers 51, 52, and 53 may not be electrically connected to the compensation electrode 13 and the drive electrode 14. That is, both the first low-resistance layer and the second low-resistance layer may not be electrically connected to an electrode. The compensation electrode 13 and the drive electrode 14 may be formed on a layer other than the polysilicon layer 53 (for example, the polysilicon layer 51 or 52).

[0087] In the above-described embodiment and each modified example, the low-resistance layer of the first stack 22 and the second stack 24 is composed of a polysilicon layer 50, and the insulating layer is composed of a silicon nitride layer 60. However, the materials constituting the low-resistance layer and the insulating layer are not limited as long as the resistivity of the material constituting the low-resistance layer is lower than the resistivity of the material constituting the insulating layer. For example, the low-resistance layer of the first stack 22 and the second stack 24 may be layers composed of aluminum, copper, titanium, chromium, cobalt, nickel, ruthenium, niobium, molybdenum, tungsten, gold, silver, carbon, etc., or layers composed of compounds containing these elements. The insulating layer of the first stack 22 and the second stack 24 may be layers composed of silicon oxide, titanium oxide, tantalum oxide, zirconium oxide, magnesium fluoride, aluminum oxide, calcium fluoride, silicon, germanium, zinc sulfide, etc.

[0088] In the above embodiment, the covering portion 62 b only needs to cover the outer edge 52 c of the polysilicon layer 52 , and does not necessarily need to cover the outer edge 61 d of the silicon nitride layer 61 and the outer edge 51 a of the polysilicon layer 51 .

[0089] 1, 101, 201, 301...Fabry-Perot interference filter, 11...substrate, 22...first stack (reference stack), 22a...step portion, 23...intermediate layer, 24, 124...second stack, 31...first mirror portion, 32...second mirror portion, S...gap, 51...polysilicon layer (third low resistance layer) (first low resistance layer), 51a...outer edge, 52...polysilicon layer (first low resistance layer) (second low resistance layer), 52c...outer edge, 53...polysilicon layer (second low resistance layer) (fourth low resistance layer), 55...polysilicon layer (fifth low resistance layer), 56...polysilicon layer (sixth low resistance layer), 61...silicon nitride layer (second insulating layer) (first insulating layer), 61a...main body portion (first main body portion), 61 b...covering portion (first covering portion), 61c...periphery (first peripheral portion), 61d...outer edge, 62...silicon nitride layer (first insulating layer) (second insulating layer), 62a...main body portion (first body portion) (second body portion), 62b...covering portion (first covering portion) (second covering portion), 62c...periphery (first peripheral portion) (second peripheral portion), 65...silicon nitride layer (fourth insulating layer), 65a...main body portion (fifth main body portion), 65b...covering portion (fifth covering portion), 65c...periphery (fifth peripheral portion), 71...defining portion (third main body portion), 72...covering portion (third covering portion), 73...extending portion (third peripheral portion), 81...main body portion (fourth main body portion), 82...covering portion (fourth covering portion), 83...periphery (fourth peripheral portion), S...gap.

Claims

a first stack having a first mirror portion disposed on the substrate; a second stack having a second mirror portion facing the first mirror portion across a gap on the opposite side of the substrate from the first mirror portion; and an intermediate layer defining the gap between the first stack and the second stack; a reference stack which is one of the first stack and the second stack, comprising a first low-resistance layer, a second low-resistance layer disposed on the opposite side of the substrate from the first low-resistance layer, and a first insulating layer disposed between the first low-resistance layer and the second low-resistance layer; a resistivity of a material constituting the first low-resistance layer and the second low-resistance layer is smaller than a resistivity of a material constituting the first insulating layer; and the first insulating layer has a first main portion located on the first low-resistance layer, a first covering portion covering an outer edge of the first low-resistance layer, and a first peripheral portion located outside the first low-resistance layer when viewed from a direction perpendicular to the substrate; A Fabry-Perot interference filter, wherein the first body portion, the first covering portion, and the first peripheral portion are integrally formed.

2. The Fabry-Perot interference filter of claim 1, wherein the reference stack has a third low-resistance layer arranged on the substrate side of the first low-resistance layer, and a second insulating layer arranged between the first low-resistance layer and the third low-resistance layer, and the resistivity of the material constituting the third low-resistance layer is smaller than the resistivity of the material constituting the second insulating layer.

3. The Fabry-Perot interference filter according to claim 2, wherein the first covering portion covers the outer edge of the first low-resistance layer, the outer edge of the third low-resistance layer, and the outer edge of the second insulating layer.

4. A Fabry-Perot interference filter according to claim 2 or 3, wherein the second low-resistance layer extends so as to cover the first covering portion of the first insulating layer.

5. A Fabry-Perot interference filter as described in claim 1, wherein the reference stack further has a third insulating layer arranged on the opposite side of the second low-resistance layer to the substrate, the third insulating layer having a second main body portion located on the second low-resistance layer, a second covering portion covering the outer edge of the second low-resistance layer, and a second peripheral portion located outside the second low-resistance layer when viewed from a direction perpendicular to the substrate, and the second main body portion, the second covering portion and the second peripheral portion are integrally formed.

6. The Fabry-Perot interference filter of claim 5, wherein said second peripheral portion is in contact with said first peripheral portion.

7. The Fabry-Perot interference filter according to claim 5 or 6, wherein the reference stack further comprises a fourth low resistance layer arranged on the opposite side of the third insulating layer from the substrate.

8. A Fabry-Perot interference filter according to any one of claims 1 to 7, wherein at least one of the first low resistance layer and the second low resistance layer is electrically connected to an electrode.

9. A Fabry-Perot interference filter as described in any one of claims 1 to 8, wherein the intermediate layer has a third main body portion located on the first laminate, a third covering portion covering the outer edge of the first laminate, and a third peripheral portion located outside the first laminate when viewed from a direction perpendicular to the substrate, and the third main body portion, the third covering portion and the third peripheral portion are integrally formed.

10. A Fabry-Perot interference filter described in any one of claims 1 to 9, wherein the reference stack is the first stack, and the second stack has a fourth main body portion located on the intermediate layer, a fourth covering portion covering the outer edge of the intermediate layer, and a fourth peripheral portion located outside the intermediate layer when viewed from a direction perpendicular to the substrate, and the fourth main body portion, the fourth covering portion and the fourth peripheral portion are integrally formed.

11. A Fabry-Perot interference filter according to any one of claims 1 to 10, wherein the first low resistance layer and the second low resistance layer are formed of polysilicon, and the first insulating layer is formed of silicon nitride.

12. A Fabry-Perot interference filter as claimed in any one of claims 1 to 11, wherein the other of the first laminate and the second laminate has a fifth low-resistance layer, a sixth low-resistance layer arranged on the opposite side of the substrate to the fifth low-resistance layer, and a fourth insulating layer arranged between the fifth low-resistance layer and the sixth low-resistance layer, wherein the resistivity of a material constituting the fifth low-resistance layer and the sixth low-resistance layer is lower than the resistivity of a material constituting the fourth insulating layer, and the fourth insulating layer has a fifth main body portion located on the fifth low-resistance layer, a fifth covering portion covering the outer edge of the fifth low-resistance layer, and a fifth peripheral portion located outside the fifth low-resistance layer when viewed from a direction perpendicular to the substrate, and wherein the fifth main body portion, the fifth covering portion and the fifth peripheral portion are integrally formed.

13. A Fabry-Perot interference filter according to any one of claims 1 to 12, wherein the reference stack is the first stack.

14. A Fabry-Perot interference filter according to any one of claims 1 to 12, wherein the reference stack is the second stack.

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