Defect detection device, imaging device, and defect detection method

Abstract

The present invention reduces latency in a device for detecting the presence or absence of a defect.　This defect detection device is provided with a defect detection unit and a defect detection flag output unit. In the defect detection device provided with the defect detection unit and the defect detection flag output unit, the defect detection unit detects whether or not there is a pixel defect in a predetermined region in image data. In the defect detection device provided with the defect detection unit and the defect detection flag output unit, the defect detection flag output unit outputs a predetermined defect detection flag on the basis of the detection result of the pixel defect.

Description

Defect detection device, imaging device, and defect detection method

[0001] The present technology relates to a defect detection device, and more particularly to a defect detection device, an imaging device, and a defect detection method for detecting defects in image data.

[0002] Solid-state imaging devices have been used for imaging in various fields, including industry, transportation, and crime prevention. During the manufacturing process of these solid-state imaging devices, pixel defects, which prevent pixel signals from being obtained in accordance with the amount of incident light, can occur in the pixel array. For example, a solid-state imaging device has been proposed that detects the presence or absence of pixel defects by comparing the output values ​​of multiple photoelectric conversion elements that share a microlens in image data (see, for example, Patent Document 1).

[0003] JP 2018-152829 A

[0004] The above-mentioned conventional technology attempts to detect defects in real time by processing image data. However, with the above-mentioned conventional technology, it is difficult to further reduce the latency required for processing image data.

[0005] This technology was developed in light of these circumstances, and aims to reduce latency in devices that detect the presence or absence of defects.

[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is a defect detection device and a defect detection method including a defect detection unit that detects whether or not there is a pixel defect in a predetermined area in image data, and a defect detection flag output unit that outputs a predetermined defect detection flag based on the detection result of the pixel defect, thereby reducing latency.

[0007] In this first aspect, the defect detection flag may include an error flag indicating whether or not the pixel defect exists within the predetermined region, thereby enabling a subsequent circuit to grasp the pixel defect.

[0008] In this first aspect, the defect detection flag may include a warning flag indicating whether the pixel defect is correctable, thereby enabling a subsequent circuit to determine the severity of the defect.

[0009] In addition, in the first aspect, the image processing apparatus may further include a cropped data acquisition unit that acquires cropped data obtained by cropping the predetermined area from the image data, and a defect correction unit that corrects the pixel defect in the cropped data, thereby achieving the effect of correcting the pixel defect.

[0010] In addition, in this first aspect, the cropped data acquisition unit may include an image data generation unit that generates the image data, and a cropping unit that crops the predetermined area from the image data and outputs the cropped data, thereby achieving the effect of cropping and correcting only the predetermined area of ​​the image data.

[0011] In addition, in this first aspect, the defect detection flag output unit may output the defect detection flag to the defect correction unit, and the defect correction unit may output a frame including the extracted data in which the pixel defect has been corrected and in which the defect detection flag is embedded. This brings about an effect that a path for outputting the defect detection flag is not required.

[0012] In this first aspect, the defect correction unit may output a frame including the corrected extracted data, and the defect detection flag output unit may output the defect detection flag to an external device of the defect detection device, thereby eliminating the need for a process of extracting the defect detection flag from the frame.

[0013] In addition, in the first aspect, the image processing apparatus may further include a register, the defect correction unit may output a frame including the corrected extracted data, and the defect detection flag output unit may output the defect detection flag to the register, thereby eliminating the need for a process of extracting the defect detection flag from the frame.

[0014] In addition, in this first aspect, the image data may include normal image data in which pixel signals corresponding to light intensities are arranged and test image data in which pixel signals of fixed values ​​are arranged, the defect detection unit may detect whether or not the pixel defect exists within the predetermined region in the test image data, and the defect correction unit may correct the pixel defect within the predetermined region in the normal image data. This brings about the effect of detecting pixel defects during imaging of the normal image data.

[0015] In addition, in the first aspect, the image capturing apparatus may further include a delay unit that delays the detection result of the defect detection unit over a predetermined period of a vertical synchronization signal, the normal image data and the test image data are generated in synchronization with the vertical synchronization signal, and the defect correction unit corrects the pixel defect using the delayed detection result, thereby providing the effect of detecting pixel defects during imaging of the normal image data.

[0016] In the first aspect, the predetermined area may include a first area and a second area, and the defect detection flag output unit may generate the defect detection flag based on detection results of the first and second areas, thereby enabling a subsequent circuit to recognize multiple objects.

[0017] According to a second aspect of the present technology, there is provided an imaging device including an image data generating unit that generates the image data, a defect detecting unit that detects whether or not there is a pixel defect in a predetermined region of the image data, and a defect detection flag output unit that outputs a predetermined defect detection flag based on a result of the detection of the pixel defect, thereby reducing latency.

[0018] In addition, in a second aspect of the present technology, the image data generation unit, the defect detection unit, and the defect detection flag output unit may be arranged within a solid-state imaging device, thereby eliminating the need to detect defects outside the solid-state imaging device.

[0019] In addition, in a second aspect of the present technology, the image data generation unit may be arranged within a solid-state imaging device, and the defect detection unit and the defect detection flag output unit may be arranged outside the solid-state imaging device, thereby eliminating the need to detect defects using the solid-state imaging device.

[0020] 1 is a block diagram showing an example of a configuration of an imaging device according to a first embodiment of the present technology. FIG. 2 is a block diagram showing an example of a configuration of a solid-state imaging element according to the first embodiment of the present technology. FIG. 3 is a block diagram showing an example of a configuration of an image data generation unit according to the first embodiment of the present technology. FIG. 4 is a block diagram showing an example of a configuration of a solid-state imaging element when directly reading out an ROI according to the first embodiment of the present technology. FIG. 5 is a diagram showing an example of an operation of a solid-state imaging element according to the first embodiment of the present technology and an example of a frame format. FIG. 6 is a diagram showing an example of normal image data in which a pixel defect has occurred according to the first embodiment of the present technology. FIG. 7 is a diagram showing an example of a format of a defect detection flag according to the first embodiment of the present technology. FIG. 8 is a flowchart showing an example of an operation of a solid-state imaging element according to the first embodiment of the present technology. FIG. 9 is a diagram showing an example of data in which a pixel defect is not detected according to the first embodiment of the present technology. FIG. 10 is a block diagram showing an example of data in which a pixel defect is detected according to the first embodiment of the present technology. FIG. 11 is a block diagram showing an example of a configuration of a solid-state imaging element according to a second embodiment of the present technology. FIG. 12 is a timing chart showing an example of a fluctuation of a defect detection flag according to the second embodiment of the present technology. FIG. 13 is a block diagram showing an example of a configuration of a solid-state imaging element in which a register is arranged according to the second embodiment of the present technology. FIG. 14 is a block diagram showing an example of a configuration of a solid-state imaging element according to a third embodiment of the present technology. FIG. 15 is a block diagram showing an example of a configuration of an image data generation unit according to the third embodiment of the present technology. Fig. 10 is a flowchart showing an example of an operation of a solid-state imaging element according to a third embodiment of the present technology. Fig. 11 is a block diagram showing an example configuration of a solid-state imaging element according to a fourth embodiment of the present technology. Fig. 12 is a diagram showing an example of normal image data and cropped data according to the fourth embodiment of the present technology. Fig. 13 is a diagram showing an example format of a defect detection flag according to the fourth embodiment of the present technology. Fig. 14 is a block diagram showing an example configuration of an imaging device according to a fifth embodiment of the present technology. Fig. 15 is a block diagram showing an example configuration of an image processing unit according to the fifth embodiment of the present technology. Fig. 16 is a block diagram showing a schematic example configuration of a vehicle control system. Fig. 17 is an explanatory diagram showing an example of an installation position of an imaging unit.

[0021] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be given in the following order: 1. First embodiment (an example of detecting a defect in an ROI) 2. Second embodiment (an example of detecting a defect in an ROI and outputting the detection result separately from a frame) 3. Third embodiment (an example of detecting a defect in an ROI during imaging) 4. Fourth embodiment (an example of detecting defects in multiple ROIs) 5. Fifth embodiment (an example of detecting a defect in an ROI outside a solid-state imaging device) 6. Application example to a moving body

[0022] 1 is a block diagram showing an example of the configuration of an imaging device 100 according to a first embodiment of the present technology. The imaging device 100 is a device that captures image data, and includes an imaging lens 110, an OTP memory 120, a solid-state imaging element 200, and an image processing unit 130. An industrial camera or the like is envisioned as the imaging device 100. Note that the imaging device 100 can also be used as devices or equipment such as a smartphone or a digital still camera, in addition to industrial cameras.

[0023] The imaging lens 110 collects incident light and guides it to the solid-state imaging element 200. The solid-state imaging element 200 captures image data, extracts a region of interest (ROI) from the image data, and outputs the ROI to the image processing unit 130 via a signal line 209. The solid-state imaging element 200 is an example of a defect detection device as defined in the claims, and the ROI is an example of a predetermined region as defined in the claims.

[0024] The OTP (One Time Programmable) memory 120 stores OTP information indicating the addresses of a predetermined number of pixel defects within the solid-state imaging device 200. For example, the solid-state imaging device 200 captures a predetermined test image before shipping or during testing. The image processing unit 130 or an external device then analyzes the test image to detect pixel defects, thereby generating OTP information before capturing normal image data. This OTP information is supplied to the solid-state imaging device 200 via an I2C (Inter-Integrated Circuit) bus 208. Note that an interface such as an SPI (Serial Peripheral Interface) can be used instead of the I2C bus 208.

[0025] The image processing unit 130 performs predetermined image processing on the data from the solid-state imaging device 200. As the image processing unit 130, for example, a DSP (Digital Signal Processing) circuit is used.

[0026] If the imaging device 100 is an industrial camera, it is used, for example, to capture images of objects moving on a conveyor belt and perform various inspections. The image processing unit 130 performs, for example, a recognition process to recognize a specific object, and based on the recognition result, sets the range of the ROI so that the object is within the ROI. The image processing unit 130 generates setting information indicating the range of the ROI and supplies it to the solid-state imaging element 200 via the I2C bus 208.

[0027] Furthermore, when an object to be recognized exists within the ROI, the image processing unit 130 performs various inspections such as checking whether the object has scratches, whether it is in a specified position, etc. Note that at least a part of the processing performed by the image processing unit 130 can also be performed by an external device such as a server.

[0028] 2 is a block diagram showing an example of the configuration of a solid-state imaging device 200 according to the first embodiment of the present technology. The solid-state imaging device 200 includes a communication unit 211, a control unit 212, a cropped data acquisition unit 213, a defect detection unit 215, a defect detection flag output unit 216, a defect correction unit 217, and an output interface 218.

[0029] The communication unit 211 transmits and receives data to and from the OTP memory 120 and the image processing unit 130 via the external terminal 201. For example, the communication unit 211 receives setting information indicating the range of the ROI and OTP information indicating the addresses of each of a predetermined number of pixel defects, and supplies the same to the control unit 212.

[0030] The control unit 212 controls the circuits in the solid-state imaging device 200. The control unit 212 supplies setting information to an ROI extraction unit 214, and supplies setting information and OTP information to a defect detection unit 215.

[0031] The cut-out data acquisition unit 213 acquires cut-out data obtained by cutting out an ROI from image data. The cut-out data acquisition unit 213 includes an image data generation unit 300 and an ROI cut-out unit 214.

[0032] The image data generation unit 300 generates normal image data IMG, in which pixel signals according to the amount of light are arranged, in synchronization with the vertical synchronization signal XVS. The image data generation unit 300 supplies the generated normal image data IMG to the ROI cropping unit 214. As the normal image data IMG, for example, RAW image data before demosaicing is generated.

[0033] The ROI cutout unit 214 cuts out the ROI indicated by the setting information from the normal image data IMG. The ROI cutout unit 214 supplies the cutout data to the defect correction unit 217 as cutout data EXT.

[0034] The defect detection unit 215 detects the presence or absence of pixel defects in the ROI based on the setting information and OTP information, and generates defect information DEF indicating the detection results. For example, the defect detection unit 215 determines whether the address of each of a predetermined number of pixel defects indicated by the OTP information is within the ROI indicated by the setting information. If the addresses of one or more pixel defects are within the ROI, the defect detection unit 215 generates information indicating those addresses as defect information DEF and supplies it to the defect detection flag output unit 216 and the defect correction unit 217.

[0035] The defect detection flag output unit 216 generates a defect detection flag fd based on the defect information DEF and outputs it to the defect correction unit 217. The format of this defect detection flag fd will be described later.

[0036] The defect correction unit 217 corrects pixel defects in the extracted data EXT based on the defect information DEF. For example, the defect correction unit 217 calculates the average luminance value of pixels of the same color as the pixel defect within a predetermined range centered on the pixel defect, and replaces the pixel value of the pixel defect with this average value. The defect correction unit 217 then generates a frame including the corrected extracted data EXT. A defect detection flag fd is embedded in this frame. The defect correction unit 217 supplies the generated frame F to the output interface 218.

[0037] The output interface 218 outputs the frame F to an external device such as the image processing unit 130 via the external terminal 202 .

[0038] Here, as a comparative example, a solid-state imaging device is considered in which pixel defects are detected and corrected in normal image data before the ROI is extracted, and then the ROI is extracted. In this comparative example, correction processing must be performed on normal image data, which has a larger data size than the extracted data, increasing the amount of processing required for the correction processing. This increases the latency required for the correction processing. The increased latency reduces real-time performance and tracking ability for the object being recognized.

[0039] In contrast, in the first embodiment, correction processing is performed on extracted data, which has a data size smaller than that of normal image data, so the amount of processing required for correction processing can be reduced compared to the comparative example, thereby reducing latency and improving real-time performance and tracking performance.

[0040] 3 is a block diagram showing an example of the configuration of the image data generation unit 300 according to the first embodiment of the present technology. The image data generation unit 300 includes a vertical scanning circuit 310, a timing control circuit 320, a pixel array unit 330, and a column signal processing circuit 340. The pixel array unit 330 has a plurality of pixels 331 arranged in a two-dimensional lattice pattern.

[0041] The vertical scanning circuit 310 sequentially selects and drives rows in the pixel array unit 330, causing each pixel 331 in the row to output a pixel signal. The pixel 331 generates a pixel signal according to the amount of light by photoelectric conversion, and supplies the pixel signal to the column signal processing circuit 340 via a vertical signal line 339.

[0042] The timing control circuit 320 controls the operation timing of the vertical scanning circuit 310 and the column signal processing circuit 340 in synchronization with the vertical synchronization signal XVS.

[0043] The column signal processing unit 340 performs signal processing such as AD (Analog to Digital) conversion processing and CDS (Correlated Double Sampling) processing on each pixel signal. The column signal processing circuit 340 supplies normal image data IMG in which the processed pixel signals are arranged to the ROI cutout unit 214.

[0044] Although the image data generating unit 300 normally reads image data, the present invention is not limited to this configuration.

[0045] For example, as shown in Fig. 4, only the ROI readout unit 301 can be disposed within the cutout data acquisition unit 213. This ROI readout unit 301 reads out only the ROI instead of normal image data and generates cutout data. The configuration of this ROI readout unit 301 is similar to that of the image data generation unit 300 shown in Fig. 3. In the ROI readout unit 301, the vertical scanning circuit 310 selects only rows within the ROI, and the column signal processing circuit 340 processes only pixel signals of columns within the ROI.

[0046] 5 is a diagram showing an example of the operation of the solid-state imaging device 200 and a frame format according to the first embodiment of the present technology. The solid-state imaging device 200 performs exposure and readout in synchronization with the vertical synchronization signal XVS. For example, exposure and readout are performed within a 1V period from timing T1 of the falling edge of the vertical synchronization signal XVS to timing T4 of the next falling edge.

[0047] The solid-state imaging device 200 starts exposing all pixels at timing T1 and ends exposing all pixels at timing T2. This control, in which exposure is started and ended simultaneously for all pixels, is called a global shutter system. The solid-state imaging device 200 can also use a rolling shutter system, in which rows are selected in order and exposure is started in order.

[0048] During the readout period from timing T2 to T3, the solid-state imaging device 200 sequentially selects rows in synchronization with the horizontal synchronization signal XHS and reads out pixel signals from the selected rows. The solid-state imaging device 200 also extracts an ROI from the image data in which the readout pixel signals are arranged.

[0049] Subsequently, during the V-blank period from timing T3 to T4, the solid-state imaging device 200 detects whether or not there is a pixel defect and generates a 2-bit defect detection flag. Then, the solid-state imaging device 200 corrects the detected pixel defect and generates a frame including data of the ROI after correction. The nth frame (n is an integer) is called F ｎ Let's say.

[0050] The frame F shown in the same figure ｎ In this format, PH indicates a pixel header, FS indicates the start position of a frame, EBD indicates an area for embedded data, and a defect detection flag is stored in this area, IV indicates an initial vector, and MAC indicates a message authentication code, and FE indicates the end position of a frame.

[0051] 6A to 6D are diagrams illustrating an example of normal image data in which a pixel defect occurs according to the first embodiment of the present technology, in which regions surrounded by dotted lines in a, b, c, and d indicate ROIs.

[0052] In the figure, "a" shows an example of normal image data in which pixel defects 501 and 502 have occurred. The ROI in this normal image data is set within a range in which pixel defects 501 and 502 do not occur. Therefore, the defect detection unit 215 determines that there are no pixel defects within the ROI.

[0053] In the figure, "b" shows an example of normal image data in which pixel defects 501, 502, 503, and 504 have occurred. The ROI in this normal image data is set to the range within which pixel defects 503 and 504 occur. Therefore, the defect detection unit 215 determines that pixel defects 503 and 504 exist. Furthermore, because these pixel defects are not adjacent to each other and are individual point defects, the defect correction unit 217 can correct these pixel defects.

[0054] In the figure, "c" shows an example of normal image data in which multiple pixel defects occur consecutively. A continuous point defect 510 consisting of these defects is located within the ROI. Therefore, the defect detection unit 215 determines that there is a pixel defect within the ROI. In this case, the defect correction unit 217 cannot correct the continuous point defect 510.

[0055] In the figure, d shows an example of normal image data in which a line defect 511 has occurred. This line defect 511 passes through the ROI. Therefore, the defect detection unit 215 determines that there is a pixel defect within the ROI. In this case, the defect correction unit 217 cannot correct the defective area 510.

[0056] 7 is a diagram showing an example of a format of a defect detection flag in the first embodiment of the present technology, where "a" in the figure shows a format of a defect detection flag when positive logic is used, and "b" in the figure shows a format of a defect detection flag when negative logic is used.

[0057] For example, as illustrated in a and b in the figure, the defect detection flag includes a 1-bit error flag and a 1-bit warning flag. The error flag indicates whether or not there is a defect within the ROI. For example, as illustrated in a in the figure, if there is no defect within the ROI, the error flag is set to a logical value of "0," and if there is a defect within the ROI, the error flag is set to a logical value of "1." Note that, as illustrated in b in the figure, it is also possible to set the error flag to a logical value of "1" if there is no defect within the ROI, and to set the error flag to a logical value of "0" if there is a defect within the ROI.

[0058] Furthermore, when there is a pixel defect within the ROI, the warning flag indicates whether the defect is correctable or not. For example, as illustrated in FIG. 1A, if the defect is a correctable defect such as a single point defect and has little effect on image quality, the warning flag is set to a logical value of "0." On the other hand, if the defect is an uncorrectable defect such as a streak defect or continuous point defect and has a significant effect on image quality, the warning flag is set to a logical value of "1." Note that, as illustrated in FIG. 1B, the error flag can also be set to a logical value of "1" if the defect is correctable and to a logical value of "0" if the defect is uncorrectable.

[0059] The warning flag allows a circuit external to the solid-state imaging device 200 to grasp the seriousness of the defect and appropriately determine whether or not the solid-state imaging device 200 needs to be replaced.

[0060] The defect detection flag includes both an error flag and a warning flag, but may include only one of them.

[0061] 8 is a flowchart showing an example of the operation of the solid-state imaging device 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application for imaging is executed.

[0062] The image data generating unit 300 in the solid-state imaging device 200 generates image data by exposure and readout (step S901), the ROI cropping unit 214 crops the ROI from the image data to generate cropped data (step S902), the defect detecting unit 215 detects the presence or absence of pixel defects in the ROI based on the cropped data (step S903), and the defect detection flag output unit 216 generates and outputs a defect detection flag based on the detection result (step S904).

[0063] The defect correction unit 217 corrects pixel defects in the ROI based on the detection result and generates a frame in which a defect detection flag is embedded (step S905). The output interface 218 outputs the frame to the outside (step S906).

[0064] The solid-state imaging device 200 determines whether or not to end imaging (step S907). If imaging is not to be ended (step S907: No), the solid-state imaging device 200 repeats step S901 and subsequent steps in synchronization with the vertical synchronization signal XVS. On the other hand, if imaging is to be ended (step S907: Yes), the solid-state imaging device 200 ends the operation for imaging.

[0065] 9 is a diagram illustrating an example of data in which no pixel defect is detected according to the first embodiment of the present technology. The solid-state imaging device 200 generates normal image data IMG0, IMG1, IMG2, IMG3, and IMG4 in order in synchronization with a vertical synchronization signal.

[0066] The object 521 to be recognized moves on a conveyor belt or the like, and the image processing unit 130 follows the object 521's movement and sets the position of the ROI for each piece of image data so that the object 521 is within the ROI. The area surrounded by the dotted line in the figure indicates the ROI. The ROI is extracted for each piece of image data, and extracted data EXT0, EXT1, EXT2, EXT3, and EXT4 are generated in order.

[0067] Furthermore, in each normal image data, for example, pixel defects 501 and 502 occur at the same address. In all image data, the ROI is set to a range within which pixel defects 501 and 502 do not occur. In this case, no pixel defects are detected within the ROI, and the error flag for each frame is set to the logical value "0."

[0068] 10 is a diagram showing an example of data in which pixel defects are detected according to the first embodiment of the present technology. In the diagram, pixel defects 503 and 504 occur in each of the normal image data.

[0069] In normal image data IMG0, IMG1, and IMG2, the ROIs are set to a range within which pixel defects 503 and 504 do not occur. Meanwhile, in normal image data IMG3, the ROIs are set to a range within which pixel defects 503 occur. Furthermore, in normal image data IMG4, the ROIs are set to a range within which pixel defects 503 and 504 occur. In this case, no pixel defects are detected within the ROIs of the extracted data EXT0, EXT1, and EXT2, and the error flags for the corresponding frames are set to a logical value of "0." Meanwhile, pixel defects are detected within the ROIs of the extracted data EXT3 and EXT4, and the error flags for the corresponding frames are set to a logical value of "1."

[0070] As described above, according to the first embodiment of the present technology, the solid-state imaging device 200 detects and corrects pixel defects within the ROI in the normal image data, and therefore the amount of processing for the correction process is reduced compared to correcting pixel defects in the normal image data before extraction, thereby reducing latency.

[0071] 2. Second Embodiment In the first embodiment described above, the solid-state imaging device 200 embeds a defect detection flag in a frame and outputs it, but in this configuration, a process for extracting the defect detection flag from the frame is required in a subsequent circuit. The solid-state imaging device 200 in this second embodiment differs from the first embodiment in that it outputs the frame and the defect detection flag separately.

[0072] 11 is a block diagram showing an example of a configuration of a solid-state imaging device 200 according to a second embodiment of the present technology. In this second embodiment, a defect detection flag output unit 216 outputs a defect detection flag fd to the outside via an external terminal 203. Furthermore, a frame F is output via an external terminal 202 without embedding a defect detection flag in the frame.

[0073] As shown in the figure, the frame F and the defect detection flag fd are output separately, so that the circuit at the subsequent stage does not need to extract the defect detection flag from the frame.

[0074] 12 is a timing chart showing an example of fluctuations in the defect detection flag in the second embodiment of the present technology. The vertical synchronization signal XVS falls at times T1, T2, T3, T4, etc. Assume that normal image data is generated during the period from time T1 to time T2, and no pixel defect is detected in the ROI within this normal image data. In this case, the defect detection flag output unit 216 sets the error flag for that period to the logical value "0."

[0075] Assume that normal image data is generated during the period from timing T2 to T3, and no pixel defects are detected in the ROI within this normal image data. The defect detection flag output unit 216 sets the error flag for that period to a logical value of "0." The warning flag for the period from timing T1 to T3 may be either a logical value of "0" or "1."

[0076] Assume that normal image data is generated during the period from timing T3 to T4, and a correctable pixel defect is detected in the ROI within this normal image data. The defect detection flag output unit 216 sets the error flag for that period to a logical value of "1" and the warning flag to a logical value of "0."

[0077] Assume that normal image data is generated after timing T4, and an uncorrectable defect (such as a continuous point defect) is detected in the ROI within this normal image data. The defect detection flag output unit 216 sets the error flag for that period to a logical value of "1" and the warning flag to a logical value of "1."

[0078] 13 , a register 219 may be added so that the defect detection flag output unit 216 outputs the defect detection flag to the register 219. The defect detection flag held in the register 219 is read out via the external terminal 203.

[0079] As described above, according to the second embodiment of the present technology, the solid-state imaging device 200 outputs the frame and the defect detection flag separately, so that the downstream circuit does not need to extract the defect detection flag from the frame.

[0080] 3. Third Embodiment In the second embodiment described above, the defect detection unit 215 detects the presence or absence of pixel defects in the ROI using OTP information generated before capturing normal image data. However, pixel defects may occur during capturing of normal image data due to variations in temperature or power supply voltage. The solid-state imaging device 200 in this third embodiment differs from the second embodiment in that it detects the presence or absence of pixel defects in the ROI in real time during capturing of normal image data.

[0081] 14 is a block diagram showing a configuration example of a solid-state imaging element 200 according to a third embodiment of the present technology. The solid-state imaging element 200 according to the third embodiment differs from the second embodiment in that it further includes a delay unit 220. In addition, in the third embodiment, the OTP memory 120 is not arranged in the imaging device 100.

[0082] In the third embodiment, the image data generating unit 300 generates, in addition to the normal image data IMG, BIST (Built-In Self Test) image data bIMG in which pixel signals of fixed values ​​are arranged. The BIST image data bIMG is an example of the test image data set forth in the claims.

[0083] The ROI cutout unit 214 generates cutout data EXT by cutting out the ROI from the normal image data IMG, and cutout data bEXT by cutting out the ROI from the BIST image data bIMG.

[0084] Hereinafter, the nth (n is an integer) normal image data, test image data, cut-out data, defect information, and defect detection flag are referred to as IMG ｎ , bIMG ｎ , EXT ｎ , bEXT ｎ , D.E.F. ｎ and fd ｎ Let's say.

[0085] The ROI cutout unit 214 cuts out the cutout data EXT ｎ is supplied to the defect correction unit 217, and the extracted data bEXT ｎ is supplied to the defect detection unit 215.

[0086] The defect detection unit 215 detects the extracted data bEXT ｎ The BIST image data is subjected to a detection process to detect whether or not there is a pixel defect within the ROI. In this detection process, for example, the defect detection unit 215 sequentially focuses on pixels within the ROI and calculates the average value of the luminance values ​​of pixels of the same color as the pixel of interest within a predetermined filter range centered on the pixel of interest. Then, if the difference between the average value and the luminance value of the pixel of interest is greater than an upper limit value or if the difference is smaller than a lower limit value, the defect detection unit 215 detects the pixel of interest as a pixel defect. Note that the processing content of the detection process is not limited to the above, as long as it can detect a pixel defect.

[0087] The defect detection unit 215 detects the defect information DEF ｎ and supplies it to the delay unit 220 and the defect detection flag output unit 216 .

[0088] The delay unit 220 delays the defect information DEF over the period of the vertical synchronization signal XVS. ｎ The delay unit 220 delays the delayed defect information DEF ｎ－１ The defect correction unit 217 then supplies the defect information DEF of the n-1 frame (in other words, the previous frame) to the defect correction unit 217. ｎ－１The extracted data EXT of the nth frame (in other words, the current frame) is calculated using ｎ Corrects pixel defects within the image.

[0089] As illustrated in the figure, the defect detection unit 215 does not use the OTP information, but extracts the extracted data bEXT ｎ Pixel defects within the ROI of the BIST image data are detected based on the above. This eliminates the need for the OTP memory 120, and the solid-state imaging device 200 can detect pixel defects in real time while capturing normal image data. Furthermore, because the defect detection unit 215 detects pixel defects within the ROI, which has a smaller data size than the normal image data, it is possible to reduce the latency required for the detection process in addition to the latency required for the correction process.

[0090] Although the solid-state imaging device 200 outputs the defect detection flag and the frame separately in the figure, the defect detection flag can also be embedded in the frame as in the first embodiment. Also, the defect detection flag output unit 216 can output the defect detection flag to a register 219 (not shown).

[0091] 15 is a block diagram showing an example configuration of an image data generation unit 300 according to a third embodiment of the present technology. The image data generation unit 300 according to the third embodiment differs from the second embodiment in that a dummy source follower circuit 350 is arranged for each column.

[0092] The dummy source follower circuit 350 supplies a dummy pixel signal of a fixed value to the vertical signal line 339 of the corresponding column. As each of the pixel 331 and the dummy source follower circuit 350, for example, a circuit shown in FIG. 18 of Japanese Patent No. 6543419 is used.

[0093] The vertical scanning circuit 310 drives the pixels 331 within the readout period to output pixel signals according to the amount of light, and outputs normal image data IMG ｎ Furthermore, the vertical scanning circuit 310 controls the dummy source follower circuit 350 to output a dummy pixel signal during the V blank period, and generates the BIST image data bIMG ｎ Generate.

[0094] 16 is a flowchart showing an example of the operation of the solid-state imaging device 200 according to the third embodiment of the present technology. The operation of the solid-state imaging device 200 according to the third embodiment differs from that according to the second embodiment in that steps S911 to S916 are executed instead of steps S903 to S906.

[0095] After extracting the ROI (step S902), the defect correction unit 217 corrects pixel defects using defect information of the previous frame (step S911), and the output interface 218 outputs the frame (step S912).

[0096] Then, the image data generating unit 300 generates BIST image data (step S913), and the ROI extracting unit 214 extracts an ROI from the image data (step S914). The defect detecting unit 215 detects pixel defects within the ROI of the BIST image data and delays the defect information (step S915). The defect detection flag output unit 216 generates and outputs a defect detection flag (step S916). These steps S913 to S916 are executed within the V-blank period. Step S907 is executed after step S916.

[0097] As described above, according to the third embodiment of the present technology, the defect detection unit 215 detects pixel defects within the ROI of the BIST image data, and therefore can detect pixel defects in real time while capturing normal image data.

[0098] 4. Fourth Embodiment In the first embodiment described above, the solid-state imaging device 200 extracts one ROI for each image data, but it is also possible to set and extract two or more ROIs for each image data. The solid-state imaging device 200 in this fourth embodiment differs from the first embodiment in that it extracts multiple ROIs for each image data.

[0099] 17 is a block diagram showing an example configuration of a solid-state imaging device 200 according to a fourth embodiment of the present technology. In this fourth embodiment, two ROIs, a first ROI and a second ROI, are set within normal image data. The ROI extraction unit 214 extracts the ROIs and generates first extracted data 1stEXT and second extracted data 2ndEXT. The defect detection unit 215 detects pixel defects in the first extracted data and the second extracted data, and generates first defect information 1stDEF and second defect information 2ndDEF. The defect detection flag output unit 216 generates a defect detection flag based on the defect information. The format of the defect detection flag will be described later.

[0100] The defect correction unit 217 corrects pixel defects in each of the first and second ROIs and generates a frame including the two corrected ROIs, in which a defect detection flag is embedded.

[0101] 18 is a diagram showing an example of normal image data and cropped data according to the fourth embodiment of the present technology. Two ROIs, a first ROI and a second ROI, are set within the normal image data. Also, assume that pixel defects 501, 502, 503, and 504 occur. Of these, pixel defect 503 is located within the second ROI. Therefore, only pixel defect 503 within the second ROI is detected.

[0102] Furthermore, the ROI cutout unit 214 cuts out two ROIs and generates first cutout data 1stEXT and second cutout data 2ndEXT.

[0103] Although the solid-state imaging device 200 normally sets two ROIs for each image data, it is also possible to set three or more ROIs.

[0104] As described above, by setting a plurality of ROIs, the image processing unit 130 at the subsequent stage can individually recognize and inspect a plurality of objects.

[0105] 19 is a diagram illustrating an example of a format of a defect detection flag according to the fourth embodiment of the present technology. For example, as illustrated in a in the figure, a 2-bit first defect detection flag and a 2-bit second defect detection flag are generated.

[0106] The first defect detection flag includes a 1-bit error flag indicating whether or not there is a pixel defect in the first ROI and a 1-bit warning flag indicating whether or not the first ROI is correctable. The second defect detection flag includes a 1-bit error flag indicating whether or not there is a pixel defect in the second ROI and a 1-bit warning flag indicating whether or not the second ROI is correctable.

[0107] As shown in FIG. 1B, the defect detection flag output unit 216 can also generate a 2-bit defect detection flag, as in the first embodiment. In this case, if there is no defect in either the first ROI or the second ROI, the error flag is set to a logical value of "0." If there is a defect in at least one of the first ROI or the second ROI, the error flag is set to a logical value of "1." Furthermore, if both the first ROI and the second ROI are correctable, the warning flag is set to a logical value of "0," and if at least one of the first ROI or the second ROI is uncorrectable, the warning flag is set to a logical value of "1."

[0108] In a and b of the figure, a defect detection flag of positive logic is generated, but a defect detection flag of negative logic can also be generated.

[0109] The second and third embodiments can also be applied to the fourth embodiment.

[0110] Thus, according to the fourth embodiment of the present technology, the solid-state imaging element 200 sets the first ROI and the second ROI, so that the downstream image processing unit 130 can recognize and inspect the two objects individually.

[0111] 5. Fifth Embodiment In the first embodiment described above, the solid-state imaging element 200 detects and corrects defects, but the subsequent image processing unit 130 can also detect and correct defects. The imaging device 100 in this fifth embodiment differs from the first embodiment in that the image processing unit 130 detects and corrects defects.

[0112] 20 is a block diagram showing an example configuration of an imaging device 100 according to a fifth embodiment of the present technology. In the fifth embodiment, the solid-state imaging element 200 generates normal image data IMG and supplies it to the image processing unit 130. In addition, the OTP information held in the OTP memory 120 is read by the image processing unit 130.

[0113] 21 is a block diagram showing an example configuration of an image processing unit 130 according to the fifth embodiment of the present technology. The image processing unit 130 according to the fifth embodiment includes a communication unit 131, a control unit 132, a communication unit 133, an ROI extraction unit 134, a defect detection unit 135, a defect detection flag output unit 136, a defect correction unit 137, and an image recognition unit 138.

[0114] The communication unit 131 reads out the OTP information from the OTP memory 120 and supplies it to the control unit 132. The communication unit 133 receives the normal image data IMG from the solid-state imaging device 200 and supplies it to the ROI cutout unit .

[0115] The configurations of the control unit 132, the ROI extraction unit 134, the defect detection unit 135, the defect detection flag output unit 136, and the defect correction unit 137 are similar to those of the control unit 212, the ROI extraction unit 214, the defect detection unit 215, the defect detection flag output unit 216, and the defect correction unit 217 described above.

[0116] The defect correction unit 137 supplies the frame F to the image recognition unit 138. The image recognition unit 138 recognizes a predetermined object and sets the range of the ROI based on the recognition result. The image recognition unit 138 generates setting information and supplies it to the ROI cutout unit 134 and the defect detection unit 135.

[0117] It should be noted that each of the first to fourth embodiments can be applied to the fifth embodiment.

[0118] As described above, according to the fifth embodiment of the present technology, the image processing unit 130 detects and corrects defects, so the solid-state imaging device 200 does not need to perform these processes.

[0119] 6. Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0120] FIG. 22 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0121] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 22, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0122] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0123] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0124] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0125] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0126] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0127] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0128] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0129] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0130] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 22, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0131] FIG. 23 is a diagram showing an example of the installation position of the imaging unit 12031.

[0132] In FIG. 23, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0133] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0134] 23 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0135] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0136] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0137] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0138] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0139] The foregoing has described an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capture unit 12031 of the above-described configuration. Specifically, the image capture device 100 in FIG. 1 can be applied to the image capture unit 12031. (For example, "the image capture device 100 in FIG. 1 can be applied to the image capture unit 12031.") By applying the technology according to the present disclosure to the image capture unit 12031, it is possible to reduce the latency of processing image data and improve tracking and real-time performance.

[0140] Note that the above-described embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specifying the invention in the claims correspond to each other. Similarly, the matters specifying the invention in the claims and the matters in the embodiment of the present technology having the same name correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist thereof.

[0141] The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0142] The present technology may also be configured as follows. (1) A defect detection device comprising: a defect detection unit that detects whether or not a pixel defect exists within a predetermined region in image data; and a defect detection flag output unit that outputs a predetermined defect detection flag based on the detection result of the pixel defect. (2) The defect detection device according to (1), wherein the defect detection flag includes an error flag indicating whether or not the pixel defect exists within the predetermined region. (3) The defect detection device according to (1) or (2), wherein the defect detection flag includes a warning flag indicating whether or not the pixel defect is correctable. (4) The defect detection device according to any of (1) to (3), further comprising: a cropped data acquisition unit that acquires cropped data obtained by cropping the predetermined region from the image data; and a defect correction unit that corrects the pixel defect in the cropped data. (5) The defect detection device according to (4), wherein the cropped data acquisition unit includes: an image data generation unit that generates the image data; and a cropping unit that crops the predetermined region from the image data and outputs the cropped data. (6) The defect detection device according to (4), wherein the defect detection flag output unit outputs the defect detection flag to the defect correction unit, and the defect correction unit outputs a frame including the extracted data after correction of the pixel defect and in which the defect detection flag is embedded. (7) The defect detection device according to (4), wherein the defect correction unit outputs a frame including the extracted data after correction, and the defect detection flag output unit outputs the defect detection flag to an external device of the defect detection device. (8) The defect detection device according to (4), further comprising a register, wherein the defect correction unit outputs a frame including the extracted data after correction, and the defect detection flag output unit outputs the defect detection flag to the register. (9) The image data includes normal image data in which pixel signals according to the amount of light are arranged and test image data in which pixel signals of fixed values ​​are arranged, the defect detection unit detects whether or not there is a pixel defect within the specified area in the test image data, and the defect correction unit corrects the pixel defect within the specified area in the normal image data. A defect detection device described in any of (4) to (9).(10) The defect detection device according to (9), further comprising a delay unit that delays the detection result of the defect detection unit over a predetermined period of a vertical synchronization signal, wherein the normal image data and the test image data are generated in synchronization with the vertical synchronization signal, and the defect correction unit corrects the pixel defect using the delayed detection result. (11) The defect detection device according to any of (1) to (10), wherein the predetermined region includes first and second regions, and the defect detection flag output unit generates the defect detection flag based on the detection results of the first and second regions. (12) An imaging device comprising: an image data generation unit that generates the image data; a defect detection unit that detects whether or not there is a pixel defect in the predetermined region within the image data; and a defect detection flag output unit that outputs a predetermined defect detection flag based on the detection result of the pixel defect. (13) The defect detection device according to (12), wherein the image data generation unit, the defect detection unit, and the defect detection flag output unit are arranged within a solid-state imaging element. (14) The defect detection device according to (12), wherein the image data generation unit is disposed within a solid-state imaging element, and the defect detection unit and the defect detection flag output unit are disposed outside the solid-state imaging element. (15) A defect detection method comprising: a defect detection step of detecting whether or not there is a pixel defect within a predetermined area of ​​image data; and a defect detection flag output step of outputting a predetermined defect detection flag based on the detection result of the pixel defect.

[0143] 100 Imaging device 110 Imaging lens 120 OTP memory 130 Image processing unit 131, 133, 211 Communication unit 132, 212 Control unit 134, 214 ROI extraction unit 135, 215 Defect detection unit 136, 216 Defect detection flag output unit 137, 217 Defect correction unit 138 Image recognition unit 200 Solid-state imaging element 213 Extraction data acquisition unit 218 Output interface 219 Register 220 Delay unit 300 Image data generation unit 301 ROI readout unit 310 Vertical scanning circuit 320 Timing control circuit 330 Pixel array unit 331 Pixel 340 Column signal processing circuit 350 Dummy source follower circuit 12031 Imaging unit

Claims

1. A defect detection device comprising: a defect detection unit that detects whether or not there is a pixel defect within a specified area in image data; and a defect detection flag output unit that outputs a specified defect detection flag based on the detection result of the pixel defect.

2. The defect detection device according to claim 1, wherein the defect detection flag includes an error flag indicating whether or not the pixel defect is present within the predetermined region.

3. The defect detection device according to claim 1, wherein the defect detection flags include a warning flag indicating whether the pixel defect is correctable or not.

4. The defect detection device according to claim 1, further comprising: a cut-out data acquisition unit that acquires cut-out data obtained by cutting out said specified area from said image data; and a defect correction unit that corrects said pixel defects in said cut-out data.

5. A defect detection device as described in claim 4, wherein the cut-out data acquisition unit comprises: an image data generation unit that generates the image data; and a cut-out unit that cuts out the specified area from the image data and outputs it as the cut-out data.

6. The defect detection device according to claim 4, wherein the defect detection flag output unit outputs the defect detection flag to the defect correction unit, and the defect correction unit outputs a frame including the extracted data in which the pixel defect has been corrected and in which the defect detection flag is embedded.

7. The defect detection device according to claim 4, wherein said defect correction section outputs a frame including said corrected extracted data, and said defect detection flag output section outputs said defect detection flag to an external device of said defect detection device.

8. The defect detection device according to claim 4, further comprising a register, wherein the defect correction section outputs a frame including the corrected extracted data, and the defect detection flag output section outputs the defect detection flag to the register.

9. A defect detection device as described in claim 4, wherein the image data includes normal image data in which pixel signals according to light amounts are arranged and test image data in which pixel signals of fixed values ​​are arranged, the defect detection unit detects whether or not the pixel defect is present within the specified area in the test image data, and the defect correction unit corrects the pixel defect within the specified area in the normal image data.

10. A defect detection device as described in claim 9, further comprising a delay section which delays the detection result of the defect detection section by a predetermined period of the vertical synchronization signal, the normal image data and the test image data being generated in synchronization with the vertical synchronization signal, and the defect correction section correcting the pixel defect using the delayed detection result.

11. A defect detection device according to claim 1, wherein the predetermined area includes a first and a second area, and the defect detection flag output unit generates the defect detection flag based on the detection results of the first and second areas.

12. An imaging device comprising: an image data generating unit that generates the image data; a defect detecting unit that detects whether or not there is a pixel defect within a specified area of ​​the image data; and a defect detection flag output unit that outputs a specified defect detection flag based on the detection result of the pixel defect.

13. The defect detection device according to claim 12, wherein the image data generating section, the defect detecting section and the defect detection flag output section are arranged within a solid-state image sensor.

14. The defect detection device according to claim 12, wherein the image data generating section is arranged within a solid-state imaging element, and the defect detecting section and the defect detection flag output section are arranged outside the solid-state imaging element.

15. A defect detection method comprising: a defect detection step of detecting whether or not there is a pixel defect within a specified area in image data; and a defect detection flag output step of outputting a specified defect detection flag based on the detection result of the pixel defect.

Images