Display panel and manufacturing method therefor, and display device

Abstract

The present disclosure provides a display panel and a manufacturing method therefor, and a display device. The display panel comprises: a substrate; a first packaging layer on the substrate; a packaging cushioning layer located on the side of the first packaging layer distant from the substrate, wherein the packaging cushioning layer comprises a light extraction structure; and a second packaging layer located on the side of the packaging cushioning layer distant from the first packaging layer.

Description

Display panel, manufacturing method thereof, and display device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based on the application with CN application number 202310980576.8 and application date August 4, 2023, and claims its priority. The disclosed content of the CN application is hereby introduced as a whole into this application. Technical Field

[0003] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0004] Organic light-emitting diodes (OLEDs), which are self-luminous devices, have attracted widespread attention as flat panel display devices.

[0005] With the development of display technology, flexible display devices have the characteristics of rollability, wide viewing angle, and portability. In related technologies, OLED devices rarely achieve an EQE (External Quantum Efficiency) exceeding 30% due to substrate modes, waveguide modes, and organic layer absorption. Therefore, light extraction structures have become an important research direction.

[0006] Summary of the Invention

[0007] According to one aspect of the present disclosure, a display panel is provided, comprising: a substrate; a first encapsulation layer on the substrate; an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer comprises a light extraction structure; and a second encapsulation layer on a side of the encapsulation buffer layer away from the first encapsulation layer.

[0008] In some embodiments, the encapsulation buffer layer further includes a main body layer on a side of the first encapsulation layer away from the substrate, and the light extraction structure is located between the main body layer and the second encapsulation layer.

[0009] In some embodiments, the substrate includes a transistor layer and a sub-pixel layer on the transistor layer, the sub-pixel layer including a plurality of sub-pixels; the orthographic projection of the light extraction structure on the transistor layer at least partially overlaps with the orthographic projection of the plurality of sub-pixels on the transistor layer.

[0010] In some embodiments, the light extraction structure includes a grating structure.

[0011] In some embodiments, the grating structure includes a plurality of sub-grating structures, and the plurality of sub-grating structures include at least a portion of sub-grating structures, and the structural parameters of the at least a portion of sub-grating structures are different from each other.

[0012] In some embodiments, the substrate includes a transistor layer and a sub-pixel layer on the transistor layer, the sub-pixel layer includes a plurality of sub-pixels, and the plurality of sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels; the at least a portion of the sub-grating structure includes a first sub-grating structure, a second sub-grating structure, and a third sub-grating structure, wherein the orthographic projection of the first sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the red sub-pixel on the transistor layer, the orthographic projection of the second sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the green sub-pixel on the transistor layer, and the orthographic projection of the third sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the blue sub-pixel on the transistor layer, and the structural parameters of the first sub-grating structure, the second sub-grating structure, and the third sub-grating structure are different from each other.

[0013] In some embodiments, the grating structure includes a plurality of sub-grating structures, and the structural parameters of the plurality of sub-grating structures are the same.

[0014] In some embodiments, each sub-grating structure includes a plurality of strip-shaped components; the structural parameters of each sub-grating structure include: the spacing between adjacent strip-shaped components in the plurality of strip-shaped components, and / or the height of each strip-shaped component in the plurality of strip-shaped components.

[0015] In some embodiments, the distance between adjacent strip-shaped components in the plurality of strip-shaped components ranges from 5 nanometers to 50 nanometers; and the height of each strip-shaped component ranges from 10 nanometers to 50 nanometers.

[0016] In some embodiments, the light extraction structure includes a scattering structure.

[0017] In some embodiments, the scattering structure has a shape including at least one of a triangle, a cylinder, and an ellipse.

[0018] In some embodiments, the encapsulation buffer layer further includes a filling layer, a portion of the filling layer fills the gaps in the main layer, and another portion of the filling layer is located on a surface of the main layer away from the first encapsulation layer.

[0019] In some embodiments, the material of the filling layer includes metal oxide or silicon oxide.

[0020] In some embodiments, a material of the light extraction structure is different from a material of the filling layer; and the filling layer surrounds the light extraction structure.

[0021] In some embodiments, the material of the light extraction structure is the same as that of the filling layer; and the light extraction structure is located on a side of the filling layer away from the first encapsulation layer.

[0022] According to another aspect of the present disclosure, a display device is provided, including: the display panel as described above.

[0023] According to another aspect of the present disclosure, a method for manufacturing a display panel is provided, comprising: forming a first encapsulation layer on a substrate; forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer includes a light extraction structure; and forming a second encapsulation layer on a side of the encapsulation buffer layer away from the first encapsulation layer.

[0024] In some embodiments, forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate includes: forming a main layer on a side of the first encapsulation layer away from the substrate; and performing plasma treatment or surfactant treatment on the main layer to form the light extraction structure.

[0025] In some embodiments, the plasma treatment includes plasma treatment performed using fluorine plasma.

[0026] In some embodiments, forming an encapsulation buffer layer on the side of the first encapsulation layer away from the substrate includes: forming a main layer on the side of the first encapsulation layer away from the substrate; and using a mask template to form the light extraction structure on the main layer through a deposition process, wherein the light extraction structure includes a grating structure.

[0027] In some embodiments, forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate further comprises: forming a filling layer on a side of the main layer away from the first encapsulation layer, wherein a portion of the filling layer fills the gaps in the main layer.

[0028] In some embodiments, forming a filling layer on the side of the main layer away from the first encapsulation layer includes alternately performing the following operations to form the filling layer on the main layer: introducing a first precursor gas into a cavity in which the main layer is placed, performing a first pressure-holding treatment for a first predetermined period of time, and after the first pressure-holding treatment, opening the cavity to perform a cleaning treatment; and introducing a second precursor gas into the cavity, performing a second pressure-holding treatment for a second predetermined period of time, and after the second pressure-holding treatment, opening the cavity to perform a cleaning treatment.

[0029] In some embodiments, forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate includes: forming a main layer on a side of the first encapsulation layer away from the substrate; forming a filling layer on a side of the main layer away from the first encapsulation layer, a portion of the filling layer filling the gaps in the main layer; and performing plasma treatment or surfactant treatment on the filling layer to form the light extraction structure.

[0030] In some embodiments, forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate includes: forming a main body layer on a side of the first encapsulation layer away from the substrate; forming a filling layer on a side of the main body layer away from the first encapsulation layer, a portion of the filling layer filling the gaps in the main body layer; and using a mask template to form the light extraction structure on the filling layer through a deposition process, the light extraction structure including a grating structure.

[0031] Other features and advantages of the present disclosure will become apparent from the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0033] The present disclosure can be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0034] FIG1 is a schematic cross-sectional view showing a display panel according to one embodiment of the present disclosure;

[0035] FIG2 is a schematic diagram illustrating a light extraction process of a display panel according to an embodiment of the present disclosure;

[0036] FIG3 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0037] FIG4 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0038] FIG5 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0039] FIG6 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0040] FIG7 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0041] FIG8 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0042] FIG9 is a schematic cross-sectional view showing a display panel according to another embodiment of the present disclosure;

[0043] FIG10 is a flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0044] 11A to 11C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to some embodiments of the present disclosure;

[0045] 12A to 12C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure;

[0046] 13A to 13C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure;

[0047] 14A to 14C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure;

[0048] 15A to 15C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure;

[0049] FIG16 is a schematic diagram illustrating a process of forming a filling layer according to an embodiment of the present disclosure;

[0050] FIG17 is a schematic diagram illustrating a mechanism for forming a filling layer according to some embodiments of the present disclosure;

[0051] 18 is a graph showing the results of the water contact angle of the encapsulation buffer layer after the bulk layer of the encapsulation buffer layer is subjected to plasma treatment under different process conditions according to some embodiments of the present disclosure;

[0052] FIG19 is a diagram showing roughness results of the encapsulation buffer layer after plasma treatment is performed on the bulk layer of the encapsulation buffer layer under different process conditions according to some embodiments of the present disclosure;

[0053] FIG. 20 is a diagram showing the surface morphology of the encapsulation buffer layer after plasma treatment is performed on the bulk layer of the encapsulation buffer layer under different process conditions according to some embodiments of the present disclosure.

[0054] It should be understood that the size of each part shown in the accompanying drawings is not drawn according to the actual proportional relationship. In addition, the same or similar reference numerals represent the same or similar components. DETAILED DESCRIPTION

[0055] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The description of the exemplary embodiments is merely illustrative and is in no way intended to limit the present disclosure, its application, or use. The present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete and to fully convey the scope of the present disclosure to those skilled in the art. It should be noted that unless otherwise specifically stated, the relative arrangement of parts and steps, the composition of materials, numerical expressions, and numerical values ​​set forth in these embodiments should be interpreted as being merely exemplary and not as limiting.

[0056] The terms "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different parts. The terms "include" or "comprises" and similar terms mean that the elements before the term include the elements listed after the term, and do not exclude the possibility of also including other elements. The terms "upper", "lower", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0057] In the present disclosure, when a specific device is described as being located between a first device and a second device, an intervening device may or may not be present between the specific device and the first device or the second device. When a specific device is described as being connected to another device, the specific device may be directly connected to the other device without an intervening device, or may be not directly connected to the other device but with an intervening device.

[0058] All terms (including technical or scientific terms) used in this disclosure have the same meaning as those understood by one of ordinary skill in the art to which this disclosure belongs, unless otherwise specifically defined. It should also be understood that terms defined in, for example, general dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an idealized or highly formal sense, unless explicitly defined herein.

[0059] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0060] In the related art, the light extraction structure is provided in the anode layer, etc., which makes the light extraction structure relatively complicated and difficult to implement.

[0061] In view of this, embodiments of the present disclosure provide a display panel to facilitate the implementation of a light extraction structure.

[0062] FIG. 1 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the present disclosure.

[0063] As shown in FIG1 , the display panel includes a substrate 10. For example, the substrate is a flexible substrate. In some embodiments, the substrate 10 includes a transistor layer and a sub-pixel layer on the transistor layer, wherein the sub-pixel layer includes a plurality of sub-pixels. For example, the transistor layer includes: a base substrate, a substrate buffer layer, an active layer, a gate insulating layer, and a dielectric layer. The sub-pixel layer includes: a first electrode layer (e.g., an anode layer), a pixel defining layer, a light-emitting functional layer (e.g., an organic light-emitting layer), and a second electrode layer (e.g., a cathode layer). The substrate 10 may also include a doped region.

[0064] As shown in Figure 1 , the display panel also includes a first encapsulation layer 20 on the substrate 10. For example, the material of the first encapsulation layer 20 includes at least one of silicon nitride and silicon oxynitride. This first encapsulation layer acts as a first barrier layer, blocking water and oxygen. This can mitigate the adverse effects of water and oxygen on the display panel.

[0065] As shown in Figure 1 , the display panel further includes an encapsulation buffer layer 30 on a side of the first encapsulation layer 20 away from the substrate 10. The encapsulation buffer layer 30 includes a light extraction structure 31. For example, the material of the encapsulation buffer layer 30 includes at least one of acrylic and silicon carbonitride. The light extraction structure can improve the light extraction efficiency of the display panel.

[0066] As shown in Figure 1 , the display panel also includes a second encapsulation layer 40 on the side of the encapsulation buffer layer 30 that is farther from the first encapsulation layer 20. For example, the material of the second encapsulation layer 40 includes at least one of silicon nitride, silicon oxynitride, and aluminum oxide. As a second barrier layer, the second encapsulation layer 40 can block water and oxygen, thereby mitigating the adverse effects of water and oxygen on the display panel.

[0067] In this embodiment, the first encapsulation layer, the encapsulation buffer layer, and the second encapsulation layer together serve as the encapsulation layer of the display panel. Since the light extraction structure is disposed in the encapsulation layer, implementation is relatively easy.

[0068] Thus, a display panel according to some embodiments of the present disclosure is provided. The display panel includes: a substrate; a first encapsulation layer on the substrate; an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer includes a light extraction structure; and a second encapsulation layer on a side of the encapsulation buffer layer away from the first encapsulation layer. In this embodiment, the light extraction structure is provided in the encapsulation buffer layer, which is relatively easy to implement.

[0069] The above-mentioned light extraction structure has flexible light field control capabilities, which can effectively reduce light reflection and improve the light extraction efficiency of the display panel.

[0070] In terms of mechanical properties, the light extraction structure, as a micro-nano structure, can reduce the strain and stress of the display panel bending. The micro-nano structure reduces stress concentration and slows down the propagation rate of cracks. In addition, the cross-linking of the encapsulation buffer layer is stronger, the surface is denser, the hardness is increased, and residual stress can be released.

[0071] As shown in FIG1 , the encapsulation buffer layer further includes a main body layer 32 on a side of the first encapsulation layer 20 away from the substrate 10 . The light extraction structure 31 is located between the main body layer 32 and the second encapsulation layer 40 .

[0072] In some embodiments, the light extraction structure 31 includes a scattering structure 312. For example, the scattering structure 312 can be shaped like at least one of a triangle, a cylinder, and an ellipse. For example, as shown in FIG1 , the scattering structure 312 is shaped like a triangle. The layer in which the scattering structure 312 resides can be referred to as a random scattering layer.

[0073] FIG. 2 is a schematic diagram illustrating a light extraction process of a display panel according to an embodiment of the present disclosure.

[0074] Figure 2 shows a photon 501 generated in the substrate 10. Those skilled in the art will understand that although one photon 501 is shown in Figure 2, in reality, the substrate will generate multiple photons. These photons can be transmitted in the form of optical transmission paths R1, R2, R3 and R4. As shown in Figure 2, some photons reach the light extraction structure of the encapsulation buffer layer 30 along the optical transmission paths R1 and R3, and are emitted through the light extraction structure, and some photons reach the flat surface of the encapsulation buffer layer 30 along the optical transmission paths R2 and R4, wherein the photons transmitted along the optical transmission path R2 are emitted from the flat surface, while the photons transmitted along the optical transmission path R4 are totally reflected by the flat surface and cannot be emitted from the flat surface. Therefore, it can be seen that providing a light extraction structure in the encapsulation buffer layer 30 can improve the light extraction efficiency of the display panel, thereby improving the display effect of the display panel.

[0075] FIG. 3 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0076] As shown in FIG. 3 , the display panel includes a substrate 10 , a first encapsulation layer 20 , an encapsulation buffer layer 30 and a second encapsulation layer 40 .

[0077] For example, as shown in FIG3 , substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on transistor layer 11. Sub-pixel layer 12 includes a plurality of sub-pixels. In some embodiments, the orthographic projection of light extraction structure 31 on transistor layer 11 at least partially overlaps with the orthographic projection of the plurality of sub-pixels on transistor layer 11.

[0078] The encapsulation buffer layer 30 includes a light extraction structure 31 and a main layer 32. As shown in FIG3 , the main layer 32 of the encapsulation buffer layer 30 includes voids 322. For example, the voids 322 may be connected to the surface of the main layer. It should be noted that the voids 322 shown in FIG3 as not connected to the surface of the main layer are only not connected to the surface of the main layer in the current cross-sectional view. In fact, these voids are also connected to the surface of the main layer in other cross-sections or parts.

[0079] In some embodiments, as shown in FIG3 , the encapsulation buffer layer 30 further includes a filling layer 33. A portion 331 of the filling layer 33 fills the gaps 322 of the main body layer 32, and another portion 332 of the filling layer 33 is located on the surface of the main body layer 32 away from the first encapsulation layer 20. For example, the material of the filling layer 33 includes metal oxide or silicon oxide. For example, the metal oxide includes aluminum oxide (Al2O3).

[0080] The filling layer 33 reduces surface polarity, inhibits hydrogen bond formation, and combines with oxygen in the encapsulation buffer layer, thereby slowing the diffusion of water vapor and improving the barrier properties of the package. Therefore, the filling layer 33 acts as a barrier layer, blocking water and oxygen. This further reduces the adverse effects of water and oxygen on the display panel.

[0081] In some embodiments, the material of the light extraction structure is different from that of the filling layer. For example, the material of the light extraction structure 31 is the same as that of the main layer 32. For example, the material of the main layer 32 includes at least one of acrylic and silicon carbonitride. Therefore, the material of the light extraction structure 31 also includes at least one of acrylic and silicon carbonitride. The material of the filling layer 33 includes metal oxide or silicon oxide. Therefore, the material of the light extraction structure is different from that of the filling layer. As shown in Figure 3, the filling layer 33 surrounds the light extraction structure 31.

[0082] FIG. 4 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0083] Similar to the display panel shown in FIG3 , the display panel shown in FIG4 includes a substrate 10, a first encapsulation layer 20, an encapsulation buffer layer 30, and a second encapsulation layer 40. The encapsulation buffer layer 30 includes a light extraction structure 31, a main layer 32, and a filling layer 33. Compared to the display panel shown in FIG3 , the display panel shown in FIG4 differs in that the light extraction structure 31 is curved. In some embodiments, the light extraction structure 31 is elliptical.

[0084] In the above embodiment, the light extraction structure is disposed within the encapsulation buffer layer, which is relatively easy to implement. This light extraction structure can improve the light extraction efficiency of the display panel, thereby enhancing the display quality of the display panel. In addition, the filling layer within the encapsulation buffer layer can act as a barrier to water and oxygen, further mitigating the adverse effects of water and oxygen on the display panel.

[0085] FIG. 5 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0086] Similar to the display panel shown in FIG3 , the display panel shown in FIG5 includes a substrate 10 , a first encapsulation layer 20 , an encapsulation buffer layer 30 and a second encapsulation layer 40 , wherein the encapsulation buffer layer 30 includes a light extraction structure 31 , a main layer 32 and a filling layer 33 .

[0087] As shown in FIG. 5 , the substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11 .

[0088] As shown in FIG5 , the sub-pixel layer 12 includes a pixel defining layer 121. The pixel defining layer 121 has an opening 1212. The sub-pixel layer 12 also includes a light-emitting functional layer 122 located at least in the opening 1212 of the pixel defining layer. The sub-pixel layer 12 also includes an electrode layer (e.g., a cathode layer) 123 covering the pixel defining layer 121 and the light-emitting functional layer 122. Of course, those skilled in the art will appreciate that the sub-pixel layer may also include other structural layers, and therefore, the scope of the present disclosure is not limited thereto.

[0089] Here, the light-emitting functional layer in each opening is used to emit light, thereby forming a sub-pixel. As shown in Figure 5, the orthographic projection of a portion of the light extraction structure 31 on the transistor layer 11 at least partially overlaps with the orthographic projection of the sub-pixel on the transistor layer 11. Since the sub-pixel layer 12 includes a plurality of sub-pixels, the orthographic projection of the light extraction structure 31 on the transistor layer 11 at least partially overlaps with the orthographic projection of the plurality of sub-pixels on the transistor layer 11. Such a design makes it easy for the light emitted by the sub-pixel to be emitted from the corresponding portion of the light extraction structure, thereby improving the light extraction efficiency of the display panel, and further improving the display effect of the display panel.

[0090] In some embodiments, the light extraction structure includes a grating structure. The following describes an embodiment in which the light extraction structure includes a grating structure in conjunction with the accompanying drawings.

[0091] FIG. 6 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0092] As shown in FIG6 , the display panel includes a substrate 10, a first encapsulation layer 20, an encapsulation buffer layer 30, and a second encapsulation layer 40. The encapsulation buffer layer 30 includes a light extraction structure 31, a main layer 32, and a filling layer 33. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. The sub-pixel layer 12 includes a pixel defining layer 121, a light-emitting functional layer 122, and an electrode layer 123. For example, different light-emitting functional layers are shown in FIG6 , so that a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B can be formed.

[0093] As shown in FIG6 , the light extraction structure 31 includes a grating structure, which can further improve the light extraction efficiency of the display panel and thus improve the display effect of the display panel.

[0094] In some embodiments, as shown in FIG6 , the grating structure includes a plurality of sub-grating structures 314 , wherein the plurality of sub-grating structures 314 include at least a portion of sub-grating structures, and the structural parameters of the at least a portion of the sub-grating structures are different from each other.

[0095] In the above embodiment, the light extraction structure adopts a grating structure. Among the multiple sub-grating structures of the grating structure, the structural parameters of at least some of the sub-grating structures are different from each other. In this way, gratings with different structural parameters can be used for different lights, thereby improving the light extraction efficiency of the display panel and further improving the display effect of the display panel.

[0096] For example, as described above, the substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. The sub-pixel layer 12 includes a plurality of sub-pixels, such as red sub-pixels R, green sub-pixels G, and blue sub-pixels B.

[0097] At least a portion of the sub-grating structure includes a first sub-grating structure 314a, a second sub-grating structure 314b, and a third sub-grating structure 314c. The orthographic projection of the first sub-grating structure 314a on the transistor layer 11 at least partially overlaps with the orthographic projection of the red sub-pixel R on the transistor layer 11. For example, the orthographic projection of the first sub-grating structure 314a on the transistor layer 11 completely covers the orthographic projection of the red sub-pixel R on the transistor layer 11. The orthographic projection of the second sub-grating structure 314b on the transistor layer 11 at least partially overlaps with the orthographic projection of the green sub-pixel G on the transistor layer 11. For example, the orthographic projection of the second sub-grating structure 314b on the transistor layer 11 completely covers the orthographic projection of the green sub-pixel G on the transistor layer 11. The orthographic projection of the third sub-grating structure 314c on the transistor layer 11 at least partially overlaps with the orthographic projection of the blue sub-pixel B on the transistor layer 11. For example, the orthographic projection of the third sub-grating structure 314c on the transistor layer 11 completely covers the orthographic projection of the blue sub-pixel B on the transistor layer 11. The structural parameters of the first sub-grating structure 314 a , the second sub-grating structure 314 b and the third sub-grating structure 314 c are different from each other.

[0098] Here, each sub-grating structure 314 includes a plurality of strip-shaped components 3142. As shown in FIG6 , the structural parameters of each sub-grating structure 314 include: a spacing D between adjacent strip-shaped components in the plurality of strip-shaped components 3142, and / or a height H of each strip-shaped component in the plurality of strip-shaped components. The height H refers to the height of each strip-shaped component in a direction perpendicular to the transistor layer.

[0099] In the above embodiment, the light extraction structure adopts a grating structure, and corresponding sub-grating structures are adopted for sub-pixels of different luminous colors. In this way, gratings with different structural parameters can be used for light of different colors, thereby improving the light extraction efficiency of the display panel and further improving the display effect of the display panel.

[0100] For example, a periodic grating can be formed by a super surface treatment (e.g., plasma treatment). Here, it should be noted that the super surface treatment is performed in the presence of a precursor gas, and the precursor gas reacts to form a material layer deposited on the surface of the object. Therefore, the super surface treatment actually realizes a deposition process; during the deposition process, a grating structure can be formed in the presence of a mask. The above-mentioned grating structure is a periodic grating, which adopts a grating coupling method and utilizes the construction of a periodic microstructure of the interface of the organic layer, thereby using the grating to complete the wave vector matching and realize the light outgoing coupling of the surface plasma.

[0101] The specific principle is as follows: the grating period is Λ, the incident angle of light is α, and the x-direction wave vector k of the grating structure interface is x for:

[0102] Here, γ is an integer obtained, w is the angular frequency, g is the Bragg wave vector, and c is the speed of light.

[0103] The dispersion relation at this time is:

[0104] Where ε is the dielectric constant, k p is the wave vector of the surface plasmon wave.

[0105] Further simplified to:

[0106] Where Δk is the change in wave vector.

[0107] Therefore, the introduction of the microstructure enables the wave vector increment Δk to meet the wave vector matching requirements, thereby exciting the plasma mode.

[0108] Plasma treatment forms ripple light. The extraction of ripple light is based on grating diffraction. The extraction effect depends on the periodicity and geometric shape of the ripple. The periodic design principle is: taking the WP mode (waveguide mode) and SPP mode (surface plasmon mode) as an example, the refractive index n corresponding to the in-plane wave vector is eff Should be

[0109] Among them, k o is the free space wave vector.

[0110] As the grating diffracts, the in-plane wave vector for in, is the change in wave vector introduced by the diffraction grating. The direction after diffraction by the grating is opposite to the direction of the in-plane wave vector, so,

[0111] Therefore, if light is to be emitted, it must satisfy At this time, the grating period is Λ and satisfies:

[0112] Here, λ is the wavelength of light passing through the grating (ie, the emission wavelength).

[0113] Depending on the power and time of treating the surface (eg, the surface of the host layer), different widths and / or heights of periodic gratings corresponding to red light, blue light, or green light can be formed.

[0114] For example, the period of the grating structure (ie, the length of each period) ranges from 200 nm to 600 nm.

[0115] For example, the interval between adjacent strip-shaped components in the plurality of strip-shaped components 3142 ranges from 5 nanometers to 50 nanometers.

[0116] For example, the height of each strip-shaped member 3142 ranges from 10 nanometers to 50 nanometers.

[0117] The above describes an embodiment in which structural parameters of at least a portion of the plurality of sub-grating structures are different from each other.

[0118] In other embodiments, the structural parameters of all sub-grating structures are the same.

[0119] FIG. 7 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0120] Compared with the display panel shown in FIG6 , the difference between the display substrate shown in FIG7 is that the grating structure includes a plurality of sub-grating structures 314, and the structural parameters of the plurality of sub-grating structures 314 are the same. For example, the plurality of sub-grating structures 314 include a first sub-grating structure 314a, a second sub-grating structure 314b, and a third sub-grating structure 314c. The first sub-grating structure 314a corresponds to the red sub-pixel R, the second sub-grating structure 314b corresponds to the green sub-pixel G, and the third sub-grating structure 314c corresponds to the blue sub-pixel B. The structural parameters of the first sub-grating structure 314a, the second sub-grating structure 314b, and the third sub-grating structure 314c are the same. That is, the grating structure is a periodic grating on the entire surface. Such a grating design can also improve the light extraction efficiency of the display panel to a certain extent, and facilitate the manufacture of the grating structure.

[0121] FIG. 8 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0122] As shown in FIG8 , the display panel includes a substrate 10, a first encapsulation layer 20, an encapsulation buffer layer 30, and a second encapsulation layer 40. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. The encapsulation buffer layer 30 includes a light extraction structure 31, a main layer 32, and a filling layer 33.

[0123] Compared with the display panel shown in FIG. 3 , the display panel shown in FIG. 8 is different in that the material of the light extraction structure 31 is the same as that of the filling layer 33 , and the light extraction structure 31 is located on a side of the filling layer 33 away from the first encapsulation layer 20 .

[0124] This provides further embodiments for implementing a light extraction structure within the encapsulation layer. In this embodiment, the light extraction structure is disposed on the filling layer of the encapsulation buffer layer, which is relatively easy to implement. This light extraction structure can improve the light extraction efficiency of the display panel, thereby enhancing the display quality of the display panel. In addition, the filling layer in the encapsulation buffer layer can act as a barrier to water and oxygen, further mitigating the adverse effects of water and oxygen on the display panel.

[0125] FIG. 9 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present disclosure.

[0126] As shown in Figure 9, the display panel includes a substrate 10, a first encapsulation layer 20, an encapsulation buffer layer 30, and a second encapsulation layer 40. The encapsulation buffer layer 30 includes a light extraction structure 31, a main layer 32, and a filling layer 33. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11.

[0127] The light extraction structure 31 includes a grating structure, which includes a plurality of sub-grating structures 314. At least a portion of the sub-grating structures 314 include a first sub-grating structure 314a, a second sub-grating structure 314b, and a third sub-grating structure 314c.

[0128] In some embodiments, the structural parameters of at least a portion of the sub-grating structures are different from each other. For example, the structural parameters of the first sub-grating structure 314a, the second sub-grating structure 314b, and the third sub-grating structure 314c are different from each other.

[0129] In some other embodiments, the structural parameters of the plurality of sub-grating structures 314 are the same. For example, the structural parameters of the first sub-grating structure 314a, the second sub-grating structure 314b, and the third sub-grating structure 314c are the same.

[0130] As shown in FIG. 9 , the material of the light extraction structure 31 is the same as that of the filling layer 33 , and the light extraction structure 31 is located on a side of the filling layer 33 away from the first encapsulation layer 20 .

[0131] This provides other embodiments for implementing a light extraction structure in the encapsulation layer. In this embodiment, the light extraction structure is provided on the filling layer of the encapsulation buffer layer, and the light extraction structure is designed as a grating structure, which can further improve the light extraction efficiency of the display panel and thus improve the display effect of the display panel.

[0132] In some embodiments of the present disclosure, a display device is further provided. The display device includes the display panel described above (e.g., the display panel shown in Figures 1, 3, 4, 5, 6, 7, 8, or 9). For example, the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigation system.

[0133] Figure 10 is a flow chart illustrating a method for manufacturing a display panel according to one embodiment of the present disclosure. As shown in Figure 10 , the manufacturing method includes steps S1010 to S1030. Figures 11A to 11C are schematic cross-sectional views illustrating the structure of a display panel at several stages during the manufacturing process according to some embodiments of the present disclosure. The manufacturing method of a display panel according to some embodiments of the present disclosure will be described in detail below in conjunction with Figures 10 , 11A to 11C , and Figure 1 .

[0134] As shown in FIG. 10 , in step S1010 , a first encapsulation layer is formed on a substrate.

[0135] For example, as shown in FIG. 11A , a first encapsulation layer 20 is formed on a substrate 10 through a deposition process.

[0136] Returning to FIG. 10 , in step S1020 , an encapsulation buffer layer is formed on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer includes a light extraction structure.

[0137] This step 1020 can be described in conjunction with FIG. 11B and FIG. 11C .

[0138] For example, as shown in FIG. 11B , the main body layer 32 may be formed on a side of the first encapsulation layer 20 away from the substrate 10 by a deposition process.

[0139] In some embodiments, the bulk layer of the encapsulation buffer layer is a SiCN (silicon carbon nitride) film layer, for example, which is deposited using a CVD process. Both SiCN and SiN film layers have hexagonal crystal structures and are easily mixed, which can form a stable crystal structure. For example, a SiCN:H2 film can be prepared by adding C2H2, N2, and H2 based on the experimental parameters of the SiN process.

[0140] 11C , plasma treatment or surfactant treatment is performed on the body layer 32 to form a light extraction structure 31 . For example, the light extraction structure includes a scattering structure 312 .

[0141] In some embodiments, the plasma treatment includes RIE (Reactive Ion Etching) plasma treatment or CVD (Chemical Vapor Deposition) plasma treatment.

[0142] In some embodiments, the plasma treatment includes plasma treatment performed using fluorine (F) plasma.

[0143] For example, by introducing NF3 (nitrogen trifluoride) gas into the reaction chamber, the surface of the main layer of the encapsulation buffer layer is fluorinated, and the formation of fluorocarbon and fluorine is inserted into the polymer chain to form -CF2 and -CF3 bonds. The process conditions of the plasma treatment include: power of 50W (watts) to 1500W, gas flow rate of 50sccm (standard cubic centimeter per minute) to 4000sccm, and time of 30s (seconds) to 900s. For example, the process conditions of the plasma treatment include: power of 1000W, gas flow rate of 1000sccm, and time of 150s.

[0144] After the aforementioned metasurface treatment, a random scattering layer (serving as a light extraction structure) can be formed in various shapes, such as triangular, cylindrical, and elliptical. This random scattering layer is simple to manufacture and not only facilitates light extraction across a broad visible light region, but also contributes to angular spectral stability and Lambertian emission. The random scattering layer can be a non-periodic structure with a circular distribution, enabling uniform light extraction across different azimuth angles.

[0145] For another example, SF6 (sulfur hexafluoride) plasma treatment can also be used to treat the surface of the main layer of the encapsulation buffer layer. This can change the treated surface from hydrophilic to hydrophobic. SF6, as a plasma dielectric gas, is used to etch semiconductors and various functional films, and it has a significant effect on the surface morphology of the material. When etching occurs, micro-nano structures with a certain degree of roughness will be produced on the surface of the material. These micro-nano structures can effectively prevent the diffusion and infiltration of droplets, making the material exhibit higher hydrophobicity. When the plasma power is large, the width of the micro-nano grooves produced by the etching action becomes larger, and the droplets can easily penetrate to the bottom of the etched microgrooves. When the diffusion of the droplets is no longer blocked, the WCA (Water Contact Angle) value drops again.

[0146] SF6 active particles bombard the surface of the bulk layer, causing a chemical reaction on the activated surface, producing volatile compounds that lead to the formation of grooves. This increases the surface roughness. This increase in surface roughness is caused by the formation of a scattering layer structure due to etching.

[0147] After the main layer of the packaging buffer layer is treated with SF6 plasma, a surface with a relatively rough surface and a concave-convex structure appears.

[0148] At this point, the encapsulation buffer layer 30 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The encapsulation buffer layer 30 includes a light extraction structure 31 .

[0149] In some embodiments, the shape of the formed scattering structure can be adjusted by adjusting at least one of the power of the plasma treatment, the distance between the plates in the reaction chamber, and the plasma treatment speed.

[0150] Returning to FIG. 10 , in step S1030 , a second encapsulation layer is formed on a side of the encapsulation buffer layer away from the first encapsulation layer.

[0151] For example, as shown in FIG. 1 , the second encapsulation layer 40 is formed on a side of the encapsulation buffer layer 30 away from the first encapsulation layer 20 through a deposition process.

[0152] Thus, a method for manufacturing a display panel according to some embodiments of the present disclosure is provided. The manufacturing method includes: forming a first encapsulation layer on a substrate; forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer includes a light extraction structure; and forming a second encapsulation layer on a side of the encapsulation buffer layer away from the first encapsulation layer. In this manufacturing method, the light extraction structure is formed in the encapsulation buffer layer, which is easy to implement. The light extraction structure can improve the light extraction efficiency of the display panel, thereby improving the display effect of the display panel.

[0153] 12A to 12C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure. A method for manufacturing a display panel according to other embodiments of the present disclosure will be described in detail below in conjunction with FIG. 12A to FIG. 12C and FIG. 3 .

[0154] 12A , a first encapsulation layer 20 is formed on a substrate 10 by a deposition process. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. For example, the first encapsulation layer 20 may be formed on the sub-pixel layer 12.

[0155] Next, as shown in FIG12B , a main layer 32 is formed on the side of the first encapsulation layer 20 away from the substrate 10. The main layer 32 is then subjected to a plasma treatment or a surfactant treatment to form a light extraction structure 31. For example, the light extraction structure includes a scattering structure 312. Here, the main layer 32 includes a void 322.

[0156] 12C , a filling layer 33 is formed on the side of the main body layer 32 away from the first encapsulation layer 20 , with a portion 331 of the filling layer 33 filling the gap 322 of the main body layer 32 . Another portion 332 of the filling layer 33 is formed on the surface of the main body layer 32 .

[0157] In some embodiments, forming a filling layer on the side of the main layer away from the first packaging layer includes alternately performing the following operations to form a filling layer on the main layer: passing a first precursor gas into a cavity where the main layer is placed, performing a first pressure-holding treatment for a first predetermined time, and after the first pressure-holding treatment, opening the cavity to perform a cleaning treatment; and passing a second precursor gas into the cavity, performing a second pressure-holding treatment for a second predetermined time, and after the second pressure-holding treatment, opening the cavity to perform a cleaning treatment.

[0158] The following describes the process of forming the filling layer by taking aluminum oxide (Al2O3) as the material of the filling layer as an example.

[0159] For example, the first precursor gas is trimethylaluminum, and the second precursor gas is O2 (oxygen). For example, the surface of the bulk layer of the encapsulation buffer layer is modified with aluminum oxide using an ALD (atomic layer deposition) process. By optimizing deposition process parameters such as temperature and exposure, effective filling of the precursor near the surface of the bulk layer is achieved. For example, the temperature range is 70°C to 110°C. The exposure is the product of the precursor concentration and the exposure time.

[0160] The improved cyclic conditions of the ALD process (also known as the mini-cycle modified conditions) described above enhance the barrier properties of the encapsulation buffer layer and maintain good bending resistance, enabling its integration into OLED device packaging. The filling process involves alternating pulses of the two precursors, but the cavity is immediately sealed after each pulse to allow the precursors to diffuse freely. This step is called holding pressure, after which the cavity is opened for cleaning.

[0161] FIG. 16 is a schematic diagram illustrating a process of forming a filling layer according to an embodiment of the present disclosure.

[0162] As shown in FIG16 , in step 1, a first precursor gas 1611 is introduced into the chamber containing the bulk layer, and a first pressure holding process 1612 is performed for a first predetermined time. After the first pressure holding process, the chamber is opened and a purge process 1613 is performed. For example, nitrogen gas is used to perform the purge process to remove impurities.

[0163] In some embodiments, the first predetermined duration ranges from 10s to 50s. Of course, those skilled in the art will appreciate that the first predetermined duration may also be other durations, and the scope of the present disclosure is not limited thereto.

[0164] As shown in FIG16 , in step 2, a second precursor gas 1621 is introduced into the chamber, and a second pressure holding process 1622 is performed for a second predetermined time. After the second pressure holding process, the chamber is opened and a cleaning process 1623 is performed. For example, nitrogen gas is used to perform the cleaning process to remove impurities.

[0165] In some embodiments, the second predetermined time period ranges from 10 seconds to 50 seconds. Of course, those skilled in the art will appreciate that the second predetermined time period may also be other time periods, and the scope of the present disclosure is not limited thereto.

[0166] The above steps 1 and 2 are performed alternately to form a filling layer on the main body layer.

[0167] The following describes the growth mechanism of the filling layer by taking the filling layer of aluminum oxide material as an example.

[0168] 17 is a schematic diagram illustrating a mechanism for forming a filling layer according to some embodiments of the present disclosure. In this process, water molecules (H2O) are used as an oxygen source to react with trimethylaluminum (Al(CH3)3) to form aluminum oxide.

[0169] As shown in FIG. 17 , in step S1701 , thermal expansion is performed on the main body layer.

[0170] Next, in step S1702, trimethylaluminum (Al(CH3)3) 1710 penetrates and is adsorbed on the surface of the bulk layer.

[0171] Next, in step S1703, water molecules (H2O) 1720 infiltrate and react with trimethylaluminum. It should be noted that while water molecules serve as the oxygen source to react with trimethylaluminum to form aluminum oxide, those skilled in the art will appreciate that oxygen can also be used as the oxygen source to react with trimethylaluminum to form aluminum oxide. Therefore, in this step, oxygen can also react with trimethylaluminum to form aluminum oxide.

[0172] Next, in step S1704, a core of aluminum oxide (Al2O3) 1730 is formed.

[0173] Next, in step S1705, an aluminum oxide film is formed on the surface of the bulk layer.

[0174] Next, in step S1706, aluminum oxide is linearly grown on the surface of the bulk layer.

[0175] In this way, a filling layer of aluminum oxide is formed.

[0176] As can be seen above, the filling process involves a tangible nucleation phase, but the growth rate initially increases, then slows down, and finally reaches a plateau. The local growth rate is faster than that of a single-cycle growth cycle after stabilization (i.e., a pure ALD deposition process). Furthermore, the growth rate upon reaching plateau is slightly faster than that of a single-cycle growth cycle after stabilization in the ALD process. This can be explained by the fact that the introduction of the pressure-holding process facilitates the full reaction of surface active sites, resulting in a higher mass gain.

[0177] At this point, the encapsulation buffer layer 30 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The encapsulation buffer layer 30 includes a light extraction structure 31 , a main layer 32 and a filling layer 33 .

[0178] Next, as shown in FIG. 3 , a second encapsulation layer 40 is formed on a side of the encapsulation buffer layer 30 away from the first encapsulation layer 20 through a deposition process.

[0179] Thus, methods for manufacturing display panels according to further embodiments of the present disclosure are provided. In this manufacturing method, not only a light extraction structure but also a filling layer is formed within the encapsulation buffer layer. This not only improves the light extraction efficiency of the display panel but also enhances the water and oxygen barrier properties of the encapsulation layer.

[0180] 13A to 13C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure. A method for manufacturing a display panel according to other embodiments of the present disclosure will be described in detail below in conjunction with FIG. 13A to FIG. 13C and FIG. 6 .

[0181] First, as shown in FIG13A , a first encapsulation layer 20 is formed on a substrate 10 through a deposition process. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. The sub-pixel layer 12 also includes an electrode layer (e.g., a cathode layer) 123 covering the pixel defining layer 121 and the light-emitting functional layer 122. For example, the first encapsulation layer 20 can be formed on the electrode layer 123.

[0182] Next, as shown in FIG. 13B , a main body layer 32 is formed on a side of the first encapsulation layer 20 away from the substrate 10 .

[0183] Next, as shown in FIG13B , a light extraction structure 31 is formed on the main layer 32 through a deposition process using a mask 1300. The light extraction structure includes a grating structure. For example, the grating structure includes multiple sub-grating structures 314. At least a portion of the multiple sub-grating structures 314 include a first sub-grating structure 314a, a second sub-grating structure 314b, and a third sub-grating structure 314c. The structural parameters of the first sub-grating structure 314a, the second sub-grating structure 314b, and the third sub-grating structure 314c can be the same or different.

[0184] In some embodiments, the process conditions for forming the grating structure include: a power range of 50 W to 2000 W, a pressure range of 50 mtorr to 2000 mtorr, a gas flow rate range of 50 sccm to 5000 sccm, and a time of 50 s to 900 s. For example, the process conditions for forming the grating structure include: a power of 500 W, a pressure of 50 mtorr, a gas flow rate of 300 sccm, and a time of 300 s.

[0185] Next, the mask 1300 is removed.

[0186] 13C , a filling layer 33 is formed on the side of the main body layer 32 away from the first encapsulation layer 20 , with a portion 331 of the filling layer 33 filling the gap 322 of the main body layer 32 . Another portion 332 of the filling layer 33 is formed on the surface of the main body layer 32 .

[0187] In this way, the encapsulation buffer layer 30 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The encapsulation buffer layer 30 includes a light extraction structure 31 , a main layer 32 and a filling layer 33 .

[0188] In some other embodiments, the encapsulation buffer layer 30 may not include the filling layer 33 . Therefore, in the above process, the filling layer 33 may not be formed.

[0189] Next, as shown in FIG. 6 , a second encapsulation layer 40 is formed on a side of the encapsulation buffer layer 30 away from the first encapsulation layer 20 through a deposition process.

[0190] Thus, methods for manufacturing display panels according to other embodiments of the present disclosure are provided. In this manufacturing method, a light extraction structure having a grating structure is formed in the encapsulation buffer layer. This can further improve the light extraction efficiency of the display panel, thereby enhancing the display quality of the display panel.

[0191] 14A to 14C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure. A method for manufacturing a display panel according to other embodiments of the present disclosure will be described in detail below in conjunction with FIG. 14A to FIG. 14C and FIG. 8 .

[0192] 14A , a first encapsulation layer 20 is formed on a substrate 10 by a deposition process. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. For example, the first encapsulation layer 20 may be formed on the sub-pixel layer 12.

[0193] 14A , a main body layer 32 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The main body layer 32 has a gap 322 .

[0194] 14B , a filling layer 33 is formed on the side of the main body layer 32 away from the first encapsulation layer 20 . A portion 331 of the filling layer 33 fills the gap 322 of the main body layer 32 . Another portion 332 of the filling layer 33 is formed on the surface of the main body layer 32 .

[0195] 14C , plasma treatment or surfactant treatment is performed on the filling layer 33 to form the light extraction structure 31. The light extraction structure 31 includes a scattering structure.

[0196] In this way, an encapsulation buffer layer 30 is formed on the side of the first encapsulation layer away from the substrate. The encapsulation buffer layer 30 includes a light extraction structure 31 , a main layer 32 and a filling layer 33 .

[0197] Next, as shown in FIG. 8 , a second encapsulation layer 40 is formed on a side of the encapsulation buffer layer 30 away from the first encapsulation layer 20 through a deposition process.

[0198] Thus, methods for manufacturing display panels according to further embodiments of the present disclosure are provided. In this manufacturing method, a light extraction structure is formed on the filling layer of the encapsulation buffer layer. This not only improves the light extraction efficiency of the display panel, but also enhances the water and oxygen barrier effect of the encapsulation layer.

[0199] 15A to 15C are schematic cross-sectional views illustrating structures at several stages in a manufacturing process of a display panel according to other embodiments of the present disclosure. A method for manufacturing a display panel according to other embodiments of the present disclosure will be described in detail below in conjunction with FIG. 15A to FIG. 15C and FIG. 9 .

[0200] 15A , a first encapsulation layer 20 is formed on a substrate 10 by a deposition process. The substrate 10 includes a transistor layer 11 and a sub-pixel layer 12 on the transistor layer 11. For example, the first encapsulation layer 20 may be formed on the sub-pixel layer 12.

[0201] 15A , a main body layer 32 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The main body layer 32 has a gap 322 .

[0202] 15B , a filling layer 33 is formed on the side of the main body layer 32 away from the first encapsulation layer 20 . A portion 331 of the filling layer 33 fills the gap 322 of the main body layer. Another portion 332 of the filling layer 33 is formed on the surface of the main body layer 32 .

[0203] Next, as shown in FIG15C , a light extraction structure 31 is formed on the filling layer 33 through a deposition process using a mask plate 1300. The light extraction structure 31 includes a grating structure. For example, the grating structure includes multiple sub-grating structures 314. At least a portion of the multiple sub-grating structures 314 include a first sub-grating structure 314a, a second sub-grating structure 314b, and a third sub-grating structure 314c. The structural parameters of the first sub-grating structure 314a, the second sub-grating structure 314b, and the third sub-grating structure 314c can be the same or different.

[0204] In this way, an encapsulation buffer layer 30 is formed on the side of the first encapsulation layer 20 away from the substrate 10 . The encapsulation buffer layer 30 includes a light extraction structure 31 , a main layer 32 and a filling layer 33 .

[0205] Next, the mask 1300 is removed.

[0206] Next, as shown in FIG. 9 , a second encapsulation layer 40 is formed on a side of the encapsulation buffer layer 30 away from the first encapsulation layer 20 through a deposition process.

[0207] Thus, methods for manufacturing display panels according to other embodiments of the present disclosure are provided. In this manufacturing method, a light extraction structure is formed on the filling layer of the encapsulation buffer layer. The light extraction structure includes a grating structure. This can further improve the light extraction efficiency of the display panel.

[0208] 18 is a graph showing the water contact angle of the encapsulation buffer layer after plasma treatment of the bulk layer of the encapsulation buffer layer under different process conditions according to some embodiments of the present disclosure. Here, "substantially" means not subjected to plasma treatment, and the following is similar.

[0209] As can be seen from FIG18 , after the main layer of the encapsulation buffer layer is subjected to plasma treatment using different process conditions, the water contact angles on the surface of the encapsulation buffer layer are different.

[0210] For example, without plasma treatment, the water contact angle of the surface of the encapsulation buffer layer is 78.6°; under the process conditions of plasma treatment with a power of 300 W and a time of 60 s, the water contact angle of the surface of the encapsulation buffer layer is 89.5°; under the process conditions of plasma treatment with a power of 300 W and a time of 180 s, the water contact angle of the surface of the encapsulation buffer layer is 90.4°; under the process conditions of plasma treatment with a power of 300 W and a time of 300 s, the water contact angle of the surface of the encapsulation buffer layer is 91.6°; under the process conditions of plasma treatment with a power of 100 W and a time of 60 s, the water contact angle of the surface of the encapsulation buffer layer is 89.2°; under the process conditions of plasma treatment with a power of 500 W and a time of 60 s, the water contact angle of the surface of the encapsulation buffer layer is 92.1°.

[0211] FIG. 19 is a graph showing roughness results of the encapsulation buffer layer after plasma treatment is performed on the bulk layer of the encapsulation buffer layer under different process conditions according to some embodiments of the present disclosure.

[0212] As can be seen from FIG19 , after the main layer of the encapsulation buffer layer is subjected to plasma treatment using different process conditions, the roughness of the encapsulation buffer layer is different.

[0213] For example, in the absence of plasma treatment (i.e., the "basic" case), the surface roughness of the encapsulation buffer layer is 0.409 nm (nanometer); under the process conditions of plasma treatment with a power of 300 W and a time of 60 s, the surface roughness of the encapsulation buffer layer is 0.465 nm; under the process conditions of plasma treatment with a power of 300 W and a time of 180 s, the surface roughness of the encapsulation buffer layer is 0.407 nm; under the process conditions of plasma treatment with a power of 300 W and a time of 300 s, the surface roughness of the encapsulation buffer layer is 2.1 nm; under the process conditions of plasma treatment with a power of 100 W and a time of 60 s, the surface roughness of the encapsulation buffer layer is 0.401 nm; under the process conditions of plasma treatment with a power of 500 W and a time of 60 s, the surface roughness of the encapsulation buffer layer is 1.55 nm.

[0214] FIG. 20 is a diagram showing the surface morphology of the encapsulation buffer layer after plasma treatment is performed on the bulk layer of the encapsulation buffer layer under different process conditions according to some embodiments of the present disclosure.

[0215] As can be seen from FIG. 20 , after the main layer of the encapsulation buffer layer is subjected to plasma treatment using different process conditions, the surface morphology of the encapsulation buffer layer is different.

[0216] Thus far, various embodiments of the present disclosure have been described in detail. To avoid obscuring the concept of the present disclosure, some details known in the art have not been described. Based on the above description, those skilled in the art can fully understand how to implement the technical solutions disclosed herein.

[0217] Although some specific embodiments of the present disclosure have been described in detail through examples, those skilled in the art will understand that the above examples are for illustration only and are not intended to limit the scope of the present disclosure. Those skilled in the art will understand that the above embodiments may be modified or some technical features may be replaced with equivalents without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A display panel, comprising: substrate; a first encapsulation layer on the substrate; An encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer comprises a light extraction structure; and A second encapsulation layer is provided on a side of the encapsulation buffer layer away from the first encapsulation layer.

2. The display panel according to claim 1, wherein: The encapsulation buffer layer further includes a main body layer on a side of the first encapsulation layer away from the substrate, and the light extraction structure is located between the main body layer and the second encapsulation layer.

3. The display panel according to claim 1 or 2, wherein: The substrate comprises a transistor layer and a sub-pixel layer on the transistor layer, wherein the sub-pixel layer comprises a plurality of sub-pixels; An orthographic projection of the light extraction structure on the transistor layer at least partially overlaps with an orthographic projection of the plurality of sub-pixels on the transistor layer.

4. The display panel according to any one of claims 1 to 3, wherein: The light extraction structure includes a grating structure.

5. The display panel according to claim 4, wherein: The grating structure includes a plurality of sub-grating structures, and the plurality of sub-grating structures include at least a portion of sub-grating structures, and structural parameters of the at least a portion of sub-grating structures are different from each other.

6. The display panel according to claim 5, wherein: The substrate comprises a transistor layer and a sub-pixel layer on the transistor layer, the sub-pixel layer comprises a plurality of sub-pixels, and the plurality of sub-pixels comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel; The at least part of the sub-grating structure includes a first sub-grating structure, a second sub-grating structure and a third sub-grating structure. structure, wherein the orthographic projection of the first sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the red sub-pixel on the transistor layer, the orthographic projection of the second sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the green sub-pixel on the transistor layer, the orthographic projection of the third sub-grating structure on the transistor layer at least partially overlaps with the orthographic projection of the blue sub-pixel on the transistor layer, and the structural parameters of the first sub-grating structure, the second sub-grating structure and the third sub-grating structure are different from each other.

7. The display panel according to claim 4, wherein: The grating structure includes a plurality of sub-grating structures, and the plurality of sub-grating structures have the same structural parameters.

8. The display panel according to any one of claims 5 to 7, wherein: Each sub-grating structure includes a plurality of strip-shaped components; The structural parameters of each sub-grating structure include: the spacing between adjacent strip-shaped components in the plurality of strip-shaped components, and / or the height of each strip-shaped component in the plurality of strip-shaped components.

9. The display panel according to claim 8, wherein: The spacing between adjacent strip-shaped components in the plurality of strip-shaped components ranges from 5 nanometers to 50 nanometers; The height of each strip-shaped feature ranges from 10 nanometers to 50 nanometers.

10. The display panel according to any one of claims 1 to 3, wherein: The light extraction structure includes a scattering structure.

11. The display panel according to claim 10, wherein: The scattering structure has a shape of at least one of a triangle, a cylinder and an ellipse.

12. The display panel according to any one of claims 2 to 11, wherein: The encapsulation buffer layer further includes a filling layer, a portion of which is filled in the gaps in the main layer, and another portion of the filling layer is located on a surface of the main layer away from the first encapsulation layer.

13. The display panel according to claim 12, wherein: The material of the filling layer includes metal oxide or silicon oxide.

14. The display panel according to claim 12 or 13, wherein: The material of the light extraction structure is different from the material of the filling layer; The filling layer surrounds the light extraction structure.

15. The display panel according to claim 12 or 13, wherein: The material of the light extraction structure is the same as that of the filling layer; The light extraction structure is located on a side of the filling layer away from the first encapsulation layer.

16. A display device, comprising: A display panel as claimed in any one of claims 1 to 15.

17. A method for manufacturing a display panel, comprising: forming a first encapsulation layer on the substrate; Forming an encapsulation buffer layer on a side of the first encapsulation layer away from the substrate, wherein the encapsulation buffer layer includes a light extraction structure; and A second encapsulation layer is formed on a side of the encapsulation buffer layer away from the first encapsulation layer.

18. The manufacturing method according to claim 17, wherein: Forming a packaging buffer layer on a side of the first packaging layer away from the substrate comprises: forming a main body layer on a side of the first encapsulation layer away from the substrate; and The main layer is subjected to plasma treatment or surfactant treatment to form the light extraction structure.

19. The manufacturing method according to claim 18, wherein: The plasma treatment includes plasma treatment performed using fluorine plasma.

20. The manufacturing method according to claim 17, wherein: Forming a packaging buffer layer on a side of the first packaging layer away from the substrate comprises: forming a main body layer on a side of the first encapsulation layer away from the substrate; and The light extraction structure is formed on the main layer by a deposition process using a mask. The structure includes a grating structure.

21. The manufacturing method according to any one of claims 18 to 20, wherein: Forming a packaging buffer layer on a side of the first packaging layer away from the substrate further comprises: A filling layer is formed on a side of the main body layer away from the first encapsulation layer, and a portion of the filling layer is filled in the gaps in the main body layer.

22. The manufacturing method according to claim 21, wherein: Forming a filling layer on a side of the main body layer away from the first encapsulation layer includes alternately performing the following operations to form the filling layer on the main body layer: Passing a first precursor gas into a cavity in which the main body layer is placed, performing a first pressure-maintaining treatment for a first predetermined time, and after the first pressure-maintaining treatment, opening the cavity to perform a cleaning treatment; and A second precursor gas is introduced into the chamber to perform a second pressure-maintaining treatment for a second predetermined time. After the second pressure-maintaining treatment, the chamber is opened to perform a cleaning treatment.

23. The manufacturing method according to claim 17, wherein: Forming a packaging buffer layer on a side of the first packaging layer away from the substrate comprises: forming a main body layer on a side of the first encapsulation layer away from the substrate; forming a filling layer on a side of the main body layer away from the first encapsulation layer, wherein a portion of the filling layer is filled in the gaps in the main body layer; and The filling layer is subjected to plasma treatment or surfactant treatment to form the light extraction structure.

24. The manufacturing method according to claim 17, wherein: Forming a packaging buffer layer on a side of the first packaging layer away from the substrate comprises: forming a main body layer on a side of the first encapsulation layer away from the substrate; forming a filling layer on a side of the main body layer away from the first encapsulation layer, wherein a portion of the filling layer is filled in the gaps in the main body layer; and The light extraction structure is formed on the filling layer by a deposition process using a mask plate, and the light extraction structure includes a grating structure.

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